Jake Greaves / Mbed OS AdiSense1000_V21

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src/adi_sense_1000/ADISENSE1000_REGISTERS.h@12:97457cf77bcb, 2017-11-27 (annotated)

Committer:
kevin1990
Date:
Mon Nov 27 13:10:11 2017 +0000
Revision:
12:97457cf77bcb
v1.0 release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kevin1990 12:97457cf77bcb 1 /* ================================================================================
kevin1990 12:97457cf77bcb 2
kevin1990 12:97457cf77bcb 3 Created by : sherry
kevin1990 12:97457cf77bcb 4 Created on : 2017 Nov 14, 10:55 GMT
kevin1990 12:97457cf77bcb 5
kevin1990 12:97457cf77bcb 6 Project : ADISENSE1000_REGISTERS
kevin1990 12:97457cf77bcb 7 File : ADISENSE1000_REGISTERS.h
kevin1990 12:97457cf77bcb 8 Description : Register Definitions
kevin1990 12:97457cf77bcb 9
kevin1990 12:97457cf77bcb 10 !! ADI Confidential !!
kevin1990 12:97457cf77bcb 11 INTERNAL USE ONLY
kevin1990 12:97457cf77bcb 12
kevin1990 12:97457cf77bcb 13 Copyright (c) 2017 Analog Devices, Inc. All Rights Reserved.
kevin1990 12:97457cf77bcb 14 This software is proprietary and confidential to Analog Devices, Inc. and
kevin1990 12:97457cf77bcb 15 its licensors.
kevin1990 12:97457cf77bcb 16
kevin1990 12:97457cf77bcb 17 This file was auto-generated. Do not make local changes to this file.
kevin1990 12:97457cf77bcb 18
kevin1990 12:97457cf77bcb 19 Auto generation script information:
kevin1990 12:97457cf77bcb 20 Script: /usr/cadtools/bin/yoda.dir/generators/inc/genHeaders
kevin1990 12:97457cf77bcb 21 Last modified: 26-SEP-2017
kevin1990 12:97457cf77bcb 22
kevin1990 12:97457cf77bcb 23 ================================================================================ */
kevin1990 12:97457cf77bcb 24
kevin1990 12:97457cf77bcb 25 #ifndef _DEF_ADISENSE1000_REGISTERS_H
kevin1990 12:97457cf77bcb 26 #define _DEF_ADISENSE1000_REGISTERS_H
kevin1990 12:97457cf77bcb 27
kevin1990 12:97457cf77bcb 28 #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
kevin1990 12:97457cf77bcb 29 #include <stdint.h>
kevin1990 12:97457cf77bcb 30 #endif /* _LANGUAGE_C */
kevin1990 12:97457cf77bcb 31
kevin1990 12:97457cf77bcb 32 #ifndef __ADI_GENERATED_DEF_HEADERS__
kevin1990 12:97457cf77bcb 33 #define __ADI_GENERATED_DEF_HEADERS__ 1
kevin1990 12:97457cf77bcb 34 #endif
kevin1990 12:97457cf77bcb 35
kevin1990 12:97457cf77bcb 36 #define __ADI_HAS_ADISENSE_CORE__ 1
kevin1990 12:97457cf77bcb 37 #define __ADI_HAS_ADISENSE_SPI__ 1
kevin1990 12:97457cf77bcb 38 #define __ADI_HAS_ADSENSE_TEST__ 1
kevin1990 12:97457cf77bcb 39
kevin1990 12:97457cf77bcb 40 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 41
kevin1990 12:97457cf77bcb 42 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 43
kevin1990 12:97457cf77bcb 44 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 45 ADISENSE_SPI
kevin1990 12:97457cf77bcb 46 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 47 #define MOD_ADISENSE_SPI_BASE 0x00000000 /* */
kevin1990 12:97457cf77bcb 48 #define MOD_ADISENSE_SPI_MASK 0x00007FFF /* */
kevin1990 12:97457cf77bcb 49 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_A_RESET 0x00000010 /* Reset Value for Interface_Config_A */
kevin1990 12:97457cf77bcb 50 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_A 0x00000000 /* ADISENSE_SPI Interface Configuration A */
kevin1990 12:97457cf77bcb 51 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_B_RESET 0x00000000 /* Reset Value for Interface_Config_B */
kevin1990 12:97457cf77bcb 52 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_B 0x00000001 /* ADISENSE_SPI Interface Configuration B */
kevin1990 12:97457cf77bcb 53 #define REG_ADISENSE_SPI_DEVICE_CONFIG_RESET 0x00000000 /* Reset Value for Device_Config */
kevin1990 12:97457cf77bcb 54 #define REG_ADISENSE_SPI_DEVICE_CONFIG 0x00000002 /* ADISENSE_SPI Device Configuration */
kevin1990 12:97457cf77bcb 55 #define REG_ADISENSE_SPI_CHIP_TYPE_RESET 0x00000007 /* Reset Value for Chip_Type */
kevin1990 12:97457cf77bcb 56 #define REG_ADISENSE_SPI_CHIP_TYPE 0x00000003 /* ADISENSE_SPI Chip Type */
kevin1990 12:97457cf77bcb 57 #define REG_ADISENSE_SPI_PRODUCT_ID_L_RESET 0x00000020 /* Reset Value for Product_ID_L */
kevin1990 12:97457cf77bcb 58 #define REG_ADISENSE_SPI_PRODUCT_ID_L 0x00000004 /* ADISENSE_SPI Product ID Low */
kevin1990 12:97457cf77bcb 59 #define REG_ADISENSE_SPI_PRODUCT_ID_H_RESET 0x00000000 /* Reset Value for Product_ID_H */
kevin1990 12:97457cf77bcb 60 #define REG_ADISENSE_SPI_PRODUCT_ID_H 0x00000005 /* ADISENSE_SPI Product ID High */
kevin1990 12:97457cf77bcb 61 #define REG_ADISENSE_SPI_CHIP_GRADE_RESET 0x00000000 /* Reset Value for Chip_Grade */
kevin1990 12:97457cf77bcb 62 #define REG_ADISENSE_SPI_CHIP_GRADE 0x00000006 /* ADISENSE_SPI Chip Grade */
kevin1990 12:97457cf77bcb 63 #define REG_ADISENSE_SPI_SCRATCH_PAD_RESET 0x00000000 /* Reset Value for Scratch_Pad */
kevin1990 12:97457cf77bcb 64 #define REG_ADISENSE_SPI_SCRATCH_PAD 0x0000000A /* ADISENSE_SPI Scratch Pad */
kevin1990 12:97457cf77bcb 65 #define REG_ADISENSE_SPI_SPI_REVISION_RESET 0x00000082 /* Reset Value for SPI_Revision */
kevin1990 12:97457cf77bcb 66 #define REG_ADISENSE_SPI_SPI_REVISION 0x0000000B /* ADISENSE_SPI SPI Revision */
kevin1990 12:97457cf77bcb 67 #define REG_ADISENSE_SPI_VENDOR_L_RESET 0x00000056 /* Reset Value for Vendor_L */
kevin1990 12:97457cf77bcb 68 #define REG_ADISENSE_SPI_VENDOR_L 0x0000000C /* ADISENSE_SPI Vendor ID Low */
kevin1990 12:97457cf77bcb 69 #define REG_ADISENSE_SPI_VENDOR_H_RESET 0x00000004 /* Reset Value for Vendor_H */
kevin1990 12:97457cf77bcb 70 #define REG_ADISENSE_SPI_VENDOR_H 0x0000000D /* ADISENSE_SPI Vendor ID High */
kevin1990 12:97457cf77bcb 71 #define REG_ADISENSE_SPI_STREAM_MODE_RESET 0x00000000 /* Reset Value for Stream_Mode */
kevin1990 12:97457cf77bcb 72 #define REG_ADISENSE_SPI_STREAM_MODE 0x0000000E /* ADISENSE_SPI Stream Mode */
kevin1990 12:97457cf77bcb 73 #define REG_ADISENSE_SPI_TRANSFER_CONFIG_RESET 0x00000000 /* Reset Value for Transfer_Config */
kevin1990 12:97457cf77bcb 74 #define REG_ADISENSE_SPI_TRANSFER_CONFIG 0x0000000F /* ADISENSE_SPI Transfer Config */
kevin1990 12:97457cf77bcb 75 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_C_RESET 0x00000023 /* Reset Value for Interface_Config_C */
kevin1990 12:97457cf77bcb 76 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_C 0x00000010 /* ADISENSE_SPI Interface Configuration C */
kevin1990 12:97457cf77bcb 77 #define REG_ADISENSE_SPI_INTERFACE_STATUS_A_RESET 0x00000000 /* Reset Value for Interface_Status_A */
kevin1990 12:97457cf77bcb 78 #define REG_ADISENSE_SPI_INTERFACE_STATUS_A 0x00000011 /* ADISENSE_SPI Interface Status A */
kevin1990 12:97457cf77bcb 79
kevin1990 12:97457cf77bcb 80 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 81 ADISENSE_SPI Register BitMasks, Positions & Enumerations
kevin1990 12:97457cf77bcb 82 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 83 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 84 ADISENSE_SPI_INTERFACE_CONFIG_A Pos/Masks Description
kevin1990 12:97457cf77bcb 85 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 86 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESET 7 /* First of Two of SW_RESET Bits. */
kevin1990 12:97457cf77bcb 87 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 5 /* Determines Sequential Addressing Behavior */
kevin1990 12:97457cf77bcb 88 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 4 /* SDO Pin Enable */
kevin1990 12:97457cf77bcb 89 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESETX 0 /* Second of Two of SW_RESET Bits. */
kevin1990 12:97457cf77bcb 90 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESET 0x00000080 /* First of Two of SW_RESET Bits. */
kevin1990 12:97457cf77bcb 91 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 0x00000020 /* Determines Sequential Addressing Behavior */
kevin1990 12:97457cf77bcb 92 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 0x00000010 /* SDO Pin Enable */
kevin1990 12:97457cf77bcb 93 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESETX 0x00000001 /* Second of Two of SW_RESET Bits. */
kevin1990 12:97457cf77bcb 94 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_A_DESCEND 0x00000000 /* Addr_Ascension: Address accessed is decremented by one for each data byte when streaming */
kevin1990 12:97457cf77bcb 95 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_A_ASCEND 0x00000020 /* Addr_Ascension: Address accessed is incremented by one for each data byte when streaming */
kevin1990 12:97457cf77bcb 96
kevin1990 12:97457cf77bcb 97 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 98 ADISENSE_SPI_INTERFACE_CONFIG_B Pos/Masks Description
kevin1990 12:97457cf77bcb 99 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 100 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_B_SINGLE_INST 7 /* Select Streaming or Single Instruction Mode */
kevin1990 12:97457cf77bcb 101 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_B_SINGLE_INST 0x00000080 /* Select Streaming or Single Instruction Mode */
kevin1990 12:97457cf77bcb 102 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_B_STREAMING_MODE 0x00000000 /* Single_Inst: Streaming mode is enabled */
kevin1990 12:97457cf77bcb 103 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_B_SINGLE_INSTRUCTION_MODE 0x00000080 /* Single_Inst: Single Instruction mode is enabled */
kevin1990 12:97457cf77bcb 104
kevin1990 12:97457cf77bcb 105 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 106 ADISENSE_SPI_DEVICE_CONFIG Pos/Masks Description
kevin1990 12:97457cf77bcb 107 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 108 #define BITP_ADISENSE_SPI_DEVICE_CONFIG_OPERATING_MODES 0 /* Power Modes */
kevin1990 12:97457cf77bcb 109 #define BITM_ADISENSE_SPI_DEVICE_CONFIG_OPERATING_MODES 0x00000003 /* Power Modes */
kevin1990 12:97457cf77bcb 110 #define ENUM_ADISENSE_SPI_DEVICE_CONFIG_NORMAL 0x00000000 /* Operating_Modes: Normal Operating Mode */
kevin1990 12:97457cf77bcb 111 #define ENUM_ADISENSE_SPI_DEVICE_CONFIG_SLEEP 0x00000003 /* Operating_Modes: Low Power Mode */
kevin1990 12:97457cf77bcb 112
kevin1990 12:97457cf77bcb 113 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 114 ADISENSE_SPI_CHIP_TYPE Pos/Masks Description
kevin1990 12:97457cf77bcb 115 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 116 #define BITP_ADISENSE_SPI_CHIP_TYPE_CHIP_TYPE 0 /* Precision ADC */
kevin1990 12:97457cf77bcb 117 #define BITM_ADISENSE_SPI_CHIP_TYPE_CHIP_TYPE 0x0000000F /* Precision ADC */
kevin1990 12:97457cf77bcb 118
kevin1990 12:97457cf77bcb 119 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 120 ADISENSE_SPI_PRODUCT_ID_L Pos/Masks Description
kevin1990 12:97457cf77bcb 121 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 122 #define BITP_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_FIXED_BITS 4 /* These Bits are Fixed on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 123 #define BITP_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_TRIM_BITS 0 /* These Bits Vary on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 124 #define BITM_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_FIXED_BITS 0x000000F0 /* These Bits are Fixed on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 125 #define BITM_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_TRIM_BITS 0x0000000F /* These Bits Vary on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 126
kevin1990 12:97457cf77bcb 127 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 128 ADISENSE_SPI_PRODUCT_ID_H Pos/Masks Description
kevin1990 12:97457cf77bcb 129 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 130 #define BITP_ADISENSE_SPI_PRODUCT_ID_H_PRODUCT_ID_FIXED_BITS 0 /* These Bits are Fixed on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 131 #define BITM_ADISENSE_SPI_PRODUCT_ID_H_PRODUCT_ID_FIXED_BITS 0x000000FF /* These Bits are Fixed on Die Configured for Multiple Generics */
kevin1990 12:97457cf77bcb 132
kevin1990 12:97457cf77bcb 133 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 134 ADISENSE_SPI_CHIP_GRADE Pos/Masks Description
kevin1990 12:97457cf77bcb 135 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 136 #define BITP_ADISENSE_SPI_CHIP_GRADE_GRADE 4 /* This is the Device Performance Grade */
kevin1990 12:97457cf77bcb 137 #define BITP_ADISENSE_SPI_CHIP_GRADE_DEVICE_REVISION 0 /* This is the Device Hardware Revision */
kevin1990 12:97457cf77bcb 138 #define BITM_ADISENSE_SPI_CHIP_GRADE_GRADE 0x000000F0 /* This is the Device Performance Grade */
kevin1990 12:97457cf77bcb 139 #define BITM_ADISENSE_SPI_CHIP_GRADE_DEVICE_REVISION 0x0000000F /* This is the Device Hardware Revision */
kevin1990 12:97457cf77bcb 140
kevin1990 12:97457cf77bcb 141 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 142 ADISENSE_SPI_SCRATCH_PAD Pos/Masks Description
kevin1990 12:97457cf77bcb 143 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 144 #define BITP_ADISENSE_SPI_SCRATCH_PAD_SCRATCH_VALUE 0 /* Software Scratchpad */
kevin1990 12:97457cf77bcb 145 #define BITM_ADISENSE_SPI_SCRATCH_PAD_SCRATCH_VALUE 0x000000FF /* Software Scratchpad */
kevin1990 12:97457cf77bcb 146
kevin1990 12:97457cf77bcb 147 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 148 ADISENSE_SPI_SPI_REVISION Pos/Masks Description
kevin1990 12:97457cf77bcb 149 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 150 #define BITP_ADISENSE_SPI_SPI_REVISION_SPI_TYPE 6 /* Always Reads as 0x2 */
kevin1990 12:97457cf77bcb 151 #define BITP_ADISENSE_SPI_SPI_REVISION_VERSION 0 /* SPI Version */
kevin1990 12:97457cf77bcb 152 #define BITM_ADISENSE_SPI_SPI_REVISION_SPI_TYPE 0x000000C0 /* Always Reads as 0x2 */
kevin1990 12:97457cf77bcb 153 #define BITM_ADISENSE_SPI_SPI_REVISION_VERSION 0x0000003F /* SPI Version */
kevin1990 12:97457cf77bcb 154 #define ENUM_ADISENSE_SPI_SPI_REVISION_ADI_SPI 0x00000000
kevin1990 12:97457cf77bcb 155 #define ENUM_ADISENSE_SPI_SPI_REVISION_LPT_SPI 0x00000080
kevin1990 12:97457cf77bcb 156 #define ENUM_ADISENSE_SPI_SPI_REVISION_REV1_0 0x00000002 /* Version: Revision 1.0 */
kevin1990 12:97457cf77bcb 157
kevin1990 12:97457cf77bcb 158 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 159 ADISENSE_SPI_VENDOR_L Pos/Masks Description
kevin1990 12:97457cf77bcb 160 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 161 #define BITP_ADISENSE_SPI_VENDOR_L_VID 0 /* Analog Devices Vendor ID */
kevin1990 12:97457cf77bcb 162 #define BITM_ADISENSE_SPI_VENDOR_L_VID 0x000000FF /* Analog Devices Vendor ID */
kevin1990 12:97457cf77bcb 163
kevin1990 12:97457cf77bcb 164 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 165 ADISENSE_SPI_VENDOR_H Pos/Masks Description
kevin1990 12:97457cf77bcb 166 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 167 #define BITP_ADISENSE_SPI_VENDOR_H_VID 0 /* Analog Devices Vendor ID */
kevin1990 12:97457cf77bcb 168 #define BITM_ADISENSE_SPI_VENDOR_H_VID 0x000000FF /* Analog Devices Vendor ID */
kevin1990 12:97457cf77bcb 169
kevin1990 12:97457cf77bcb 170 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 171 ADISENSE_SPI_STREAM_MODE Pos/Masks Description
kevin1990 12:97457cf77bcb 172 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 173 #define BITP_ADISENSE_SPI_STREAM_MODE_LOOP_COUNT 0 /* Sets the Data Byte Count Before Looping to Start Address */
kevin1990 12:97457cf77bcb 174 #define BITM_ADISENSE_SPI_STREAM_MODE_LOOP_COUNT 0x000000FF /* Sets the Data Byte Count Before Looping to Start Address */
kevin1990 12:97457cf77bcb 175
kevin1990 12:97457cf77bcb 176 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 177 ADISENSE_SPI_TRANSFER_CONFIG Pos/Masks Description
kevin1990 12:97457cf77bcb 178 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 179 #define BITP_ADISENSE_SPI_TRANSFER_CONFIG_STREAM_MODE 1 /* When Streaming, Controls Master-Slave Transfer */
kevin1990 12:97457cf77bcb 180 #define BITM_ADISENSE_SPI_TRANSFER_CONFIG_STREAM_MODE 0x00000002 /* When Streaming, Controls Master-Slave Transfer */
kevin1990 12:97457cf77bcb 181 #define ENUM_ADISENSE_SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE 0x00000000 /* Stream_Mode: Transfers after each byte/mulit-byte register */
kevin1990 12:97457cf77bcb 182 #define ENUM_ADISENSE_SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP 0x00000002 /* Stream_Mode: Transfers when address loops */
kevin1990 12:97457cf77bcb 183
kevin1990 12:97457cf77bcb 184 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 185 ADISENSE_SPI_INTERFACE_CONFIG_C Pos/Masks Description
kevin1990 12:97457cf77bcb 186 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 187 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 6 /* CRC Enable */
kevin1990 12:97457cf77bcb 188 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_STRICT_REGISTER_ACCESS 5 /* Multi-byte Registers Must Be Read/Written in Full */
kevin1990 12:97457cf77bcb 189 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0 /* Inverted CRC Enable */
kevin1990 12:97457cf77bcb 190 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 0x000000C0 /* CRC Enable */
kevin1990 12:97457cf77bcb 191 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_STRICT_REGISTER_ACCESS 0x00000020 /* Multi-byte Registers Must Be Read/Written in Full */
kevin1990 12:97457cf77bcb 192 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0x00000003 /* Inverted CRC Enable */
kevin1990 12:97457cf77bcb 193 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_DISABLED 0x00000000 /* CRC_Enable: CRC Disabled */
kevin1990 12:97457cf77bcb 194 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_ENABLED 0x00000040 /* CRC_Enable: CRC Enabled */
kevin1990 12:97457cf77bcb 195 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS 0x00000000 /* Strict_Register_Access: Normal mode, no access restrictions */
kevin1990 12:97457cf77bcb 196 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_STRICT_ACCESS 0x00000020 /* Strict_Register_Access: Strict mode, multi-byte registers require all bytes read/written */
kevin1990 12:97457cf77bcb 197
kevin1990 12:97457cf77bcb 198 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 199 ADISENSE_SPI_INTERFACE_STATUS_A Pos/Masks Description
kevin1990 12:97457cf77bcb 200 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 201 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 7 /* Device Not Ready for Transaction */
kevin1990 12:97457cf77bcb 202 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 4 /* Incorrect Number of Clocks Detected in a Transaction */
kevin1990 12:97457cf77bcb 203 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_CRC_ERROR 3 /* Invalid/No CRC Received */
kevin1990 12:97457cf77bcb 204 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 2 /* Write to Read-Only Register Attempted */
kevin1990 12:97457cf77bcb 205 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_REGISTER_PARTIAL_ACCESS_ERROR 1 /* Set When Fewer Than Expected Number of Bytes Read/Written */
kevin1990 12:97457cf77bcb 206 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0 /* Attempt to Read/Write Non-existent Register Address */
kevin1990 12:97457cf77bcb 207 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 0x00000080 /* Device Not Ready for Transaction */
kevin1990 12:97457cf77bcb 208 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 0x00000010 /* Incorrect Number of Clocks Detected in a Transaction */
kevin1990 12:97457cf77bcb 209 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_CRC_ERROR 0x00000008 /* Invalid/No CRC Received */
kevin1990 12:97457cf77bcb 210 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 0x00000004 /* Write to Read-Only Register Attempted */
kevin1990 12:97457cf77bcb 211 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_REGISTER_PARTIAL_ACCESS_ERROR 0x00000002 /* Set When Fewer Than Expected Number of Bytes Read/Written */
kevin1990 12:97457cf77bcb 212 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0x00000001 /* Attempt to Read/Write Non-existent Register Address */
kevin1990 12:97457cf77bcb 213
kevin1990 12:97457cf77bcb 214
kevin1990 12:97457cf77bcb 215 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 216 ADISENSE1000 Core Registers
kevin1990 12:97457cf77bcb 217 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 218
kevin1990 12:97457cf77bcb 219 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 220 ADISENSE_CORE
kevin1990 12:97457cf77bcb 221 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 222 #define MOD_ADISENSE_CORE_BASE 0x00000010 /* ADISENSE1000 Core Registers */
kevin1990 12:97457cf77bcb 223 #define MOD_ADISENSE_CORE_MASK 0x00007FFF /* ADISENSE1000 Core Registers */
kevin1990 12:97457cf77bcb 224 #define REG_ADISENSE_CORE_COMMAND_RESET 0x00000000 /* Reset Value for Command */
kevin1990 12:97457cf77bcb 225 #define REG_ADISENSE_CORE_COMMAND 0x00000014 /* ADISENSE_CORE Special Command */
kevin1990 12:97457cf77bcb 226 #define REG_ADISENSE_CORE_MODE_RESET 0x00000000 /* Reset Value for Mode */
kevin1990 12:97457cf77bcb 227 #define REG_ADISENSE_CORE_MODE 0x00000016 /* ADISENSE_CORE Operating Mode and DRDY Control */
kevin1990 12:97457cf77bcb 228 #define REG_ADISENSE_CORE_POWER_CONFIG_RESET 0x00000000 /* Reset Value for Power_Config */
kevin1990 12:97457cf77bcb 229 #define REG_ADISENSE_CORE_POWER_CONFIG 0x00000017 /* ADISENSE_CORE General Configuration */
kevin1990 12:97457cf77bcb 230 #define REG_ADISENSE_CORE_CYCLE_CONTROL_RESET 0x00000000 /* Reset Value for Cycle_Control */
kevin1990 12:97457cf77bcb 231 #define REG_ADISENSE_CORE_CYCLE_CONTROL 0x00000018 /* ADISENSE_CORE Measurement Cycle */
kevin1990 12:97457cf77bcb 232 #define REG_ADISENSE_CORE_FIFO_NUM_CYCLES_RESET 0x00000001 /* Reset Value for Fifo_Num_Cycles */
kevin1990 12:97457cf77bcb 233 #define REG_ADISENSE_CORE_FIFO_NUM_CYCLES 0x0000001A /* ADISENSE_CORE Number of Measurement Cycles to Store in FIFO */
kevin1990 12:97457cf77bcb 234 #define REG_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_RESET 0x00000000 /* Reset Value for Multi_Cycle_Repeat_Interval */
kevin1990 12:97457cf77bcb 235 #define REG_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL 0x0000001C /* ADISENSE_CORE Time Between Repeats of Multi-Cycle Conversions.... */
kevin1990 12:97457cf77bcb 236 #define REG_ADISENSE_CORE_STATUS_RESET 0x00000000 /* Reset Value for Status */
kevin1990 12:97457cf77bcb 237 #define REG_ADISENSE_CORE_STATUS 0x00000020 /* ADISENSE_CORE General Status */
kevin1990 12:97457cf77bcb 238 #define REG_ADISENSE_CORE_DIAGNOSTICS_STATUS_RESET 0x00000000 /* Reset Value for Diagnostics_Status */
kevin1990 12:97457cf77bcb 239 #define REG_ADISENSE_CORE_DIAGNOSTICS_STATUS 0x00000024 /* ADISENSE_CORE Diagnostics Status */
kevin1990 12:97457cf77bcb 240 #define REG_ADISENSE_CORE_CHANNEL_ALERT_STATUS_RESET 0x00000000 /* Reset Value for Channel_Alert_Status */
kevin1990 12:97457cf77bcb 241 #define REG_ADISENSE_CORE_CHANNEL_ALERT_STATUS 0x00000026 /* ADISENSE_CORE Alert Status Summary */
kevin1990 12:97457cf77bcb 242 #define REG_ADISENSE_CORE_ALERT_STATUS_2_RESET 0x00000000 /* Reset Value for Alert_Status_2 */
kevin1990 12:97457cf77bcb 243 #define REG_ADISENSE_CORE_ALERT_STATUS_2 0x00000028 /* ADISENSE_CORE Additional Alert Status Information */
kevin1990 12:97457cf77bcb 244 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn_RESET 0x00000000 /* Reset Value for Alert_Detail_Ch[n] */
kevin1990 12:97457cf77bcb 245 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH0 */
kevin1990 12:97457cf77bcb 246 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH1 */
kevin1990 12:97457cf77bcb 247 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH2 */
kevin1990 12:97457cf77bcb 248 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH3 */
kevin1990 12:97457cf77bcb 249 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH4 */
kevin1990 12:97457cf77bcb 250 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH5 */
kevin1990 12:97457cf77bcb 251 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH6 */
kevin1990 12:97457cf77bcb 252 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH7 */
kevin1990 12:97457cf77bcb 253 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH8 */
kevin1990 12:97457cf77bcb 254 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH9 */
kevin1990 12:97457cf77bcb 255 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH10 */
kevin1990 12:97457cf77bcb 256 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH11 */
kevin1990 12:97457cf77bcb 257 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH12 */
kevin1990 12:97457cf77bcb 258 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH0 0x0000002A /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 259 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH1 0x0000002C /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 260 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH2 0x0000002E /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 261 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH3 0x00000030 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 262 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH4 0x00000032 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 263 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH5 0x00000034 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 264 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH6 0x00000036 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 265 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH7 0x00000038 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 266 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH8 0x0000003A /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 267 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH9 0x0000003C /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 268 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH10 0x0000003E /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 269 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH11 0x00000040 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 270 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH12 0x00000042 /* ADISENSE_CORE Detailed Error Information */
kevin1990 12:97457cf77bcb 271 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn(i) (REG_ADISENSE_CORE_ALERT_DETAIL_CH0 + ((i) * 2))
kevin1990 12:97457cf77bcb 272 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn_COUNT 13
kevin1990 12:97457cf77bcb 273 #define REG_ADISENSE_CORE_ERROR_CODE_RESET 0x00000000 /* Reset Value for Error_Code */
kevin1990 12:97457cf77bcb 274 #define REG_ADISENSE_CORE_ERROR_CODE 0x0000004C /* ADISENSE_CORE Code Indicating Source of Error */
kevin1990 12:97457cf77bcb 275 #define REG_ADISENSE_CORE_ALERT_CODE_RESET 0x00000000 /* Reset Value for Alert_Code */
kevin1990 12:97457cf77bcb 276 #define REG_ADISENSE_CORE_ALERT_CODE 0x0000004E /* ADISENSE_CORE Code Indicating Source of Alert */
kevin1990 12:97457cf77bcb 277 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE1_RESET 0x00000000 /* Reset Value for External_Reference1 */
kevin1990 12:97457cf77bcb 278 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE1 0x00000050 /* ADISENSE_CORE External Reference Information */
kevin1990 12:97457cf77bcb 279 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE2_RESET 0x00000000 /* Reset Value for External_Reference2 */
kevin1990 12:97457cf77bcb 280 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE2 0x00000054 /* ADISENSE_CORE External Reference Information */
kevin1990 12:97457cf77bcb 281 #define REG_ADISENSE_CORE_AVDD_VOLTAGE_RESET 0x40533333 /* Reset Value for AVDD_Voltage */
kevin1990 12:97457cf77bcb 282 #define REG_ADISENSE_CORE_AVDD_VOLTAGE 0x00000058 /* ADISENSE_CORE AVDD Voltage */
kevin1990 12:97457cf77bcb 283 #define REG_ADISENSE_CORE_DIAGNOSTICS_CONTROL_RESET 0x00000000 /* Reset Value for Diagnostics_Control */
kevin1990 12:97457cf77bcb 284 #define REG_ADISENSE_CORE_DIAGNOSTICS_CONTROL 0x0000005C /* ADISENSE_CORE Diagnostic Control */
kevin1990 12:97457cf77bcb 285 #define REG_ADISENSE_CORE_DATA_FIFO_RESET 0x00000000 /* Reset Value for Data_FIFO */
kevin1990 12:97457cf77bcb 286 #define REG_ADISENSE_CORE_DATA_FIFO 0x00000060 /* ADISENSE_CORE FIFO of Sensor Results */
kevin1990 12:97457cf77bcb 287 #define REG_ADISENSE_CORE_LUT_SELECT_RESET 0x00000000 /* Reset Value for LUT_Select */
kevin1990 12:97457cf77bcb 288 #define REG_ADISENSE_CORE_LUT_SELECT 0x00000070 /* ADISENSE_CORE Read/Write Strobe */
kevin1990 12:97457cf77bcb 289 #define REG_ADISENSE_CORE_LUT_OFFSET_RESET 0x00000000 /* Reset Value for LUT_Offset */
kevin1990 12:97457cf77bcb 290 #define REG_ADISENSE_CORE_LUT_OFFSET 0x00000072 /* ADISENSE_CORE Offset into Selected LUT */
kevin1990 12:97457cf77bcb 291 #define REG_ADISENSE_CORE_LUT_DATA_RESET 0x00000000 /* Reset Value for LUT_Data */
kevin1990 12:97457cf77bcb 292 #define REG_ADISENSE_CORE_LUT_DATA 0x00000074 /* ADISENSE_CORE Data to Read/Write from Addressed LUT Entry */
kevin1990 12:97457cf77bcb 293 #define REG_ADISENSE_CORE_CAL_OFFSET_RESET 0x00000000 /* Reset Value for CAL_Offset */
kevin1990 12:97457cf77bcb 294 #define REG_ADISENSE_CORE_CAL_OFFSET 0x0000007A /* ADISENSE_CORE Offset into Selected Calibration Values */
kevin1990 12:97457cf77bcb 295 #define REG_ADISENSE_CORE_CAL_DATA_RESET 0x00000000 /* Reset Value for CAL_Data */
kevin1990 12:97457cf77bcb 296 #define REG_ADISENSE_CORE_CAL_DATA 0x0000007C /* ADISENSE_CORE Data to Read/Write from Addressed Calibration Values */
kevin1990 12:97457cf77bcb 297 #define REG_ADISENSE_CORE_REVISION_RESET 0x00000000 /* Reset Value for Revision */
kevin1990 12:97457cf77bcb 298 #define REG_ADISENSE_CORE_REVISION 0x0000008C /* ADISENSE_CORE Hardware, Firmware Revision */
kevin1990 12:97457cf77bcb 299 #define REG_ADISENSE_CORE_CHANNEL_COUNTn_RESET 0x00000000 /* Reset Value for Channel_Count[n] */
kevin1990 12:97457cf77bcb 300 #define REG_ADISENSE_CORE_CHANNEL_COUNT0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT0 */
kevin1990 12:97457cf77bcb 301 #define REG_ADISENSE_CORE_CHANNEL_COUNT1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT1 */
kevin1990 12:97457cf77bcb 302 #define REG_ADISENSE_CORE_CHANNEL_COUNT2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT2 */
kevin1990 12:97457cf77bcb 303 #define REG_ADISENSE_CORE_CHANNEL_COUNT3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT3 */
kevin1990 12:97457cf77bcb 304 #define REG_ADISENSE_CORE_CHANNEL_COUNT4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT4 */
kevin1990 12:97457cf77bcb 305 #define REG_ADISENSE_CORE_CHANNEL_COUNT5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT5 */
kevin1990 12:97457cf77bcb 306 #define REG_ADISENSE_CORE_CHANNEL_COUNT6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT6 */
kevin1990 12:97457cf77bcb 307 #define REG_ADISENSE_CORE_CHANNEL_COUNT7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT7 */
kevin1990 12:97457cf77bcb 308 #define REG_ADISENSE_CORE_CHANNEL_COUNT8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT8 */
kevin1990 12:97457cf77bcb 309 #define REG_ADISENSE_CORE_CHANNEL_COUNT9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT9 */
kevin1990 12:97457cf77bcb 310 #define REG_ADISENSE_CORE_CHANNEL_COUNT10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT10 */
kevin1990 12:97457cf77bcb 311 #define REG_ADISENSE_CORE_CHANNEL_COUNT0 0x00000090 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 312 #define REG_ADISENSE_CORE_CHANNEL_COUNT1 0x000000D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 313 #define REG_ADISENSE_CORE_CHANNEL_COUNT2 0x00000110 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 314 #define REG_ADISENSE_CORE_CHANNEL_COUNT3 0x00000150 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 315 #define REG_ADISENSE_CORE_CHANNEL_COUNT4 0x00000190 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 316 #define REG_ADISENSE_CORE_CHANNEL_COUNT5 0x000001D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 317 #define REG_ADISENSE_CORE_CHANNEL_COUNT6 0x00000210 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 318 #define REG_ADISENSE_CORE_CHANNEL_COUNT7 0x00000250 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 319 #define REG_ADISENSE_CORE_CHANNEL_COUNT8 0x00000290 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 320 #define REG_ADISENSE_CORE_CHANNEL_COUNT9 0x000002D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 321 #define REG_ADISENSE_CORE_CHANNEL_COUNT10 0x00000310 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 12:97457cf77bcb 322 #define REG_ADISENSE_CORE_CHANNEL_COUNTn(i) (REG_ADISENSE_CORE_CHANNEL_COUNT0 + ((i) * 64))
kevin1990 12:97457cf77bcb 323 #define REG_ADISENSE_CORE_CHANNEL_COUNTn_COUNT 11
kevin1990 12:97457cf77bcb 324 #define REG_ADISENSE_CORE_SENSOR_TYPEn_RESET 0x00000000 /* Reset Value for Sensor_Type[n] */
kevin1990 12:97457cf77bcb 325 #define REG_ADISENSE_CORE_SENSOR_TYPE0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE0 */
kevin1990 12:97457cf77bcb 326 #define REG_ADISENSE_CORE_SENSOR_TYPE1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE1 */
kevin1990 12:97457cf77bcb 327 #define REG_ADISENSE_CORE_SENSOR_TYPE2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE2 */
kevin1990 12:97457cf77bcb 328 #define REG_ADISENSE_CORE_SENSOR_TYPE3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE3 */
kevin1990 12:97457cf77bcb 329 #define REG_ADISENSE_CORE_SENSOR_TYPE4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE4 */
kevin1990 12:97457cf77bcb 330 #define REG_ADISENSE_CORE_SENSOR_TYPE5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE5 */
kevin1990 12:97457cf77bcb 331 #define REG_ADISENSE_CORE_SENSOR_TYPE6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE6 */
kevin1990 12:97457cf77bcb 332 #define REG_ADISENSE_CORE_SENSOR_TYPE7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE7 */
kevin1990 12:97457cf77bcb 333 #define REG_ADISENSE_CORE_SENSOR_TYPE8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE8 */
kevin1990 12:97457cf77bcb 334 #define REG_ADISENSE_CORE_SENSOR_TYPE9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE9 */
kevin1990 12:97457cf77bcb 335 #define REG_ADISENSE_CORE_SENSOR_TYPE10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE10 */
kevin1990 12:97457cf77bcb 336 #define REG_ADISENSE_CORE_SENSOR_TYPE0 0x00000092 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 337 #define REG_ADISENSE_CORE_SENSOR_TYPE1 0x000000D2 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 338 #define REG_ADISENSE_CORE_SENSOR_TYPE2 0x00000112 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 339 #define REG_ADISENSE_CORE_SENSOR_TYPE3 0x00000152 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 340 #define REG_ADISENSE_CORE_SENSOR_TYPE4 0x00000192 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 341 #define REG_ADISENSE_CORE_SENSOR_TYPE5 0x000001D2 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 342 #define REG_ADISENSE_CORE_SENSOR_TYPE6 0x00000212 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 343 #define REG_ADISENSE_CORE_SENSOR_TYPE7 0x00000252 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 344 #define REG_ADISENSE_CORE_SENSOR_TYPE8 0x00000292 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 345 #define REG_ADISENSE_CORE_SENSOR_TYPE9 0x000002D2 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 346 #define REG_ADISENSE_CORE_SENSOR_TYPE10 0x00000312 /* ADISENSE_CORE Sensor Select */
kevin1990 12:97457cf77bcb 347 #define REG_ADISENSE_CORE_SENSOR_TYPEn(i) (REG_ADISENSE_CORE_SENSOR_TYPE0 + ((i) * 64))
kevin1990 12:97457cf77bcb 348 #define REG_ADISENSE_CORE_SENSOR_TYPEn_COUNT 11
kevin1990 12:97457cf77bcb 349 #define REG_ADISENSE_CORE_SENSOR_DETAILSn_RESET 0x0000FFF0 /* Reset Value for Sensor_Details[n] */
kevin1990 12:97457cf77bcb 350 #define REG_ADISENSE_CORE_SENSOR_DETAILS0_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS0 */
kevin1990 12:97457cf77bcb 351 #define REG_ADISENSE_CORE_SENSOR_DETAILS1_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS1 */
kevin1990 12:97457cf77bcb 352 #define REG_ADISENSE_CORE_SENSOR_DETAILS2_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS2 */
kevin1990 12:97457cf77bcb 353 #define REG_ADISENSE_CORE_SENSOR_DETAILS3_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS3 */
kevin1990 12:97457cf77bcb 354 #define REG_ADISENSE_CORE_SENSOR_DETAILS4_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS4 */
kevin1990 12:97457cf77bcb 355 #define REG_ADISENSE_CORE_SENSOR_DETAILS5_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS5 */
kevin1990 12:97457cf77bcb 356 #define REG_ADISENSE_CORE_SENSOR_DETAILS6_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS6 */
kevin1990 12:97457cf77bcb 357 #define REG_ADISENSE_CORE_SENSOR_DETAILS7_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS7 */
kevin1990 12:97457cf77bcb 358 #define REG_ADISENSE_CORE_SENSOR_DETAILS8_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS8 */
kevin1990 12:97457cf77bcb 359 #define REG_ADISENSE_CORE_SENSOR_DETAILS9_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS9 */
kevin1990 12:97457cf77bcb 360 #define REG_ADISENSE_CORE_SENSOR_DETAILS10_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS10 */
kevin1990 12:97457cf77bcb 361 #define REG_ADISENSE_CORE_SENSOR_DETAILS0 0x00000094 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 362 #define REG_ADISENSE_CORE_SENSOR_DETAILS1 0x000000D4 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 363 #define REG_ADISENSE_CORE_SENSOR_DETAILS2 0x00000114 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 364 #define REG_ADISENSE_CORE_SENSOR_DETAILS3 0x00000154 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 365 #define REG_ADISENSE_CORE_SENSOR_DETAILS4 0x00000194 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 366 #define REG_ADISENSE_CORE_SENSOR_DETAILS5 0x000001D4 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 367 #define REG_ADISENSE_CORE_SENSOR_DETAILS6 0x00000214 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 368 #define REG_ADISENSE_CORE_SENSOR_DETAILS7 0x00000254 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 369 #define REG_ADISENSE_CORE_SENSOR_DETAILS8 0x00000294 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 370 #define REG_ADISENSE_CORE_SENSOR_DETAILS9 0x000002D4 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 371 #define REG_ADISENSE_CORE_SENSOR_DETAILS10 0x00000314 /* ADISENSE_CORE Sensor Details */
kevin1990 12:97457cf77bcb 372 #define REG_ADISENSE_CORE_SENSOR_DETAILSn(i) (REG_ADISENSE_CORE_SENSOR_DETAILS0 + ((i) * 64))
kevin1990 12:97457cf77bcb 373 #define REG_ADISENSE_CORE_SENSOR_DETAILSn_COUNT 11
kevin1990 12:97457cf77bcb 374 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn_RESET 0x00000000 /* Reset Value for Channel_Excitation[n] */
kevin1990 12:97457cf77bcb 375 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION0 */
kevin1990 12:97457cf77bcb 376 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION1 */
kevin1990 12:97457cf77bcb 377 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION2 */
kevin1990 12:97457cf77bcb 378 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION3 */
kevin1990 12:97457cf77bcb 379 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION4 */
kevin1990 12:97457cf77bcb 380 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION5 */
kevin1990 12:97457cf77bcb 381 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION6 */
kevin1990 12:97457cf77bcb 382 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION7 */
kevin1990 12:97457cf77bcb 383 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION8 */
kevin1990 12:97457cf77bcb 384 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION9 */
kevin1990 12:97457cf77bcb 385 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION10 */
kevin1990 12:97457cf77bcb 386 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION0 0x00000098 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 387 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION1 0x000000D8 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 388 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION2 0x00000118 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 389 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION3 0x00000158 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 390 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION4 0x00000198 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 391 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION5 0x000001D8 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 392 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION6 0x00000218 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 393 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION7 0x00000258 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 394 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION8 0x00000298 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 395 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION9 0x000002D8 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 396 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION10 0x00000318 /* ADISENSE_CORE Excitation Current */
kevin1990 12:97457cf77bcb 397 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn(i) (REG_ADISENSE_CORE_CHANNEL_EXCITATION0 + ((i) * 64))
kevin1990 12:97457cf77bcb 398 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn_COUNT 11
kevin1990 12:97457cf77bcb 399 #define REG_ADISENSE_CORE_SETTLING_TIMEn_RESET 0x00000000 /* Reset Value for Settling_Time[n] */
kevin1990 12:97457cf77bcb 400 #define REG_ADISENSE_CORE_SETTLING_TIME0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME0 */
kevin1990 12:97457cf77bcb 401 #define REG_ADISENSE_CORE_SETTLING_TIME1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME1 */
kevin1990 12:97457cf77bcb 402 #define REG_ADISENSE_CORE_SETTLING_TIME2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME2 */
kevin1990 12:97457cf77bcb 403 #define REG_ADISENSE_CORE_SETTLING_TIME3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME3 */
kevin1990 12:97457cf77bcb 404 #define REG_ADISENSE_CORE_SETTLING_TIME4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME4 */
kevin1990 12:97457cf77bcb 405 #define REG_ADISENSE_CORE_SETTLING_TIME5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME5 */
kevin1990 12:97457cf77bcb 406 #define REG_ADISENSE_CORE_SETTLING_TIME6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME6 */
kevin1990 12:97457cf77bcb 407 #define REG_ADISENSE_CORE_SETTLING_TIME7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME7 */
kevin1990 12:97457cf77bcb 408 #define REG_ADISENSE_CORE_SETTLING_TIME8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME8 */
kevin1990 12:97457cf77bcb 409 #define REG_ADISENSE_CORE_SETTLING_TIME9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME9 */
kevin1990 12:97457cf77bcb 410 #define REG_ADISENSE_CORE_SETTLING_TIME10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME10 */
kevin1990 12:97457cf77bcb 411 #define REG_ADISENSE_CORE_SETTLING_TIME0 0x0000009A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 412 #define REG_ADISENSE_CORE_SETTLING_TIME1 0x000000DA /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 413 #define REG_ADISENSE_CORE_SETTLING_TIME2 0x0000011A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 414 #define REG_ADISENSE_CORE_SETTLING_TIME3 0x0000015A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 415 #define REG_ADISENSE_CORE_SETTLING_TIME4 0x0000019A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 416 #define REG_ADISENSE_CORE_SETTLING_TIME5 0x000001DA /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 417 #define REG_ADISENSE_CORE_SETTLING_TIME6 0x0000021A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 418 #define REG_ADISENSE_CORE_SETTLING_TIME7 0x0000025A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 419 #define REG_ADISENSE_CORE_SETTLING_TIME8 0x0000029A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 420 #define REG_ADISENSE_CORE_SETTLING_TIME9 0x000002DA /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 421 #define REG_ADISENSE_CORE_SETTLING_TIME10 0x0000031A /* ADISENSE_CORE Settling Time */
kevin1990 12:97457cf77bcb 422 #define REG_ADISENSE_CORE_SETTLING_TIMEn(i) (REG_ADISENSE_CORE_SETTLING_TIME0 + ((i) * 64))
kevin1990 12:97457cf77bcb 423 #define REG_ADISENSE_CORE_SETTLING_TIMEn_COUNT 11
kevin1990 12:97457cf77bcb 424 #define REG_ADISENSE_CORE_FILTER_SELECTn_RESET 0x00000000 /* Reset Value for Filter_Select[n] */
kevin1990 12:97457cf77bcb 425 #define REG_ADISENSE_CORE_FILTER_SELECT0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT0 */
kevin1990 12:97457cf77bcb 426 #define REG_ADISENSE_CORE_FILTER_SELECT1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT1 */
kevin1990 12:97457cf77bcb 427 #define REG_ADISENSE_CORE_FILTER_SELECT2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT2 */
kevin1990 12:97457cf77bcb 428 #define REG_ADISENSE_CORE_FILTER_SELECT3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT3 */
kevin1990 12:97457cf77bcb 429 #define REG_ADISENSE_CORE_FILTER_SELECT4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT4 */
kevin1990 12:97457cf77bcb 430 #define REG_ADISENSE_CORE_FILTER_SELECT5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT5 */
kevin1990 12:97457cf77bcb 431 #define REG_ADISENSE_CORE_FILTER_SELECT6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT6 */
kevin1990 12:97457cf77bcb 432 #define REG_ADISENSE_CORE_FILTER_SELECT7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT7 */
kevin1990 12:97457cf77bcb 433 #define REG_ADISENSE_CORE_FILTER_SELECT8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT8 */
kevin1990 12:97457cf77bcb 434 #define REG_ADISENSE_CORE_FILTER_SELECT9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT9 */
kevin1990 12:97457cf77bcb 435 #define REG_ADISENSE_CORE_FILTER_SELECT10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT10 */
kevin1990 12:97457cf77bcb 436 #define REG_ADISENSE_CORE_FILTER_SELECT0 0x0000009C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 437 #define REG_ADISENSE_CORE_FILTER_SELECT1 0x000000DC /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 438 #define REG_ADISENSE_CORE_FILTER_SELECT2 0x0000011C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 439 #define REG_ADISENSE_CORE_FILTER_SELECT3 0x0000015C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 440 #define REG_ADISENSE_CORE_FILTER_SELECT4 0x0000019C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 441 #define REG_ADISENSE_CORE_FILTER_SELECT5 0x000001DC /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 442 #define REG_ADISENSE_CORE_FILTER_SELECT6 0x0000021C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 443 #define REG_ADISENSE_CORE_FILTER_SELECT7 0x0000025C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 444 #define REG_ADISENSE_CORE_FILTER_SELECT8 0x0000029C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 445 #define REG_ADISENSE_CORE_FILTER_SELECT9 0x000002DC /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 446 #define REG_ADISENSE_CORE_FILTER_SELECT10 0x0000031C /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 12:97457cf77bcb 447 #define REG_ADISENSE_CORE_FILTER_SELECTn(i) (REG_ADISENSE_CORE_FILTER_SELECT0 + ((i) * 64))
kevin1990 12:97457cf77bcb 448 #define REG_ADISENSE_CORE_FILTER_SELECTn_COUNT 11
kevin1990 12:97457cf77bcb 449 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn_RESET 0x7F800000 /* Reset Value for High_Threshold_Limit[n] */
kevin1990 12:97457cf77bcb 450 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 */
kevin1990 12:97457cf77bcb 451 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1 */
kevin1990 12:97457cf77bcb 452 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2 */
kevin1990 12:97457cf77bcb 453 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3 */
kevin1990 12:97457cf77bcb 454 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4 */
kevin1990 12:97457cf77bcb 455 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5 */
kevin1990 12:97457cf77bcb 456 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6 */
kevin1990 12:97457cf77bcb 457 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7 */
kevin1990 12:97457cf77bcb 458 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8 */
kevin1990 12:97457cf77bcb 459 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9 */
kevin1990 12:97457cf77bcb 460 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10 */
kevin1990 12:97457cf77bcb 461 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11 */
kevin1990 12:97457cf77bcb 462 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12 */
kevin1990 12:97457cf77bcb 463 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 0x000000A0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 464 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1 0x000000E0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 465 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2 0x00000120 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 466 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3 0x00000160 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 467 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4 0x000001A0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 468 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5 0x000001E0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 469 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6 0x00000220 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 470 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7 0x00000260 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 471 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8 0x000002A0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 472 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9 0x000002E0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 473 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10 0x00000320 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 474 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11 0x00000360 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 475 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12 0x000003A0 /* ADISENSE_CORE High Threshold */
kevin1990 12:97457cf77bcb 476 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn(i) (REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 + ((i) * 64))
kevin1990 12:97457cf77bcb 477 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn_COUNT 13
kevin1990 12:97457cf77bcb 478 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn_RESET 0xFF800000 /* Reset Value for Low_Threshold_Limit[n] */
kevin1990 12:97457cf77bcb 479 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 */
kevin1990 12:97457cf77bcb 480 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1 */
kevin1990 12:97457cf77bcb 481 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2 */
kevin1990 12:97457cf77bcb 482 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3 */
kevin1990 12:97457cf77bcb 483 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4 */
kevin1990 12:97457cf77bcb 484 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5 */
kevin1990 12:97457cf77bcb 485 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6 */
kevin1990 12:97457cf77bcb 486 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7 */
kevin1990 12:97457cf77bcb 487 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8 */
kevin1990 12:97457cf77bcb 488 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9 */
kevin1990 12:97457cf77bcb 489 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10 */
kevin1990 12:97457cf77bcb 490 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11 */
kevin1990 12:97457cf77bcb 491 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12 */
kevin1990 12:97457cf77bcb 492 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 0x000000A4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 493 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1 0x000000E4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 494 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2 0x00000124 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 495 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3 0x00000164 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 496 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4 0x000001A4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 497 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5 0x000001E4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 498 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6 0x00000224 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 499 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7 0x00000264 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 500 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8 0x000002A4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 501 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9 0x000002E4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 502 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10 0x00000324 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 503 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11 0x00000364 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 504 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12 0x000003A4 /* ADISENSE_CORE Low Threshold */
kevin1990 12:97457cf77bcb 505 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn(i) (REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 + ((i) * 64))
kevin1990 12:97457cf77bcb 506 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn_COUNT 13
kevin1990 12:97457cf77bcb 507 #define REG_ADISENSE_CORE_SENSOR_OFFSETn_RESET 0x00000000 /* Reset Value for Sensor_Offset[n] */
kevin1990 12:97457cf77bcb 508 #define REG_ADISENSE_CORE_SENSOR_OFFSET0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET0 */
kevin1990 12:97457cf77bcb 509 #define REG_ADISENSE_CORE_SENSOR_OFFSET1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET1 */
kevin1990 12:97457cf77bcb 510 #define REG_ADISENSE_CORE_SENSOR_OFFSET2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET2 */
kevin1990 12:97457cf77bcb 511 #define REG_ADISENSE_CORE_SENSOR_OFFSET3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET3 */
kevin1990 12:97457cf77bcb 512 #define REG_ADISENSE_CORE_SENSOR_OFFSET4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET4 */
kevin1990 12:97457cf77bcb 513 #define REG_ADISENSE_CORE_SENSOR_OFFSET5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET5 */
kevin1990 12:97457cf77bcb 514 #define REG_ADISENSE_CORE_SENSOR_OFFSET6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET6 */
kevin1990 12:97457cf77bcb 515 #define REG_ADISENSE_CORE_SENSOR_OFFSET7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET7 */
kevin1990 12:97457cf77bcb 516 #define REG_ADISENSE_CORE_SENSOR_OFFSET8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET8 */
kevin1990 12:97457cf77bcb 517 #define REG_ADISENSE_CORE_SENSOR_OFFSET9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET9 */
kevin1990 12:97457cf77bcb 518 #define REG_ADISENSE_CORE_SENSOR_OFFSET10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET10 */
kevin1990 12:97457cf77bcb 519 #define REG_ADISENSE_CORE_SENSOR_OFFSET11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET11 */
kevin1990 12:97457cf77bcb 520 #define REG_ADISENSE_CORE_SENSOR_OFFSET12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET12 */
kevin1990 12:97457cf77bcb 521 #define REG_ADISENSE_CORE_SENSOR_OFFSET0 0x000000A8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 522 #define REG_ADISENSE_CORE_SENSOR_OFFSET1 0x000000E8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 523 #define REG_ADISENSE_CORE_SENSOR_OFFSET2 0x00000128 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 524 #define REG_ADISENSE_CORE_SENSOR_OFFSET3 0x00000168 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 525 #define REG_ADISENSE_CORE_SENSOR_OFFSET4 0x000001A8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 526 #define REG_ADISENSE_CORE_SENSOR_OFFSET5 0x000001E8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 527 #define REG_ADISENSE_CORE_SENSOR_OFFSET6 0x00000228 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 528 #define REG_ADISENSE_CORE_SENSOR_OFFSET7 0x00000268 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 529 #define REG_ADISENSE_CORE_SENSOR_OFFSET8 0x000002A8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 530 #define REG_ADISENSE_CORE_SENSOR_OFFSET9 0x000002E8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 531 #define REG_ADISENSE_CORE_SENSOR_OFFSET10 0x00000328 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 532 #define REG_ADISENSE_CORE_SENSOR_OFFSET11 0x00000368 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 533 #define REG_ADISENSE_CORE_SENSOR_OFFSET12 0x000003A8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 534 #define REG_ADISENSE_CORE_SENSOR_OFFSETn(i) (REG_ADISENSE_CORE_SENSOR_OFFSET0 + ((i) * 64))
kevin1990 12:97457cf77bcb 535 #define REG_ADISENSE_CORE_SENSOR_OFFSETn_COUNT 13
kevin1990 12:97457cf77bcb 536 #define REG_ADISENSE_CORE_SENSOR_GAINn_RESET 0x3F800000 /* Reset Value for Sensor_Gain[n] */
kevin1990 12:97457cf77bcb 537 #define REG_ADISENSE_CORE_SENSOR_GAIN0_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN0 */
kevin1990 12:97457cf77bcb 538 #define REG_ADISENSE_CORE_SENSOR_GAIN1_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN1 */
kevin1990 12:97457cf77bcb 539 #define REG_ADISENSE_CORE_SENSOR_GAIN2_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN2 */
kevin1990 12:97457cf77bcb 540 #define REG_ADISENSE_CORE_SENSOR_GAIN3_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN3 */
kevin1990 12:97457cf77bcb 541 #define REG_ADISENSE_CORE_SENSOR_GAIN4_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN4 */
kevin1990 12:97457cf77bcb 542 #define REG_ADISENSE_CORE_SENSOR_GAIN5_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN5 */
kevin1990 12:97457cf77bcb 543 #define REG_ADISENSE_CORE_SENSOR_GAIN6_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN6 */
kevin1990 12:97457cf77bcb 544 #define REG_ADISENSE_CORE_SENSOR_GAIN7_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN7 */
kevin1990 12:97457cf77bcb 545 #define REG_ADISENSE_CORE_SENSOR_GAIN8_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN8 */
kevin1990 12:97457cf77bcb 546 #define REG_ADISENSE_CORE_SENSOR_GAIN9_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN9 */
kevin1990 12:97457cf77bcb 547 #define REG_ADISENSE_CORE_SENSOR_GAIN10_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN10 */
kevin1990 12:97457cf77bcb 548 #define REG_ADISENSE_CORE_SENSOR_GAIN11_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN11 */
kevin1990 12:97457cf77bcb 549 #define REG_ADISENSE_CORE_SENSOR_GAIN12_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN12 */
kevin1990 12:97457cf77bcb 550 #define REG_ADISENSE_CORE_SENSOR_GAIN0 0x000000AC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 551 #define REG_ADISENSE_CORE_SENSOR_GAIN1 0x000000EC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 552 #define REG_ADISENSE_CORE_SENSOR_GAIN2 0x0000012C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 553 #define REG_ADISENSE_CORE_SENSOR_GAIN3 0x0000016C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 554 #define REG_ADISENSE_CORE_SENSOR_GAIN4 0x000001AC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 555 #define REG_ADISENSE_CORE_SENSOR_GAIN5 0x000001EC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 556 #define REG_ADISENSE_CORE_SENSOR_GAIN6 0x0000022C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 557 #define REG_ADISENSE_CORE_SENSOR_GAIN7 0x0000026C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 558 #define REG_ADISENSE_CORE_SENSOR_GAIN8 0x000002AC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 559 #define REG_ADISENSE_CORE_SENSOR_GAIN9 0x000002EC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 560 #define REG_ADISENSE_CORE_SENSOR_GAIN10 0x0000032C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 561 #define REG_ADISENSE_CORE_SENSOR_GAIN11 0x0000036C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 562 #define REG_ADISENSE_CORE_SENSOR_GAIN12 0x000003AC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 563 #define REG_ADISENSE_CORE_SENSOR_GAINn(i) (REG_ADISENSE_CORE_SENSOR_GAIN0 + ((i) * 64))
kevin1990 12:97457cf77bcb 564 #define REG_ADISENSE_CORE_SENSOR_GAINn_COUNT 13
kevin1990 12:97457cf77bcb 565 #define REG_ADISENSE_CORE_ALERT_CODE_CHn_RESET 0x00000000 /* Reset Value for Alert_Code_Ch[n] */
kevin1990 12:97457cf77bcb 566 #define REG_ADISENSE_CORE_ALERT_CODE_CH0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH0 */
kevin1990 12:97457cf77bcb 567 #define REG_ADISENSE_CORE_ALERT_CODE_CH1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH1 */
kevin1990 12:97457cf77bcb 568 #define REG_ADISENSE_CORE_ALERT_CODE_CH2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH2 */
kevin1990 12:97457cf77bcb 569 #define REG_ADISENSE_CORE_ALERT_CODE_CH3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH3 */
kevin1990 12:97457cf77bcb 570 #define REG_ADISENSE_CORE_ALERT_CODE_CH4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH4 */
kevin1990 12:97457cf77bcb 571 #define REG_ADISENSE_CORE_ALERT_CODE_CH5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH5 */
kevin1990 12:97457cf77bcb 572 #define REG_ADISENSE_CORE_ALERT_CODE_CH6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH6 */
kevin1990 12:97457cf77bcb 573 #define REG_ADISENSE_CORE_ALERT_CODE_CH7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH7 */
kevin1990 12:97457cf77bcb 574 #define REG_ADISENSE_CORE_ALERT_CODE_CH8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH8 */
kevin1990 12:97457cf77bcb 575 #define REG_ADISENSE_CORE_ALERT_CODE_CH9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH9 */
kevin1990 12:97457cf77bcb 576 #define REG_ADISENSE_CORE_ALERT_CODE_CH10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH10 */
kevin1990 12:97457cf77bcb 577 #define REG_ADISENSE_CORE_ALERT_CODE_CH11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH11 */
kevin1990 12:97457cf77bcb 578 #define REG_ADISENSE_CORE_ALERT_CODE_CH12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_CODE_CH12 */
kevin1990 12:97457cf77bcb 579 #define REG_ADISENSE_CORE_ALERT_CODE_CH0 0x000000B0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 580 #define REG_ADISENSE_CORE_ALERT_CODE_CH1 0x000000F0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 581 #define REG_ADISENSE_CORE_ALERT_CODE_CH2 0x00000130 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 582 #define REG_ADISENSE_CORE_ALERT_CODE_CH3 0x00000170 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 583 #define REG_ADISENSE_CORE_ALERT_CODE_CH4 0x000001B0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 584 #define REG_ADISENSE_CORE_ALERT_CODE_CH5 0x000001F0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 585 #define REG_ADISENSE_CORE_ALERT_CODE_CH6 0x00000230 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 586 #define REG_ADISENSE_CORE_ALERT_CODE_CH7 0x00000270 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 587 #define REG_ADISENSE_CORE_ALERT_CODE_CH8 0x000002B0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 588 #define REG_ADISENSE_CORE_ALERT_CODE_CH9 0x000002F0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 589 #define REG_ADISENSE_CORE_ALERT_CODE_CH10 0x00000330 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 590 #define REG_ADISENSE_CORE_ALERT_CODE_CH11 0x00000370 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 591 #define REG_ADISENSE_CORE_ALERT_CODE_CH12 0x000003B0 /* ADISENSE_CORE Per-Channel Detailed Alert-Code Information */
kevin1990 12:97457cf77bcb 592 #define REG_ADISENSE_CORE_ALERT_CODE_CHn(i) (REG_ADISENSE_CORE_ALERT_CODE_CH0 + ((i) * 64))
kevin1990 12:97457cf77bcb 593 #define REG_ADISENSE_CORE_ALERT_CODE_CHn_COUNT 13
kevin1990 12:97457cf77bcb 594 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Config[n] */
kevin1990 12:97457cf77bcb 595 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 */
kevin1990 12:97457cf77bcb 596 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1 */
kevin1990 12:97457cf77bcb 597 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2 */
kevin1990 12:97457cf77bcb 598 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3 */
kevin1990 12:97457cf77bcb 599 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4 */
kevin1990 12:97457cf77bcb 600 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5 */
kevin1990 12:97457cf77bcb 601 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6 */
kevin1990 12:97457cf77bcb 602 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7 */
kevin1990 12:97457cf77bcb 603 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8 */
kevin1990 12:97457cf77bcb 604 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9 */
kevin1990 12:97457cf77bcb 605 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10 */
kevin1990 12:97457cf77bcb 606 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 0x000000B8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 607 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1 0x000000F8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 608 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2 0x00000138 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 609 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3 0x00000178 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 610 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4 0x000001B8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 611 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5 0x000001F8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 612 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6 0x00000238 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 613 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7 0x00000278 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 614 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8 0x000002B8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 615 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9 0x000002F8 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 616 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10 0x00000338 /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 12:97457cf77bcb 617 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 + ((i) * 64))
kevin1990 12:97457cf77bcb 618 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn_COUNT 11
kevin1990 12:97457cf77bcb 619 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Address[n] */
kevin1990 12:97457cf77bcb 620 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 */
kevin1990 12:97457cf77bcb 621 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1 */
kevin1990 12:97457cf77bcb 622 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2 */
kevin1990 12:97457cf77bcb 623 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3 */
kevin1990 12:97457cf77bcb 624 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4 */
kevin1990 12:97457cf77bcb 625 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5 */
kevin1990 12:97457cf77bcb 626 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6 */
kevin1990 12:97457cf77bcb 627 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7 */
kevin1990 12:97457cf77bcb 628 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8 */
kevin1990 12:97457cf77bcb 629 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9 */
kevin1990 12:97457cf77bcb 630 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10 */
kevin1990 12:97457cf77bcb 631 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 0x000000BA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 632 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1 0x000000FA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 633 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2 0x0000013A /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 634 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3 0x0000017A /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 635 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4 0x000001BA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 636 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5 0x000001FA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 637 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6 0x0000023A /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 638 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7 0x0000027A /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 639 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8 0x000002BA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 640 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9 0x000002FA /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 641 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10 0x0000033A /* ADISENSE_CORE Sensor Address */
kevin1990 12:97457cf77bcb 642 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 + ((i) * 64))
kevin1990 12:97457cf77bcb 643 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn_COUNT 11
kevin1990 12:97457cf77bcb 644 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Num_Cmds[n] */
kevin1990 12:97457cf77bcb 645 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS0 */
kevin1990 12:97457cf77bcb 646 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS1 */
kevin1990 12:97457cf77bcb 647 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS2 */
kevin1990 12:97457cf77bcb 648 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS3 */
kevin1990 12:97457cf77bcb 649 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS4 */
kevin1990 12:97457cf77bcb 650 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS5 */
kevin1990 12:97457cf77bcb 651 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS6 */
kevin1990 12:97457cf77bcb 652 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS7 */
kevin1990 12:97457cf77bcb 653 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS8 */
kevin1990 12:97457cf77bcb 654 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS9 */
kevin1990 12:97457cf77bcb 655 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS10 */
kevin1990 12:97457cf77bcb 656 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS0 0x000000BB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 657 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS1 0x000000FB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 658 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS2 0x0000013B /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 659 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS3 0x0000017B /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 660 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS4 0x000001BB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 661 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS5 0x000001FB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 662 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS6 0x0000023B /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 663 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS7 0x0000027B /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 664 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS8 0x000002BB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 665 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS9 0x000002FB /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 666 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS10 0x0000033B /* ADISENSE_CORE Number of Configuration, Read Commands for Digital Sensors */
kevin1990 12:97457cf77bcb 667 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDSn(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS0 + ((i) * 64))
kevin1990 12:97457cf77bcb 668 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDSn_COUNT 11
kevin1990 12:97457cf77bcb 669 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command1[n] */
kevin1990 12:97457cf77bcb 670 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 */
kevin1990 12:97457cf77bcb 671 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11 */
kevin1990 12:97457cf77bcb 672 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12 */
kevin1990 12:97457cf77bcb 673 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13 */
kevin1990 12:97457cf77bcb 674 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14 */
kevin1990 12:97457cf77bcb 675 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15 */
kevin1990 12:97457cf77bcb 676 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16 */
kevin1990 12:97457cf77bcb 677 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17 */
kevin1990 12:97457cf77bcb 678 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18 */
kevin1990 12:97457cf77bcb 679 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19 */
kevin1990 12:97457cf77bcb 680 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110 */
kevin1990 12:97457cf77bcb 681 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 0x000000C0 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 682 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11 0x00000100 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 683 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12 0x00000140 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 684 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13 0x00000180 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 685 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14 0x000001C0 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 686 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15 0x00000200 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 687 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16 0x00000240 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 688 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17 0x00000280 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 689 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18 0x000002C0 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 690 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19 0x00000300 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 691 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110 0x00000340 /* ADISENSE_CORE Sensor Configuration Command1 */
kevin1990 12:97457cf77bcb 692 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 + ((i) * 64))
kevin1990 12:97457cf77bcb 693 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n_COUNT 11
kevin1990 12:97457cf77bcb 694 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command2[n] */
kevin1990 12:97457cf77bcb 695 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 */
kevin1990 12:97457cf77bcb 696 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21 */
kevin1990 12:97457cf77bcb 697 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22 */
kevin1990 12:97457cf77bcb 698 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23 */
kevin1990 12:97457cf77bcb 699 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24 */
kevin1990 12:97457cf77bcb 700 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25 */
kevin1990 12:97457cf77bcb 701 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26 */
kevin1990 12:97457cf77bcb 702 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27 */
kevin1990 12:97457cf77bcb 703 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28 */
kevin1990 12:97457cf77bcb 704 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29 */
kevin1990 12:97457cf77bcb 705 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210 */
kevin1990 12:97457cf77bcb 706 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 0x000000C1 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 707 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21 0x00000101 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 708 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22 0x00000141 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 709 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23 0x00000181 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 710 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24 0x000001C1 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 711 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25 0x00000201 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 712 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26 0x00000241 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 713 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27 0x00000281 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 714 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28 0x000002C1 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 715 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29 0x00000301 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 716 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210 0x00000341 /* ADISENSE_CORE Sensor Configuration Command2 */
kevin1990 12:97457cf77bcb 717 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 + ((i) * 64))
kevin1990 12:97457cf77bcb 718 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n_COUNT 11
kevin1990 12:97457cf77bcb 719 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command3[n] */
kevin1990 12:97457cf77bcb 720 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 */
kevin1990 12:97457cf77bcb 721 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31 */
kevin1990 12:97457cf77bcb 722 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32 */
kevin1990 12:97457cf77bcb 723 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33 */
kevin1990 12:97457cf77bcb 724 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34 */
kevin1990 12:97457cf77bcb 725 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35 */
kevin1990 12:97457cf77bcb 726 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36 */
kevin1990 12:97457cf77bcb 727 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37 */
kevin1990 12:97457cf77bcb 728 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38 */
kevin1990 12:97457cf77bcb 729 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39 */
kevin1990 12:97457cf77bcb 730 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310 */
kevin1990 12:97457cf77bcb 731 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 0x000000C2 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 732 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31 0x00000102 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 733 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32 0x00000142 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 734 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33 0x00000182 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 735 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34 0x000001C2 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 736 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35 0x00000202 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 737 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36 0x00000242 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 738 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37 0x00000282 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 739 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38 0x000002C2 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 740 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39 0x00000302 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 741 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310 0x00000342 /* ADISENSE_CORE Sensor Configuration Command3 */
kevin1990 12:97457cf77bcb 742 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 + ((i) * 64))
kevin1990 12:97457cf77bcb 743 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n_COUNT 11
kevin1990 12:97457cf77bcb 744 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command4[n] */
kevin1990 12:97457cf77bcb 745 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND40_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND40 */
kevin1990 12:97457cf77bcb 746 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND41_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND41 */
kevin1990 12:97457cf77bcb 747 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND42_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND42 */
kevin1990 12:97457cf77bcb 748 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND43_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND43 */
kevin1990 12:97457cf77bcb 749 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND44_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND44 */
kevin1990 12:97457cf77bcb 750 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND45_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND45 */
kevin1990 12:97457cf77bcb 751 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND46_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND46 */
kevin1990 12:97457cf77bcb 752 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND47_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND47 */
kevin1990 12:97457cf77bcb 753 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND48_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND48 */
kevin1990 12:97457cf77bcb 754 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND49_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND49 */
kevin1990 12:97457cf77bcb 755 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND410_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND410 */
kevin1990 12:97457cf77bcb 756 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND40 0x000000C3 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 757 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND41 0x00000103 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 758 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND42 0x00000143 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 759 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND43 0x00000183 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 760 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND44 0x000001C3 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 761 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND45 0x00000203 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 762 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND46 0x00000243 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 763 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND47 0x00000283 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 764 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND48 0x000002C3 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 765 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND49 0x00000303 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 766 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND410 0x00000343 /* ADISENSE_CORE Sensor Configuration Command4 */
kevin1990 12:97457cf77bcb 767 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND40 + ((i) * 64))
kevin1990 12:97457cf77bcb 768 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4n_COUNT 11
kevin1990 12:97457cf77bcb 769 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command5[n] */
kevin1990 12:97457cf77bcb 770 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND50_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND50 */
kevin1990 12:97457cf77bcb 771 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND51_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND51 */
kevin1990 12:97457cf77bcb 772 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND52_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND52 */
kevin1990 12:97457cf77bcb 773 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND53_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND53 */
kevin1990 12:97457cf77bcb 774 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND54_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND54 */
kevin1990 12:97457cf77bcb 775 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND55_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND55 */
kevin1990 12:97457cf77bcb 776 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND56_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND56 */
kevin1990 12:97457cf77bcb 777 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND57_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND57 */
kevin1990 12:97457cf77bcb 778 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND58_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND58 */
kevin1990 12:97457cf77bcb 779 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND59_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND59 */
kevin1990 12:97457cf77bcb 780 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND510_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND510 */
kevin1990 12:97457cf77bcb 781 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND50 0x000000C4 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 782 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND51 0x00000104 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 783 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND52 0x00000144 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 784 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND53 0x00000184 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 785 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND54 0x000001C4 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 786 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND55 0x00000204 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 787 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND56 0x00000244 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 788 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND57 0x00000284 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 789 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND58 0x000002C4 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 790 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND59 0x00000304 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 791 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND510 0x00000344 /* ADISENSE_CORE Sensor Configuration Command5 */
kevin1990 12:97457cf77bcb 792 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND50 + ((i) * 64))
kevin1990 12:97457cf77bcb 793 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5n_COUNT 11
kevin1990 12:97457cf77bcb 794 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command6[n] */
kevin1990 12:97457cf77bcb 795 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND60_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND60 */
kevin1990 12:97457cf77bcb 796 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND61_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND61 */
kevin1990 12:97457cf77bcb 797 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND62_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND62 */
kevin1990 12:97457cf77bcb 798 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND63_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND63 */
kevin1990 12:97457cf77bcb 799 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND64_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND64 */
kevin1990 12:97457cf77bcb 800 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND65_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND65 */
kevin1990 12:97457cf77bcb 801 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND66_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND66 */
kevin1990 12:97457cf77bcb 802 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND67_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND67 */
kevin1990 12:97457cf77bcb 803 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND68_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND68 */
kevin1990 12:97457cf77bcb 804 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND69_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND69 */
kevin1990 12:97457cf77bcb 805 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND610_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND610 */
kevin1990 12:97457cf77bcb 806 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND60 0x000000C5 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 807 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND61 0x00000105 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 808 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND62 0x00000145 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 809 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND63 0x00000185 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 810 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND64 0x000001C5 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 811 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND65 0x00000205 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 812 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND66 0x00000245 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 813 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND67 0x00000285 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 814 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND68 0x000002C5 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 815 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND69 0x00000305 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 816 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND610 0x00000345 /* ADISENSE_CORE Sensor Configuration Command6 */
kevin1990 12:97457cf77bcb 817 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND60 + ((i) * 64))
kevin1990 12:97457cf77bcb 818 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6n_COUNT 11
kevin1990 12:97457cf77bcb 819 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command7[n] */
kevin1990 12:97457cf77bcb 820 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND70_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND70 */
kevin1990 12:97457cf77bcb 821 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND71_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND71 */
kevin1990 12:97457cf77bcb 822 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND72_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND72 */
kevin1990 12:97457cf77bcb 823 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND73_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND73 */
kevin1990 12:97457cf77bcb 824 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND74_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND74 */
kevin1990 12:97457cf77bcb 825 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND75_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND75 */
kevin1990 12:97457cf77bcb 826 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND76_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND76 */
kevin1990 12:97457cf77bcb 827 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND77_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND77 */
kevin1990 12:97457cf77bcb 828 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND78_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND78 */
kevin1990 12:97457cf77bcb 829 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND79_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND79 */
kevin1990 12:97457cf77bcb 830 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND710_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND710 */
kevin1990 12:97457cf77bcb 831 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND70 0x000000C6 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 832 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND71 0x00000106 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 833 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND72 0x00000146 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 834 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND73 0x00000186 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 835 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND74 0x000001C6 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 836 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND75 0x00000206 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 837 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND76 0x00000246 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 838 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND77 0x00000286 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 839 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND78 0x000002C6 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 840 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND79 0x00000306 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 841 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND710 0x00000346 /* ADISENSE_CORE Sensor Configuration Command7 */
kevin1990 12:97457cf77bcb 842 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND70 + ((i) * 64))
kevin1990 12:97457cf77bcb 843 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7n_COUNT 11
kevin1990 12:97457cf77bcb 844 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd1[n] */
kevin1990 12:97457cf77bcb 845 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD10 */
kevin1990 12:97457cf77bcb 846 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD11 */
kevin1990 12:97457cf77bcb 847 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD12 */
kevin1990 12:97457cf77bcb 848 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD13_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD13 */
kevin1990 12:97457cf77bcb 849 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD14_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD14 */
kevin1990 12:97457cf77bcb 850 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD15_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD15 */
kevin1990 12:97457cf77bcb 851 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD16_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD16 */
kevin1990 12:97457cf77bcb 852 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD17_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD17 */
kevin1990 12:97457cf77bcb 853 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD18_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD18 */
kevin1990 12:97457cf77bcb 854 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD19_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD19 */
kevin1990 12:97457cf77bcb 855 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD110_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD110 */
kevin1990 12:97457cf77bcb 856 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD10 0x000000C8 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 857 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD11 0x00000108 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 858 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD12 0x00000148 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 859 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD13 0x00000188 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 860 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD14 0x000001C8 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 861 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD15 0x00000208 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 862 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD16 0x00000248 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 863 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD17 0x00000288 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 864 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD18 0x000002C8 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 865 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD19 0x00000308 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 866 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD110 0x00000348 /* ADISENSE_CORE Sensor Read Command1 */
kevin1990 12:97457cf77bcb 867 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD10 + ((i) * 64))
kevin1990 12:97457cf77bcb 868 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1n_COUNT 11
kevin1990 12:97457cf77bcb 869 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd2[n] */
kevin1990 12:97457cf77bcb 870 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD20_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD20 */
kevin1990 12:97457cf77bcb 871 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD21_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD21 */
kevin1990 12:97457cf77bcb 872 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD22_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD22 */
kevin1990 12:97457cf77bcb 873 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD23_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD23 */
kevin1990 12:97457cf77bcb 874 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD24_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD24 */
kevin1990 12:97457cf77bcb 875 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD25_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD25 */
kevin1990 12:97457cf77bcb 876 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD26_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD26 */
kevin1990 12:97457cf77bcb 877 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD27_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD27 */
kevin1990 12:97457cf77bcb 878 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD28_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD28 */
kevin1990 12:97457cf77bcb 879 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD29_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD29 */
kevin1990 12:97457cf77bcb 880 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD210_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD210 */
kevin1990 12:97457cf77bcb 881 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD20 0x000000C9 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 882 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD21 0x00000109 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 883 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD22 0x00000149 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 884 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD23 0x00000189 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 885 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD24 0x000001C9 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 886 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD25 0x00000209 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 887 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD26 0x00000249 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 888 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD27 0x00000289 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 889 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD28 0x000002C9 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 890 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD29 0x00000309 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 891 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD210 0x00000349 /* ADISENSE_CORE Sensor Read Command2 */
kevin1990 12:97457cf77bcb 892 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD20 + ((i) * 64))
kevin1990 12:97457cf77bcb 893 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2n_COUNT 11
kevin1990 12:97457cf77bcb 894 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd3[n] */
kevin1990 12:97457cf77bcb 895 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD30_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD30 */
kevin1990 12:97457cf77bcb 896 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD31_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD31 */
kevin1990 12:97457cf77bcb 897 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD32_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD32 */
kevin1990 12:97457cf77bcb 898 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD33_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD33 */
kevin1990 12:97457cf77bcb 899 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD34_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD34 */
kevin1990 12:97457cf77bcb 900 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD35_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD35 */
kevin1990 12:97457cf77bcb 901 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD36_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD36 */
kevin1990 12:97457cf77bcb 902 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD37_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD37 */
kevin1990 12:97457cf77bcb 903 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD38_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD38 */
kevin1990 12:97457cf77bcb 904 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD39_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD39 */
kevin1990 12:97457cf77bcb 905 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD310_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD310 */
kevin1990 12:97457cf77bcb 906 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD30 0x000000CA /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 907 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD31 0x0000010A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 908 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD32 0x0000014A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 909 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD33 0x0000018A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 910 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD34 0x000001CA /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 911 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD35 0x0000020A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 912 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD36 0x0000024A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 913 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD37 0x0000028A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 914 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD38 0x000002CA /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 915 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD39 0x0000030A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 916 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD310 0x0000034A /* ADISENSE_CORE Sensor Read Command3 */
kevin1990 12:97457cf77bcb 917 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD30 + ((i) * 64))
kevin1990 12:97457cf77bcb 918 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3n_COUNT 11
kevin1990 12:97457cf77bcb 919 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd4[n] */
kevin1990 12:97457cf77bcb 920 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD40_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD40 */
kevin1990 12:97457cf77bcb 921 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD41_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD41 */
kevin1990 12:97457cf77bcb 922 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD42_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD42 */
kevin1990 12:97457cf77bcb 923 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD43_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD43 */
kevin1990 12:97457cf77bcb 924 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD44_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD44 */
kevin1990 12:97457cf77bcb 925 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD45_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD45 */
kevin1990 12:97457cf77bcb 926 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD46_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD46 */
kevin1990 12:97457cf77bcb 927 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD47_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD47 */
kevin1990 12:97457cf77bcb 928 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD48_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD48 */
kevin1990 12:97457cf77bcb 929 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD49_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD49 */
kevin1990 12:97457cf77bcb 930 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD410_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD410 */
kevin1990 12:97457cf77bcb 931 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD40 0x000000CB /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 932 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD41 0x0000010B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 933 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD42 0x0000014B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 934 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD43 0x0000018B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 935 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD44 0x000001CB /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 936 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD45 0x0000020B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 937 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD46 0x0000024B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 938 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD47 0x0000028B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 939 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD48 0x000002CB /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 940 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD49 0x0000030B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 941 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD410 0x0000034B /* ADISENSE_CORE Sensor Read Command4 */
kevin1990 12:97457cf77bcb 942 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD40 + ((i) * 64))
kevin1990 12:97457cf77bcb 943 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4n_COUNT 11
kevin1990 12:97457cf77bcb 944 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd5[n] */
kevin1990 12:97457cf77bcb 945 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD50_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD50 */
kevin1990 12:97457cf77bcb 946 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD51_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD51 */
kevin1990 12:97457cf77bcb 947 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD52_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD52 */
kevin1990 12:97457cf77bcb 948 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD53_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD53 */
kevin1990 12:97457cf77bcb 949 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD54_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD54 */
kevin1990 12:97457cf77bcb 950 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD55_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD55 */
kevin1990 12:97457cf77bcb 951 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD56_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD56 */
kevin1990 12:97457cf77bcb 952 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD57_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD57 */
kevin1990 12:97457cf77bcb 953 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD58_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD58 */
kevin1990 12:97457cf77bcb 954 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD59_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD59 */
kevin1990 12:97457cf77bcb 955 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD510_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD510 */
kevin1990 12:97457cf77bcb 956 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD50 0x000000CC /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 957 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD51 0x0000010C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 958 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD52 0x0000014C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 959 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD53 0x0000018C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 960 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD54 0x000001CC /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 961 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD55 0x0000020C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 962 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD56 0x0000024C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 963 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD57 0x0000028C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 964 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD58 0x000002CC /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 965 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD59 0x0000030C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 966 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD510 0x0000034C /* ADISENSE_CORE Sensor Read Command5 */
kevin1990 12:97457cf77bcb 967 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD50 + ((i) * 64))
kevin1990 12:97457cf77bcb 968 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5n_COUNT 11
kevin1990 12:97457cf77bcb 969 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd6[n] */
kevin1990 12:97457cf77bcb 970 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD60_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD60 */
kevin1990 12:97457cf77bcb 971 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD61_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD61 */
kevin1990 12:97457cf77bcb 972 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD62_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD62 */
kevin1990 12:97457cf77bcb 973 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD63_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD63 */
kevin1990 12:97457cf77bcb 974 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD64_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD64 */
kevin1990 12:97457cf77bcb 975 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD65_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD65 */
kevin1990 12:97457cf77bcb 976 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD66_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD66 */
kevin1990 12:97457cf77bcb 977 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD67_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD67 */
kevin1990 12:97457cf77bcb 978 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD68_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD68 */
kevin1990 12:97457cf77bcb 979 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD69_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD69 */
kevin1990 12:97457cf77bcb 980 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD610_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD610 */
kevin1990 12:97457cf77bcb 981 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD60 0x000000CD /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 982 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD61 0x0000010D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 983 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD62 0x0000014D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 984 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD63 0x0000018D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 985 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD64 0x000001CD /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 986 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD65 0x0000020D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 987 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD66 0x0000024D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 988 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD67 0x0000028D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 989 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD68 0x000002CD /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 990 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD69 0x0000030D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 991 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD610 0x0000034D /* ADISENSE_CORE Sensor Read Command6 */
kevin1990 12:97457cf77bcb 992 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD60 + ((i) * 64))
kevin1990 12:97457cf77bcb 993 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6n_COUNT 11
kevin1990 12:97457cf77bcb 994 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Read_Cmd7[n] */
kevin1990 12:97457cf77bcb 995 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD70_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD70 */
kevin1990 12:97457cf77bcb 996 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD71_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD71 */
kevin1990 12:97457cf77bcb 997 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD72_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD72 */
kevin1990 12:97457cf77bcb 998 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD73_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD73 */
kevin1990 12:97457cf77bcb 999 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD74_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD74 */
kevin1990 12:97457cf77bcb 1000 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD75_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD75 */
kevin1990 12:97457cf77bcb 1001 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD76_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD76 */
kevin1990 12:97457cf77bcb 1002 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD77_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD77 */
kevin1990 12:97457cf77bcb 1003 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD78_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD78 */
kevin1990 12:97457cf77bcb 1004 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD79_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD79 */
kevin1990 12:97457cf77bcb 1005 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD710_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD710 */
kevin1990 12:97457cf77bcb 1006 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD70 0x000000CE /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1007 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD71 0x0000010E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1008 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD72 0x0000014E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1009 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD73 0x0000018E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1010 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD74 0x000001CE /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1011 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD75 0x0000020E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1012 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD76 0x0000024E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1013 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD77 0x0000028E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1014 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD78 0x000002CE /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1015 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD79 0x0000030E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1016 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD710 0x0000034E /* ADISENSE_CORE Sensor Read Command7 */
kevin1990 12:97457cf77bcb 1017 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD70 + ((i) * 64))
kevin1990 12:97457cf77bcb 1018 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7n_COUNT 11
kevin1990 12:97457cf77bcb 1019
kevin1990 12:97457cf77bcb 1020 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 1021 ADISENSE_CORE Register BitMasks, Positions & Enumerations
kevin1990 12:97457cf77bcb 1022 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 1023 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1024 ADISENSE_CORE_COMMAND Pos/Masks Description
kevin1990 12:97457cf77bcb 1025 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1026 #define BITP_ADISENSE_CORE_COMMAND_SPECIAL_COMMAND 0 /* Special Command */
kevin1990 12:97457cf77bcb 1027 #define BITM_ADISENSE_CORE_COMMAND_SPECIAL_COMMAND 0x000000FF /* Special Command */
kevin1990 12:97457cf77bcb 1028 #define ENUM_ADISENSE_CORE_COMMAND_NOP 0x00000000 /* Special_Command: No Command */
kevin1990 12:97457cf77bcb 1029 #define ENUM_ADISENSE_CORE_COMMAND_CONVERT 0x00000001 /* Special_Command: Start ADC Conversions */
kevin1990 12:97457cf77bcb 1030 #define ENUM_ADISENSE_CORE_COMMAND_CONVERT_WITH_RAW 0x00000002 /* Special_Command: Start Conversions with Added RAW ADC Data */
kevin1990 12:97457cf77bcb 1031 #define ENUM_ADISENSE_CORE_COMMAND_RUN_DIAGNOSTICS 0x00000003 /* Special_Command: Initiate a Diagnostics Cycle */
kevin1990 12:97457cf77bcb 1032 #define ENUM_ADISENSE_CORE_COMMAND_SELF_CALIBRATION 0x00000004 /* Special_Command: Initiate a Self-Calibration Cycle */
kevin1990 12:97457cf77bcb 1033 #define ENUM_ADISENSE_CORE_COMMAND_LOAD_CONFIG 0x00000005 /* Special_Command: Load Registers with Configuration from FLASH */
kevin1990 12:97457cf77bcb 1034 #define ENUM_ADISENSE_CORE_COMMAND_SAVE_CONFIG 0x00000006 /* Special_Command: Store Current Register Configuration to FLASH */
kevin1990 12:97457cf77bcb 1035 #define ENUM_ADISENSE_CORE_COMMAND_LATCH_CONFIG 0x00000007 /* Special_Command: Latch Configuration. */
kevin1990 12:97457cf77bcb 1036 #define ENUM_ADISENSE_CORE_COMMAND_LOAD_LUT 0x00000008 /* Special_Command: Load LUT from FLASH */
kevin1990 12:97457cf77bcb 1037 #define ENUM_ADISENSE_CORE_COMMAND_SAVE_LUT2 0x00000009 /* Special_Command: Save LUT to FLASH */
kevin1990 12:97457cf77bcb 1038 #define ENUM_ADISENSE_CORE_COMMAND_SYSTEM_CHECK 0x0000000A /* Special_Command: Full Suite of Measurement Diagnostics */
kevin1990 12:97457cf77bcb 1039
kevin1990 12:97457cf77bcb 1040 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1041 ADISENSE_CORE_MODE Pos/Masks Description
kevin1990 12:97457cf77bcb 1042 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1043 #define BITP_ADISENSE_CORE_MODE_DRDY_MODE 2 /* Indicates Behavior of DRDY with Respect to FIFO State */
kevin1990 12:97457cf77bcb 1044 #define BITP_ADISENSE_CORE_MODE_CONVERSION_MODE 0 /* Conversion Mode */
kevin1990 12:97457cf77bcb 1045 #define BITM_ADISENSE_CORE_MODE_DRDY_MODE 0x0000000C /* Indicates Behavior of DRDY with Respect to FIFO State */
kevin1990 12:97457cf77bcb 1046 #define BITM_ADISENSE_CORE_MODE_CONVERSION_MODE 0x00000003 /* Conversion Mode */
kevin1990 12:97457cf77bcb 1047 #define ENUM_ADISENSE_CORE_MODE_DRDY_PER_CONVERSION 0x00000000 /* Drdy_Mode: Data Ready Per Conversion */
kevin1990 12:97457cf77bcb 1048 #define ENUM_ADISENSE_CORE_MODE_DRDY_PER_CYCLE 0x00000004 /* Drdy_Mode: Data Ready Per Cycle */
kevin1990 12:97457cf77bcb 1049 #define ENUM_ADISENSE_CORE_MODE_DRDY_PER_FIFO_FILL 0x00000008 /* Drdy_Mode: Data Ready Per FIFO Fill */
kevin1990 12:97457cf77bcb 1050 #define ENUM_ADISENSE_CORE_MODE_DRDY_MODE3 0x0000000C /* Drdy_Mode: Undefined */
kevin1990 12:97457cf77bcb 1051 #define ENUM_ADISENSE_CORE_MODE_SINGLECYCLE 0x00000000 /* Conversion_Mode: Single Cycle */
kevin1990 12:97457cf77bcb 1052 #define ENUM_ADISENSE_CORE_MODE_MULTICYCLE 0x00000001 /* Conversion_Mode: Multi Cycle */
kevin1990 12:97457cf77bcb 1053 #define ENUM_ADISENSE_CORE_MODE_CONTINUOUS 0x00000002 /* Conversion_Mode: Continuous Conversion */
kevin1990 12:97457cf77bcb 1054 #define ENUM_ADISENSE_CORE_MODE_MODE3 0x00000003 /* Conversion_Mode: Undefined */
kevin1990 12:97457cf77bcb 1055
kevin1990 12:97457cf77bcb 1056 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1057 ADISENSE_CORE_POWER_CONFIG Pos/Masks Description
kevin1990 12:97457cf77bcb 1058 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1059 #define BITP_ADISENSE_CORE_POWER_CONFIG_STDBY_EN 4 /* Standby */
kevin1990 12:97457cf77bcb 1060 #define BITP_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_MCU 2 /* MCU Power Mode */
kevin1990 12:97457cf77bcb 1061 #define BITP_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_ADC 0 /* ADC Power Mode */
kevin1990 12:97457cf77bcb 1062 #define BITM_ADISENSE_CORE_POWER_CONFIG_STDBY_EN 0x00000010 /* Standby */
kevin1990 12:97457cf77bcb 1063 #define BITM_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_MCU 0x0000000C /* MCU Power Mode */
kevin1990 12:97457cf77bcb 1064 #define BITM_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_ADC 0x00000003 /* ADC Power Mode */
kevin1990 12:97457cf77bcb 1065 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_LOW_POWER 0x00000000 /* Power_Mode_ADC: ADC Low Power Mode */
kevin1990 12:97457cf77bcb 1066 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_MID_POWER 0x00000001 /* Power_Mode_ADC: ADC Mid Power Mode */
kevin1990 12:97457cf77bcb 1067 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_FULL_POWER 0x00000002 /* Power_Mode_ADC: ADC Full Power Mode */
kevin1990 12:97457cf77bcb 1068 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_FULL_POWER2 0x00000003 /* Power_Mode_ADC: ADC Full Power Mode2 */
kevin1990 12:97457cf77bcb 1069
kevin1990 12:97457cf77bcb 1070 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1071 ADISENSE_CORE_CYCLE_CONTROL Pos/Masks Description
kevin1990 12:97457cf77bcb 1072 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1073 #define BITP_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 14 /* Units for Cycle Time */
kevin1990 12:97457cf77bcb 1074 #define BITP_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME 0 /* Duration of a Full Measurement Cycle */
kevin1990 12:97457cf77bcb 1075 #define BITM_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 0x0000C000 /* Units for Cycle Time */
kevin1990 12:97457cf77bcb 1076 #define BITM_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME 0x00000FFF /* Duration of a Full Measurement Cycle */
kevin1990 12:97457cf77bcb 1077 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_MICROSECONDS 0x00000000 /* Cycle_Time_Units: Micro-Seconds */
kevin1990 12:97457cf77bcb 1078 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_MILLISECONDS 0x00004000 /* Cycle_Time_Units: Milli-Seconds */
kevin1990 12:97457cf77bcb 1079 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_SECONDS 0x00008000 /* Cycle_Time_Units: Seconds */
kevin1990 12:97457cf77bcb 1080 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_UNDEFINED 0x0000C000 /* Cycle_Time_Units: Undefined */
kevin1990 12:97457cf77bcb 1081
kevin1990 12:97457cf77bcb 1082 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1083 ADISENSE_CORE_FIFO_NUM_CYCLES Pos/Masks Description
kevin1990 12:97457cf77bcb 1084 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1085 #define BITP_ADISENSE_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0 /* How Many Cycles to Fill FIFO */
kevin1990 12:97457cf77bcb 1086 #define BITM_ADISENSE_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0x000000FF /* How Many Cycles to Fill FIFO */
kevin1990 12:97457cf77bcb 1087
kevin1990 12:97457cf77bcb 1088 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1089 ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL Pos/Masks Description
kevin1990 12:97457cf77bcb 1090 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1091 #define BITP_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0 /* Defines Time Between Repetitions of Measurement Cycles. */
kevin1990 12:97457cf77bcb 1092 #define BITM_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0x00FFFFFF /* Defines Time Between Repetitions of Measurement Cycles. */
kevin1990 12:97457cf77bcb 1093
kevin1990 12:97457cf77bcb 1094 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1095 ADISENSE_CORE_STATUS Pos/Masks Description
kevin1990 12:97457cf77bcb 1096 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1097 #define BITP_ADISENSE_CORE_STATUS_FIFO_ERROR 5 /* Indicates Error with FIFO */
kevin1990 12:97457cf77bcb 1098 #define BITP_ADISENSE_CORE_STATUS_CMD_RUNNING 4 /* Indicates a Special Command is Active */
kevin1990 12:97457cf77bcb 1099 #define BITP_ADISENSE_CORE_STATUS_DRDY 3 /* Indicates a New Sensor Result is Available to Be Read */
kevin1990 12:97457cf77bcb 1100 #define BITP_ADISENSE_CORE_STATUS_ERROR 2 /* Indicates an Error */
kevin1990 12:97457cf77bcb 1101 #define BITP_ADISENSE_CORE_STATUS_ALERT_ACTIVE 1 /* Indicates One or More Sensors Alerts are Active */
kevin1990 12:97457cf77bcb 1102 #define BITM_ADISENSE_CORE_STATUS_FIFO_ERROR 0x00000020 /* Indicates Error with FIFO */
kevin1990 12:97457cf77bcb 1103 #define BITM_ADISENSE_CORE_STATUS_CMD_RUNNING 0x00000010 /* Indicates a Special Command is Active */
kevin1990 12:97457cf77bcb 1104 #define BITM_ADISENSE_CORE_STATUS_DRDY 0x00000008 /* Indicates a New Sensor Result is Available to Be Read */
kevin1990 12:97457cf77bcb 1105 #define BITM_ADISENSE_CORE_STATUS_ERROR 0x00000004 /* Indicates an Error */
kevin1990 12:97457cf77bcb 1106 #define BITM_ADISENSE_CORE_STATUS_ALERT_ACTIVE 0x00000002 /* Indicates One or More Sensors Alerts are Active */
kevin1990 12:97457cf77bcb 1107
kevin1990 12:97457cf77bcb 1108 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1109 ADISENSE_CORE_DIAGNOSTICS_STATUS Pos/Masks Description
kevin1990 12:97457cf77bcb 1110 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1111 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAGNOSTICS_STATUS_SUNDRY 14 /* Sundry Diagnostics Status */
kevin1990 12:97457cf77bcb 1112 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 13 /* Indicates Error During Internal Device Calibrations */
kevin1990 12:97457cf77bcb 1113 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 12 /* Indicates Error During Internal ADC Conversions */
kevin1990 12:97457cf77bcb 1114 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 11 /* Indicates Over-Voltage Error on Positive Analog Input */
kevin1990 12:97457cf77bcb 1115 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 10 /* Indicates Under-Voltage Error on Positive Analog Input */
kevin1990 12:97457cf77bcb 1116 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 9 /* Indicates Over-Voltage Error on Negative Analog Input */
kevin1990 12:97457cf77bcb 1117 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 8 /* Indicates Under-Voltage Error on Negative Analog Input */
kevin1990 12:97457cf77bcb 1118 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 3 /* Indicates Fault on Internal Supply Regulator Capacitor */
kevin1990 12:97457cf77bcb 1119 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 2 /* Indicates Low Voltage on Internal Supply Voltages */
kevin1990 12:97457cf77bcb 1120 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 1 /* Indicates Error on Internal Device Communications */
kevin1990 12:97457cf77bcb 1121 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0 /* Indicates Error on Internal Checksum Calculations */
kevin1990 12:97457cf77bcb 1122 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAGNOSTICS_STATUS_SUNDRY 0x0000C000 /* Sundry Diagnostics Status */
kevin1990 12:97457cf77bcb 1123 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 0x00002000 /* Indicates Error During Internal Device Calibrations */
kevin1990 12:97457cf77bcb 1124 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 0x00001000 /* Indicates Error During Internal ADC Conversions */
kevin1990 12:97457cf77bcb 1125 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 0x00000800 /* Indicates Over-Voltage Error on Positive Analog Input */
kevin1990 12:97457cf77bcb 1126 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 0x00000400 /* Indicates Under-Voltage Error on Positive Analog Input */
kevin1990 12:97457cf77bcb 1127 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 0x00000200 /* Indicates Over-Voltage Error on Negative Analog Input */
kevin1990 12:97457cf77bcb 1128 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 0x00000100 /* Indicates Under-Voltage Error on Negative Analog Input */
kevin1990 12:97457cf77bcb 1129 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 0x00000008 /* Indicates Fault on Internal Supply Regulator Capacitor */
kevin1990 12:97457cf77bcb 1130 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 0x00000004 /* Indicates Low Voltage on Internal Supply Voltages */
kevin1990 12:97457cf77bcb 1131 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 0x00000002 /* Indicates Error on Internal Device Communications */
kevin1990 12:97457cf77bcb 1132 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0x00000001 /* Indicates Error on Internal Checksum Calculations */
kevin1990 12:97457cf77bcb 1133
kevin1990 12:97457cf77bcb 1134 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1135 ADISENSE_CORE_CHANNEL_ALERT_STATUS Pos/Masks Description
kevin1990 12:97457cf77bcb 1136 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1137 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 12 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1138 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 11 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1139 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 10 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1140 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 9 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1141 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 8 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1142 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 7 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1143 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 6 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1144 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 5 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1145 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 4 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1146 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 3 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1147 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 2 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1148 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 1 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1149 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1150 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 0x00001000 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1151 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 0x00000800 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1152 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 0x00000400 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1153 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 0x00000200 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1154 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 0x00000100 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1155 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 0x00000080 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1156 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 0x00000040 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1157 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 0x00000020 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1158 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 0x00000010 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1159 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 0x00000008 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1160 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 0x00000004 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1161 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 0x00000002 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1162 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0x00000001 /* Indicates Channel Alert is Active */
kevin1990 12:97457cf77bcb 1163
kevin1990 12:97457cf77bcb 1164 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1165 ADISENSE_CORE_ALERT_STATUS_2 Pos/Masks Description
kevin1990 12:97457cf77bcb 1166 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1167 #define BITP_ADISENSE_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 2 /* Indicates Error with Programmed Configuration */
kevin1990 12:97457cf77bcb 1168 #define BITP_ADISENSE_CORE_ALERT_STATUS_2_LUT_ERROR 1 /* Indicates Error with One or More Look-Up-Tables */
kevin1990 12:97457cf77bcb 1169 #define BITM_ADISENSE_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 0x00000004 /* Indicates Error with Programmed Configuration */
kevin1990 12:97457cf77bcb 1170 #define BITM_ADISENSE_CORE_ALERT_STATUS_2_LUT_ERROR 0x00000002 /* Indicates Error with One or More Look-Up-Tables */
kevin1990 12:97457cf77bcb 1171
kevin1990 12:97457cf77bcb 1172 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1173 ADISENSE_CORE_ALERT_DETAIL_CH[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1174 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1175 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 15 /* Indicates Compensation Channel Not Ready When Required */
kevin1990 12:97457cf77bcb 1176 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 14 /* Indicates Digital Sensor Not Ready When Read */
kevin1990 12:97457cf77bcb 1177 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_CORRECTION_OVERRANGE 13 /* Indicates Result Larger Than LUT/Equation Range */
kevin1990 12:97457cf77bcb 1178 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_CORRECTION_UNDERRANGE 12 /* Indicates Result Less Than LUT/Equation Range */
kevin1990 12:97457cf77bcb 1179 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_VOLTAGE 11 /* Indicates Channel Over-Voltage */
kevin1990 12:97457cf77bcb 1180 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_VOLTAGE 10 /* Indicates Channel Under-Voltage */
kevin1990 12:97457cf77bcb 1181 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 9 /* Indicates Error with Channel Look-Up-Table */
kevin1990 12:97457cf77bcb 1182 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_CONFIG_ERR 8 /* Indicates Configuration Error on Channel */
kevin1990 12:97457cf77bcb 1183 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_REF_DETECT 6 /* Indicates Whether ADC Reference is Valid */
kevin1990 12:97457cf77bcb 1184 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 5 /* Indicates Sensor Input is Open Circuit */
kevin1990 12:97457cf77bcb 1185 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 4 /* Indicates Sensor Result is Greater Than High Limit */
kevin1990 12:97457cf77bcb 1186 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_LOW_LIMIT 3 /* Indicates Sensor Result is Less Than Low Limit */
kevin1990 12:97457cf77bcb 1187 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_RANGE 2 /* Indicates Channel Over-Range */
kevin1990 12:97457cf77bcb 1188 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_RANGE 1 /* Indicates Channel Under-Range */
kevin1990 12:97457cf77bcb 1189 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_TIME_OUT 0 /* Indicates Time-Out Error from Digital Sensor */
kevin1990 12:97457cf77bcb 1190 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_COMP_NOT_READY 0x00008000 /* Indicates Compensation Channel Not Ready When Required */
kevin1990 12:97457cf77bcb 1191 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_NOT_READY 0x00004000 /* Indicates Digital Sensor Not Ready When Read */
kevin1990 12:97457cf77bcb 1192 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_CORRECTION_OVERRANGE 0x00002000 /* Indicates Result Larger Than LUT/Equation Range */
kevin1990 12:97457cf77bcb 1193 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_CORRECTION_UNDERRANGE 0x00001000 /* Indicates Result Less Than LUT/Equation Range */
kevin1990 12:97457cf77bcb 1194 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_VOLTAGE 0x00000800 /* Indicates Channel Over-Voltage */
kevin1990 12:97457cf77bcb 1195 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_VOLTAGE 0x00000400 /* Indicates Channel Under-Voltage */
kevin1990 12:97457cf77bcb 1196 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 0x00000200 /* Indicates Error with Channel Look-Up-Table */
kevin1990 12:97457cf77bcb 1197 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_CONFIG_ERR 0x00000100 /* Indicates Configuration Error on Channel */
kevin1990 12:97457cf77bcb 1198 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_REF_DETECT 0x00000040 /* Indicates Whether ADC Reference is Valid */
kevin1990 12:97457cf77bcb 1199 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 0x00000020 /* Indicates Sensor Input is Open Circuit */
kevin1990 12:97457cf77bcb 1200 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 0x00000010 /* Indicates Sensor Result is Greater Than High Limit */
kevin1990 12:97457cf77bcb 1201 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_LOW_LIMIT 0x00000008 /* Indicates Sensor Result is Less Than Low Limit */
kevin1990 12:97457cf77bcb 1202 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_RANGE 0x00000004 /* Indicates Channel Over-Range */
kevin1990 12:97457cf77bcb 1203 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_RANGE 0x00000002 /* Indicates Channel Under-Range */
kevin1990 12:97457cf77bcb 1204 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_TIME_OUT 0x00000001 /* Indicates Time-Out Error from Digital Sensor */
kevin1990 12:97457cf77bcb 1205
kevin1990 12:97457cf77bcb 1206 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1207 ADISENSE_CORE_ERROR_CODE Pos/Masks Description
kevin1990 12:97457cf77bcb 1208 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1209 #define BITP_ADISENSE_CORE_ERROR_CODE_ERROR_CODE 0 /* Code Indicating Type of Error */
kevin1990 12:97457cf77bcb 1210 #define BITM_ADISENSE_CORE_ERROR_CODE_ERROR_CODE 0x0000FFFF /* Code Indicating Type of Error */
kevin1990 12:97457cf77bcb 1211
kevin1990 12:97457cf77bcb 1212 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1213 ADISENSE_CORE_ALERT_CODE Pos/Masks Description
kevin1990 12:97457cf77bcb 1214 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1215 #define BITP_ADISENSE_CORE_ALERT_CODE_ALERT_CODE 0 /* Code Indicating Type of Alert */
kevin1990 12:97457cf77bcb 1216 #define BITM_ADISENSE_CORE_ALERT_CODE_ALERT_CODE 0x0000FFFF /* Code Indicating Type of Alert */
kevin1990 12:97457cf77bcb 1217
kevin1990 12:97457cf77bcb 1218 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1219 ADISENSE_CORE_EXTERNAL_REFERENCE1 Pos/Masks Description
kevin1990 12:97457cf77bcb 1220 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1221 #define BITP_ADISENSE_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0 /* Refin1 Value */
kevin1990 12:97457cf77bcb 1222 #define BITM_ADISENSE_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0xFFFFFFFF /* Refin1 Value */
kevin1990 12:97457cf77bcb 1223
kevin1990 12:97457cf77bcb 1224 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1225 ADISENSE_CORE_EXTERNAL_REFERENCE2 Pos/Masks Description
kevin1990 12:97457cf77bcb 1226 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1227 #define BITP_ADISENSE_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0 /* Refin2 Value */
kevin1990 12:97457cf77bcb 1228 #define BITM_ADISENSE_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0xFFFFFFFF /* Refin2 Value */
kevin1990 12:97457cf77bcb 1229
kevin1990 12:97457cf77bcb 1230 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1231 ADISENSE_CORE_AVDD_VOLTAGE Pos/Masks Description
kevin1990 12:97457cf77bcb 1232 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1233 #define BITP_ADISENSE_CORE_AVDD_VOLTAGE_AVDD_VOLTAGE 0 /* AVDD Voltage */
kevin1990 12:97457cf77bcb 1234 #define BITM_ADISENSE_CORE_AVDD_VOLTAGE_AVDD_VOLTAGE 0xFFFFFFFF /* AVDD Voltage */
kevin1990 12:97457cf77bcb 1235
kevin1990 12:97457cf77bcb 1236 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1237 ADISENSE_CORE_DIAGNOSTICS_CONTROL Pos/Masks Description
kevin1990 12:97457cf77bcb 1238 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1239 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAGNOSTICS_EXTRA 8 /* Additional Diagnostics Control */
kevin1990 12:97457cf77bcb 1240 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 2 /* Diagnostics Open Sensor Detect Frequency */
kevin1990 12:97457cf77bcb 1241 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 1 /* Diagnostics Measure Enable */
kevin1990 12:97457cf77bcb 1242 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0 /* Diagnostics Global Enable */
kevin1990 12:97457cf77bcb 1243 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAGNOSTICS_EXTRA 0x0000FF00 /* Additional Diagnostics Control */
kevin1990 12:97457cf77bcb 1244 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_OSD_FREQ 0x0000000C /* Diagnostics Open Sensor Detect Frequency */
kevin1990 12:97457cf77bcb 1245 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 0x00000002 /* Diagnostics Measure Enable */
kevin1990 12:97457cf77bcb 1246 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0x00000001 /* Diagnostics Global Enable */
kevin1990 12:97457cf77bcb 1247 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_OFF 0x00000000 /* Diag_OSD_Freq: No Open-Circuit Detection During Measurement */
kevin1990 12:97457cf77bcb 1248 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE 0x00000004 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Measurement Cycle */
kevin1990 12:97457cf77bcb 1249 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES 0x00000008 /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */
kevin1990 12:97457cf77bcb 1250 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES 0x0000000C /* Diag_OSD_Freq: Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */
kevin1990 12:97457cf77bcb 1251
kevin1990 12:97457cf77bcb 1252 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1253 ADISENSE_CORE_DATA_FIFO Pos/Masks Description
kevin1990 12:97457cf77bcb 1254 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1255 #define BITP_ADISENSE_CORE_DATA_FIFO_RAW_SAMPLE 40 /* ADC Result */
kevin1990 12:97457cf77bcb 1256 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_VALID 39 /* Indicates Whether Valid Data Read from FIFO */
kevin1990 12:97457cf77bcb 1257 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_RAW 38 /* Indicates If RAW Data is Valid */
kevin1990 12:97457cf77bcb 1258 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_ALERT 37 /* Indicates Alert on Channel */
kevin1990 12:97457cf77bcb 1259 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_ERROR 36 /* Indicates Error on Channel */
kevin1990 12:97457cf77bcb 1260 #define BITP_ADISENSE_CORE_DATA_FIFO_CHANNEL_ID 32 /* Indicates Which Channel This FIFO Data Corresponds to */
kevin1990 12:97457cf77bcb 1261 #define BITP_ADISENSE_CORE_DATA_FIFO_SENSOR_RESULT 0 /* Linearized and Compensated Sensor Result */
kevin1990 12:97457cf77bcb 1262 #define BITM_ADISENSE_CORE_DATA_FIFO_RAW_SAMPLE 0xFFFFFF0000000000 /* ADC Result */
kevin1990 12:97457cf77bcb 1263 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_VALID 0x8000000000 /* Indicates Whether Valid Data Read from FIFO */
kevin1990 12:97457cf77bcb 1264 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_RAW 0x4000000000 /* Indicates If RAW Data is Valid */
kevin1990 12:97457cf77bcb 1265 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_ALERT 0x2000000000 /* Indicates Alert on Channel */
kevin1990 12:97457cf77bcb 1266 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_ERROR 0x1000000000 /* Indicates Error on Channel */
kevin1990 12:97457cf77bcb 1267 #define BITM_ADISENSE_CORE_DATA_FIFO_CHANNEL_ID 0xF00000000 /* Indicates Which Channel This FIFO Data Corresponds to */
kevin1990 12:97457cf77bcb 1268 #define BITM_ADISENSE_CORE_DATA_FIFO_SENSOR_RESULT 0xFFFFFFFF /* Linearized and Compensated Sensor Result */
kevin1990 12:97457cf77bcb 1269
kevin1990 12:97457cf77bcb 1270 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1271 ADISENSE_CORE_LUT_SELECT Pos/Masks Description
kevin1990 12:97457cf77bcb 1272 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1273 #define BITP_ADISENSE_CORE_LUT_SELECT_LUT_RW 7 /* Read or Write LUT Data */
kevin1990 12:97457cf77bcb 1274 #define BITM_ADISENSE_CORE_LUT_SELECT_LUT_RW 0x00000080 /* Read or Write LUT Data */
kevin1990 12:97457cf77bcb 1275 #define ENUM_ADISENSE_CORE_LUT_SELECT_LUT_READ 0x00000000 /* LUT_RW: Read Addressed LUT Data */
kevin1990 12:97457cf77bcb 1276 #define ENUM_ADISENSE_CORE_LUT_SELECT_LUT_WRITE 0x00000080 /* LUT_RW: Write Addressed LUT Data */
kevin1990 12:97457cf77bcb 1277
kevin1990 12:97457cf77bcb 1278 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1279 ADISENSE_CORE_LUT_OFFSET Pos/Masks Description
kevin1990 12:97457cf77bcb 1280 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1281 #define BITP_ADISENSE_CORE_LUT_OFFSET_LUT_OFFSET 0 /* Offset into Look-Up-Table */
kevin1990 12:97457cf77bcb 1282 #define BITM_ADISENSE_CORE_LUT_OFFSET_LUT_OFFSET 0x00003FFF /* Offset into Look-Up-Table */
kevin1990 12:97457cf77bcb 1283
kevin1990 12:97457cf77bcb 1284 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1285 ADISENSE_CORE_LUT_DATA Pos/Masks Description
kevin1990 12:97457cf77bcb 1286 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1287 #define BITP_ADISENSE_CORE_LUT_DATA_LUT_DATA 0 /* Data Byte to Write to / Read from Look-Up-Table */
kevin1990 12:97457cf77bcb 1288 #define BITM_ADISENSE_CORE_LUT_DATA_LUT_DATA 0x000000FF /* Data Byte to Write to / Read from Look-Up-Table */
kevin1990 12:97457cf77bcb 1289
kevin1990 12:97457cf77bcb 1290 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1291 ADISENSE_CORE_CAL_OFFSET Pos/Masks Description
kevin1990 12:97457cf77bcb 1292 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1293 #define BITP_ADISENSE_CORE_CAL_OFFSET_CAL_OFFSET 0 /* Offset into Calibration Data */
kevin1990 12:97457cf77bcb 1294 #define BITM_ADISENSE_CORE_CAL_OFFSET_CAL_OFFSET 0x00003FFF /* Offset into Calibration Data */
kevin1990 12:97457cf77bcb 1295
kevin1990 12:97457cf77bcb 1296 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1297 ADISENSE_CORE_CAL_DATA Pos/Masks Description
kevin1990 12:97457cf77bcb 1298 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1299 #define BITP_ADISENSE_CORE_CAL_DATA_CAL_DATA 0 /* Data to Write to / Read from Calibration Data */
kevin1990 12:97457cf77bcb 1300 #define BITM_ADISENSE_CORE_CAL_DATA_CAL_DATA 0x000000FF /* Data to Write to / Read from Calibration Data */
kevin1990 12:97457cf77bcb 1301
kevin1990 12:97457cf77bcb 1302 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1303 ADISENSE_CORE_REVISION Pos/Masks Description
kevin1990 12:97457cf77bcb 1304 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1305 #define BITP_ADISENSE_CORE_REVISION_COMMS_PROTOCOL 16 /* ID Info */
kevin1990 12:97457cf77bcb 1306 #define BITP_ADISENSE_CORE_REVISION_HARDWARE_REVISION 8 /* ID Info */
kevin1990 12:97457cf77bcb 1307 #define BITP_ADISENSE_CORE_REVISION_FIRMWARE_REVISION 0 /* ID Info */
kevin1990 12:97457cf77bcb 1308 #define BITM_ADISENSE_CORE_REVISION_COMMS_PROTOCOL 0x00FF0000 /* ID Info */
kevin1990 12:97457cf77bcb 1309 #define BITM_ADISENSE_CORE_REVISION_HARDWARE_REVISION 0x0000FF00 /* ID Info */
kevin1990 12:97457cf77bcb 1310 #define BITM_ADISENSE_CORE_REVISION_FIRMWARE_REVISION 0x000000FF /* ID Info */
kevin1990 12:97457cf77bcb 1311
kevin1990 12:97457cf77bcb 1312 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1313 ADISENSE_CORE_CHANNEL_COUNT[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1314 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1315 #define BITP_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 7 /* Enable Channel in Measurement Cycle */
kevin1990 12:97457cf77bcb 1316 #define BITP_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0 /* How Many Times Channel Should Appear in One Cycle */
kevin1990 12:97457cf77bcb 1317 #define BITM_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 0x00000080 /* Enable Channel in Measurement Cycle */
kevin1990 12:97457cf77bcb 1318 #define BITM_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0x0000007F /* How Many Times Channel Should Appear in One Cycle */
kevin1990 12:97457cf77bcb 1319
kevin1990 12:97457cf77bcb 1320 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1321 ADISENSE_CORE_SENSOR_TYPE[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1322 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1323 #define BITP_ADISENSE_CORE_SENSOR_TYPE_SENSOR_TYPE 0 /* Sensor Type */
kevin1990 12:97457cf77bcb 1324 #define BITM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_TYPE 0x00000FFF /* Sensor Type */
kevin1990 12:97457cf77bcb 1325 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_DEF_L1 0x00000000 /* Sensor_Type: Thermocouple T-Type Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1326 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_DEF_L1 0x00000001 /* Sensor_Type: Thermocouple J-Type Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1327 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_DEF_L1 0x00000002 /* Sensor_Type: Thermocouple K-Type Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1328 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_DEF_L2 0x0000000C /* Sensor_Type: Thermocouple Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1329 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_DEF_L2 0x0000000D /* Sensor_Type: Thermocouple Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1330 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_DEF_L2 0x0000000E /* Sensor_Type: Thermocouple Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1331 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_DEF_L2 0x0000000F /* Sensor_Type: Thermocouple Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1332 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_ADV_L1 0x00000010 /* Sensor_Type: Thermocouple T-Type Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1333 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_ADV_L1 0x00000011 /* Sensor_Type: Thermocouple J-Type Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1334 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_ADV_L1 0x00000012 /* Sensor_Type: Thermocouple K-Type Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1335 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_ADV_L2 0x0000001C /* Sensor_Type: Thermocouple Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1336 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_ADV_L2 0x0000001D /* Sensor_Type: Thermocouple Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1337 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_ADV_L2 0x0000001E /* Sensor_Type: Thermocouple Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1338 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_ADV_L2 0x0000001F /* Sensor_Type: Thermocouple Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1339 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_DEF_L1 0x00000020 /* Sensor_Type: RTD 2 Wire PT100 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1340 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_DEF_L1 0x00000021 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1341 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_DEF_L2 0x0000002C /* Sensor_Type: RTD 2 Wire Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1342 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_DEF_L2 0x0000002D /* Sensor_Type: RTD 2 Wire Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1343 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_DEF_L2 0x0000002E /* Sensor_Type: RTD 2 Wire Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1344 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_DEF_L2 0x0000002F /* Sensor_Type: RTD 2 Wire Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1345 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_ADV_L1 0x00000030 /* Sensor_Type: RTD 2 Wire PT100 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1346 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_ADV_L1 0x00000031 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1347 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_ADV_L2 0x0000003C /* Sensor_Type: RTD 2 Wire Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1348 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_ADV_L2 0x0000003D /* Sensor_Type: RTD 2 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1349 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_ADV_L2 0x0000003E /* Sensor_Type: RTD 2 Wire Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1350 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_ADV_L2 0x0000003F /* Sensor_Type: RTD 2 Wire Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1351 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_DEF_L1 0x00000040 /* Sensor_Type: RTD 3 Wire PT100 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1352 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_DEF_L1 0x00000041 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1353 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_DEF_L2 0x0000004C /* Sensor_Type: RTD 3 Wire Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1354 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_DEF_L2 0x0000004D /* Sensor_Type: RTD 3 Wire Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1355 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_DEF_L2 0x0000004E /* Sensor_Type: RTD 3 Wire Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1356 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_DEF_L2 0x0000004F /* Sensor_Type: RTD 3 Wire Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1357 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_ADV_L1 0x00000050 /* Sensor_Type: RTD 3 Wire PT100 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1358 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_ADV_L1 0x00000051 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1359 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_ADV_L2 0x0000005C /* Sensor_Type: RTD 3 Wire Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1360 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_ADV_L2 0x0000005D /* Sensor_Type: RTD 3 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1361 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_ADV_L2 0x0000005E /* Sensor_Type: RTD 3 Wire Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1362 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_ADV_L2 0x0000005F /* Sensor_Type: RTD 3 Wire Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1363 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_DEF_L1 0x00000060 /* Sensor_Type: RTD 4 Wire PT100 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1364 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_DEF_L1 0x00000061 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1365 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_DEF_L2 0x0000006C /* Sensor_Type: RTD 4 Wire Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1366 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_DEF_L2 0x0000006D /* Sensor_Type: RTD 4 Wire Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1367 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_DEF_L2 0x0000006E /* Sensor_Type: RTD 4 Wire Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1368 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_DEF_L2 0x0000006F /* Sensor_Type: RTD 4 Wire Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1369 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_ADV_L1 0x00000070 /* Sensor_Type: RTD 4 Wire PT100 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1370 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_ADV_L1 0x00000071 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1371 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_ADV_L2 0x0000007C /* Sensor_Type: RTD 4 Wire Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1372 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_ADV_L2 0x0000007D /* Sensor_Type: RTD 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1373 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_ADV_L2 0x0000007E /* Sensor_Type: RTD 4 Wire Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1374 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_ADV_L2 0x0000007F /* Sensor_Type: RTD 4 Wire Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1375 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_DEF_L1 0x00000080 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1376 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_DEF_L1 0x00000081 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Defined Level 1 */
kevin1990 12:97457cf77bcb 1377 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_DEF_L2 0x0000008C /* Sensor_Type: Thermistor Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1378 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_DEF_L2 0x0000008D /* Sensor_Type: Thermistor Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1379 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_DEF_L2 0x0000008E /* Sensor_Type: Thermistor Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1380 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_DEF_L2 0x0000008F /* Sensor_Type: Thermistor Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1381 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_ADV_L1 0x00000090 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1382 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_ADV_L1 0x00000091 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Advanced Level 1 */
kevin1990 12:97457cf77bcb 1383 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_ADV_L2 0x0000009C /* Sensor_Type: Thermistor Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1384 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_ADV_L2 0x0000009D /* Sensor_Type: Thermistor Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1385 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_ADV_L2 0x0000009E /* Sensor_Type: Thermistor Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1386 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_ADV_L2 0x0000009F /* Sensor_Type: Thermistor Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1387 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_DEF_L2 0x000000A0 /* Sensor_Type: Bridge 4 Wire Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1388 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_DEF_L2 0x000000A1 /* Sensor_Type: Bridge 4 Wire Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1389 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_DEF_L2 0x000000A2 /* Sensor_Type: Bridge 4 Wire Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1390 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_DEF_L2 0x000000A3 /* Sensor_Type: Bridge 4 Wire Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1391 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_ADV_L2 0x000000B0 /* Sensor_Type: Bridge 4 Wire Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1392 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_ADV_L2 0x000000B1 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1393 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_ADV_L2 0x000000B2 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1394 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_ADV_L2 0x000000B3 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1395 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_DEF_L2 0x000000C0 /* Sensor_Type: Bridge 6 Wire Sensor 1 Defined Level 2 */
kevin1990 12:97457cf77bcb 1396 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_DEF_L2 0x000000C1 /* Sensor_Type: Bridge 6 Wire Sensor 2 Defined Level 2 */
kevin1990 12:97457cf77bcb 1397 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_DEF_L2 0x000000C2 /* Sensor_Type: Bridge 6 Wire Sensor 3 Defined Level 2 */
kevin1990 12:97457cf77bcb 1398 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_DEF_L2 0x000000C3 /* Sensor_Type: Bridge 6 Wire Sensor 4 Defined Level 2 */
kevin1990 12:97457cf77bcb 1399 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_ADV_L2 0x000000D0 /* Sensor_Type: Bridge 6 Wire Sensor 1 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1400 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_ADV_L2 0x000000D1 /* Sensor_Type: Bridge 6 Wire Sensor 2 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1401 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_ADV_L2 0x000000D2 /* Sensor_Type: Bridge 6 Wire Sensor 3 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1402 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_ADV_L2 0x000000D3 /* Sensor_Type: Bridge 6 Wire Sensor 4 Advanced Level 2 */
kevin1990 12:97457cf77bcb 1403 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE 0x00000100 /* Sensor_Type: Voltage Input */
kevin1990 12:97457cf77bcb 1404 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_HONEYWELL_TRUSTABILITY 0x00000110 /* Sensor_Type: Voltage Output Pressure Sensor 1 */
kevin1990 12:97457cf77bcb 1405 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_AMPHENOL_NPA300X 0x00000111 /* Sensor_Type: Voltage Output Pressure Sensor 2 */
kevin1990 12:97457cf77bcb 1406 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_3_DEF 0x00000112 /* Sensor_Type: Voltage Output Pressure Sensor 3 */
kevin1990 12:97457cf77bcb 1407 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT 0x00000180 /* Sensor_Type: Current Input */
kevin1990 12:97457cf77bcb 1408 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_HONEYWELL_PX2 0x00000181 /* Sensor_Type: Current Output Pressure Sensor 1 */
kevin1990 12:97457cf77bcb 1409 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2 0x00000182 /* Sensor_Type: Current Output Pressure Sensor 2 */
kevin1990 12:97457cf77bcb 1410 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_CUSTOM1 0x00000200 /* Sensor_Type: Custom1 */
kevin1990 12:97457cf77bcb 1411 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_1 0x00000800 /* Sensor_Type: I2C Pressure Sensor 1 */
kevin1990 12:97457cf77bcb 1412 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_2 0x00000801 /* Sensor_Type: I2C Pressure Sensor 2 */
kevin1990 12:97457cf77bcb 1413 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_HONEYWELL_HUMIDICON 0x00000840 /* Sensor_Type: I2C Humidity Sensor 1 */
kevin1990 12:97457cf77bcb 1414 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_SENSIRION_SHT3X 0x00000841 /* Sensor_Type: I2C Humidity Sensor 2 */
kevin1990 12:97457cf77bcb 1415 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_HONEYWELL_TRUSTABILITY 0x00000C00 /* Sensor_Type: SPI Pressure Sensor 1 */
kevin1990 12:97457cf77bcb 1416 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_2 0x00000C01 /* Sensor_Type: SPI Pressure Sensor 2 */
kevin1990 12:97457cf77bcb 1417 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_1 0x00000C40 /* Sensor_Type: SPI Humidity Sensor Type 1 */
kevin1990 12:97457cf77bcb 1418 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_2 0x00000C41 /* Sensor_Type: SPI Humidity Sensor Type 2 */
kevin1990 12:97457cf77bcb 1419 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_1 0x00000C80 /* Sensor_Type: SPI Accelerometer Sensor Type 1 3-Axis */
kevin1990 12:97457cf77bcb 1420 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_2 0x00000C81 /* Sensor_Type: SPI Accelerometer Sensor Type 2 3-Axis */
kevin1990 12:97457cf77bcb 1421
kevin1990 12:97457cf77bcb 1422 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1423 ADISENSE_CORE_SENSOR_DETAILS[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1424 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1425 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_AVERAGING 28 /* Number of ADC Results to Average */
kevin1990 12:97457cf77bcb 1426 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN 24 /* PGA Gain */
kevin1990 12:97457cf77bcb 1427 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_SELECT 20 /* Reference Selection */
kevin1990 12:97457cf77bcb 1428 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_VBIAS 19 /* Controls ADC Vbias Output */
kevin1990 12:97457cf77bcb 1429 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 18 /* Enable or Disable ADC Reference Buffer */
kevin1990 12:97457cf77bcb 1430 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 17 /* Do Not Publish Channel Result */
kevin1990 12:97457cf77bcb 1431 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL3 12 /* Indicates Channel for Third Term of Compensation */
kevin1990 12:97457cf77bcb 1432 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL2 8 /* Indicates Channel for Second Term of Compensation */
kevin1990 12:97457cf77bcb 1433 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 4 /* Indicates Which Channel is Used to Compensate Sensor Result */
kevin1990 12:97457cf77bcb 1434 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0 /* Units of Sensor Measurement */
kevin1990 12:97457cf77bcb 1435 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_AVERAGING 0x70000000 /* Number of ADC Results to Average */
kevin1990 12:97457cf77bcb 1436 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN 0x07000000 /* PGA Gain */
kevin1990 12:97457cf77bcb 1437 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_SELECT 0x00F00000 /* Reference Selection */
kevin1990 12:97457cf77bcb 1438 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_VBIAS 0x00080000 /* Controls ADC Vbias Output */
kevin1990 12:97457cf77bcb 1439 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 0x00040000 /* Enable or Disable ADC Reference Buffer */
kevin1990 12:97457cf77bcb 1440 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 0x00020000 /* Do Not Publish Channel Result */
kevin1990 12:97457cf77bcb 1441 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL3 0x0000F000 /* Indicates Channel for Third Term of Compensation */
kevin1990 12:97457cf77bcb 1442 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL2 0x00000F00 /* Indicates Channel for Second Term of Compensation */
kevin1990 12:97457cf77bcb 1443 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 0x000000F0 /* Indicates Which Channel is Used to Compensate Sensor Result */
kevin1990 12:97457cf77bcb 1444 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0x0000000F /* Units of Sensor Measurement */
kevin1990 12:97457cf77bcb 1445 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_1 0x00000000 /* PGA_Gain: Gain of 1 */
kevin1990 12:97457cf77bcb 1446 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_2 0x01000000 /* PGA_Gain: Gain of 2 */
kevin1990 12:97457cf77bcb 1447 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_4 0x02000000 /* PGA_Gain: Gain of 4 */
kevin1990 12:97457cf77bcb 1448 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_8 0x03000000 /* PGA_Gain: Gain of 8 */
kevin1990 12:97457cf77bcb 1449 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_16 0x04000000 /* PGA_Gain: Gain of 16 */
kevin1990 12:97457cf77bcb 1450 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_32 0x05000000 /* PGA_Gain: Gain of 32 */
kevin1990 12:97457cf77bcb 1451 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_64 0x06000000 /* PGA_Gain: Gain of 64 */
kevin1990 12:97457cf77bcb 1452 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN_128 0x07000000 /* PGA_Gain: Gain of 128 */
kevin1990 12:97457cf77bcb 1453 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_INT 0x00000000 /* Reference_Select: Internal Reference */
kevin1990 12:97457cf77bcb 1454 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_AVDD 0x00100000 /* Reference_Select: AVDD */
kevin1990 12:97457cf77bcb 1455 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_VEXT1 0x00200000 /* Reference_Select: External Voltage on Refin1 */
kevin1990 12:97457cf77bcb 1456 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_VEXT2 0x00300000 /* Reference_Select: External Voltage on Refin2 */
kevin1990 12:97457cf77bcb 1457 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_RINT1 0x00400000 /* Reference_Select: Internal Resistor1 */
kevin1990 12:97457cf77bcb 1458 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_RINT2 0x00500000 /* Reference_Select: Internal Resistor2 */
kevin1990 12:97457cf77bcb 1459 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_REXT1 0x00600000 /* Reference_Select: External Resistor on Refin1 */
kevin1990 12:97457cf77bcb 1460 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_REXT2 0x00700000 /* Reference_Select: External Resistor on Refin2 */
kevin1990 12:97457cf77bcb 1461 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_EXC 0x00800000 /* Reference_Select: Bridge Excitation Voltage */
kevin1990 12:97457cf77bcb 1462 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_UNITS_DEGC 0x00000000 /* Measurement_Units: Degrees C */
kevin1990 12:97457cf77bcb 1463 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_UNITS_DEGF 0x00000001 /* Measurement_Units: Degrees F */
kevin1990 12:97457cf77bcb 1464
kevin1990 12:97457cf77bcb 1465 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1466 ADISENSE_CORE_CHANNEL_EXCITATION[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1467 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1468 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 7 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
kevin1990 12:97457cf77bcb 1469 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_STATIC_SWAP_3WIRE 6 /* Indicates 3-Wire Excitation Currents Should Be Swapped */
kevin1990 12:97457cf77bcb 1470 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT1_DISABLE 4 /* Disable Second Current Source */
kevin1990 12:97457cf77bcb 1471 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT0_DISABLE 3 /* Disable First Current Source */
kevin1990 12:97457cf77bcb 1472 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0 /* Current Source Value */
kevin1990 12:97457cf77bcb 1473 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 0x00000080 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
kevin1990 12:97457cf77bcb 1474 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_STATIC_SWAP_3WIRE 0x00000040 /* Indicates 3-Wire Excitation Currents Should Be Swapped */
kevin1990 12:97457cf77bcb 1475 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT1_DISABLE 0x00000010 /* Disable Second Current Source */
kevin1990 12:97457cf77bcb 1476 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT0_DISABLE 0x00000008 /* Disable First Current Source */
kevin1990 12:97457cf77bcb 1477 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0x00000007 /* Current Source Value */
kevin1990 12:97457cf77bcb 1478 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_OFF 0x00000000 /* IOUT_Excitation_Current: Disabled */
kevin1990 12:97457cf77bcb 1479 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_50UA 0x00000001 /* IOUT_Excitation_Current: 50 \mu;A */
kevin1990 12:97457cf77bcb 1480 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_100UA 0x00000002 /* IOUT_Excitation_Current: 100 \mu;A */
kevin1990 12:97457cf77bcb 1481 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_250UA 0x00000003 /* IOUT_Excitation_Current: 250 \mu;A */
kevin1990 12:97457cf77bcb 1482 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_500UA 0x00000004 /* IOUT_Excitation_Current: 500 \mu;A */
kevin1990 12:97457cf77bcb 1483 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_750UA 0x00000005 /* IOUT_Excitation_Current: 750 \mu;A */
kevin1990 12:97457cf77bcb 1484 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_1000UA 0x00000006 /* IOUT_Excitation_Current: 1000 \mu;A */
kevin1990 12:97457cf77bcb 1485 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_1000UA_2 0x00000007 /* IOUT_Excitation_Current: 1000 \mu;A */
kevin1990 12:97457cf77bcb 1486
kevin1990 12:97457cf77bcb 1487 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1488 ADISENSE_CORE_SETTLING_TIME[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1489 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1490 #define BITP_ADISENSE_CORE_SETTLING_TIME_SETTLING_TIME 0 /* Settling Time to Allow When Switching to Channel */
kevin1990 12:97457cf77bcb 1491 #define BITM_ADISENSE_CORE_SETTLING_TIME_SETTLING_TIME 0x0000FFFF /* Settling Time to Allow When Switching to Channel */
kevin1990 12:97457cf77bcb 1492
kevin1990 12:97457cf77bcb 1493 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1494 ADISENSE_CORE_FILTER_SELECT[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1495 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1496 #define BITP_ADISENSE_CORE_FILTER_SELECT_ADC_FILTER_TYPE 11 /* ADC Digital Filter Type */
kevin1990 12:97457cf77bcb 1497 #define BITP_ADISENSE_CORE_FILTER_SELECT_ADC_FS 0 /* ADC Digital Filter Select */
kevin1990 12:97457cf77bcb 1498 #define BITM_ADISENSE_CORE_FILTER_SELECT_ADC_FILTER_TYPE 0x0000F800 /* ADC Digital Filter Type */
kevin1990 12:97457cf77bcb 1499 #define BITM_ADISENSE_CORE_FILTER_SELECT_ADC_FS 0x000007FF /* ADC Digital Filter Select */
kevin1990 12:97457cf77bcb 1500 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_FIR_25SPS 0x00000000 /* ADC_Filter_Type: FIR Filter 25 SPS */
kevin1990 12:97457cf77bcb 1501 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_FIR_20SPS 0x00000800 /* ADC_Filter_Type: FIR Filter 20 SPS */
kevin1990 12:97457cf77bcb 1502 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_SINC4 0x00001000 /* ADC_Filter_Type: Sinc4 Filter */
kevin1990 12:97457cf77bcb 1503 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_TBD 0x00001800 /* ADC_Filter_Type: TBD Filter */
kevin1990 12:97457cf77bcb 1504
kevin1990 12:97457cf77bcb 1505 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1506 ADISENSE_CORE_HIGH_THRESHOLD_LIMIT[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1507 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1508 #define BITP_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0 /* Upper Limit for Sensor Alert Comparison */
kevin1990 12:97457cf77bcb 1509 #define BITM_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0xFFFFFFFF /* Upper Limit for Sensor Alert Comparison */
kevin1990 12:97457cf77bcb 1510
kevin1990 12:97457cf77bcb 1511 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1512 ADISENSE_CORE_LOW_THRESHOLD_LIMIT[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1513 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1514 #define BITP_ADISENSE_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0 /* Lower Limit for Sensor Alert Comparison */
kevin1990 12:97457cf77bcb 1515 #define BITM_ADISENSE_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0xFFFFFFFF /* Lower Limit for Sensor Alert Comparison */
kevin1990 12:97457cf77bcb 1516
kevin1990 12:97457cf77bcb 1517 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1518 ADISENSE_CORE_SENSOR_OFFSET[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1519 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1520 #define BITP_ADISENSE_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0 /* Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 1521 #define BITM_ADISENSE_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0xFFFFFFFF /* Sensor Offset Adjustment */
kevin1990 12:97457cf77bcb 1522
kevin1990 12:97457cf77bcb 1523 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1524 ADISENSE_CORE_SENSOR_GAIN[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1525 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1526 #define BITP_ADISENSE_CORE_SENSOR_GAIN_SENSOR_GAIN 0 /* Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 1527 #define BITM_ADISENSE_CORE_SENSOR_GAIN_SENSOR_GAIN 0xFFFFFFFF /* Sensor Gain Adjustment */
kevin1990 12:97457cf77bcb 1528
kevin1990 12:97457cf77bcb 1529 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1530 ADISENSE_CORE_ALERT_CODE_CH[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1531 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1532 #define BITP_ADISENSE_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0 /* Per-Channel Code Indicating Type of Alert */
kevin1990 12:97457cf77bcb 1533 #define BITM_ADISENSE_CORE_ALERT_CODE_CH_ALERT_CODE_CH 0x0000FFFF /* Per-Channel Code Indicating Type of Alert */
kevin1990 12:97457cf77bcb 1534
kevin1990 12:97457cf77bcb 1535 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1536 ADISENSE_CORE_DIGITAL_SENSOR_CONFIG[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1537 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1538 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_MSB_POSITION 8 /* Position of Data MSB in the Read Frame */
kevin1990 12:97457cf77bcb 1539 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_NUMBITS 2 /* Number of Relevant Data Bits in Digital Sensor */
kevin1990 12:97457cf77bcb 1540 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0 /* Data Encoding of Sensor Result */
kevin1990 12:97457cf77bcb 1541 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_MSB_POSITION 0x00001F00 /* Position of Data MSB in the Read Frame */
kevin1990 12:97457cf77bcb 1542 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_NUMBITS 0x0000007C /* Number of Relevant Data Bits in Digital Sensor */
kevin1990 12:97457cf77bcb 1543 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0x00000003 /* Data Encoding of Sensor Result */
kevin1990 12:97457cf77bcb 1544 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_8_BITS 0x00000000 /* Digital_Sensor_Numbits: 8 Bits */
kevin1990 12:97457cf77bcb 1545 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_10_BITS 0x00000004 /* Digital_Sensor_Numbits: 10 Bits */
kevin1990 12:97457cf77bcb 1546 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_12_BITS 0x00000008 /* Digital_Sensor_Numbits: 12 Bits */
kevin1990 12:97457cf77bcb 1547 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_14_BITS 0x0000000C /* Digital_Sensor_Numbits: 14 Bits */
kevin1990 12:97457cf77bcb 1548 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_16_BITS 0x00000010 /* Digital_Sensor_Numbits: 16 Bits */
kevin1990 12:97457cf77bcb 1549 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_18_BITS 0x00000014 /* Digital_Sensor_Numbits: 18 Bits */
kevin1990 12:97457cf77bcb 1550 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_20_BITS 0x00000018 /* Digital_Sensor_Numbits: 20 Bits */
kevin1990 12:97457cf77bcb 1551 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_22_BITS 0x0000001C /* Digital_Sensor_Numbits: 22 Bits */
kevin1990 12:97457cf77bcb 1552 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_24_BITS 0x00000020 /* Digital_Sensor_Numbits: 24 Bits */
kevin1990 12:97457cf77bcb 1553 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR 0x00000000 /* Digital_Sensor_Coding: Unipolar */
kevin1990 12:97457cf77bcb 1554 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL 0x00000001 /* Digital_Sensor_Coding: Twos Complement */
kevin1990 12:97457cf77bcb 1555 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY 0x00000002 /* Digital_Sensor_Coding: Offset Binary */
kevin1990 12:97457cf77bcb 1556
kevin1990 12:97457cf77bcb 1557 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1558 ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1559 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1560 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0 /* I2C Address or Write Address Command for SPI Sensor */
kevin1990 12:97457cf77bcb 1561 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0x000000FF /* I2C Address or Write Address Command for SPI Sensor */
kevin1990 12:97457cf77bcb 1562
kevin1990 12:97457cf77bcb 1563 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1564 ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1565 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1566 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_READ_CMDS 4 /* Number of Read Commands for Digital Sensor */
kevin1990 12:97457cf77bcb 1567 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0 /* Number of Configuration Commands for Digital Sensor */
kevin1990 12:97457cf77bcb 1568 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_READ_CMDS 0x00000070 /* Number of Read Commands for Digital Sensor */
kevin1990 12:97457cf77bcb 1569 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_NUM_CMDS_DIGITAL_SENSOR_NUM_CFG_CMDS 0x00000007 /* Number of Configuration Commands for Digital Sensor */
kevin1990 12:97457cf77bcb 1570
kevin1990 12:97457cf77bcb 1571 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1572 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1573 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1574 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1575 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1576
kevin1990 12:97457cf77bcb 1577 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1578 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1579 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1580 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1581 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1582
kevin1990 12:97457cf77bcb 1583 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1584 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1585 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1586 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1587 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1588
kevin1990 12:97457cf77bcb 1589 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1590 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1591 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1592 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1593 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND4_DIGITAL_SENSOR_COMMAND4 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1594
kevin1990 12:97457cf77bcb 1595 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1596 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1597 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1598 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1599 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND5_DIGITAL_SENSOR_COMMAND5 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1600
kevin1990 12:97457cf77bcb 1601 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1602 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1603 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1604 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1605 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND6_DIGITAL_SENSOR_COMMAND6 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1606
kevin1990 12:97457cf77bcb 1607 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1608 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1609 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1610 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0 /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1611 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND7_DIGITAL_SENSOR_COMMAND7 0x000000FF /* Configuration Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1612
kevin1990 12:97457cf77bcb 1613 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1614 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1615 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1616 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1617 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD1_DIGITAL_SENSOR_READ_CMD1 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1618
kevin1990 12:97457cf77bcb 1619 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1620 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1621 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1622 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1623 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD2_DIGITAL_SENSOR_READ_CMD2 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1624
kevin1990 12:97457cf77bcb 1625 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1626 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1627 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1628 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1629 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD3_DIGITAL_SENSOR_READ_CMD3 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1630
kevin1990 12:97457cf77bcb 1631 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1632 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1633 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1634 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1635 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD4_DIGITAL_SENSOR_READ_CMD4 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1636
kevin1990 12:97457cf77bcb 1637 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1638 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1639 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1640 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1641 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD5_DIGITAL_SENSOR_READ_CMD5 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1642
kevin1990 12:97457cf77bcb 1643 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1644 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1645 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1646 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1647 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD6_DIGITAL_SENSOR_READ_CMD6 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1648
kevin1990 12:97457cf77bcb 1649 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1650 ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7[n] Pos/Masks Description
kevin1990 12:97457cf77bcb 1651 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1652 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0 /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1653 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_READ_CMD7_DIGITAL_SENSOR_READ_CMD7 0x000000FF /* Per Conversion Command to Send to Digital I2C/SPI Sensor */
kevin1990 12:97457cf77bcb 1654
kevin1990 12:97457cf77bcb 1655
kevin1990 12:97457cf77bcb 1656 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 1657 Test Registers
kevin1990 12:97457cf77bcb 1658 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 1659
kevin1990 12:97457cf77bcb 1660 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 1661 ADSENSE_TEST
kevin1990 12:97457cf77bcb 1662 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 1663 #define MOD_ADSENSE_TEST_BASE 0x00000400 /* Test Registers */
kevin1990 12:97457cf77bcb 1664 #define MOD_ADSENSE_TEST_MASK 0x00007FFF /* Test Registers */
kevin1990 12:97457cf77bcb 1665 #define REG_ADSENSE_TEST_TEST_REG_0_RESET 0x00000000 /* Reset Value for test_reg_0 */
kevin1990 12:97457cf77bcb 1666 #define REG_ADSENSE_TEST_TEST_REG_0 0x00000400 /* ADSENSE_TEST Test Register 0 */
kevin1990 12:97457cf77bcb 1667
kevin1990 12:97457cf77bcb 1668 /* ============================================================================================================================
kevin1990 12:97457cf77bcb 1669 ADSENSE_TEST Register BitMasks, Positions & Enumerations
kevin1990 12:97457cf77bcb 1670 ============================================================================================================================ */
kevin1990 12:97457cf77bcb 1671 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 12:97457cf77bcb 1672 ADSENSE_TEST_TEST_REG_0 Pos/Masks Description
kevin1990 12:97457cf77bcb 1673 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 12:97457cf77bcb 1674 #define BITP_ADSENSE_TEST_TEST_REG_0_TEST_COMMAND 0 /* Test_Command */
kevin1990 12:97457cf77bcb 1675 #define BITM_ADSENSE_TEST_TEST_REG_0_TEST_COMMAND 0x000000FF /* Test_Command */
kevin1990 12:97457cf77bcb 1676
kevin1990 12:97457cf77bcb 1677
kevin1990 12:97457cf77bcb 1678 /* ADISENSE_SPI Parameters */
kevin1990 12:97457cf77bcb 1679
kevin1990 12:97457cf77bcb 1680 /***** ADISENSE_SPI */
kevin1990 12:97457cf77bcb 1681 #define PARAM_ADISENSE_SPI_SPI_STANDARD "LPT" /* A part must declare which SPI Standard it follows, either ADI or LPT */
kevin1990 12:97457cf77bcb 1682 #define PARAM_ADISENSE_SPI_CHIP_GRADE_VALUE 0 /* This is used to indicate speed grades/linearity. */
kevin1990 12:97457cf77bcb 1683 #define PARAM_ADISENSE_SPI_CHIP_REVISION_VALUE 0 /* This is used to indicate the silicon revision */
kevin1990 12:97457cf77bcb 1684 #define PARAM_ADISENSE_SPI_HAS_M_S_REGISTERS 0 /* If a design uses Master-Slave registers this must be set to true to enable relevant control bit fields */
kevin1990 12:97457cf77bcb 1685 #define PARAM_ADISENSE_SPI_M_S_TRANSFER_BF_EXISTS 0 /* Used to set EXISTS the M-S Transfer bit field */
kevin1990 12:97457cf77bcb 1686 #define PARAM_ADISENSE_SPI_STREAM_MODE_TRANSFER_BF_EXISTS 0 /* Used to set EXISTS of the stream mode transfer bit field */
kevin1990 12:97457cf77bcb 1687 #define PARAM_ADISENSE_SPI_MSB_AND_LSB_FIRST_SUPPORT 0 /* Determines if the parts supports MSB and LSB first options */
kevin1990 12:97457cf77bcb 1688 #define PARAM_ADISENSE_SPI_WIRE_MODE_SUPPORT "_4_WIRE" /* Configures which hardware SPI modes are supported */
kevin1990 12:97457cf77bcb 1689 #define PARAM_ADISENSE_SPI_WIRE_MODE_DEFAULT "_4_WIRE" /* Sets the default hardware SPI mode */
kevin1990 12:97457cf77bcb 1690 #define PARAM_ADISENSE_SPI_MULTI_IO_CHANNELS 1 /* Defines the number of SDIO pins supported by the SPI in Multi-IO Mode. Should be 1,2,4, or 8. */
kevin1990 12:97457cf77bcb 1691 #define PARAM_ADISENSE_SPI_LPT_STANDARD_VERSION "REV1_0" /* This is a string from the LPT_STANDARD_VERSION_OPTIONS array for the active LPT SPI Standard version */
kevin1990 12:97457cf77bcb 1692 #define PARAM_ADISENSE_SPI_HAS_CSB_PIN 1 /* Does the part have a csb pin? */
kevin1990 12:97457cf77bcb 1693 #define PARAM_ADISENSE_SPI_BUS_MODE_SUPPORT 1 /* When set to true, Bus mode is supported. */
kevin1990 12:97457cf77bcb 1694 #define PARAM_ADISENSE_SPI_ISOLATED_3_WIRE_SUPPORT 0 /* Does the part support the 3-wire isolate mode of operation */
kevin1990 12:97457cf77bcb 1695 #define PARAM_ADISENSE_SPI_DAISY_CHAIN_MODE_SUPPORT 0 /* When set to true, Daisy chain mode is supported. */
kevin1990 12:97457cf77bcb 1696 #define PARAM_ADISENSE_SPI_CHECK_GTE_1_MODE_SUPPORTED 1 /* This is used to check that at least mode is enabled */
kevin1990 12:97457cf77bcb 1697 #define PARAM_ADISENSE_SPI_INTERFACE_MODE_SWITCH "None" /* Valid options are 'None', 'HW' or 'SW' */
kevin1990 12:97457cf77bcb 1698 #define PARAM_ADISENSE_SPI_CRC_SUPPORT "CRC_CONFIGURABLE" /* Set to true to enable bit fields related to CRC. */
kevin1990 12:97457cf77bcb 1699 #define PARAM_ADISENSE_SPI_CRC_SUPPORT_ENABLED 0 /* Verilog output parameter for 'define */
kevin1990 12:97457cf77bcb 1700 #define PARAM_ADISENSE_SPI_CRC_SUPPORT_ENABLE 1 /* Configures if CRC features are enabled in the module */
kevin1990 12:97457cf77bcb 1701 #define PARAM_ADISENSE_SPI_LPT_STANDARD_VERSION_VALUE 2 /* Index value of the active LPT SPI Standard version */
kevin1990 12:97457cf77bcb 1702 #define PARAM_ADISENSE_SPI_ADDRESS_MODE_SUPPORT "_15_BIT" /* Configures which addressing modes are supported */
kevin1990 12:97457cf77bcb 1703 #define PARAM_ADISENSE_SPI_ADDRESS_MODE_DEFAULT "_15_BIT" /* Sets the default addressing mode */
kevin1990 12:97457cf77bcb 1704 #define PARAM_ADISENSE_SPI_ADDRESS_BUS_WIDTH 15 /* Verilog output parameter for 'define */
kevin1990 12:97457cf77bcb 1705 #define PARAM_ADISENSE_SPI_SLOW_IFACE_CTRL_SUPPORT 0 /* Does the part support the Slow Interface Control feature */
kevin1990 12:97457cf77bcb 1706 #define PARAM_ADISENSE_SPI_SOFT_RESET_0_BF_EXISTS 0 /* Used to control if the SOFT_RESET_0 bit field exists */
kevin1990 12:97457cf77bcb 1707 #define PARAM_ADISENSE_SPI_SOFT_RESET_1_BF_EXISTS 0 /* Used to control if the SOFT_RESET_1 bit field exists */
kevin1990 12:97457cf77bcb 1708 #define PARAM_ADISENSE_SPI_SEND_STATUS_SUPPORT "NO_SEND_STATUS" /* Determines if and how the part supports the SEND_STATUS feature */
kevin1990 12:97457cf77bcb 1709 #define PARAM_ADISENSE_SPI_SEND_STATUS_SUPPORT_ENABLE 0 /* This is used to enable various send status features */
kevin1990 12:97457cf77bcb 1710 #define PARAM_ADISENSE_SPI_SPI_STANDARD_VERSION_VALUE 2 /* Value for SPI Standard VERSION bit field */
kevin1990 12:97457cf77bcb 1711 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_SUPPORT "ENTITY_ACCESS_ALWAYS" /* Configures which entity access mode(s) are supported */
kevin1990 12:97457cf77bcb 1712 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_SUPPORT_ENABLE 1 /* This is used to enable/disable Strict Entity Access features */
kevin1990 12:97457cf77bcb 1713 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_DEFAULT 1 /* Sets the default entity access mode */
kevin1990 12:97457cf77bcb 1714 #define PARAM_ADISENSE_SPI_CHIP_INDEX_EXISTS 0 /* Used to control if the CHIP_INDEX register and related bit field exists */
kevin1990 12:97457cf77bcb 1715 #define PARAM_ADISENSE_SPI_OFFSET_DEV_INDEX_EXISTS 0 /* Used to control if the OFFSET_DEV_INDEX bit field and registers exists */
kevin1990 12:97457cf77bcb 1716 #define PARAM_ADISENSE_SPI_DEV_INDEX_EXISTS 0 /* Used to control if the DEV_INDEX bit field and register exists */
kevin1990 12:97457cf77bcb 1717 #define PARAM_ADISENSE_SPI_STATUS_BIT_0_EXISTS 0 /* Sets EXIST for Status Bit 0 */
kevin1990 12:97457cf77bcb 1718 #define PARAM_ADISENSE_SPI_STATUS_BIT_1_EXISTS 0 /* Sets EXIST for Status Bit 1 */
kevin1990 12:97457cf77bcb 1719 #define PARAM_ADISENSE_SPI_STATUS_BIT_2_EXISTS 0 /* Sets EXIST for Status Bit 2 */
kevin1990 12:97457cf77bcb 1720 #define PARAM_ADISENSE_SPI_STATUS_BIT_3_EXISTS 0 /* Sets EXIST for Status Bit 3 */
kevin1990 12:97457cf77bcb 1721 #define PARAM_ADISENSE_SPI_STATUS_BIT_0_SWNAME "Status_Bit_0" /* Software Name for Status Bit 0 */
kevin1990 12:97457cf77bcb 1722 #define PARAM_ADISENSE_SPI_STATUS_BIT_1_SWNAME "Status_Bit_1" /* Software Name for Status Bit 1 */
kevin1990 12:97457cf77bcb 1723 #define PARAM_ADISENSE_SPI_STATUS_BIT_2_SWNAME "Status_Bit_2" /* Software Name for Status Bit 2 */
kevin1990 12:97457cf77bcb 1724 #define PARAM_ADISENSE_SPI_STATUS_BIT_3_SWNAME "Status_Bit_3" /* Software Name for Status Bit 3 */
kevin1990 12:97457cf77bcb 1725 #define PARAM_ADISENSE_SPI_CHIP_TYPE "P_ADC" /* This is a string that corresponds to one of the values in the CHIP_TYPE_OPTIONS array and corresponds to the type of chip being developed */
kevin1990 12:97457cf77bcb 1726 #define PARAM_ADISENSE_SPI_CHIP_TYPE_VALUE 7 /* Integer value corresponding to selected CHIP_TYPE, and is used as bit field enum value */
kevin1990 12:97457cf77bcb 1727 #define PARAM_ADISENSE_SPI_PRODUCT_ID_VALUE 32 /* This value is used to identify a specific generic. */
kevin1990 12:97457cf77bcb 1728 #define PARAM_ADISENSE_SPI_PRODUCT_ID_TRIM_BITS 4 /* This defines the number of PRODUCT_ID bits that can be fuse/trimmed. */
kevin1990 12:97457cf77bcb 1729
kevin1990 12:97457cf77bcb 1730 #endif /* end ifndef _DEF_ADISENSE1000_REGISTERS_H */
kevin1990 12:97457cf77bcb 1731