Jake Greaves / Mbed OS AdiSense1000_V21

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src/adi_sense_1000/ADISENSE1000_REGISTERS.h@7:4dbae381f693, 2017-10-20 (annotated)

Committer:
kevin1990
Date:
Fri Oct 20 15:58:01 2017 +0000
Revision:
7:4dbae381f693
v0.3 release (New Host api)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kevin1990 7:4dbae381f693 1 /* ================================================================================
kevin1990 7:4dbae381f693 2
kevin1990 7:4dbae381f693 3 Created by : sherry
kevin1990 7:4dbae381f693 4 Created on : 2017 Oct 13, 12:25 IST
kevin1990 7:4dbae381f693 5
kevin1990 7:4dbae381f693 6 Project : ADISENSE1000_REGISTERS
kevin1990 7:4dbae381f693 7 File : ADISENSE1000_REGISTERS.h
kevin1990 7:4dbae381f693 8 Description : Register Definitions
kevin1990 7:4dbae381f693 9
kevin1990 7:4dbae381f693 10 !! ADI Confidential !!
kevin1990 7:4dbae381f693 11 INTERNAL USE ONLY
kevin1990 7:4dbae381f693 12
kevin1990 7:4dbae381f693 13 Copyright (c) 2017 Analog Devices, Inc. All Rights Reserved.
kevin1990 7:4dbae381f693 14 This software is proprietary and confidential to Analog Devices, Inc. and
kevin1990 7:4dbae381f693 15 its licensors.
kevin1990 7:4dbae381f693 16
kevin1990 7:4dbae381f693 17 This file was auto-generated. Do not make local changes to this file.
kevin1990 7:4dbae381f693 18
kevin1990 7:4dbae381f693 19 Auto generation script information:
kevin1990 7:4dbae381f693 20 Script: /usr/cadtools/bin/yoda.dir/generators/inc/genHeaders
kevin1990 7:4dbae381f693 21 Last modified: 26-SEP-2017
kevin1990 7:4dbae381f693 22
kevin1990 7:4dbae381f693 23 ================================================================================ */
kevin1990 7:4dbae381f693 24
kevin1990 7:4dbae381f693 25 #ifndef _DEF_ADISENSE1000_REGISTERS_H
kevin1990 7:4dbae381f693 26 #define _DEF_ADISENSE1000_REGISTERS_H
kevin1990 7:4dbae381f693 27
kevin1990 7:4dbae381f693 28 #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
kevin1990 7:4dbae381f693 29 #include <stdint.h>
kevin1990 7:4dbae381f693 30 #endif /* _LANGUAGE_C */
kevin1990 7:4dbae381f693 31
kevin1990 7:4dbae381f693 32 #ifndef __ADI_GENERATED_DEF_HEADERS__
kevin1990 7:4dbae381f693 33 #define __ADI_GENERATED_DEF_HEADERS__ 1
kevin1990 7:4dbae381f693 34 #endif
kevin1990 7:4dbae381f693 35
kevin1990 7:4dbae381f693 36 #define __ADI_HAS_ADISENSE_CORE__ 1
kevin1990 7:4dbae381f693 37 #define __ADI_HAS_ADISENSE_SPI__ 1
kevin1990 7:4dbae381f693 38 #define __ADI_HAS_ADSENSE_TEST__ 1
kevin1990 7:4dbae381f693 39
kevin1990 7:4dbae381f693 40 /* ============================================================================================================================
kevin1990 7:4dbae381f693 41
kevin1990 7:4dbae381f693 42 ============================================================================================================================ */
kevin1990 7:4dbae381f693 43
kevin1990 7:4dbae381f693 44 /* ============================================================================================================================
kevin1990 7:4dbae381f693 45 ADISENSE_SPI
kevin1990 7:4dbae381f693 46 ============================================================================================================================ */
kevin1990 7:4dbae381f693 47 #define MOD_ADISENSE_SPI_BASE 0x00000000 /* */
kevin1990 7:4dbae381f693 48 #define MOD_ADISENSE_SPI_MASK 0x00007FFF /* */
kevin1990 7:4dbae381f693 49 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_A_RESET 0x00000010 /* Reset Value for Interface_Config_A */
kevin1990 7:4dbae381f693 50 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_A 0x00000000
kevin1990 7:4dbae381f693 51 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_B_RESET 0x00000000 /* Reset Value for Interface_Config_B */
kevin1990 7:4dbae381f693 52 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_B 0x00000001
kevin1990 7:4dbae381f693 53 #define REG_ADISENSE_SPI_DEVICE_CONFIG_RESET 0x00000000 /* Reset Value for Device_Config */
kevin1990 7:4dbae381f693 54 #define REG_ADISENSE_SPI_DEVICE_CONFIG 0x00000002
kevin1990 7:4dbae381f693 55 #define REG_ADISENSE_SPI_CHIP_TYPE_RESET 0x00000007 /* Reset Value for Chip_Type */
kevin1990 7:4dbae381f693 56 #define REG_ADISENSE_SPI_CHIP_TYPE 0x00000003
kevin1990 7:4dbae381f693 57 #define REG_ADISENSE_SPI_PRODUCT_ID_L_RESET 0x00000020 /* Reset Value for Product_ID_L */
kevin1990 7:4dbae381f693 58 #define REG_ADISENSE_SPI_PRODUCT_ID_L 0x00000004
kevin1990 7:4dbae381f693 59 #define REG_ADISENSE_SPI_PRODUCT_ID_H_RESET 0x00000000 /* Reset Value for Product_ID_H */
kevin1990 7:4dbae381f693 60 #define REG_ADISENSE_SPI_PRODUCT_ID_H 0x00000005
kevin1990 7:4dbae381f693 61 #define REG_ADISENSE_SPI_CHIP_GRADE_RESET 0x00000000 /* Reset Value for Chip_Grade */
kevin1990 7:4dbae381f693 62 #define REG_ADISENSE_SPI_CHIP_GRADE 0x00000006
kevin1990 7:4dbae381f693 63 #define REG_ADISENSE_SPI_SCRATCH_PAD_RESET 0x00000000 /* Reset Value for Scratch_Pad */
kevin1990 7:4dbae381f693 64 #define REG_ADISENSE_SPI_SCRATCH_PAD 0x0000000A
kevin1990 7:4dbae381f693 65 #define REG_ADISENSE_SPI_SPI_REVISION_RESET 0x00000082 /* Reset Value for SPI_Revision */
kevin1990 7:4dbae381f693 66 #define REG_ADISENSE_SPI_SPI_REVISION 0x0000000B
kevin1990 7:4dbae381f693 67 #define REG_ADISENSE_SPI_VENDOR_L_RESET 0x00000056 /* Reset Value for Vendor_L */
kevin1990 7:4dbae381f693 68 #define REG_ADISENSE_SPI_VENDOR_L 0x0000000C
kevin1990 7:4dbae381f693 69 #define REG_ADISENSE_SPI_VENDOR_H_RESET 0x00000004 /* Reset Value for Vendor_H */
kevin1990 7:4dbae381f693 70 #define REG_ADISENSE_SPI_VENDOR_H 0x0000000D
kevin1990 7:4dbae381f693 71 #define REG_ADISENSE_SPI_STREAM_MODE_RESET 0x00000000 /* Reset Value for Stream_Mode */
kevin1990 7:4dbae381f693 72 #define REG_ADISENSE_SPI_STREAM_MODE 0x0000000E
kevin1990 7:4dbae381f693 73 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_C_RESET 0x00000023 /* Reset Value for Interface_Config_C */
kevin1990 7:4dbae381f693 74 #define REG_ADISENSE_SPI_INTERFACE_CONFIG_C 0x00000010
kevin1990 7:4dbae381f693 75 #define REG_ADISENSE_SPI_INTERFACE_STATUS_A_RESET 0x00000000 /* Reset Value for Interface_Status_A */
kevin1990 7:4dbae381f693 76 #define REG_ADISENSE_SPI_INTERFACE_STATUS_A 0x00000011
kevin1990 7:4dbae381f693 77
kevin1990 7:4dbae381f693 78 /* ============================================================================================================================
kevin1990 7:4dbae381f693 79 ADISENSE_SPI Register BitMasks, Positions & Enumerations
kevin1990 7:4dbae381f693 80 ============================================================================================================================ */
kevin1990 7:4dbae381f693 81 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 82 ADISENSE_SPI_INTERFACE_CONFIG_A Pos/Masks Description
kevin1990 7:4dbae381f693 83 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 84 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESET 7
kevin1990 7:4dbae381f693 85 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 5
kevin1990 7:4dbae381f693 86 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 4
kevin1990 7:4dbae381f693 87 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESETX 0
kevin1990 7:4dbae381f693 88 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESET 0x00000080
kevin1990 7:4dbae381f693 89 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_ADDR_ASCENSION 0x00000020
kevin1990 7:4dbae381f693 90 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SDO_ENABLE 0x00000010
kevin1990 7:4dbae381f693 91 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_A_SW_RESETX 0x00000001
kevin1990 7:4dbae381f693 92 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_A_DESCEND 0x00000000
kevin1990 7:4dbae381f693 93 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_A_ASCEND 0x00000020
kevin1990 7:4dbae381f693 94
kevin1990 7:4dbae381f693 95 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 96 ADISENSE_SPI_INTERFACE_CONFIG_B Pos/Masks Description
kevin1990 7:4dbae381f693 97 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 98 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_B_SINGLE_INST 7
kevin1990 7:4dbae381f693 99 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_B_SINGLE_INST 0x00000080
kevin1990 7:4dbae381f693 100
kevin1990 7:4dbae381f693 101 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 102 ADISENSE_SPI_DEVICE_CONFIG Pos/Masks Description
kevin1990 7:4dbae381f693 103 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 104 #define BITP_ADISENSE_SPI_DEVICE_CONFIG_OPERATING_MODES 0
kevin1990 7:4dbae381f693 105 #define BITM_ADISENSE_SPI_DEVICE_CONFIG_OPERATING_MODES 0x00000003
kevin1990 7:4dbae381f693 106 #define ENUM_ADISENSE_SPI_DEVICE_CONFIG_NORMAL 0x00000000
kevin1990 7:4dbae381f693 107 #define ENUM_ADISENSE_SPI_DEVICE_CONFIG_SLEEP 0x00000003
kevin1990 7:4dbae381f693 108
kevin1990 7:4dbae381f693 109 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 110 ADISENSE_SPI_CHIP_TYPE Pos/Masks Description
kevin1990 7:4dbae381f693 111 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 112 #define BITP_ADISENSE_SPI_CHIP_TYPE_CHIP_TYPE 0
kevin1990 7:4dbae381f693 113 #define BITM_ADISENSE_SPI_CHIP_TYPE_CHIP_TYPE 0x0000000F
kevin1990 7:4dbae381f693 114
kevin1990 7:4dbae381f693 115 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 116 ADISENSE_SPI_PRODUCT_ID_L Pos/Masks Description
kevin1990 7:4dbae381f693 117 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 118 #define BITP_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_FIXED_BITS 4
kevin1990 7:4dbae381f693 119 #define BITP_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_TRIM_BITS 0
kevin1990 7:4dbae381f693 120 #define BITM_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_FIXED_BITS 0x000000F0
kevin1990 7:4dbae381f693 121 #define BITM_ADISENSE_SPI_PRODUCT_ID_L_PRODUCT_ID_TRIM_BITS 0x0000000F
kevin1990 7:4dbae381f693 122
kevin1990 7:4dbae381f693 123 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 124 ADISENSE_SPI_PRODUCT_ID_H Pos/Masks Description
kevin1990 7:4dbae381f693 125 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 126 #define BITP_ADISENSE_SPI_PRODUCT_ID_H_PRODUCT_ID_FIXED_BITS 0
kevin1990 7:4dbae381f693 127 #define BITM_ADISENSE_SPI_PRODUCT_ID_H_PRODUCT_ID_FIXED_BITS 0x000000FF
kevin1990 7:4dbae381f693 128
kevin1990 7:4dbae381f693 129 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 130 ADISENSE_SPI_CHIP_GRADE Pos/Masks Description
kevin1990 7:4dbae381f693 131 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 132 #define BITP_ADISENSE_SPI_CHIP_GRADE_GRADE 4
kevin1990 7:4dbae381f693 133 #define BITP_ADISENSE_SPI_CHIP_GRADE_DEVICE_REVISION 0
kevin1990 7:4dbae381f693 134 #define BITM_ADISENSE_SPI_CHIP_GRADE_GRADE 0x000000F0
kevin1990 7:4dbae381f693 135 #define BITM_ADISENSE_SPI_CHIP_GRADE_DEVICE_REVISION 0x0000000F
kevin1990 7:4dbae381f693 136
kevin1990 7:4dbae381f693 137 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 138 ADISENSE_SPI_SCRATCH_PAD Pos/Masks Description
kevin1990 7:4dbae381f693 139 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 140 #define BITP_ADISENSE_SPI_SCRATCH_PAD_SCRATCH_VALUE 0
kevin1990 7:4dbae381f693 141 #define BITM_ADISENSE_SPI_SCRATCH_PAD_SCRATCH_VALUE 0x000000FF
kevin1990 7:4dbae381f693 142
kevin1990 7:4dbae381f693 143 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 144 ADISENSE_SPI_SPI_REVISION Pos/Masks Description
kevin1990 7:4dbae381f693 145 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 146 #define BITP_ADISENSE_SPI_SPI_REVISION_SPI_TYPE 6
kevin1990 7:4dbae381f693 147 #define BITP_ADISENSE_SPI_SPI_REVISION_VERSION 0
kevin1990 7:4dbae381f693 148 #define BITM_ADISENSE_SPI_SPI_REVISION_SPI_TYPE 0x000000C0
kevin1990 7:4dbae381f693 149 #define BITM_ADISENSE_SPI_SPI_REVISION_VERSION 0x0000003F
kevin1990 7:4dbae381f693 150 #define ENUM_ADISENSE_SPI_SPI_REVISION_ADI_SPI 0x00000000
kevin1990 7:4dbae381f693 151 #define ENUM_ADISENSE_SPI_SPI_REVISION_LPT_SPI 0x00000080
kevin1990 7:4dbae381f693 152 #define ENUM_ADISENSE_SPI_SPI_REVISION_REV1_0 0x00000002 /* Version: Revision 1.0 */
kevin1990 7:4dbae381f693 153
kevin1990 7:4dbae381f693 154 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 155 ADISENSE_SPI_VENDOR_L Pos/Masks Description
kevin1990 7:4dbae381f693 156 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 157 #define BITP_ADISENSE_SPI_VENDOR_L_VID 0
kevin1990 7:4dbae381f693 158 #define BITM_ADISENSE_SPI_VENDOR_L_VID 0x000000FF
kevin1990 7:4dbae381f693 159
kevin1990 7:4dbae381f693 160 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 161 ADISENSE_SPI_VENDOR_H Pos/Masks Description
kevin1990 7:4dbae381f693 162 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 163 #define BITP_ADISENSE_SPI_VENDOR_H_VID 0
kevin1990 7:4dbae381f693 164 #define BITM_ADISENSE_SPI_VENDOR_H_VID 0x000000FF
kevin1990 7:4dbae381f693 165
kevin1990 7:4dbae381f693 166 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 167 ADISENSE_SPI_STREAM_MODE Pos/Masks Description
kevin1990 7:4dbae381f693 168 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 169 #define BITP_ADISENSE_SPI_STREAM_MODE_LOOP_COUNT 0
kevin1990 7:4dbae381f693 170 #define BITM_ADISENSE_SPI_STREAM_MODE_LOOP_COUNT 0x000000FF
kevin1990 7:4dbae381f693 171
kevin1990 7:4dbae381f693 172 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 173 ADISENSE_SPI_INTERFACE_CONFIG_C Pos/Masks Description
kevin1990 7:4dbae381f693 174 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 175 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 6
kevin1990 7:4dbae381f693 176 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_STRICT_ENTITY_ACCESS 5
kevin1990 7:4dbae381f693 177 #define BITP_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0
kevin1990 7:4dbae381f693 178 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLE 0x000000C0
kevin1990 7:4dbae381f693 179 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_STRICT_ENTITY_ACCESS 0x00000020
kevin1990 7:4dbae381f693 180 #define BITM_ADISENSE_SPI_INTERFACE_CONFIG_C_CRC_ENABLEB 0x00000003
kevin1990 7:4dbae381f693 181 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_DISABLED 0x00000000
kevin1990 7:4dbae381f693 182 #define ENUM_ADISENSE_SPI_INTERFACE_CONFIG_C_ENABLED 0x00000040
kevin1990 7:4dbae381f693 183
kevin1990 7:4dbae381f693 184 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 185 ADISENSE_SPI_INTERFACE_STATUS_A Pos/Masks Description
kevin1990 7:4dbae381f693 186 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 187 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 7
kevin1990 7:4dbae381f693 188 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 4
kevin1990 7:4dbae381f693 189 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_CRC_ERROR 3
kevin1990 7:4dbae381f693 190 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 2
kevin1990 7:4dbae381f693 191 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_PARTIAL_REG_WR_ERROR 1
kevin1990 7:4dbae381f693 192 #define BITP_ADISENSE_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0
kevin1990 7:4dbae381f693 193 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_NOT_READY_ERROR 0x00000080
kevin1990 7:4dbae381f693 194 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_CLOCK_COUNT_ERROR 0x00000010
kevin1990 7:4dbae381f693 195 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_CRC_ERROR 0x00000008
kevin1990 7:4dbae381f693 196 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_WR_TO_RD_ONLY_REG_ERROR 0x00000004
kevin1990 7:4dbae381f693 197 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_PARTIAL_REG_WR_ERROR 0x00000002
kevin1990 7:4dbae381f693 198 #define BITM_ADISENSE_SPI_INTERFACE_STATUS_A_ADDRESS_INVALID_ERROR 0x00000001
kevin1990 7:4dbae381f693 199
kevin1990 7:4dbae381f693 200
kevin1990 7:4dbae381f693 201 /* ============================================================================================================================
kevin1990 7:4dbae381f693 202 ADISENSE1000 Core Registers
kevin1990 7:4dbae381f693 203 ============================================================================================================================ */
kevin1990 7:4dbae381f693 204
kevin1990 7:4dbae381f693 205 /* ============================================================================================================================
kevin1990 7:4dbae381f693 206 ADISENSE_CORE
kevin1990 7:4dbae381f693 207 ============================================================================================================================ */
kevin1990 7:4dbae381f693 208 #define MOD_ADISENSE_CORE_BASE 0x00000010 /* ADISENSE1000 Core Registers */
kevin1990 7:4dbae381f693 209 #define MOD_ADISENSE_CORE_MASK 0x00007FFF /* ADISENSE1000 Core Registers */
kevin1990 7:4dbae381f693 210 #define REG_ADISENSE_CORE_COMMAND_RESET 0x00000000 /* Reset Value for Command */
kevin1990 7:4dbae381f693 211 #define REG_ADISENSE_CORE_COMMAND 0x00000014 /* ADISENSE_CORE Special Command */
kevin1990 7:4dbae381f693 212 #define REG_ADISENSE_CORE_MODE_RESET 0x00000000 /* Reset Value for Mode */
kevin1990 7:4dbae381f693 213 #define REG_ADISENSE_CORE_MODE 0x00000016 /* ADISENSE_CORE Operating Mode and DRDY Control */
kevin1990 7:4dbae381f693 214 #define REG_ADISENSE_CORE_POWER_CONFIG_RESET 0x00000000 /* Reset Value for Power_Config */
kevin1990 7:4dbae381f693 215 #define REG_ADISENSE_CORE_POWER_CONFIG 0x00000017 /* ADISENSE_CORE General Configuration */
kevin1990 7:4dbae381f693 216 #define REG_ADISENSE_CORE_CYCLE_CONTROL_RESET 0x00000000 /* Reset Value for Cycle_Control */
kevin1990 7:4dbae381f693 217 #define REG_ADISENSE_CORE_CYCLE_CONTROL 0x00000018 /* ADISENSE_CORE Measurement Cycle */
kevin1990 7:4dbae381f693 218 #define REG_ADISENSE_CORE_FIFO_NUM_CYCLES_RESET 0x00000001 /* Reset Value for Fifo_Num_Cycles */
kevin1990 7:4dbae381f693 219 #define REG_ADISENSE_CORE_FIFO_NUM_CYCLES 0x0000001A /* ADISENSE_CORE Number of Measurement Cycles to Store in FIFO */
kevin1990 7:4dbae381f693 220 #define REG_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_RESET 0x00000000 /* Reset Value for Multi_Cycle_Repeat_Interval */
kevin1990 7:4dbae381f693 221 #define REG_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL 0x0000001C /* ADISENSE_CORE Time Between Repeats of Multi-Cycle Conversions.... */
kevin1990 7:4dbae381f693 222 #define REG_ADISENSE_CORE_STATUS_RESET 0x00000000 /* Reset Value for Status */
kevin1990 7:4dbae381f693 223 #define REG_ADISENSE_CORE_STATUS 0x00000020 /* ADISENSE_CORE General Status */
kevin1990 7:4dbae381f693 224 #define REG_ADISENSE_CORE_DIAGNOSTICS_STATUS_RESET 0x00000000 /* Reset Value for Diagnostics_Status */
kevin1990 7:4dbae381f693 225 #define REG_ADISENSE_CORE_DIAGNOSTICS_STATUS 0x00000024 /* ADISENSE_CORE Diagnostics Status */
kevin1990 7:4dbae381f693 226 #define REG_ADISENSE_CORE_CHANNEL_ALERT_STATUS_RESET 0x00000000 /* Reset Value for Channel_Alert_Status */
kevin1990 7:4dbae381f693 227 #define REG_ADISENSE_CORE_CHANNEL_ALERT_STATUS 0x00000026 /* ADISENSE_CORE Alert Status Summary */
kevin1990 7:4dbae381f693 228 #define REG_ADISENSE_CORE_ALERT_STATUS_2_RESET 0x00000000 /* Reset Value for Alert_Status_2 */
kevin1990 7:4dbae381f693 229 #define REG_ADISENSE_CORE_ALERT_STATUS_2 0x00000028 /* ADISENSE_CORE Additional Alert Status Information */
kevin1990 7:4dbae381f693 230 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn_RESET 0x00000000 /* Reset Value for Alert_Detail_Ch[n] */
kevin1990 7:4dbae381f693 231 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH0 */
kevin1990 7:4dbae381f693 232 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH1 */
kevin1990 7:4dbae381f693 233 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH2 */
kevin1990 7:4dbae381f693 234 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH3 */
kevin1990 7:4dbae381f693 235 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH4 */
kevin1990 7:4dbae381f693 236 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH5 */
kevin1990 7:4dbae381f693 237 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH6 */
kevin1990 7:4dbae381f693 238 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH7 */
kevin1990 7:4dbae381f693 239 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH8 */
kevin1990 7:4dbae381f693 240 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH9 */
kevin1990 7:4dbae381f693 241 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH10 */
kevin1990 7:4dbae381f693 242 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH11 */
kevin1990 7:4dbae381f693 243 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_ALERT_DETAIL_CH12 */
kevin1990 7:4dbae381f693 244 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH0 0x0000002A /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 245 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH1 0x0000002C /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 246 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH2 0x0000002E /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 247 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH3 0x00000030 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 248 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH4 0x00000032 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 249 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH5 0x00000034 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 250 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH6 0x00000036 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 251 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH7 0x00000038 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 252 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH8 0x0000003A /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 253 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH9 0x0000003C /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 254 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH10 0x0000003E /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 255 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH11 0x00000040 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 256 #define REG_ADISENSE_CORE_ALERT_DETAIL_CH12 0x00000042 /* ADISENSE_CORE Detailed Error Information */
kevin1990 7:4dbae381f693 257 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn(i) (REG_ADISENSE_CORE_ALERT_DETAIL_CH0 + ((i) * 2))
kevin1990 7:4dbae381f693 258 #define REG_ADISENSE_CORE_ALERT_DETAIL_CHn_COUNT 13
kevin1990 7:4dbae381f693 259 #define REG_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_RESET 0x00000000 /* Reset Value for Channel_Config_Error */
kevin1990 7:4dbae381f693 260 #define REG_ADISENSE_CORE_CHANNEL_CONFIG_ERROR 0x0000004A /* ADISENSE_CORE Indicates Error in Channel Configuration */
kevin1990 7:4dbae381f693 261 #define REG_ADISENSE_CORE_ERROR_CODE_RESET 0x00000000 /* Reset Value for Error_Code */
kevin1990 7:4dbae381f693 262 #define REG_ADISENSE_CORE_ERROR_CODE 0x0000004C /* ADISENSE_CORE Code Indicating Source of Error */
kevin1990 7:4dbae381f693 263 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE1_RESET 0x00000000 /* Reset Value for External_Reference1 */
kevin1990 7:4dbae381f693 264 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE1 0x00000050 /* ADISENSE_CORE External Reference Information */
kevin1990 7:4dbae381f693 265 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE2_RESET 0x00000000 /* Reset Value for External_Reference2 */
kevin1990 7:4dbae381f693 266 #define REG_ADISENSE_CORE_EXTERNAL_REFERENCE2 0x00000054 /* ADISENSE_CORE External Reference Information */
kevin1990 7:4dbae381f693 267 #define REG_ADISENSE_CORE_AVDD_VOLTAGE_RESET 0x40533333 /* Reset Value for AVDD_Voltage */
kevin1990 7:4dbae381f693 268 #define REG_ADISENSE_CORE_AVDD_VOLTAGE 0x00000058 /* ADISENSE_CORE AVDD Voltage */
kevin1990 7:4dbae381f693 269 #define REG_ADISENSE_CORE_DIAGNOSTICS_CONTROL_RESET 0x00000000 /* Reset Value for Diagnostics_Control */
kevin1990 7:4dbae381f693 270 #define REG_ADISENSE_CORE_DIAGNOSTICS_CONTROL 0x0000005C /* ADISENSE_CORE Diagnostic Control */
kevin1990 7:4dbae381f693 271 #define REG_ADISENSE_CORE_DATA_FIFO_RESET 0x00000000 /* Reset Value for Data_FIFO */
kevin1990 7:4dbae381f693 272 #define REG_ADISENSE_CORE_DATA_FIFO 0x00000060 /* ADISENSE_CORE FIFO of Sensor Results */
kevin1990 7:4dbae381f693 273 #define REG_ADISENSE_CORE_LUT_SELECT_RESET 0x00000000 /* Reset Value for LUT_Select */
kevin1990 7:4dbae381f693 274 #define REG_ADISENSE_CORE_LUT_SELECT 0x00000070 /* ADISENSE_CORE Read/Write Strobe */
kevin1990 7:4dbae381f693 275 #define REG_ADISENSE_CORE_LUT_OFFSET_RESET 0x00000000 /* Reset Value for LUT_Offset */
kevin1990 7:4dbae381f693 276 #define REG_ADISENSE_CORE_LUT_OFFSET 0x00000072 /* ADISENSE_CORE Offset into Selected LUT */
kevin1990 7:4dbae381f693 277 #define REG_ADISENSE_CORE_LUT_DATA_RESET 0x00000000 /* Reset Value for LUT_Data */
kevin1990 7:4dbae381f693 278 #define REG_ADISENSE_CORE_LUT_DATA 0x00000074 /* ADISENSE_CORE Data to Read/Write from Addressed LUT Entry */
kevin1990 7:4dbae381f693 279 #define REG_ADISENSE_CORE_CAL_OFFSET_RESET 0x00000000 /* Reset Value for CAL_Offset */
kevin1990 7:4dbae381f693 280 #define REG_ADISENSE_CORE_CAL_OFFSET 0x0000007A /* ADISENSE_CORE Offset into Selected Calibration Values */
kevin1990 7:4dbae381f693 281 #define REG_ADISENSE_CORE_CAL_DATA_RESET 0x00000000 /* Reset Value for CAL_Data */
kevin1990 7:4dbae381f693 282 #define REG_ADISENSE_CORE_CAL_DATA 0x0000007C /* ADISENSE_CORE Data to Read/Write from Addressed Calibration Values */
kevin1990 7:4dbae381f693 283 #define REG_ADISENSE_CORE_REVISION_RESET 0x00000000 /* Reset Value for Revision */
kevin1990 7:4dbae381f693 284 #define REG_ADISENSE_CORE_REVISION 0x0000008C /* ADISENSE_CORE Hardware, Firmware Revision */
kevin1990 7:4dbae381f693 285 #define REG_ADISENSE_CORE_CHANNEL_COUNTn_RESET 0x00000000 /* Reset Value for Channel_Count[n] */
kevin1990 7:4dbae381f693 286 #define REG_ADISENSE_CORE_CHANNEL_COUNT0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT0 */
kevin1990 7:4dbae381f693 287 #define REG_ADISENSE_CORE_CHANNEL_COUNT1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT1 */
kevin1990 7:4dbae381f693 288 #define REG_ADISENSE_CORE_CHANNEL_COUNT2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT2 */
kevin1990 7:4dbae381f693 289 #define REG_ADISENSE_CORE_CHANNEL_COUNT3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT3 */
kevin1990 7:4dbae381f693 290 #define REG_ADISENSE_CORE_CHANNEL_COUNT4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT4 */
kevin1990 7:4dbae381f693 291 #define REG_ADISENSE_CORE_CHANNEL_COUNT5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT5 */
kevin1990 7:4dbae381f693 292 #define REG_ADISENSE_CORE_CHANNEL_COUNT6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT6 */
kevin1990 7:4dbae381f693 293 #define REG_ADISENSE_CORE_CHANNEL_COUNT7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT7 */
kevin1990 7:4dbae381f693 294 #define REG_ADISENSE_CORE_CHANNEL_COUNT8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT8 */
kevin1990 7:4dbae381f693 295 #define REG_ADISENSE_CORE_CHANNEL_COUNT9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT9 */
kevin1990 7:4dbae381f693 296 #define REG_ADISENSE_CORE_CHANNEL_COUNT10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_COUNT10 */
kevin1990 7:4dbae381f693 297 #define REG_ADISENSE_CORE_CHANNEL_COUNT0 0x00000090 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 298 #define REG_ADISENSE_CORE_CHANNEL_COUNT1 0x000000D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 299 #define REG_ADISENSE_CORE_CHANNEL_COUNT2 0x00000110 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 300 #define REG_ADISENSE_CORE_CHANNEL_COUNT3 0x00000150 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 301 #define REG_ADISENSE_CORE_CHANNEL_COUNT4 0x00000190 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 302 #define REG_ADISENSE_CORE_CHANNEL_COUNT5 0x000001D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 303 #define REG_ADISENSE_CORE_CHANNEL_COUNT6 0x00000210 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 304 #define REG_ADISENSE_CORE_CHANNEL_COUNT7 0x00000250 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 305 #define REG_ADISENSE_CORE_CHANNEL_COUNT8 0x00000290 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 306 #define REG_ADISENSE_CORE_CHANNEL_COUNT9 0x000002D0 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 307 #define REG_ADISENSE_CORE_CHANNEL_COUNT10 0x00000310 /* ADISENSE_CORE Number of Channel Occurrences per Measurement Cycle */
kevin1990 7:4dbae381f693 308 #define REG_ADISENSE_CORE_CHANNEL_COUNTn(i) (REG_ADISENSE_CORE_CHANNEL_COUNT0 + ((i) * 64))
kevin1990 7:4dbae381f693 309 #define REG_ADISENSE_CORE_CHANNEL_COUNTn_COUNT 11
kevin1990 7:4dbae381f693 310 #define REG_ADISENSE_CORE_SENSOR_TYPEn_RESET 0x00000000 /* Reset Value for Sensor_Type[n] */
kevin1990 7:4dbae381f693 311 #define REG_ADISENSE_CORE_SENSOR_TYPE0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE0 */
kevin1990 7:4dbae381f693 312 #define REG_ADISENSE_CORE_SENSOR_TYPE1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE1 */
kevin1990 7:4dbae381f693 313 #define REG_ADISENSE_CORE_SENSOR_TYPE2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE2 */
kevin1990 7:4dbae381f693 314 #define REG_ADISENSE_CORE_SENSOR_TYPE3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE3 */
kevin1990 7:4dbae381f693 315 #define REG_ADISENSE_CORE_SENSOR_TYPE4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE4 */
kevin1990 7:4dbae381f693 316 #define REG_ADISENSE_CORE_SENSOR_TYPE5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE5 */
kevin1990 7:4dbae381f693 317 #define REG_ADISENSE_CORE_SENSOR_TYPE6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE6 */
kevin1990 7:4dbae381f693 318 #define REG_ADISENSE_CORE_SENSOR_TYPE7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE7 */
kevin1990 7:4dbae381f693 319 #define REG_ADISENSE_CORE_SENSOR_TYPE8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE8 */
kevin1990 7:4dbae381f693 320 #define REG_ADISENSE_CORE_SENSOR_TYPE9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE9 */
kevin1990 7:4dbae381f693 321 #define REG_ADISENSE_CORE_SENSOR_TYPE10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_TYPE10 */
kevin1990 7:4dbae381f693 322 #define REG_ADISENSE_CORE_SENSOR_TYPE0 0x00000092 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 323 #define REG_ADISENSE_CORE_SENSOR_TYPE1 0x000000D2 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 324 #define REG_ADISENSE_CORE_SENSOR_TYPE2 0x00000112 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 325 #define REG_ADISENSE_CORE_SENSOR_TYPE3 0x00000152 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 326 #define REG_ADISENSE_CORE_SENSOR_TYPE4 0x00000192 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 327 #define REG_ADISENSE_CORE_SENSOR_TYPE5 0x000001D2 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 328 #define REG_ADISENSE_CORE_SENSOR_TYPE6 0x00000212 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 329 #define REG_ADISENSE_CORE_SENSOR_TYPE7 0x00000252 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 330 #define REG_ADISENSE_CORE_SENSOR_TYPE8 0x00000292 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 331 #define REG_ADISENSE_CORE_SENSOR_TYPE9 0x000002D2 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 332 #define REG_ADISENSE_CORE_SENSOR_TYPE10 0x00000312 /* ADISENSE_CORE Sensor Select */
kevin1990 7:4dbae381f693 333 #define REG_ADISENSE_CORE_SENSOR_TYPEn(i) (REG_ADISENSE_CORE_SENSOR_TYPE0 + ((i) * 64))
kevin1990 7:4dbae381f693 334 #define REG_ADISENSE_CORE_SENSOR_TYPEn_COUNT 11
kevin1990 7:4dbae381f693 335 #define REG_ADISENSE_CORE_SENSOR_DETAILSn_RESET 0x0000FFF0 /* Reset Value for Sensor_Details[n] */
kevin1990 7:4dbae381f693 336 #define REG_ADISENSE_CORE_SENSOR_DETAILS0_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS0 */
kevin1990 7:4dbae381f693 337 #define REG_ADISENSE_CORE_SENSOR_DETAILS1_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS1 */
kevin1990 7:4dbae381f693 338 #define REG_ADISENSE_CORE_SENSOR_DETAILS2_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS2 */
kevin1990 7:4dbae381f693 339 #define REG_ADISENSE_CORE_SENSOR_DETAILS3_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS3 */
kevin1990 7:4dbae381f693 340 #define REG_ADISENSE_CORE_SENSOR_DETAILS4_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS4 */
kevin1990 7:4dbae381f693 341 #define REG_ADISENSE_CORE_SENSOR_DETAILS5_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS5 */
kevin1990 7:4dbae381f693 342 #define REG_ADISENSE_CORE_SENSOR_DETAILS6_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS6 */
kevin1990 7:4dbae381f693 343 #define REG_ADISENSE_CORE_SENSOR_DETAILS7_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS7 */
kevin1990 7:4dbae381f693 344 #define REG_ADISENSE_CORE_SENSOR_DETAILS8_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS8 */
kevin1990 7:4dbae381f693 345 #define REG_ADISENSE_CORE_SENSOR_DETAILS9_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS9 */
kevin1990 7:4dbae381f693 346 #define REG_ADISENSE_CORE_SENSOR_DETAILS10_RESET 0x0000FFF0 /* Reset Value for REG_ADISENSE_CORE_SENSOR_DETAILS10 */
kevin1990 7:4dbae381f693 347 #define REG_ADISENSE_CORE_SENSOR_DETAILS0 0x00000094 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 348 #define REG_ADISENSE_CORE_SENSOR_DETAILS1 0x000000D4 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 349 #define REG_ADISENSE_CORE_SENSOR_DETAILS2 0x00000114 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 350 #define REG_ADISENSE_CORE_SENSOR_DETAILS3 0x00000154 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 351 #define REG_ADISENSE_CORE_SENSOR_DETAILS4 0x00000194 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 352 #define REG_ADISENSE_CORE_SENSOR_DETAILS5 0x000001D4 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 353 #define REG_ADISENSE_CORE_SENSOR_DETAILS6 0x00000214 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 354 #define REG_ADISENSE_CORE_SENSOR_DETAILS7 0x00000254 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 355 #define REG_ADISENSE_CORE_SENSOR_DETAILS8 0x00000294 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 356 #define REG_ADISENSE_CORE_SENSOR_DETAILS9 0x000002D4 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 357 #define REG_ADISENSE_CORE_SENSOR_DETAILS10 0x00000314 /* ADISENSE_CORE Sensor Details */
kevin1990 7:4dbae381f693 358 #define REG_ADISENSE_CORE_SENSOR_DETAILSn(i) (REG_ADISENSE_CORE_SENSOR_DETAILS0 + ((i) * 64))
kevin1990 7:4dbae381f693 359 #define REG_ADISENSE_CORE_SENSOR_DETAILSn_COUNT 11
kevin1990 7:4dbae381f693 360 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn_RESET 0x00000000 /* Reset Value for Channel_Excitation[n] */
kevin1990 7:4dbae381f693 361 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION0 */
kevin1990 7:4dbae381f693 362 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION1 */
kevin1990 7:4dbae381f693 363 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION2 */
kevin1990 7:4dbae381f693 364 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION3 */
kevin1990 7:4dbae381f693 365 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION4 */
kevin1990 7:4dbae381f693 366 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION5 */
kevin1990 7:4dbae381f693 367 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION6 */
kevin1990 7:4dbae381f693 368 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION7 */
kevin1990 7:4dbae381f693 369 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION8 */
kevin1990 7:4dbae381f693 370 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION9 */
kevin1990 7:4dbae381f693 371 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_CHANNEL_EXCITATION10 */
kevin1990 7:4dbae381f693 372 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION0 0x00000098 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 373 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION1 0x000000D8 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 374 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION2 0x00000118 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 375 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION3 0x00000158 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 376 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION4 0x00000198 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 377 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION5 0x000001D8 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 378 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION6 0x00000218 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 379 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION7 0x00000258 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 380 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION8 0x00000298 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 381 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION9 0x000002D8 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 382 #define REG_ADISENSE_CORE_CHANNEL_EXCITATION10 0x00000318 /* ADISENSE_CORE Excitation Current */
kevin1990 7:4dbae381f693 383 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn(i) (REG_ADISENSE_CORE_CHANNEL_EXCITATION0 + ((i) * 64))
kevin1990 7:4dbae381f693 384 #define REG_ADISENSE_CORE_CHANNEL_EXCITATIONn_COUNT 11
kevin1990 7:4dbae381f693 385 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Config[n] */
kevin1990 7:4dbae381f693 386 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 */
kevin1990 7:4dbae381f693 387 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1 */
kevin1990 7:4dbae381f693 388 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2 */
kevin1990 7:4dbae381f693 389 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3 */
kevin1990 7:4dbae381f693 390 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4 */
kevin1990 7:4dbae381f693 391 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5 */
kevin1990 7:4dbae381f693 392 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6 */
kevin1990 7:4dbae381f693 393 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7 */
kevin1990 7:4dbae381f693 394 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8 */
kevin1990 7:4dbae381f693 395 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9 */
kevin1990 7:4dbae381f693 396 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10 */
kevin1990 7:4dbae381f693 397 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 0x0000009A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 398 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG1 0x000000DA /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 399 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG2 0x0000011A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 400 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG3 0x0000015A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 401 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG4 0x0000019A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 402 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG5 0x000001DA /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 403 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG6 0x0000021A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 404 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG7 0x0000025A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 405 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG8 0x0000029A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 406 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG9 0x000002DA /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 407 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG10 0x0000031A /* ADISENSE_CORE Digital Sensor Data Coding */
kevin1990 7:4dbae381f693 408 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG0 + ((i) * 64))
kevin1990 7:4dbae381f693 409 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_CONFIGn_COUNT 11
kevin1990 7:4dbae381f693 410 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn_RESET 0x00000000 /* Reset Value for Digital_Sensor_Address[n] */
kevin1990 7:4dbae381f693 411 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 */
kevin1990 7:4dbae381f693 412 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1 */
kevin1990 7:4dbae381f693 413 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2 */
kevin1990 7:4dbae381f693 414 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3 */
kevin1990 7:4dbae381f693 415 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4 */
kevin1990 7:4dbae381f693 416 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5 */
kevin1990 7:4dbae381f693 417 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6 */
kevin1990 7:4dbae381f693 418 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7 */
kevin1990 7:4dbae381f693 419 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8 */
kevin1990 7:4dbae381f693 420 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9 */
kevin1990 7:4dbae381f693 421 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10 */
kevin1990 7:4dbae381f693 422 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 0x0000009C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 423 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS1 0x000000DC /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 424 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS2 0x0000011C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 425 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS3 0x0000015C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 426 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS4 0x0000019C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 427 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS5 0x000001DC /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 428 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS6 0x0000021C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 429 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS7 0x0000025C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 430 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS8 0x0000029C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 431 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS9 0x000002DC /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 432 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS10 0x0000031C /* ADISENSE_CORE Sensor Address */
kevin1990 7:4dbae381f693 433 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS0 + ((i) * 64))
kevin1990 7:4dbae381f693 434 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESSn_COUNT 11
kevin1990 7:4dbae381f693 435 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command1[n] */
kevin1990 7:4dbae381f693 436 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 */
kevin1990 7:4dbae381f693 437 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11 */
kevin1990 7:4dbae381f693 438 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12 */
kevin1990 7:4dbae381f693 439 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13 */
kevin1990 7:4dbae381f693 440 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14 */
kevin1990 7:4dbae381f693 441 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15 */
kevin1990 7:4dbae381f693 442 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16 */
kevin1990 7:4dbae381f693 443 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17 */
kevin1990 7:4dbae381f693 444 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18 */
kevin1990 7:4dbae381f693 445 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19 */
kevin1990 7:4dbae381f693 446 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110 */
kevin1990 7:4dbae381f693 447 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 0x0000009D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 448 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND11 0x000000DD /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 449 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND12 0x0000011D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 450 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND13 0x0000015D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 451 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND14 0x0000019D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 452 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND15 0x000001DD /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 453 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND16 0x0000021D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 454 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND17 0x0000025D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 455 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND18 0x0000029D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 456 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND19 0x000002DD /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 457 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND110 0x0000031D /* ADISENSE_CORE Sensor Command1 */
kevin1990 7:4dbae381f693 458 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND10 + ((i) * 64))
kevin1990 7:4dbae381f693 459 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1n_COUNT 11
kevin1990 7:4dbae381f693 460 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command2[n] */
kevin1990 7:4dbae381f693 461 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 */
kevin1990 7:4dbae381f693 462 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21 */
kevin1990 7:4dbae381f693 463 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22 */
kevin1990 7:4dbae381f693 464 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23 */
kevin1990 7:4dbae381f693 465 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24 */
kevin1990 7:4dbae381f693 466 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25 */
kevin1990 7:4dbae381f693 467 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26 */
kevin1990 7:4dbae381f693 468 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27 */
kevin1990 7:4dbae381f693 469 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28 */
kevin1990 7:4dbae381f693 470 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29 */
kevin1990 7:4dbae381f693 471 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210 */
kevin1990 7:4dbae381f693 472 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 0x0000009E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 473 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND21 0x000000DE /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 474 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND22 0x0000011E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 475 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND23 0x0000015E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 476 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND24 0x0000019E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 477 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND25 0x000001DE /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 478 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND26 0x0000021E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 479 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND27 0x0000025E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 480 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND28 0x0000029E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 481 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND29 0x000002DE /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 482 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND210 0x0000031E /* ADISENSE_CORE Sensor Command2 */
kevin1990 7:4dbae381f693 483 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND20 + ((i) * 64))
kevin1990 7:4dbae381f693 484 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2n_COUNT 11
kevin1990 7:4dbae381f693 485 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n_RESET 0x00000000 /* Reset Value for Digital_Sensor_Command3[n] */
kevin1990 7:4dbae381f693 486 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 */
kevin1990 7:4dbae381f693 487 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31 */
kevin1990 7:4dbae381f693 488 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32 */
kevin1990 7:4dbae381f693 489 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33 */
kevin1990 7:4dbae381f693 490 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34 */
kevin1990 7:4dbae381f693 491 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35 */
kevin1990 7:4dbae381f693 492 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36 */
kevin1990 7:4dbae381f693 493 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37 */
kevin1990 7:4dbae381f693 494 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38 */
kevin1990 7:4dbae381f693 495 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39 */
kevin1990 7:4dbae381f693 496 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310 */
kevin1990 7:4dbae381f693 497 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 0x0000009F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 498 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND31 0x000000DF /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 499 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND32 0x0000011F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 500 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND33 0x0000015F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 501 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND34 0x0000019F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 502 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND35 0x000001DF /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 503 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND36 0x0000021F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 504 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND37 0x0000025F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 505 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND38 0x0000029F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 506 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND39 0x000002DF /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 507 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND310 0x0000031F /* ADISENSE_CORE Sensor Command3 */
kevin1990 7:4dbae381f693 508 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n(i) (REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND30 + ((i) * 64))
kevin1990 7:4dbae381f693 509 #define REG_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3n_COUNT 11
kevin1990 7:4dbae381f693 510 #define REG_ADISENSE_CORE_FILTER_SELECTn_RESET 0x00000000 /* Reset Value for Filter_Select[n] */
kevin1990 7:4dbae381f693 511 #define REG_ADISENSE_CORE_FILTER_SELECT0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT0 */
kevin1990 7:4dbae381f693 512 #define REG_ADISENSE_CORE_FILTER_SELECT1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT1 */
kevin1990 7:4dbae381f693 513 #define REG_ADISENSE_CORE_FILTER_SELECT2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT2 */
kevin1990 7:4dbae381f693 514 #define REG_ADISENSE_CORE_FILTER_SELECT3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT3 */
kevin1990 7:4dbae381f693 515 #define REG_ADISENSE_CORE_FILTER_SELECT4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT4 */
kevin1990 7:4dbae381f693 516 #define REG_ADISENSE_CORE_FILTER_SELECT5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT5 */
kevin1990 7:4dbae381f693 517 #define REG_ADISENSE_CORE_FILTER_SELECT6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT6 */
kevin1990 7:4dbae381f693 518 #define REG_ADISENSE_CORE_FILTER_SELECT7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT7 */
kevin1990 7:4dbae381f693 519 #define REG_ADISENSE_CORE_FILTER_SELECT8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT8 */
kevin1990 7:4dbae381f693 520 #define REG_ADISENSE_CORE_FILTER_SELECT9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT9 */
kevin1990 7:4dbae381f693 521 #define REG_ADISENSE_CORE_FILTER_SELECT10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_FILTER_SELECT10 */
kevin1990 7:4dbae381f693 522 #define REG_ADISENSE_CORE_FILTER_SELECT0 0x000000A0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 523 #define REG_ADISENSE_CORE_FILTER_SELECT1 0x000000E0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 524 #define REG_ADISENSE_CORE_FILTER_SELECT2 0x00000120 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 525 #define REG_ADISENSE_CORE_FILTER_SELECT3 0x00000160 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 526 #define REG_ADISENSE_CORE_FILTER_SELECT4 0x000001A0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 527 #define REG_ADISENSE_CORE_FILTER_SELECT5 0x000001E0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 528 #define REG_ADISENSE_CORE_FILTER_SELECT6 0x00000220 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 529 #define REG_ADISENSE_CORE_FILTER_SELECT7 0x00000260 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 530 #define REG_ADISENSE_CORE_FILTER_SELECT8 0x000002A0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 531 #define REG_ADISENSE_CORE_FILTER_SELECT9 0x000002E0 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 532 #define REG_ADISENSE_CORE_FILTER_SELECT10 0x00000320 /* ADISENSE_CORE ADC Digital Filter Selection */
kevin1990 7:4dbae381f693 533 #define REG_ADISENSE_CORE_FILTER_SELECTn(i) (REG_ADISENSE_CORE_FILTER_SELECT0 + ((i) * 64))
kevin1990 7:4dbae381f693 534 #define REG_ADISENSE_CORE_FILTER_SELECTn_COUNT 11
kevin1990 7:4dbae381f693 535 #define REG_ADISENSE_CORE_SETTLING_TIMEn_RESET 0x00000000 /* Reset Value for Settling_Time[n] */
kevin1990 7:4dbae381f693 536 #define REG_ADISENSE_CORE_SETTLING_TIME0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME0 */
kevin1990 7:4dbae381f693 537 #define REG_ADISENSE_CORE_SETTLING_TIME1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME1 */
kevin1990 7:4dbae381f693 538 #define REG_ADISENSE_CORE_SETTLING_TIME2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME2 */
kevin1990 7:4dbae381f693 539 #define REG_ADISENSE_CORE_SETTLING_TIME3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME3 */
kevin1990 7:4dbae381f693 540 #define REG_ADISENSE_CORE_SETTLING_TIME4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME4 */
kevin1990 7:4dbae381f693 541 #define REG_ADISENSE_CORE_SETTLING_TIME5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME5 */
kevin1990 7:4dbae381f693 542 #define REG_ADISENSE_CORE_SETTLING_TIME6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME6 */
kevin1990 7:4dbae381f693 543 #define REG_ADISENSE_CORE_SETTLING_TIME7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME7 */
kevin1990 7:4dbae381f693 544 #define REG_ADISENSE_CORE_SETTLING_TIME8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME8 */
kevin1990 7:4dbae381f693 545 #define REG_ADISENSE_CORE_SETTLING_TIME9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME9 */
kevin1990 7:4dbae381f693 546 #define REG_ADISENSE_CORE_SETTLING_TIME10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SETTLING_TIME10 */
kevin1990 7:4dbae381f693 547 #define REG_ADISENSE_CORE_SETTLING_TIME0 0x000000A4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 548 #define REG_ADISENSE_CORE_SETTLING_TIME1 0x000000E4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 549 #define REG_ADISENSE_CORE_SETTLING_TIME2 0x00000124 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 550 #define REG_ADISENSE_CORE_SETTLING_TIME3 0x00000164 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 551 #define REG_ADISENSE_CORE_SETTLING_TIME4 0x000001A4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 552 #define REG_ADISENSE_CORE_SETTLING_TIME5 0x000001E4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 553 #define REG_ADISENSE_CORE_SETTLING_TIME6 0x00000224 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 554 #define REG_ADISENSE_CORE_SETTLING_TIME7 0x00000264 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 555 #define REG_ADISENSE_CORE_SETTLING_TIME8 0x000002A4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 556 #define REG_ADISENSE_CORE_SETTLING_TIME9 0x000002E4 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 557 #define REG_ADISENSE_CORE_SETTLING_TIME10 0x00000324 /* ADISENSE_CORE Settling Time */
kevin1990 7:4dbae381f693 558 #define REG_ADISENSE_CORE_SETTLING_TIMEn(i) (REG_ADISENSE_CORE_SETTLING_TIME0 + ((i) * 64))
kevin1990 7:4dbae381f693 559 #define REG_ADISENSE_CORE_SETTLING_TIMEn_COUNT 11
kevin1990 7:4dbae381f693 560 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn_RESET 0xFF800000 /* Reset Value for High_Threshold_Limit[n] */
kevin1990 7:4dbae381f693 561 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 */
kevin1990 7:4dbae381f693 562 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1 */
kevin1990 7:4dbae381f693 563 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2 */
kevin1990 7:4dbae381f693 564 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3 */
kevin1990 7:4dbae381f693 565 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4 */
kevin1990 7:4dbae381f693 566 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5 */
kevin1990 7:4dbae381f693 567 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6 */
kevin1990 7:4dbae381f693 568 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7 */
kevin1990 7:4dbae381f693 569 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8 */
kevin1990 7:4dbae381f693 570 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9 */
kevin1990 7:4dbae381f693 571 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10 */
kevin1990 7:4dbae381f693 572 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11 */
kevin1990 7:4dbae381f693 573 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12_RESET 0xFF800000 /* Reset Value for REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12 */
kevin1990 7:4dbae381f693 574 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 0x000000A8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 575 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT1 0x000000E8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 576 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT2 0x00000128 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 577 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT3 0x00000168 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 578 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT4 0x000001A8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 579 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT5 0x000001E8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 580 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT6 0x00000228 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 581 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT7 0x00000268 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 582 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT8 0x000002A8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 583 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT9 0x000002E8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 584 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT10 0x00000328 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 585 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT11 0x00000368 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 586 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT12 0x000003A8 /* ADISENSE_CORE High Threshold */
kevin1990 7:4dbae381f693 587 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn(i) (REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT0 + ((i) * 64))
kevin1990 7:4dbae381f693 588 #define REG_ADISENSE_CORE_HIGH_THRESHOLD_LIMITn_COUNT 13
kevin1990 7:4dbae381f693 589 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn_RESET 0x7F800000 /* Reset Value for Low_Threshold_Limit[n] */
kevin1990 7:4dbae381f693 590 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 */
kevin1990 7:4dbae381f693 591 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1 */
kevin1990 7:4dbae381f693 592 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2 */
kevin1990 7:4dbae381f693 593 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3 */
kevin1990 7:4dbae381f693 594 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4 */
kevin1990 7:4dbae381f693 595 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5 */
kevin1990 7:4dbae381f693 596 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6 */
kevin1990 7:4dbae381f693 597 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7 */
kevin1990 7:4dbae381f693 598 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8 */
kevin1990 7:4dbae381f693 599 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9 */
kevin1990 7:4dbae381f693 600 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10 */
kevin1990 7:4dbae381f693 601 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11 */
kevin1990 7:4dbae381f693 602 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12_RESET 0x7F800000 /* Reset Value for REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12 */
kevin1990 7:4dbae381f693 603 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 0x000000AC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 604 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT1 0x000000EC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 605 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT2 0x0000012C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 606 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT3 0x0000016C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 607 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT4 0x000001AC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 608 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT5 0x000001EC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 609 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT6 0x0000022C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 610 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT7 0x0000026C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 611 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT8 0x000002AC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 612 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT9 0x000002EC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 613 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT10 0x0000032C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 614 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT11 0x0000036C /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 615 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT12 0x000003AC /* ADISENSE_CORE Low Threshold */
kevin1990 7:4dbae381f693 616 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn(i) (REG_ADISENSE_CORE_LOW_THRESHOLD_LIMIT0 + ((i) * 64))
kevin1990 7:4dbae381f693 617 #define REG_ADISENSE_CORE_LOW_THRESHOLD_LIMITn_COUNT 13
kevin1990 7:4dbae381f693 618 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX1n_RESET 0x00000000 /* Reset Value for Sensor_LUT_Index1[n] */
kevin1990 7:4dbae381f693 619 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX10 */
kevin1990 7:4dbae381f693 620 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX11 */
kevin1990 7:4dbae381f693 621 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX12 */
kevin1990 7:4dbae381f693 622 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX13_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX13 */
kevin1990 7:4dbae381f693 623 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX14_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX14 */
kevin1990 7:4dbae381f693 624 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX15_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX15 */
kevin1990 7:4dbae381f693 625 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX16_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX16 */
kevin1990 7:4dbae381f693 626 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX17_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX17 */
kevin1990 7:4dbae381f693 627 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX18_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX18 */
kevin1990 7:4dbae381f693 628 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX19_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX19 */
kevin1990 7:4dbae381f693 629 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX110_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX110 */
kevin1990 7:4dbae381f693 630 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX10 0x000000B0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 631 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX11 0x000000F0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 632 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX12 0x00000130 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 633 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX13 0x00000170 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 634 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX14 0x000001B0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 635 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX15 0x000001F0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 636 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX16 0x00000230 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 637 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX17 0x00000270 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 638 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX18 0x000002B0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 639 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX19 0x000002F0 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 640 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX110 0x00000330 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 641 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX1n(i) (REG_ADISENSE_CORE_SENSOR_LUT_INDEX10 + ((i) * 64))
kevin1990 7:4dbae381f693 642 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX1n_COUNT 11
kevin1990 7:4dbae381f693 643 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX2n_RESET 0x00000000 /* Reset Value for Sensor_LUT_Index2[n] */
kevin1990 7:4dbae381f693 644 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX20_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX20 */
kevin1990 7:4dbae381f693 645 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX21_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX21 */
kevin1990 7:4dbae381f693 646 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX22_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX22 */
kevin1990 7:4dbae381f693 647 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX23_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX23 */
kevin1990 7:4dbae381f693 648 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX24_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX24 */
kevin1990 7:4dbae381f693 649 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX25_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX25 */
kevin1990 7:4dbae381f693 650 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX26_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX26 */
kevin1990 7:4dbae381f693 651 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX27_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX27 */
kevin1990 7:4dbae381f693 652 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX28_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX28 */
kevin1990 7:4dbae381f693 653 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX29_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX29 */
kevin1990 7:4dbae381f693 654 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX210_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_LUT_INDEX210 */
kevin1990 7:4dbae381f693 655 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX20 0x000000B4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 656 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX21 0x000000F4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 657 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX22 0x00000134 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 658 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX23 0x00000174 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 659 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX24 0x000001B4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 660 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX25 0x000001F4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 661 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX26 0x00000234 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 662 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX27 0x00000274 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 663 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX28 0x000002B4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 664 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX29 0x000002F4 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 665 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX210 0x00000334 /* ADISENSE_CORE Sequence of Look-Up-Table Pointers */
kevin1990 7:4dbae381f693 666 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX2n(i) (REG_ADISENSE_CORE_SENSOR_LUT_INDEX20 + ((i) * 64))
kevin1990 7:4dbae381f693 667 #define REG_ADISENSE_CORE_SENSOR_LUT_INDEX2n_COUNT 11
kevin1990 7:4dbae381f693 668 #define REG_ADISENSE_CORE_SENSOR_OFFSETn_RESET 0x00000000 /* Reset Value for Sensor_Offset[n] */
kevin1990 7:4dbae381f693 669 #define REG_ADISENSE_CORE_SENSOR_OFFSET0_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET0 */
kevin1990 7:4dbae381f693 670 #define REG_ADISENSE_CORE_SENSOR_OFFSET1_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET1 */
kevin1990 7:4dbae381f693 671 #define REG_ADISENSE_CORE_SENSOR_OFFSET2_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET2 */
kevin1990 7:4dbae381f693 672 #define REG_ADISENSE_CORE_SENSOR_OFFSET3_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET3 */
kevin1990 7:4dbae381f693 673 #define REG_ADISENSE_CORE_SENSOR_OFFSET4_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET4 */
kevin1990 7:4dbae381f693 674 #define REG_ADISENSE_CORE_SENSOR_OFFSET5_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET5 */
kevin1990 7:4dbae381f693 675 #define REG_ADISENSE_CORE_SENSOR_OFFSET6_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET6 */
kevin1990 7:4dbae381f693 676 #define REG_ADISENSE_CORE_SENSOR_OFFSET7_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET7 */
kevin1990 7:4dbae381f693 677 #define REG_ADISENSE_CORE_SENSOR_OFFSET8_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET8 */
kevin1990 7:4dbae381f693 678 #define REG_ADISENSE_CORE_SENSOR_OFFSET9_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET9 */
kevin1990 7:4dbae381f693 679 #define REG_ADISENSE_CORE_SENSOR_OFFSET10_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET10 */
kevin1990 7:4dbae381f693 680 #define REG_ADISENSE_CORE_SENSOR_OFFSET11_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET11 */
kevin1990 7:4dbae381f693 681 #define REG_ADISENSE_CORE_SENSOR_OFFSET12_RESET 0x00000000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_OFFSET12 */
kevin1990 7:4dbae381f693 682 #define REG_ADISENSE_CORE_SENSOR_OFFSET0 0x000000B8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 683 #define REG_ADISENSE_CORE_SENSOR_OFFSET1 0x000000F8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 684 #define REG_ADISENSE_CORE_SENSOR_OFFSET2 0x00000138 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 685 #define REG_ADISENSE_CORE_SENSOR_OFFSET3 0x00000178 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 686 #define REG_ADISENSE_CORE_SENSOR_OFFSET4 0x000001B8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 687 #define REG_ADISENSE_CORE_SENSOR_OFFSET5 0x000001F8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 688 #define REG_ADISENSE_CORE_SENSOR_OFFSET6 0x00000238 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 689 #define REG_ADISENSE_CORE_SENSOR_OFFSET7 0x00000278 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 690 #define REG_ADISENSE_CORE_SENSOR_OFFSET8 0x000002B8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 691 #define REG_ADISENSE_CORE_SENSOR_OFFSET9 0x000002F8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 692 #define REG_ADISENSE_CORE_SENSOR_OFFSET10 0x00000338 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 693 #define REG_ADISENSE_CORE_SENSOR_OFFSET11 0x00000378 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 694 #define REG_ADISENSE_CORE_SENSOR_OFFSET12 0x000003B8 /* ADISENSE_CORE Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 695 #define REG_ADISENSE_CORE_SENSOR_OFFSETn(i) (REG_ADISENSE_CORE_SENSOR_OFFSET0 + ((i) * 64))
kevin1990 7:4dbae381f693 696 #define REG_ADISENSE_CORE_SENSOR_OFFSETn_COUNT 13
kevin1990 7:4dbae381f693 697 #define REG_ADISENSE_CORE_SENSOR_GAINn_RESET 0x3F800000 /* Reset Value for Sensor_Gain[n] */
kevin1990 7:4dbae381f693 698 #define REG_ADISENSE_CORE_SENSOR_GAIN0_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN0 */
kevin1990 7:4dbae381f693 699 #define REG_ADISENSE_CORE_SENSOR_GAIN1_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN1 */
kevin1990 7:4dbae381f693 700 #define REG_ADISENSE_CORE_SENSOR_GAIN2_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN2 */
kevin1990 7:4dbae381f693 701 #define REG_ADISENSE_CORE_SENSOR_GAIN3_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN3 */
kevin1990 7:4dbae381f693 702 #define REG_ADISENSE_CORE_SENSOR_GAIN4_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN4 */
kevin1990 7:4dbae381f693 703 #define REG_ADISENSE_CORE_SENSOR_GAIN5_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN5 */
kevin1990 7:4dbae381f693 704 #define REG_ADISENSE_CORE_SENSOR_GAIN6_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN6 */
kevin1990 7:4dbae381f693 705 #define REG_ADISENSE_CORE_SENSOR_GAIN7_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN7 */
kevin1990 7:4dbae381f693 706 #define REG_ADISENSE_CORE_SENSOR_GAIN8_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN8 */
kevin1990 7:4dbae381f693 707 #define REG_ADISENSE_CORE_SENSOR_GAIN9_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN9 */
kevin1990 7:4dbae381f693 708 #define REG_ADISENSE_CORE_SENSOR_GAIN10_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN10 */
kevin1990 7:4dbae381f693 709 #define REG_ADISENSE_CORE_SENSOR_GAIN11_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN11 */
kevin1990 7:4dbae381f693 710 #define REG_ADISENSE_CORE_SENSOR_GAIN12_RESET 0x3F800000 /* Reset Value for REG_ADISENSE_CORE_SENSOR_GAIN12 */
kevin1990 7:4dbae381f693 711 #define REG_ADISENSE_CORE_SENSOR_GAIN0 0x000000BC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 712 #define REG_ADISENSE_CORE_SENSOR_GAIN1 0x000000FC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 713 #define REG_ADISENSE_CORE_SENSOR_GAIN2 0x0000013C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 714 #define REG_ADISENSE_CORE_SENSOR_GAIN3 0x0000017C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 715 #define REG_ADISENSE_CORE_SENSOR_GAIN4 0x000001BC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 716 #define REG_ADISENSE_CORE_SENSOR_GAIN5 0x000001FC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 717 #define REG_ADISENSE_CORE_SENSOR_GAIN6 0x0000023C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 718 #define REG_ADISENSE_CORE_SENSOR_GAIN7 0x0000027C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 719 #define REG_ADISENSE_CORE_SENSOR_GAIN8 0x000002BC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 720 #define REG_ADISENSE_CORE_SENSOR_GAIN9 0x000002FC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 721 #define REG_ADISENSE_CORE_SENSOR_GAIN10 0x0000033C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 722 #define REG_ADISENSE_CORE_SENSOR_GAIN11 0x0000037C /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 723 #define REG_ADISENSE_CORE_SENSOR_GAIN12 0x000003BC /* ADISENSE_CORE Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 724 #define REG_ADISENSE_CORE_SENSOR_GAINn(i) (REG_ADISENSE_CORE_SENSOR_GAIN0 + ((i) * 64))
kevin1990 7:4dbae381f693 725 #define REG_ADISENSE_CORE_SENSOR_GAINn_COUNT 13
kevin1990 7:4dbae381f693 726
kevin1990 7:4dbae381f693 727 /* ============================================================================================================================
kevin1990 7:4dbae381f693 728 ADISENSE_CORE Register BitMasks, Positions & Enumerations
kevin1990 7:4dbae381f693 729 ============================================================================================================================ */
kevin1990 7:4dbae381f693 730 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 731 ADISENSE_CORE_COMMAND Pos/Masks Description
kevin1990 7:4dbae381f693 732 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 733 #define BITP_ADISENSE_CORE_COMMAND_SPECIAL_COMMAND 0 /* Special Command */
kevin1990 7:4dbae381f693 734 #define BITM_ADISENSE_CORE_COMMAND_SPECIAL_COMMAND 0x000000FF /* Special Command */
kevin1990 7:4dbae381f693 735 #define ENUM_ADISENSE_CORE_COMMAND_NOP 0x00000000 /* Special_Command: No Command */
kevin1990 7:4dbae381f693 736 #define ENUM_ADISENSE_CORE_COMMAND_CONVERT 0x00000001 /* Special_Command: Start ADC Conversions */
kevin1990 7:4dbae381f693 737 #define ENUM_ADISENSE_CORE_COMMAND_CONVERT_WITH_RAW 0x00000002 /* Special_Command: Start Conversions with Added RAW ADC Data */
kevin1990 7:4dbae381f693 738 #define ENUM_ADISENSE_CORE_COMMAND_RUN_DIAGNOSTICS 0x00000003 /* Special_Command: Initiate a Diagnostics Cycle */
kevin1990 7:4dbae381f693 739 #define ENUM_ADISENSE_CORE_COMMAND_SELF_CALIBRATION 0x00000004 /* Special_Command: Initiate a Self-Calibration Cycle */
kevin1990 7:4dbae381f693 740 #define ENUM_ADISENSE_CORE_COMMAND_LOAD_CONFIG 0x00000005 /* Special_Command: Load Registers with Configuration from FLASH */
kevin1990 7:4dbae381f693 741 #define ENUM_ADISENSE_CORE_COMMAND_SAVE_CONFIG 0x00000006 /* Special_Command: Store Current Register Configuration to FLASH */
kevin1990 7:4dbae381f693 742 #define ENUM_ADISENSE_CORE_COMMAND_LATCH_CONFIG 0x00000007 /* Special_Command: Latch Configuration. */
kevin1990 7:4dbae381f693 743 #define ENUM_ADISENSE_CORE_COMMAND_LOAD_LUT 0x00000008 /* Special_Command: Load LUT from FLASH */
kevin1990 7:4dbae381f693 744 #define ENUM_ADISENSE_CORE_COMMAND_SAVE_LUT2 0x00000009 /* Special_Command: Save LUT to FLASH */
kevin1990 7:4dbae381f693 745 #define ENUM_ADISENSE_CORE_COMMAND_SYSTEM_CHECK 0x0000000A /* Special_Command: Full Suite of Measurement Diagnostics */
kevin1990 7:4dbae381f693 746 #define ENUM_ADISENSE_CORE_COMMAND_LOAD_DEFAULTS 0x0000000C /* Special_Command: Load Relevant Registers With Default Values Appropriate to Sensor */
kevin1990 7:4dbae381f693 747
kevin1990 7:4dbae381f693 748 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 749 ADISENSE_CORE_MODE Pos/Masks Description
kevin1990 7:4dbae381f693 750 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 751 #define BITP_ADISENSE_CORE_MODE_DRDY_MODE 2 /* Indicates Behavior of DRDY with Respect to FIFO State */
kevin1990 7:4dbae381f693 752 #define BITP_ADISENSE_CORE_MODE_CONVERSION_MODE 0 /* Conversion Mode */
kevin1990 7:4dbae381f693 753 #define BITM_ADISENSE_CORE_MODE_DRDY_MODE 0x0000000C /* Indicates Behavior of DRDY with Respect to FIFO State */
kevin1990 7:4dbae381f693 754 #define BITM_ADISENSE_CORE_MODE_CONVERSION_MODE 0x00000003 /* Conversion Mode */
kevin1990 7:4dbae381f693 755 #define ENUM_ADISENSE_ADISENSE_CORE_MODE_DRDY_PER_CONVERSION 0x00000000 /* Drdy_Mode: Data Ready Per Conversion */
kevin1990 7:4dbae381f693 756 #define ENUM_ADISENSE_ADISENSE_CORE_MODE_DRDY_PER_CYCLE 0x00000004 /* Drdy_Mode: Data Ready Per Cycle */
kevin1990 7:4dbae381f693 757 #define ENUM_ADISENSE_ADISENSE_CORE_MODE_DRDY_PER_FIFO_FILL 0x00000008 /* Drdy_Mode: Data Ready Per FIFO Fill */
kevin1990 7:4dbae381f693 758 #define ENUM_ADISENSE_CORE_MODE_DRDY_MODE3 0x0000000C /* Drdy_Mode: Undefined */
kevin1990 7:4dbae381f693 759 #define ENUM_ADISENSE_CORE_MODE_SINGLECYCLE 0x00000000 /* Conversion_Mode: Single Cycle */
kevin1990 7:4dbae381f693 760 #define ENUM_ADISENSE_CORE_MODE_MULTICYCLE 0x00000001 /* Conversion_Mode: Multi Cycle */
kevin1990 7:4dbae381f693 761 #define ENUM_ADISENSE_CORE_MODE_CONTINUOUS 0x00000002 /* Conversion_Mode: Continuous Conversion */
kevin1990 7:4dbae381f693 762 #define ENUM_ADISENSE_CORE_MODE_MODE3 0x00000003 /* Conversion_Mode: Undefined */
kevin1990 7:4dbae381f693 763
kevin1990 7:4dbae381f693 764 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 765 ADISENSE_CORE_POWER_CONFIG Pos/Masks Description
kevin1990 7:4dbae381f693 766 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 767 #define BITP_ADISENSE_CORE_POWER_CONFIG_STDBY_EN 4 /* Standby */
kevin1990 7:4dbae381f693 768 #define BITP_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_MCU 2 /* MCU Power Mode */
kevin1990 7:4dbae381f693 769 #define BITP_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_ADC 0 /* ADC Power Mode */
kevin1990 7:4dbae381f693 770 #define BITM_ADISENSE_CORE_POWER_CONFIG_STDBY_EN 0x00000010 /* Standby */
kevin1990 7:4dbae381f693 771 #define BITM_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_MCU 0x0000000C /* MCU Power Mode */
kevin1990 7:4dbae381f693 772 #define BITM_ADISENSE_CORE_POWER_CONFIG_POWER_MODE_ADC 0x00000003 /* ADC Power Mode */
kevin1990 7:4dbae381f693 773 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_LOW_POWER 0x00000000 /* Power_Mode_ADC: AD7124 Low Power Mode */
kevin1990 7:4dbae381f693 774 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_MID_POWER 0x00000001 /* Power_Mode_ADC: AD7124 Mid Power Mode */
kevin1990 7:4dbae381f693 775 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_FULL_POWER 0x00000002 /* Power_Mode_ADC: AD7124 Full Power Mode */
kevin1990 7:4dbae381f693 776 #define ENUM_ADISENSE_CORE_POWER_CONFIG_ADC_FULL_POWER2 0x00000003 /* Power_Mode_ADC: AD7124 Full Power Mode2 */
kevin1990 7:4dbae381f693 777
kevin1990 7:4dbae381f693 778 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 779 ADISENSE_CORE_CYCLE_CONTROL Pos/Masks Description
kevin1990 7:4dbae381f693 780 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 781 #define BITP_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 14 /* Units for Cycle Time */
kevin1990 7:4dbae381f693 782 #define BITP_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME 0 /* Duration of a Full Measurement Cycle */
kevin1990 7:4dbae381f693 783 #define BITM_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME_UNITS 0x0000C000 /* Units for Cycle Time */
kevin1990 7:4dbae381f693 784 #define BITM_ADISENSE_CORE_CYCLE_CONTROL_CYCLE_TIME 0x00000FFF /* Duration of a Full Measurement Cycle */
kevin1990 7:4dbae381f693 785 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_MICROSECONDS 0x00000000 /* Cycle_Time_Units: Micro-Seconds */
kevin1990 7:4dbae381f693 786 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_MILLISECONDS 0x00004000 /* Cycle_Time_Units: Milli-Seconds */
kevin1990 7:4dbae381f693 787 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_SECONDS 0x00008000 /* Cycle_Time_Units: Seconds */
kevin1990 7:4dbae381f693 788 #define ENUM_ADISENSE_CORE_CYCLE_CONTROL_UNDEFINED 0x0000C000 /* Cycle_Time_Units: Undefined */
kevin1990 7:4dbae381f693 789
kevin1990 7:4dbae381f693 790 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 791 ADISENSE_CORE_FIFO_NUM_CYCLES Pos/Masks Description
kevin1990 7:4dbae381f693 792 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 793 #define BITP_ADISENSE_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0 /* How Many Cycles to Fill FIFO */
kevin1990 7:4dbae381f693 794 #define BITM_ADISENSE_CORE_FIFO_NUM_CYCLES_FIFO_NUM_CYCLES 0x000000FF /* How Many Cycles to Fill FIFO */
kevin1990 7:4dbae381f693 795
kevin1990 7:4dbae381f693 796 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 797 ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL Pos/Masks Description
kevin1990 7:4dbae381f693 798 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 799 #define BITP_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0 /* Defines Time Between Repetitions of Measurement Cycles. */
kevin1990 7:4dbae381f693 800 #define BITM_ADISENSE_CORE_MULTI_CYCLE_REPEAT_INTERVAL_MULTI_CYCLE_REPEAT_INTERVAL 0x00FFFFFF /* Defines Time Between Repetitions of Measurement Cycles. */
kevin1990 7:4dbae381f693 801
kevin1990 7:4dbae381f693 802 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 803 ADISENSE_CORE_STATUS Pos/Masks Description
kevin1990 7:4dbae381f693 804 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 805 #define BITP_ADISENSE_CORE_STATUS_CMD_RUNNING 4 /* Indicates a Special Command is Active */
kevin1990 7:4dbae381f693 806 #define BITP_ADISENSE_CORE_STATUS_DRDY 3 /* Indicates a New Sensor (ADC?) Result is Available to Be Read */
kevin1990 7:4dbae381f693 807 #define BITP_ADISENSE_CORE_STATUS_ERROR 2 /* Indicates an Error */
kevin1990 7:4dbae381f693 808 #define BITP_ADISENSE_CORE_STATUS_ALERT_LIMIT 1 /* Indicates One or More Sensors are Outside Specified Limits */
kevin1990 7:4dbae381f693 809 #define BITM_ADISENSE_CORE_STATUS_CMD_RUNNING 0x00000010 /* Indicates a Special Command is Active */
kevin1990 7:4dbae381f693 810 #define BITM_ADISENSE_CORE_STATUS_DRDY 0x00000008 /* Indicates a New Sensor (ADC?) Result is Available to Be Read */
kevin1990 7:4dbae381f693 811 #define BITM_ADISENSE_CORE_STATUS_ERROR 0x00000004 /* Indicates an Error */
kevin1990 7:4dbae381f693 812 #define BITM_ADISENSE_CORE_STATUS_ALERT_LIMIT 0x00000002 /* Indicates One or More Sensors are Outside Specified Limits */
kevin1990 7:4dbae381f693 813
kevin1990 7:4dbae381f693 814 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 815 ADISENSE_CORE_DIAGNOSTICS_STATUS Pos/Masks Description
kevin1990 7:4dbae381f693 816 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 817 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAGNOSTICS_STATUS_SUNDRY 14 /* Sundry Diagnostics Status */
kevin1990 7:4dbae381f693 818 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 13 /* Indicates Error During Internal Device Calibrations */
kevin1990 7:4dbae381f693 819 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 12 /* Indicates Error During Internal ADC Conversions */
kevin1990 7:4dbae381f693 820 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 11 /* Indicates Over-Voltage Error on Positive Analog Input */
kevin1990 7:4dbae381f693 821 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 10 /* Indicates Under-Voltage Error on Positive Analog Input */
kevin1990 7:4dbae381f693 822 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 9 /* Indicates Over-Voltage Error on Negative Analog Input */
kevin1990 7:4dbae381f693 823 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 8 /* Indicates Under-Voltage Error on Negative Analog Input */
kevin1990 7:4dbae381f693 824 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 3 /* Indicates Fault on Internal Supply Regulator Capacitor */
kevin1990 7:4dbae381f693 825 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 2 /* Indicates Low Voltage on Internal Supply Voltages */
kevin1990 7:4dbae381f693 826 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 1 /* Indicates Error on Internal Device Communications */
kevin1990 7:4dbae381f693 827 #define BITP_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0 /* Indicates Error on Internal Checksum Calculations */
kevin1990 7:4dbae381f693 828 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAGNOSTICS_STATUS_SUNDRY 0x0000C000 /* Sundry Diagnostics Status */
kevin1990 7:4dbae381f693 829 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CALIBRATION_ERROR 0x00002000 /* Indicates Error During Internal Device Calibrations */
kevin1990 7:4dbae381f693 830 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CONVERSION_ERROR 0x00001000 /* Indicates Error During Internal ADC Conversions */
kevin1990 7:4dbae381f693 831 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_OV_ERROR 0x00000800 /* Indicates Over-Voltage Error on Positive Analog Input */
kevin1990 7:4dbae381f693 832 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINP_UV_ERROR 0x00000400 /* Indicates Under-Voltage Error on Positive Analog Input */
kevin1990 7:4dbae381f693 833 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_OV_ERROR 0x00000200 /* Indicates Over-Voltage Error on Negative Analog Input */
kevin1990 7:4dbae381f693 834 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_AINM_UV_ERROR 0x00000100 /* Indicates Under-Voltage Error on Negative Analog Input */
kevin1990 7:4dbae381f693 835 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_CAP_ERROR 0x00000008 /* Indicates Fault on Internal Supply Regulator Capacitor */
kevin1990 7:4dbae381f693 836 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_SUPPLY_MONITOR_ERROR 0x00000004 /* Indicates Low Voltage on Internal Supply Voltages */
kevin1990 7:4dbae381f693 837 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_COMMS_ERROR 0x00000002 /* Indicates Error on Internal Device Communications */
kevin1990 7:4dbae381f693 838 #define BITM_ADISENSE_CORE_DIAGNOSTICS_STATUS_DIAG_CHECKSUM_ERROR 0x00000001 /* Indicates Error on Internal Checksum Calculations */
kevin1990 7:4dbae381f693 839
kevin1990 7:4dbae381f693 840 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 841 ADISENSE_CORE_CHANNEL_ALERT_STATUS Pos/Masks Description
kevin1990 7:4dbae381f693 842 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 843 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 12 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 844 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 11 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 845 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 10 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 846 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 9 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 847 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 8 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 848 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 7 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 849 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 6 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 850 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 5 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 851 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 4 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 852 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 3 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 853 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 2 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 854 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 1 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 855 #define BITP_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 856 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH12 0x00001000 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 857 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH11 0x00000800 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 858 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH10 0x00000400 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 859 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH9 0x00000200 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 860 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH8 0x00000100 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 861 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH7 0x00000080 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 862 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH6 0x00000040 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 863 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH5 0x00000020 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 864 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH4 0x00000010 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 865 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH3 0x00000008 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 866 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH2 0x00000004 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 867 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH1 0x00000002 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 868 #define BITM_ADISENSE_CORE_CHANNEL_ALERT_STATUS_ALERT_CH0 0x00000001 /* Indicates Channel is Outside Specified Limits */
kevin1990 7:4dbae381f693 869
kevin1990 7:4dbae381f693 870 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 871 ADISENSE_CORE_ALERT_STATUS_2 Pos/Masks Description
kevin1990 7:4dbae381f693 872 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 873 #define BITP_ADISENSE_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 2 /* Indicates Error with Programmed Configuration */
kevin1990 7:4dbae381f693 874 #define BITP_ADISENSE_CORE_ALERT_STATUS_2_LUT_ERROR 1 /* Indicates Error with One or More Look-Up-Tables */
kevin1990 7:4dbae381f693 875 #define BITP_ADISENSE_CORE_ALERT_STATUS_2_FIFO_ERROR 0 /* Indicates Error with FIFO */
kevin1990 7:4dbae381f693 876 #define BITM_ADISENSE_CORE_ALERT_STATUS_2_CONFIGURATION_ERROR 0x00000004 /* Indicates Error with Programmed Configuration */
kevin1990 7:4dbae381f693 877 #define BITM_ADISENSE_CORE_ALERT_STATUS_2_LUT_ERROR 0x00000002 /* Indicates Error with One or More Look-Up-Tables */
kevin1990 7:4dbae381f693 878 #define BITM_ADISENSE_CORE_ALERT_STATUS_2_FIFO_ERROR 0x00000001 /* Indicates Error with FIFO */
kevin1990 7:4dbae381f693 879
kevin1990 7:4dbae381f693 880 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 881 ADISENSE_CORE_ALERT_DETAIL_CH[n] Pos/Masks Description
kevin1990 7:4dbae381f693 882 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 883 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 9 /* Indicates Error with Channel Look-Up-Table */
kevin1990 7:4dbae381f693 884 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_CONFIG_ERR 8 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 885 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_REF_DETECT 6 /* Indicates Whether ADC Reference is Valid */
kevin1990 7:4dbae381f693 886 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 5 /* Indicates Sensor Input is Open Circuit */
kevin1990 7:4dbae381f693 887 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 4 /* Indicates Sensor Result is Greater Than High Limit */
kevin1990 7:4dbae381f693 888 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_LOW_LIMIT 3 /* Indicates Sensor Result is Less Than Low Limit */
kevin1990 7:4dbae381f693 889 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_RANGE 2 /* Indicates Channel Over-Range */
kevin1990 7:4dbae381f693 890 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_RANGE 1 /* Indicates Channel Under-Range */
kevin1990 7:4dbae381f693 891 #define BITP_ADISENSE_CORE_ALERT_DETAIL_CH_TIME_OUT 0 /* Indicates Time-Out Error from Digital Sensor */
kevin1990 7:4dbae381f693 892 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_LUT_ERROR_CH 0x00000200 /* Indicates Error with Channel Look-Up-Table */
kevin1990 7:4dbae381f693 893 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_CONFIG_ERR 0x00000100 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 894 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_REF_DETECT 0x00000040 /* Indicates Whether ADC Reference is Valid */
kevin1990 7:4dbae381f693 895 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_SENSOR_OPEN 0x00000020 /* Indicates Sensor Input is Open Circuit */
kevin1990 7:4dbae381f693 896 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_HIGH_LIMIT 0x00000010 /* Indicates Sensor Result is Greater Than High Limit */
kevin1990 7:4dbae381f693 897 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_LOW_LIMIT 0x00000008 /* Indicates Sensor Result is Less Than Low Limit */
kevin1990 7:4dbae381f693 898 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_OVER_RANGE 0x00000004 /* Indicates Channel Over-Range */
kevin1990 7:4dbae381f693 899 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_UNDER_RANGE 0x00000002 /* Indicates Channel Under-Range */
kevin1990 7:4dbae381f693 900 #define BITM_ADISENSE_CORE_ALERT_DETAIL_CH_TIME_OUT 0x00000001 /* Indicates Time-Out Error from Digital Sensor */
kevin1990 7:4dbae381f693 901
kevin1990 7:4dbae381f693 902 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 903 ADISENSE_CORE_CHANNEL_CONFIG_ERROR Pos/Masks Description
kevin1990 7:4dbae381f693 904 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 905 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH10 10 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 906 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH9 9 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 907 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH8 8 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 908 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH7 7 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 909 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH6 6 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 910 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH5 5 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 911 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH4 4 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 912 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH3 3 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 913 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH2 2 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 914 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH1 1 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 915 #define BITP_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH0 0 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 916 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH10 0x00000400 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 917 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH9 0x00000200 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 918 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH8 0x00000100 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 919 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH7 0x00000080 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 920 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH6 0x00000040 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 921 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH5 0x00000020 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 922 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH4 0x00000010 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 923 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH3 0x00000008 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 924 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH2 0x00000004 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 925 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH1 0x00000002 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 926 #define BITM_ADISENSE_CORE_CHANNEL_CONFIG_ERROR_CONFIG_ERR_CH0 0x00000001 /* Indicates Configuration Error on Channel */
kevin1990 7:4dbae381f693 927
kevin1990 7:4dbae381f693 928 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 929 ADISENSE_CORE_ERROR_CODE Pos/Masks Description
kevin1990 7:4dbae381f693 930 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 931 #define BITP_ADISENSE_CORE_ERROR_CODE_ERROR_CODE 0 /* Code Indicating Type of Error */
kevin1990 7:4dbae381f693 932 #define BITM_ADISENSE_CORE_ERROR_CODE_ERROR_CODE 0x0000FFFF /* Code Indicating Type of Error */
kevin1990 7:4dbae381f693 933
kevin1990 7:4dbae381f693 934 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 935 ADISENSE_CORE_EXTERNAL_REFERENCE1 Pos/Masks Description
kevin1990 7:4dbae381f693 936 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 937 #define BITP_ADISENSE_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0 /* Refin1 Value */
kevin1990 7:4dbae381f693 938 #define BITM_ADISENSE_CORE_EXTERNAL_REFERENCE1_EXT_REFIN1_VALUE 0xFFFFFFFF /* Refin1 Value */
kevin1990 7:4dbae381f693 939
kevin1990 7:4dbae381f693 940 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 941 ADISENSE_CORE_EXTERNAL_REFERENCE2 Pos/Masks Description
kevin1990 7:4dbae381f693 942 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 943 #define BITP_ADISENSE_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0 /* Refin2 Value */
kevin1990 7:4dbae381f693 944 #define BITM_ADISENSE_CORE_EXTERNAL_REFERENCE2_EXT_REFIN2_VALUE 0xFFFFFFFF /* Refin2 Value */
kevin1990 7:4dbae381f693 945
kevin1990 7:4dbae381f693 946 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 947 ADISENSE_CORE_AVDD_VOLTAGE Pos/Masks Description
kevin1990 7:4dbae381f693 948 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 949 #define BITP_ADISENSE_CORE_AVDD_VOLTAGE_AVDD_VOLTAGE 0 /* AVDD Voltage */
kevin1990 7:4dbae381f693 950 #define BITM_ADISENSE_CORE_AVDD_VOLTAGE_AVDD_VOLTAGE 0xFFFFFFFF /* AVDD Voltage */
kevin1990 7:4dbae381f693 951
kevin1990 7:4dbae381f693 952 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 953 ADISENSE_CORE_DIAGNOSTICS_CONTROL Pos/Masks Description
kevin1990 7:4dbae381f693 954 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 955 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAGNOSTICS_EXTRA 8 /* Additional Diagnostics Control */
kevin1990 7:4dbae381f693 956 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_OCD_FREQ 2 /* Diagnostics Open Circuit Detect Frequency */
kevin1990 7:4dbae381f693 957 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 1 /* Diagnostics Measure Enable */
kevin1990 7:4dbae381f693 958 #define BITP_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0 /* Diagnostics Global Enable */
kevin1990 7:4dbae381f693 959 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAGNOSTICS_EXTRA 0x0000FF00 /* Additional Diagnostics Control */
kevin1990 7:4dbae381f693 960 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_OCD_FREQ 0x0000000C /* Diagnostics Open Circuit Detect Frequency */
kevin1990 7:4dbae381f693 961 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_MEAS_EN 0x00000002 /* Diagnostics Measure Enable */
kevin1990 7:4dbae381f693 962 #define BITM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_DIAG_GLOBAL_EN 0x00000001 /* Diagnostics Global Enable */
kevin1990 7:4dbae381f693 963 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_OFF 0x00000000 /* Diag_OCD_Freq: No Open-Circuit Detection During Measurement */
kevin1990 7:4dbae381f693 964 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1_CYCLE 0x00000004 /* Diag_OCD_Freq: Open-Circuit Detection Performed Once Per Measurement Cycle */
kevin1990 7:4dbae381f693 965 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_100_CYCLES 0x00000008 /* Diag_OCD_Freq: Open-Circuit Detection Performed Once Per Hundred Measurement Cycles */
kevin1990 7:4dbae381f693 966 #define ENUM_ADISENSE_CORE_DIAGNOSTICS_CONTROL_OCD_PER_1000_CYCLES 0x0000000C /* Diag_OCD_Freq: Open-Circuit Detection Performed Once Per Thousand Measurement Cycles */
kevin1990 7:4dbae381f693 967
kevin1990 7:4dbae381f693 968 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 969 ADISENSE_CORE_DATA_FIFO Pos/Masks Description
kevin1990 7:4dbae381f693 970 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 971 #define BITP_ADISENSE_CORE_DATA_FIFO_RAW_SAMPLE 40 /* ADC Result */
kevin1990 7:4dbae381f693 972 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_VALID 39 /* Indicates Whether Valid Data Read from FIFO */
kevin1990 7:4dbae381f693 973 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_RAW 38 /* Indicates If RAW Data is Valid */
kevin1990 7:4dbae381f693 974 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_ALERT 37 /* Indicates Alert on Channel */
kevin1990 7:4dbae381f693 975 #define BITP_ADISENSE_CORE_DATA_FIFO_CH_ERROR 36 /* Indicates Error on Channel */
kevin1990 7:4dbae381f693 976 #define BITP_ADISENSE_CORE_DATA_FIFO_CHANNEL_ID 32 /* Indicates Which Channel This FIFO Data Corresponds to */
kevin1990 7:4dbae381f693 977 #define BITP_ADISENSE_CORE_DATA_FIFO_SENSOR_RESULT 0 /* Linearized and Compensated Sensor Result */
kevin1990 7:4dbae381f693 978 #define BITM_ADISENSE_CORE_DATA_FIFO_RAW_SAMPLE 0xFFFFFF0000000000 /* ADC Result */
kevin1990 7:4dbae381f693 979 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_VALID 0x8000000000 /* Indicates Whether Valid Data Read from FIFO */
kevin1990 7:4dbae381f693 980 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_RAW 0x4000000000 /* Indicates If RAW Data is Valid */
kevin1990 7:4dbae381f693 981 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_ALERT 0x2000000000 /* Indicates Alert on Channel */
kevin1990 7:4dbae381f693 982 #define BITM_ADISENSE_CORE_DATA_FIFO_CH_ERROR 0x1000000000 /* Indicates Error on Channel */
kevin1990 7:4dbae381f693 983 #define BITM_ADISENSE_CORE_DATA_FIFO_CHANNEL_ID 0xF00000000 /* Indicates Which Channel This FIFO Data Corresponds to */
kevin1990 7:4dbae381f693 984 #define BITM_ADISENSE_CORE_DATA_FIFO_SENSOR_RESULT 0xFFFFFFFF /* Linearized and Compensated Sensor Result */
kevin1990 7:4dbae381f693 985
kevin1990 7:4dbae381f693 986 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 987 ADISENSE_CORE_LUT_SELECT Pos/Masks Description
kevin1990 7:4dbae381f693 988 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 989 #define BITP_ADISENSE_CORE_LUT_SELECT_LUT_RW 7 /* Read or Write LUT Data */
kevin1990 7:4dbae381f693 990 #define BITM_ADISENSE_CORE_LUT_SELECT_LUT_RW 0x00000080 /* Read or Write LUT Data */
kevin1990 7:4dbae381f693 991 #define ENUM_ADISENSE_CORE_LUT_SELECT_LUT_READ 0x00000000 /* LUT_RW: Read Addressed LUT Data */
kevin1990 7:4dbae381f693 992 #define ENUM_ADISENSE_CORE_LUT_SELECT_LUT_WRITE 0x00000080 /* LUT_RW: Write Addressed LUT Data */
kevin1990 7:4dbae381f693 993
kevin1990 7:4dbae381f693 994 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 995 ADISENSE_CORE_LUT_OFFSET Pos/Masks Description
kevin1990 7:4dbae381f693 996 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 997 #define BITP_ADISENSE_CORE_LUT_OFFSET_LUT_OFFSET 0 /* Offset into Look-Up-Table */
kevin1990 7:4dbae381f693 998 #define BITM_ADISENSE_CORE_LUT_OFFSET_LUT_OFFSET 0x00003FFF /* Offset into Look-Up-Table */
kevin1990 7:4dbae381f693 999
kevin1990 7:4dbae381f693 1000 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1001 ADISENSE_CORE_LUT_DATA Pos/Masks Description
kevin1990 7:4dbae381f693 1002 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1003 #define BITP_ADISENSE_CORE_LUT_DATA_LUT_DATA 0 /* Data Byte to Write to / Read from Look-Up-Table */
kevin1990 7:4dbae381f693 1004 #define BITM_ADISENSE_CORE_LUT_DATA_LUT_DATA 0x000000FF /* Data Byte to Write to / Read from Look-Up-Table */
kevin1990 7:4dbae381f693 1005
kevin1990 7:4dbae381f693 1006 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1007 ADISENSE_CORE_CAL_OFFSET Pos/Masks Description
kevin1990 7:4dbae381f693 1008 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1009 #define BITP_ADISENSE_CORE_CAL_OFFSET_CAL_OFFSET 0 /* Offset into Calibration Data */
kevin1990 7:4dbae381f693 1010 #define BITM_ADISENSE_CORE_CAL_OFFSET_CAL_OFFSET 0x00003FFF /* Offset into Calibration Data */
kevin1990 7:4dbae381f693 1011
kevin1990 7:4dbae381f693 1012 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1013 ADISENSE_CORE_CAL_DATA Pos/Masks Description
kevin1990 7:4dbae381f693 1014 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1015 #define BITP_ADISENSE_CORE_CAL_DATA_CAL_DATA 0 /* Data to Write to / Read from Calibration Data */
kevin1990 7:4dbae381f693 1016 #define BITM_ADISENSE_CORE_CAL_DATA_CAL_DATA 0x000000FF /* Data to Write to / Read from Calibration Data */
kevin1990 7:4dbae381f693 1017
kevin1990 7:4dbae381f693 1018 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1019 ADISENSE_CORE_REVISION Pos/Masks Description
kevin1990 7:4dbae381f693 1020 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1021 #define BITP_ADISENSE_CORE_REVISION_COMMS_PROTOCOL 16 /* ID Info */
kevin1990 7:4dbae381f693 1022 #define BITP_ADISENSE_CORE_REVISION_HARDWARE_REVISION 8 /* ID Info */
kevin1990 7:4dbae381f693 1023 #define BITP_ADISENSE_CORE_REVISION_FIRMWARE_REVISION 0 /* ID Info */
kevin1990 7:4dbae381f693 1024 #define BITM_ADISENSE_CORE_REVISION_COMMS_PROTOCOL 0x00FF0000 /* ID Info */
kevin1990 7:4dbae381f693 1025 #define BITM_ADISENSE_CORE_REVISION_HARDWARE_REVISION 0x0000FF00 /* ID Info */
kevin1990 7:4dbae381f693 1026 #define BITM_ADISENSE_CORE_REVISION_FIRMWARE_REVISION 0x000000FF /* ID Info */
kevin1990 7:4dbae381f693 1027
kevin1990 7:4dbae381f693 1028 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1029 ADISENSE_CORE_CHANNEL_COUNT[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1030 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1031 #define BITP_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 7 /* Enable Channel in Measurement Cycle */
kevin1990 7:4dbae381f693 1032 #define BITP_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0 /* How Many Times Channel Should Appear in One Cycle */
kevin1990 7:4dbae381f693 1033 #define BITM_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_ENABLE 0x00000080 /* Enable Channel in Measurement Cycle */
kevin1990 7:4dbae381f693 1034 #define BITM_ADISENSE_CORE_CHANNEL_COUNT_CHANNEL_COUNT 0x0000007F /* How Many Times Channel Should Appear in One Cycle */
kevin1990 7:4dbae381f693 1035
kevin1990 7:4dbae381f693 1036 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1037 ADISENSE_CORE_SENSOR_TYPE[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1038 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1039 #define BITP_ADISENSE_CORE_SENSOR_TYPE_SENSOR_LOAD_DEFAULTS 12 /* Indicates to Use Default Register Values */
kevin1990 7:4dbae381f693 1040 #define BITP_ADISENSE_CORE_SENSOR_TYPE_SENSOR_TYPE 0 /* Sensor Type */
kevin1990 7:4dbae381f693 1041 #define BITM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_LOAD_DEFAULTS 0x00001000 /* Indicates to Use Default Register Values */
kevin1990 7:4dbae381f693 1042 #define BITM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_TYPE 0x00000FFF /* Sensor Type */
kevin1990 7:4dbae381f693 1043 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_DEF_L1 0x00000000 /* Sensor_Type: Thermocouple T-Type Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1044 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_DEF_L1 0x00000001 /* Sensor_Type: Thermocouple J-Type Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1045 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_DEF_L1 0x00000002 /* Sensor_Type: Thermocouple K-Type Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1046 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_DEF_L2 0x0000000C /* Sensor_Type: Thermocouple Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1047 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_DEF_L2 0x0000000D /* Sensor_Type: Thermocouple Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1048 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_DEF_L2 0x0000000E /* Sensor_Type: Thermocouple Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1049 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_DEF_L2 0x0000000F /* Sensor_Type: Thermocouple Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1050 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_T_ADV_L1 0x00000010 /* Sensor_Type: Thermocouple T-Type Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1051 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_J_ADV_L1 0x00000011 /* Sensor_Type: Thermocouple J-Type Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1052 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_K_ADV_L1 0x00000012 /* Sensor_Type: Thermocouple K-Type Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1053 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_1_ADV_L2 0x0000001C /* Sensor_Type: Thermocouple Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1054 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_2_ADV_L2 0x0000001D /* Sensor_Type: Thermocouple Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1055 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_3_ADV_L2 0x0000001E /* Sensor_Type: Thermocouple Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1056 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMOCOUPLE_4_ADV_L2 0x0000001F /* Sensor_Type: Thermocouple Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1057 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_DEF_L1 0x00000020 /* Sensor_Type: RTD 2 Wire PT100 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1058 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_DEF_L1 0x00000021 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1059 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_DEF_L2 0x0000002C /* Sensor_Type: RTD 2 Wire Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1060 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_DEF_L2 0x0000002D /* Sensor_Type: RTD 2 Wire Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1061 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_DEF_L2 0x0000002E /* Sensor_Type: RTD 2 Wire Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1062 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_DEF_L2 0x0000002F /* Sensor_Type: RTD 2 Wire Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1063 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT100_ADV_L1 0x00000030 /* Sensor_Type: RTD 2 Wire PT100 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1064 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_PT1000_ADV_L1 0x00000031 /* Sensor_Type: RTD 2 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1065 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_1_ADV_L2 0x0000003C /* Sensor_Type: RTD 2 Wire Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1066 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_2_ADV_L2 0x0000003D /* Sensor_Type: RTD 2 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1067 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_3_ADV_L2 0x0000003E /* Sensor_Type: RTD 2 Wire Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1068 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_2W_4_ADV_L2 0x0000003F /* Sensor_Type: RTD 2 Wire Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1069 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_DEF_L1 0x00000040 /* Sensor_Type: RTD 3 Wire PT100 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1070 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_DEF_L1 0x00000041 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1071 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_DEF_L2 0x0000004C /* Sensor_Type: RTD 3 Wire Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1072 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_DEF_L2 0x0000004D /* Sensor_Type: RTD 3 Wire Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1073 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_DEF_L2 0x0000004E /* Sensor_Type: RTD 3 Wire Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1074 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_DEF_L2 0x0000004F /* Sensor_Type: RTD 3 Wire Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1075 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT100_ADV_L1 0x00000050 /* Sensor_Type: RTD 3 Wire PT100 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1076 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_PT1000_ADV_L1 0x00000051 /* Sensor_Type: RTD 3 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1077 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_1_ADV_L2 0x0000005C /* Sensor_Type: RTD 3 Wire Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1078 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_2_ADV_L2 0x0000005D /* Sensor_Type: RTD 3 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1079 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_3_ADV_L2 0x0000005E /* Sensor_Type: RTD 3 Wire Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1080 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_3W_4_ADV_L2 0x0000005F /* Sensor_Type: RTD 3 Wire Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1081 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_DEF_L1 0x00000060 /* Sensor_Type: RTD 4 Wire PT100 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1082 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_DEF_L1 0x00000061 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1083 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_DEF_L2 0x0000006C /* Sensor_Type: RTD 4 Wire Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1084 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_DEF_L2 0x0000006D /* Sensor_Type: RTD 4 Wire Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1085 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_DEF_L2 0x0000006E /* Sensor_Type: RTD 4 Wire Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1086 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_DEF_L2 0x0000006F /* Sensor_Type: RTD 4 Wire Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1087 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT100_ADV_L1 0x00000070 /* Sensor_Type: RTD 4 Wire PT100 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1088 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_PT1000_ADV_L1 0x00000071 /* Sensor_Type: RTD 4 Wire PT1000 Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1089 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_1_ADV_L2 0x0000007C /* Sensor_Type: RTD 4 Wire Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1090 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_2_ADV_L2 0x0000007D /* Sensor_Type: RTD 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1091 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_3_ADV_L2 0x0000007E /* Sensor_Type: RTD 4 Wire Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1092 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_RTD_4W_4_ADV_L2 0x0000007F /* Sensor_Type: RTD 4 Wire Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1093 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_DEF_L1 0x00000080 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1094 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_DEF_L1 0x00000081 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Defined Level 1 */
kevin1990 7:4dbae381f693 1095 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_DEF_L2 0x0000008C /* Sensor_Type: Thermistor Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1096 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_DEF_L2 0x0000008D /* Sensor_Type: Thermistor Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1097 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_DEF_L2 0x0000008E /* Sensor_Type: Thermistor Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1098 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_DEF_L2 0x0000008F /* Sensor_Type: Thermistor Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1099 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_A_10K_ADV_L1 0x00000090 /* Sensor_Type: Thermistor Type A 10kOhm Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1100 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_B_10K_ADV_L1 0x00000091 /* Sensor_Type: Thermistor Type B 10kOhm Sensor Advanced Level 1 */
kevin1990 7:4dbae381f693 1101 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_1_ADV_L2 0x0000009C /* Sensor_Type: Thermistor Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1102 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_2_ADV_L2 0x0000009D /* Sensor_Type: Thermistor Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1103 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_3_ADV_L2 0x0000009E /* Sensor_Type: Thermistor Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1104 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_THERMISTOR_4_ADV_L2 0x0000009F /* Sensor_Type: Thermistor Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1105 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_DEF_L2 0x000000A0 /* Sensor_Type: Bridge 4 Wire Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1106 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_DEF_L2 0x000000A1 /* Sensor_Type: Bridge 4 Wire Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1107 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_DEF_L2 0x000000A2 /* Sensor_Type: Bridge 4 Wire Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1108 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_DEF_L2 0x000000A3 /* Sensor_Type: Bridge 4 Wire Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1109 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_1_ADV_L2 0x000000B0 /* Sensor_Type: Bridge 4 Wire Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1110 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_2_ADV_L2 0x000000B1 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1111 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_3_ADV_L2 0x000000B2 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1112 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_4W_4_ADV_L2 0x000000B3 /* Sensor_Type: Bridge 4 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1113 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_DEF_L2 0x000000C0 /* Sensor_Type: Bridge 6 Wire Sensor 1 Defined Level 2 */
kevin1990 7:4dbae381f693 1114 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_DEF_L2 0x000000C1 /* Sensor_Type: Bridge 6 Wire Sensor 2 Defined Level 2 */
kevin1990 7:4dbae381f693 1115 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_DEF_L2 0x000000C2 /* Sensor_Type: Bridge 6 Wire Sensor 3 Defined Level 2 */
kevin1990 7:4dbae381f693 1116 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_DEF_L2 0x000000C3 /* Sensor_Type: Bridge 6 Wire Sensor 4 Defined Level 2 */
kevin1990 7:4dbae381f693 1117 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_1_ADV_L2 0x000000D0 /* Sensor_Type: Bridge 6 Wire Sensor 1 Advanced Level 2 */
kevin1990 7:4dbae381f693 1118 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_2_ADV_L2 0x000000D1 /* Sensor_Type: Bridge 6 Wire Sensor 2 Advanced Level 2 */
kevin1990 7:4dbae381f693 1119 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_3_ADV_L2 0x000000D2 /* Sensor_Type: Bridge 6 Wire Sensor 3 Advanced Level 2 */
kevin1990 7:4dbae381f693 1120 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_BRIDGE_6W_4_ADV_L2 0x000000D3 /* Sensor_Type: Bridge 6 Wire Sensor 4 Advanced Level 2 */
kevin1990 7:4dbae381f693 1121 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE 0x00000100 /* Sensor_Type: Voltage Input */
kevin1990 7:4dbae381f693 1122 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_HONEYWELL_TRUSTABILITY 0x00000110 /* Sensor_Type: Voltage Output Pressure Sensor 1 */
kevin1990 7:4dbae381f693 1123 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_AMPHENOL_NPA300X 0x00000111 /* Sensor_Type: Voltage Output Pressure Sensor 2 */
kevin1990 7:4dbae381f693 1124 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_VOLTAGE_PRESSURE_3_DEF 0x00000112 /* Sensor_Type: Voltage Output Pressure Sensor 3 */
kevin1990 7:4dbae381f693 1125 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT 0x00000180 /* Sensor_Type: Current Input */
kevin1990 7:4dbae381f693 1126 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_HONEYWELL_PX2 0x00000181 /* Sensor_Type: Current Output Pressure Sensor 1 */
kevin1990 7:4dbae381f693 1127 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_CURRENT_PRESSURE_2 0x00000182 /* Sensor_Type: Current Output Pressure Sensor 2 */
kevin1990 7:4dbae381f693 1128 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_CUSTOM1 0x00000200 /* Sensor_Type: Custom1 */
kevin1990 7:4dbae381f693 1129 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_1 0x00000800 /* Sensor_Type: I2C Pressure Sensor 1 */
kevin1990 7:4dbae381f693 1130 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_PRESSURE_2 0x00000801 /* Sensor_Type: I2C Pressure Sensor 2 */
kevin1990 7:4dbae381f693 1131 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_HONEYWELL_HUMIDICON 0x00000840 /* Sensor_Type: I2C Humidity Sensor 1 */
kevin1990 7:4dbae381f693 1132 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_I2C_HUMIDITY_SENSIRION_SHT3X 0x00000841 /* Sensor_Type: I2C Humidity Sensor 2 */
kevin1990 7:4dbae381f693 1133 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_HONEYWELL_TRUSTABILITY 0x00000C00 /* Sensor_Type: SPI Pressure Sensor 1 */
kevin1990 7:4dbae381f693 1134 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_PRESSURE_2 0x00000C01 /* Sensor_Type: SPI Pressure Sensor 2 */
kevin1990 7:4dbae381f693 1135 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_1 0x00000C40 /* Sensor_Type: SPI Humidity Sensor Type 1 */
kevin1990 7:4dbae381f693 1136 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_HUMIDITY_2 0x00000C41 /* Sensor_Type: SPI Humidity Sensor Type 2 */
kevin1990 7:4dbae381f693 1137 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_1 0x00000C80 /* Sensor_Type: SPI Accelerometer Sensor Type 1 3-Axis */
kevin1990 7:4dbae381f693 1138 #define ENUM_ADISENSE_CORE_SENSOR_TYPE_SENSOR_SPI_ACCELEROMETER_2 0x00000C81 /* Sensor_Type: SPI Accelerometer Sensor Type 2 3-Axis */
kevin1990 7:4dbae381f693 1139
kevin1990 7:4dbae381f693 1140 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1141 ADISENSE_CORE_SENSOR_DETAILS[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1142 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1143 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_AVERAGING 28 /* Number of ADC Results to Average */
kevin1990 7:4dbae381f693 1144 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN 24 /* PGA Gain */
kevin1990 7:4dbae381f693 1145 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_SELECT 20 /* Reference Selection */
kevin1990 7:4dbae381f693 1146 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_VBIAS 19 /* Controls ADC Vbias Output */
kevin1990 7:4dbae381f693 1147 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 18 /* Enable or Disable ADC Reference Buffer */
kevin1990 7:4dbae381f693 1148 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 17 /* Do Not Publish Channel Result */
kevin1990 7:4dbae381f693 1149 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL3 12 /* Indicates Channel for Third Term of Compensation */
kevin1990 7:4dbae381f693 1150 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL2 8 /* Indicates Channel for Second Term of Compensation */
kevin1990 7:4dbae381f693 1151 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 4 /* Indicates Which Channel is Used to Compensate Sensor Result */
kevin1990 7:4dbae381f693 1152 #define BITP_ADISENSE_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0 /* Units of Sensor Measurement */
kevin1990 7:4dbae381f693 1153 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_AVERAGING 0x70000000 /* Number of ADC Results to Average */
kevin1990 7:4dbae381f693 1154 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_PGA_GAIN 0x07000000 /* PGA Gain */
kevin1990 7:4dbae381f693 1155 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_SELECT 0x00F00000 /* Reference Selection */
kevin1990 7:4dbae381f693 1156 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_VBIAS 0x00080000 /* Controls ADC Vbias Output */
kevin1990 7:4dbae381f693 1157 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_REFERENCE_BUFFER_DISABLE 0x00040000 /* Enable or Disable ADC Reference Buffer */
kevin1990 7:4dbae381f693 1158 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_DO_NOT_PUBLISH 0x00020000 /* Do Not Publish Channel Result */
kevin1990 7:4dbae381f693 1159 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL3 0x0000F000 /* Indicates Channel for Third Term of Compensation */
kevin1990 7:4dbae381f693 1160 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL2 0x00000F00 /* Indicates Channel for Second Term of Compensation */
kevin1990 7:4dbae381f693 1161 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_COMPENSATION_CHANNEL 0x000000F0 /* Indicates Which Channel is Used to Compensate Sensor Result */
kevin1990 7:4dbae381f693 1162 #define BITM_ADISENSE_CORE_SENSOR_DETAILS_MEASUREMENT_UNITS 0x0000000F /* Units of Sensor Measurement */
kevin1990 7:4dbae381f693 1163 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_INT 0x00000000 /* Reference_Select: Internal Reference */
kevin1990 7:4dbae381f693 1164 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_AVDD 0x00100000 /* Reference_Select: AVDD */
kevin1990 7:4dbae381f693 1165 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_VEXT1 0x00200000 /* Reference_Select: External Voltage on Refin1 */
kevin1990 7:4dbae381f693 1166 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_VEXT2 0x00300000 /* Reference_Select: External Voltage on Refin2 */
kevin1990 7:4dbae381f693 1167 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_RINT1 0x00400000 /* Reference_Select: Internal Resistor1 */
kevin1990 7:4dbae381f693 1168 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_RINT2 0x00500000 /* Reference_Select: Internal Resistor2 */
kevin1990 7:4dbae381f693 1169 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_REXT1 0x00600000 /* Reference_Select: External Resistor on Refin1 */
kevin1990 7:4dbae381f693 1170 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_REXT2 0x00700000 /* Reference_Select: External Resistor on Refin2 */
kevin1990 7:4dbae381f693 1171 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_REF_EXC 0x00800000 /* Reference_Select: Bridge Excitation Voltage */
kevin1990 7:4dbae381f693 1172 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_UNITS_DEGC 0x00000000 /* Measurement_Units: Degrees C */
kevin1990 7:4dbae381f693 1173 #define ENUM_ADISENSE_CORE_SENSOR_DETAILS_UNITS_DEGF 0x00000001 /* Measurement_Units: Degrees F */
kevin1990 7:4dbae381f693 1174
kevin1990 7:4dbae381f693 1175 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1176 ADISENSE_CORE_CHANNEL_EXCITATION[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1177 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1178 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 7 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
kevin1990 7:4dbae381f693 1179 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_STATIC_SWAP_3WIRE 6 /* Indicates 3-Wire Excitation Currents Should Be Swapped */
kevin1990 7:4dbae381f693 1180 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT1_DISABLE 4 /* Disable Second Current Source */
kevin1990 7:4dbae381f693 1181 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT0_DISABLE 3 /* Disable First Current Source */
kevin1990 7:4dbae381f693 1182 #define BITP_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0 /* Current Source Value */
kevin1990 7:4dbae381f693 1183 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_DONT_SWAP_3WIRE 0x00000080 /* Indicates 3-Wire Excitation Currents Should Not Be Swapped */
kevin1990 7:4dbae381f693 1184 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_STATIC_SWAP_3WIRE 0x00000040 /* Indicates 3-Wire Excitation Currents Should Be Swapped */
kevin1990 7:4dbae381f693 1185 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT1_DISABLE 0x00000010 /* Disable Second Current Source */
kevin1990 7:4dbae381f693 1186 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT0_DISABLE 0x00000008 /* Disable First Current Source */
kevin1990 7:4dbae381f693 1187 #define BITM_ADISENSE_CORE_CHANNEL_EXCITATION_IOUT_EXCITATION_CURRENT 0x00000007 /* Current Source Value */
kevin1990 7:4dbae381f693 1188 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_OFF 0x00000000 /* IOUT_Excitation_Current: Disabled */
kevin1990 7:4dbae381f693 1189 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_50UA 0x00000001 /* IOUT_Excitation_Current: 50 \mu;A */
kevin1990 7:4dbae381f693 1190 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_100UA 0x00000002 /* IOUT_Excitation_Current: 100 \mu;A */
kevin1990 7:4dbae381f693 1191 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_250UA 0x00000003 /* IOUT_Excitation_Current: 250 \mu;A */
kevin1990 7:4dbae381f693 1192 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_500UA 0x00000004 /* IOUT_Excitation_Current: 500 \mu;A */
kevin1990 7:4dbae381f693 1193 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_750UA 0x00000005 /* IOUT_Excitation_Current: 750 \mu;A */
kevin1990 7:4dbae381f693 1194 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_1000UA 0x00000006 /* IOUT_Excitation_Current: 1000 \mu;A */
kevin1990 7:4dbae381f693 1195 #define ENUM_ADISENSE_CORE_CHANNEL_EXCITATION_IEXC_1000UA_2 0x00000007 /* IOUT_Excitation_Current: 1000 \mu;A */
kevin1990 7:4dbae381f693 1196
kevin1990 7:4dbae381f693 1197 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1198 ADISENSE_CORE_DIGITAL_SENSOR_CONFIG[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1199 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1200 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_MSB_POSITION 8 /* Position of Data MSB in the Read Frame */
kevin1990 7:4dbae381f693 1201 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_NUMBITS 2 /* Number of Relevant Data Bits in Digital Sensor */
kevin1990 7:4dbae381f693 1202 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0 /* Data Encoding of Sensor Result */
kevin1990 7:4dbae381f693 1203 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_MSB_POSITION 0x00001F00 /* Position of Data MSB in the Read Frame */
kevin1990 7:4dbae381f693 1204 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_NUMBITS 0x0000007C /* Number of Relevant Data Bits in Digital Sensor */
kevin1990 7:4dbae381f693 1205 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_SENSOR_CODING 0x00000003 /* Data Encoding of Sensor Result */
kevin1990 7:4dbae381f693 1206 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_8_BITS 0x00000000 /* Digital_Sensor_Numbits: 8 Bits */
kevin1990 7:4dbae381f693 1207 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_10_BITS 0x00000004 /* Digital_Sensor_Numbits: 10 Bits */
kevin1990 7:4dbae381f693 1208 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_12_BITS 0x00000008 /* Digital_Sensor_Numbits: 12 Bits */
kevin1990 7:4dbae381f693 1209 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_14_BITS 0x0000000C /* Digital_Sensor_Numbits: 14 Bits */
kevin1990 7:4dbae381f693 1210 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_16_BITS 0x00000010 /* Digital_Sensor_Numbits: 16 Bits */
kevin1990 7:4dbae381f693 1211 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_18_BITS 0x00000014 /* Digital_Sensor_Numbits: 18 Bits */
kevin1990 7:4dbae381f693 1212 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_20_BITS 0x00000018 /* Digital_Sensor_Numbits: 20 Bits */
kevin1990 7:4dbae381f693 1213 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_22_BITS 0x0000001C /* Digital_Sensor_Numbits: 22 Bits */
kevin1990 7:4dbae381f693 1214 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_DIGITAL_24_BITS 0x00000020 /* Digital_Sensor_Numbits: 24 Bits */
kevin1990 7:4dbae381f693 1215 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR 0x00000000 /* Digital_Sensor_Coding: Unipolar */
kevin1990 7:4dbae381f693 1216 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL 0x00000001 /* Digital_Sensor_Coding: Twos Complement */
kevin1990 7:4dbae381f693 1217 #define ENUM_ADISENSE_CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY 0x00000002 /* Digital_Sensor_Coding: Offset Binary */
kevin1990 7:4dbae381f693 1218
kevin1990 7:4dbae381f693 1219 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1220 ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1221 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1222 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0 /* I2C Address or Write Address Command for SPI Sensor */
kevin1990 7:4dbae381f693 1223 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_ADDRESS_DIGITAL_SENSOR_ADDRESS 0x000000FF /* I2C Address or Write Address Command for SPI Sensor */
kevin1990 7:4dbae381f693 1224
kevin1990 7:4dbae381f693 1225 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1226 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1227 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1228 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0 /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1229 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND1_DIGITAL_SENSOR_COMMAND1 0x000000FF /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1230
kevin1990 7:4dbae381f693 1231 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1232 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1233 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1234 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0 /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1235 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND2_DIGITAL_SENSOR_COMMAND2 0x000000FF /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1236
kevin1990 7:4dbae381f693 1237 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1238 ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1239 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1240 #define BITP_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0 /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1241 #define BITM_ADISENSE_CORE_DIGITAL_SENSOR_COMMAND3_DIGITAL_SENSOR_COMMAND3 0x000000FF /* Command to Send to Digital I2C/SPI Sensor */
kevin1990 7:4dbae381f693 1242
kevin1990 7:4dbae381f693 1243 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1244 ADISENSE_CORE_FILTER_SELECT[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1245 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1246 #define BITP_ADISENSE_CORE_FILTER_SELECT_ADC_FILTER_TYPE 11 /* ADC Digital Filter Type */
kevin1990 7:4dbae381f693 1247 #define BITP_ADISENSE_CORE_FILTER_SELECT_ADC_FS 0 /* ADC Digital Filter Select */
kevin1990 7:4dbae381f693 1248 #define BITM_ADISENSE_CORE_FILTER_SELECT_ADC_FILTER_TYPE 0x0000F800 /* ADC Digital Filter Type */
kevin1990 7:4dbae381f693 1249 #define BITM_ADISENSE_CORE_FILTER_SELECT_ADC_FS 0x000007FF /* ADC Digital Filter Select */
kevin1990 7:4dbae381f693 1250 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_FIR_25SPS 0x00000000 /* ADC_Filter_Type: FIR Filter 25 SPS */
kevin1990 7:4dbae381f693 1251 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_FIR_20SPS 0x00000800 /* ADC_Filter_Type: FIR Filter 20 SPS */
kevin1990 7:4dbae381f693 1252 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_SINC4 0x00001000 /* ADC_Filter_Type: Sinc4 Filter */
kevin1990 7:4dbae381f693 1253 #define ENUM_ADISENSE_CORE_FILTER_SELECT_FILTER_TBD 0x00001800 /* ADC_Filter_Type: TBD Filter */
kevin1990 7:4dbae381f693 1254
kevin1990 7:4dbae381f693 1255 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1256 ADISENSE_CORE_SETTLING_TIME[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1257 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1258 #define BITP_ADISENSE_CORE_SETTLING_TIME_SETTLING_TIME 0 /* Settling Time to Allow When Switching to Channel */
kevin1990 7:4dbae381f693 1259 #define BITM_ADISENSE_CORE_SETTLING_TIME_SETTLING_TIME 0x0000FFFF /* Settling Time to Allow When Switching to Channel */
kevin1990 7:4dbae381f693 1260
kevin1990 7:4dbae381f693 1261 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1262 ADISENSE_CORE_HIGH_THRESHOLD_LIMIT[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1263 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1264 #define BITP_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0 /* Upper Limit for Sensor Alert Comparison */
kevin1990 7:4dbae381f693 1265 #define BITM_ADISENSE_CORE_HIGH_THRESHOLD_LIMIT_HIGH_THRESHOLD 0xFFFFFFFF /* Upper Limit for Sensor Alert Comparison */
kevin1990 7:4dbae381f693 1266
kevin1990 7:4dbae381f693 1267 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1268 ADISENSE_CORE_LOW_THRESHOLD_LIMIT[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1269 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1270 #define BITP_ADISENSE_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0 /* Lower Limit for Sensor Alert Comparison */
kevin1990 7:4dbae381f693 1271 #define BITM_ADISENSE_CORE_LOW_THRESHOLD_LIMIT_LOW_THRESHOLD 0xFFFFFFFF /* Lower Limit for Sensor Alert Comparison */
kevin1990 7:4dbae381f693 1272
kevin1990 7:4dbae381f693 1273 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1274 ADISENSE_CORE_SENSOR_LUT_INDEX1[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1275 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1276 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX3_VALID 31 /* Indicates If 4th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1277 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX3 24 /* Pointer to LUT or Polynomial Correction for 4th Range */
kevin1990 7:4dbae381f693 1278 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX2_VALID 23 /* Indicates If 3rd LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1279 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX2 16 /* Pointer to LUT or Polynomial Correction for 3rd Range */
kevin1990 7:4dbae381f693 1280 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX1_VALID 15 /* Indicates If 2nd LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1281 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX1 8 /* Pointer to LUT or Polynomial Correction for 2nd Range */
kevin1990 7:4dbae381f693 1282 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX0_VALID 7 /* Indicates If 1st LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1283 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX0 0 /* Pointer to LUT or Polynomial Correction for 1st Range */
kevin1990 7:4dbae381f693 1284 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX3_VALID 0x80000000 /* Indicates If 4th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1285 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX3 0x3F000000 /* Pointer to LUT or Polynomial Correction for 4th Range */
kevin1990 7:4dbae381f693 1286 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX2_VALID 0x00800000 /* Indicates If 3rd LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1287 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX2 0x003F0000 /* Pointer to LUT or Polynomial Correction for 3rd Range */
kevin1990 7:4dbae381f693 1288 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX1_VALID 0x00008000 /* Indicates If 2nd LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1289 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX1 0x00003F00 /* Pointer to LUT or Polynomial Correction for 2nd Range */
kevin1990 7:4dbae381f693 1290 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX0_VALID 0x00000080 /* Indicates If 1st LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1291 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX1_LUT_INDEX0 0x0000003F /* Pointer to LUT or Polynomial Correction for 1st Range */
kevin1990 7:4dbae381f693 1292
kevin1990 7:4dbae381f693 1293 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1294 ADISENSE_CORE_SENSOR_LUT_INDEX2[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1295 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1296 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX7_VALID 31 /* Indicates If 8th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1297 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX7 24 /* Pointer to LUT or Polynomial Correction for 8th Range */
kevin1990 7:4dbae381f693 1298 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX6_VALID 23 /* Indicates If 7th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1299 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX6 16 /* Pointer to LUT or Polynomial Correction for 7th Range */
kevin1990 7:4dbae381f693 1300 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX5_VALID 15 /* Indicates If 6th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1301 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX5 8 /* Pointer to LUT or Polynomial Correction for 6th Range */
kevin1990 7:4dbae381f693 1302 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX4_VALID 7 /* Indicates If 5th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1303 #define BITP_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX4 0 /* Pointer to LUT or Polynomial Correction for 5th Range */
kevin1990 7:4dbae381f693 1304 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX7_VALID 0x80000000 /* Indicates If 8th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1305 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX7 0x3F000000 /* Pointer to LUT or Polynomial Correction for 8th Range */
kevin1990 7:4dbae381f693 1306 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX6_VALID 0x00800000 /* Indicates If 7th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1307 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX6 0x003F0000 /* Pointer to LUT or Polynomial Correction for 7th Range */
kevin1990 7:4dbae381f693 1308 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX5_VALID 0x00008000 /* Indicates If 6th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1309 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX5 0x00003F00 /* Pointer to LUT or Polynomial Correction for 6th Range */
kevin1990 7:4dbae381f693 1310 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX4_VALID 0x00000080 /* Indicates If 5th LUT Pointer is Valid */
kevin1990 7:4dbae381f693 1311 #define BITM_ADISENSE_CORE_SENSOR_LUT_INDEX2_LUT_INDEX4 0x0000003F /* Pointer to LUT or Polynomial Correction for 5th Range */
kevin1990 7:4dbae381f693 1312
kevin1990 7:4dbae381f693 1313 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1314 ADISENSE_CORE_SENSOR_OFFSET[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1315 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1316 #define BITP_ADISENSE_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0 /* Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 1317 #define BITM_ADISENSE_CORE_SENSOR_OFFSET_SENSOR_OFFSET 0xFFFFFFFF /* Sensor Offset Adjustment */
kevin1990 7:4dbae381f693 1318
kevin1990 7:4dbae381f693 1319 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1320 ADISENSE_CORE_SENSOR_GAIN[n] Pos/Masks Description
kevin1990 7:4dbae381f693 1321 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1322 #define BITP_ADISENSE_CORE_SENSOR_GAIN_SENSOR_GAIN 0 /* Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 1323 #define BITM_ADISENSE_CORE_SENSOR_GAIN_SENSOR_GAIN 0xFFFFFFFF /* Sensor Gain Adjustment */
kevin1990 7:4dbae381f693 1324
kevin1990 7:4dbae381f693 1325
kevin1990 7:4dbae381f693 1326 /* ============================================================================================================================
kevin1990 7:4dbae381f693 1327 Test Registers
kevin1990 7:4dbae381f693 1328 ============================================================================================================================ */
kevin1990 7:4dbae381f693 1329
kevin1990 7:4dbae381f693 1330 /* ============================================================================================================================
kevin1990 7:4dbae381f693 1331 ADSENSE_TEST
kevin1990 7:4dbae381f693 1332 ============================================================================================================================ */
kevin1990 7:4dbae381f693 1333 #define MOD_ADSENSE_TEST_BASE 0x00000400 /* Test Registers */
kevin1990 7:4dbae381f693 1334 #define MOD_ADSENSE_TEST_MASK 0x00007FFF /* Test Registers */
kevin1990 7:4dbae381f693 1335 #define REG_ADSENSE_TEST_TEST_REG_0_RESET 0x00000000 /* Reset Value for test_reg_0 */
kevin1990 7:4dbae381f693 1336 #define REG_ADSENSE_TEST_TEST_REG_0 0x00000400 /* ADSENSE_TEST Test Register 0 */
kevin1990 7:4dbae381f693 1337
kevin1990 7:4dbae381f693 1338 /* ============================================================================================================================
kevin1990 7:4dbae381f693 1339 ADSENSE_TEST Register BitMasks, Positions & Enumerations
kevin1990 7:4dbae381f693 1340 ============================================================================================================================ */
kevin1990 7:4dbae381f693 1341 /* -------------------------------------------------------------------------------------------------------------------------
kevin1990 7:4dbae381f693 1342 ADSENSE_TEST_TEST_REG_0 Pos/Masks Description
kevin1990 7:4dbae381f693 1343 ------------------------------------------------------------------------------------------------------------------------- */
kevin1990 7:4dbae381f693 1344 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT6 7
kevin1990 7:4dbae381f693 1345 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT5 6
kevin1990 7:4dbae381f693 1346 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT4 5
kevin1990 7:4dbae381f693 1347 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT7 4
kevin1990 7:4dbae381f693 1348 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT3 3
kevin1990 7:4dbae381f693 1349 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT2 1
kevin1990 7:4dbae381f693 1350 #define BITP_ADSENSE_TEST_TEST_REG_0_TESTBIT1 0
kevin1990 7:4dbae381f693 1351 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT6 0x00000080
kevin1990 7:4dbae381f693 1352 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT5 0x00000040
kevin1990 7:4dbae381f693 1353 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT4 0x00000020
kevin1990 7:4dbae381f693 1354 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT7 0x00000010
kevin1990 7:4dbae381f693 1355 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT3 0x00000008
kevin1990 7:4dbae381f693 1356 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT2 0x00000006
kevin1990 7:4dbae381f693 1357 #define BITM_ADSENSE_TEST_TEST_REG_0_TESTBIT1 0x00000001
kevin1990 7:4dbae381f693 1358
kevin1990 7:4dbae381f693 1359
kevin1990 7:4dbae381f693 1360 /* ADISENSE_SPI Parameters */
kevin1990 7:4dbae381f693 1361
kevin1990 7:4dbae381f693 1362 /***** ADISENSE_SPI */
kevin1990 7:4dbae381f693 1363 #define PARAM_ADISENSE_SPI_SPI_STANDARD "LPT" /* A part must declare which SPI Standard it follows, either ADI or LPT */
kevin1990 7:4dbae381f693 1364 #define PARAM_ADISENSE_SPI_CHIP_GRADE_VALUE 0 /* This is used to indicate speed grades/linearity. */
kevin1990 7:4dbae381f693 1365 #define PARAM_ADISENSE_SPI_CHIP_REVISION_VALUE 0 /* This is used to indicate the silicon revision */
kevin1990 7:4dbae381f693 1366 #define PARAM_ADISENSE_SPI_HAS_M_S_REGISTERS 0 /* If a design uses Master-Slave registers this must be set to true to enable relevant control bit fields */
kevin1990 7:4dbae381f693 1367 #define PARAM_ADISENSE_SPI_M_S_TRANSFER_BF_EXISTS 0 /* Used to set EXISTS the M-S Transfer bit field */
kevin1990 7:4dbae381f693 1368 #define PARAM_ADISENSE_SPI_STREAM_MODE_TRANSFER_BF_EXISTS 0 /* Used to set EXISTS of the stream mode transfer bit field */
kevin1990 7:4dbae381f693 1369 #define PARAM_ADISENSE_SPI_MSB_AND_LSB_FIRST_SUPPORT 0 /* Determines if the parts supports MSB and LSB first options */
kevin1990 7:4dbae381f693 1370 #define PARAM_ADISENSE_SPI_WIRE_MODE_SUPPORT "_4_WIRE" /* Configures which hardware SPI modes are supported */
kevin1990 7:4dbae381f693 1371 #define PARAM_ADISENSE_SPI_WIRE_MODE_DEFAULT "_4_WIRE" /* Sets the default hardware SPI mode */
kevin1990 7:4dbae381f693 1372 #define PARAM_ADISENSE_SPI_MULTI_IO_CHANNELS 1 /* Defines the number of SDIO pins supported by the SPI in Multi-IO Mode. Should be 1,2,4, or 8. */
kevin1990 7:4dbae381f693 1373 #define PARAM_ADISENSE_SPI_LPT_STANDARD_VERSION "REV1_0" /* This is a string from the LPT_STANDARD_VERSION_OPTIONS array for the active LPT SPI Standard version */
kevin1990 7:4dbae381f693 1374 #define PARAM_ADISENSE_SPI_HAS_CSB_PIN 1 /* Does the part have a csb pin? */
kevin1990 7:4dbae381f693 1375 #define PARAM_ADISENSE_SPI_BUS_MODE_SUPPORT 1 /* When set to true, Bus mode is supported. */
kevin1990 7:4dbae381f693 1376 #define PARAM_ADISENSE_SPI_ISOLATED_3_WIRE_SUPPORT 0 /* Does the part support the 3-wire isolate mode of operation */
kevin1990 7:4dbae381f693 1377 #define PARAM_ADISENSE_SPI_DAISY_CHAIN_MODE_SUPPORT 0 /* When set to true, Daisy chain mode is supported. */
kevin1990 7:4dbae381f693 1378 #define PARAM_ADISENSE_SPI_CHECK_GTE_1_MODE_SUPPORTED 1 /* This is used to check that at least mode is enabled */
kevin1990 7:4dbae381f693 1379 #define PARAM_ADISENSE_SPI_INTERFACE_MODE_SWITCH "None" /* Valid options are 'None', 'HW' or 'SW' */
kevin1990 7:4dbae381f693 1380 #define PARAM_ADISENSE_SPI_CRC_SUPPORT "CRC_CONFIGURABLE" /* Set to true to enable bit fields related to CRC. */
kevin1990 7:4dbae381f693 1381 #define PARAM_ADISENSE_SPI_CRC_SUPPORT_ENABLED 0 /* Verilog output parameter for 'define */
kevin1990 7:4dbae381f693 1382 #define PARAM_ADISENSE_SPI_CRC_SUPPORT_ENABLE 1 /* Configures if CRC features are enabled in the module */
kevin1990 7:4dbae381f693 1383 #define PARAM_ADISENSE_SPI_LPT_STANDARD_VERSION_VALUE 2 /* Index value of the active LPT SPI Standard version */
kevin1990 7:4dbae381f693 1384 #define PARAM_ADISENSE_SPI_ADDRESS_MODE_SUPPORT "_15_BIT" /* Configures which addressing modes are supported */
kevin1990 7:4dbae381f693 1385 #define PARAM_ADISENSE_SPI_ADDRESS_MODE_DEFAULT "_15_BIT" /* Sets the default addressing mode */
kevin1990 7:4dbae381f693 1386 #define PARAM_ADISENSE_SPI_ADDRESS_BUS_WIDTH 15 /* Verilog output parameter for 'define */
kevin1990 7:4dbae381f693 1387 #define PARAM_ADISENSE_SPI_SLOW_IFACE_CTRL_SUPPORT 0 /* Does the part support the Slow Interface Control feature */
kevin1990 7:4dbae381f693 1388 #define PARAM_ADISENSE_SPI_SOFT_RESET_0_BF_EXISTS 0 /* Used to control if the SOFT_RESET_0 bit field exists */
kevin1990 7:4dbae381f693 1389 #define PARAM_ADISENSE_SPI_SOFT_RESET_1_BF_EXISTS 0 /* Used to control if the SOFT_RESET_1 bit field exists */
kevin1990 7:4dbae381f693 1390 #define PARAM_ADISENSE_SPI_SEND_STATUS_SUPPORT "NO_SEND_STATUS" /* Determines if and how the part supports the SEND_STATUS feature */
kevin1990 7:4dbae381f693 1391 #define PARAM_ADISENSE_SPI_SEND_STATUS_SUPPORT_ENABLE 0 /* This is used to enable various send status features */
kevin1990 7:4dbae381f693 1392 #define PARAM_ADISENSE_SPI_SPI_STANDARD_VERSION_VALUE 2 /* Value for SPI Standard VERSION bit field */
kevin1990 7:4dbae381f693 1393 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_SUPPORT "ENTITY_ACCESS_ALWAYS" /* Configures which entity access mode(s) are supported */
kevin1990 7:4dbae381f693 1394 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_SUPPORT_ENABLE 1 /* This is used to enable/disable Strict Entity Access features */
kevin1990 7:4dbae381f693 1395 #define PARAM_ADISENSE_SPI_ENTITY_ACCESS_DEFAULT 1 /* Sets the default entity access mode */
kevin1990 7:4dbae381f693 1396 #define PARAM_ADISENSE_SPI_CHIP_INDEX_EXISTS 0 /* Used to control if the CHIP_INDEX register and related bit field exists */
kevin1990 7:4dbae381f693 1397 #define PARAM_ADISENSE_SPI_OFFSET_DEV_INDEX_EXISTS 0 /* Used to control if the OFFSET_DEV_INDEX bit field and registers exists */
kevin1990 7:4dbae381f693 1398 #define PARAM_ADISENSE_SPI_DEV_INDEX_EXISTS 0 /* Used to control if the DEV_INDEX bit field and register exists */
kevin1990 7:4dbae381f693 1399 #define PARAM_ADISENSE_SPI_STATUS_BIT_0_EXISTS 0 /* Sets EXIST for Status Bit 0 */
kevin1990 7:4dbae381f693 1400 #define PARAM_ADISENSE_SPI_STATUS_BIT_1_EXISTS 0 /* Sets EXIST for Status Bit 1 */
kevin1990 7:4dbae381f693 1401 #define PARAM_ADISENSE_SPI_STATUS_BIT_2_EXISTS 0 /* Sets EXIST for Status Bit 2 */
kevin1990 7:4dbae381f693 1402 #define PARAM_ADISENSE_SPI_STATUS_BIT_3_EXISTS 0 /* Sets EXIST for Status Bit 3 */
kevin1990 7:4dbae381f693 1403 #define PARAM_ADISENSE_SPI_STATUS_BIT_0_SWNAME "Status_Bit_0" /* Software Name for Status Bit 0 */
kevin1990 7:4dbae381f693 1404 #define PARAM_ADISENSE_SPI_STATUS_BIT_1_SWNAME "Status_Bit_1" /* Software Name for Status Bit 1 */
kevin1990 7:4dbae381f693 1405 #define PARAM_ADISENSE_SPI_STATUS_BIT_2_SWNAME "Status_Bit_2" /* Software Name for Status Bit 2 */
kevin1990 7:4dbae381f693 1406 #define PARAM_ADISENSE_SPI_STATUS_BIT_3_SWNAME "Status_Bit_3" /* Software Name for Status Bit 3 */
kevin1990 7:4dbae381f693 1407 #define PARAM_ADISENSE_SPI_CHIP_TYPE "P_ADC" /* This is a string that corresponds to one of the values in the CHIP_TYPE_OPTIONS array and corresponds to the type of chip being developed */
kevin1990 7:4dbae381f693 1408 #define PARAM_ADISENSE_SPI_CHIP_TYPE_VALUE 7 /* Integer value corresponding to selected CHIP_TYPE, and is used as bit field enum value */
kevin1990 7:4dbae381f693 1409 #define PARAM_ADISENSE_SPI_PRODUCT_ID_VALUE 32 /* This value is used to identify a specific generic. */
kevin1990 7:4dbae381f693 1410 #define PARAM_ADISENSE_SPI_PRODUCT_ID_TRIM_BITS 4 /* This defines the number of PRODUCT_ID bits that can be fuse/trimmed. */
kevin1990 7:4dbae381f693 1411
kevin1990 7:4dbae381f693 1412 #endif /* end ifndef _DEF_ADISENSE1000_REGISTERS_H */
kevin1990 7:4dbae381f693 1413