mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.
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Revision 71:a5b1c83f05dc, committed 2016-02-25
- Comitter:
- mbed_official
- Date:
- Thu Feb 25 09:45:11 2016 +0000
- Parent:
- 70:885f1c2f67b1
- Child:
- 72:ad655cb9b50e
- Commit message:
- Synchronized with git revision 8577dc9680abc50885f129a77852579c5a5bc527
Full URL: https://github.com/mbedmicro/mbed/commit/8577dc9680abc50885f129a77852579c5a5bc527/
l476rg rtc
Changed in this revision
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.h Thu Feb 25 09:15:10 2016 +0000 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.h Thu Feb 25 09:45:11 2016 +0000 @@ -159,7 +159,7 @@ * @{ */ #define RCC_DBP_TIMEOUT_VALUE ((uint32_t)100) -#define RCC_LSE_TIMEOUT_VALUE ((uint32_t)100) +#define RCC_LSE_TIMEOUT_VALUE ((uint32_t)5000) /** * @} */
--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h Thu Feb 25 09:15:10 2016 +0000 +++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/PeripheralNames.h Thu Feb 25 09:45:11 2016 +0000 @@ -127,6 +127,7 @@ SPI_0 = 0, SPI_1, SPI_2, + SPI_3, } SPIName; typedef enum {
--- a/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c Thu Feb 25 09:15:10 2016 +0000 +++ b/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/spi_api.c Thu Feb 25 09:45:11 2016 +0000 @@ -27,6 +27,7 @@ {P4_4 , SPI_1, 2}, {P11_12, SPI_1, 2}, {P8_3 , SPI_2, 3}, + {P5_0 , SPI_3, 8}, {NC , NC , 0} }; @@ -35,6 +36,7 @@ {P4_5 , SPI_1, 2}, {P11_13, SPI_1, 2}, {P8_4 , SPI_2, 3}, + {P5_1 , SPI_3, 8}, {NC , NC , 0} }; @@ -43,6 +45,7 @@ {P4_6 , SPI_1, 2}, {P11_14, SPI_1, 2}, {P8_5 , SPI_2, 3}, + {P5_2 , SPI_3, 8}, {NC , NC , 0} }; @@ -51,6 +54,7 @@ {P4_7 , SPI_1, 2}, {P11_15, SPI_1, 2}, {P8_6 , SPI_2, 3}, + {P5_3 , SPI_3, 8}, {NC , NC , 0} }; @@ -82,6 +86,7 @@ case SPI_0: CPGSTBCR10 &= ~(0x80); break; case SPI_1: CPGSTBCR10 &= ~(0x40); break; case SPI_2: CPGSTBCR10 &= ~(0x20); break; + case SPI_3: CPGSTBCR10 &= ~(0x10); break; } dummy = CPGSTBCR10;
--- a/targets/hal/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/device.h Thu Feb 25 09:15:10 2016 +0000 +++ b/targets/hal/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/device.h Thu Feb 25 09:45:11 2016 +0000 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c Thu Feb 25 09:15:10 2016 +0000 +++ b/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c Thu Feb 25 09:45:11 2016 +0000 @@ -33,7 +33,9 @@ #include "mbed_error.h" +#if DEVICE_RTC_LSI static int rtc_inited = 0; +#endif static RTC_HandleTypeDef RtcHandle; @@ -43,8 +45,10 @@ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; uint32_t rtc_freq = 0; +#if DEVICE_RTC_LSI if (rtc_inited) return; rtc_inited = 1; +#endif RtcHandle.Instance = RTC; @@ -58,6 +62,7 @@ __HAL_RCC_BACKUPRESET_FORCE(); __HAL_RCC_BACKUPRESET_RELEASE(); +#if !DEVICE_RTC_LSI // Enable LSE Oscillator RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured! @@ -69,24 +74,27 @@ PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); rtc_freq = LSE_VALUE; - } else { // LSE didn't start, try with LSI - // Enable LSI clock - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured! - RCC_OscInitStruct.LSEState = RCC_LSE_OFF; - RCC_OscInitStruct.LSIState = RCC_LSI_ON; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - error("Cannot initialize RTC with LSI\n"); - } - // Connect LSI to RTC - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; - PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - error("Cannot initialize RTC with LSI\n"); - } - // This value is LSI typical value. To be measured precisely using a timer input capture for example. - rtc_freq = 40000; + } else { + error("Cannot initialize RTC with LSE\n"); } +#else + // Enable LSI clock + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured! + RCC_OscInitStruct.LSEState = RCC_LSE_OFF; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + error("Cannot initialize RTC with LSI\n"); + } + // Connect LSI to RTC + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; + PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + error("Cannot initialize RTC with LSI\n"); + } + // This value is LSI typical value. To be measured precisely using a timer input capture for example. + rtc_freq = 40000; +#endif // Check if RTC is already initialized if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return; @@ -129,12 +137,22 @@ RCC_OscInitStruct.LSEState = RCC_LSE_OFF; HAL_RCC_OscConfig(&RCC_OscInitStruct); +#if DEVICE_RTC_LSI rtc_inited = 0; +#endif } int rtc_isenabled(void) { - return rtc_inited; +#if DEVICE_RTC_LSI + return rtc_inited; +#else + if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) { + return 1; + } else { + return 0; + } +#endif } /*