Tomo Yamanaka / mbed-dev

mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC23XX/serial_api.c@103:493a29d2d4d7, 2016-03-30 (annotated)

Committer:
1050186
Date:
Wed Mar 30 11:41:25 2016 +0000
Revision:
103:493a29d2d4d7
Parent:
0:9b334a45a8ff 
GR-PEACH runs on RAM.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 // math.h required for floating point operations for baud rate calculation
bogdanm 0:9b334a45a8ff 17 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 18 #include <math.h>
bogdanm 0:9b334a45a8ff 19 #include <string.h>
bogdanm 0:9b334a45a8ff 20 #include <stdlib.h>
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 23 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 24 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 /******************************************************************************
bogdanm 0:9b334a45a8ff 27 * INITIALIZATION
bogdanm 0:9b334a45a8ff 28 ******************************************************************************/
bogdanm 0:9b334a45a8ff 29 #define UART_NUM 4
bogdanm 0:9b334a45a8ff 30
bogdanm 0:9b334a45a8ff 31 static const PinMap PinMap_UART_TX[] = {
bogdanm 0:9b334a45a8ff 32 {P0_0, UART_3, 2},
bogdanm 0:9b334a45a8ff 33 {P0_2, UART_0, 1},
bogdanm 0:9b334a45a8ff 34 {P0_10, UART_2, 1},
bogdanm 0:9b334a45a8ff 35 {P0_15, UART_1, 1},
bogdanm 0:9b334a45a8ff 36 {P0_25, UART_3, 3},
bogdanm 0:9b334a45a8ff 37 {P2_0 , UART_1, 2},
bogdanm 0:9b334a45a8ff 38 {P2_8 , UART_2, 2},
bogdanm 0:9b334a45a8ff 39 {P4_28, UART_3, 3},
bogdanm 0:9b334a45a8ff 40 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 41 };
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 static const PinMap PinMap_UART_RX[] = {
bogdanm 0:9b334a45a8ff 44 {P0_1 , UART_3, 2},
bogdanm 0:9b334a45a8ff 45 {P0_3 , UART_0, 1},
bogdanm 0:9b334a45a8ff 46 {P0_11, UART_2, 1},
bogdanm 0:9b334a45a8ff 47 {P0_16, UART_1, 1},
bogdanm 0:9b334a45a8ff 48 {P0_26, UART_3, 3},
bogdanm 0:9b334a45a8ff 49 {P2_1 , UART_1, 2},
bogdanm 0:9b334a45a8ff 50 {P2_9 , UART_2, 2},
bogdanm 0:9b334a45a8ff 51 {P4_29, UART_3, 3},
bogdanm 0:9b334a45a8ff 52 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 53 };
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 56 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 59 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 62 int is_stdio_uart = 0;
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 // determine the UART to use
bogdanm 0:9b334a45a8ff 65 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 66 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 67 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 68 MBED_ASSERT((int)uart != NC);
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 obj->uart = (LPC_UART_TypeDef *)uart;
bogdanm 0:9b334a45a8ff 71 // enable power
bogdanm 0:9b334a45a8ff 72 switch (uart) {
bogdanm 0:9b334a45a8ff 73 case UART_0: LPC_SC->PCONP |= 1 << 3; break;
bogdanm 0:9b334a45a8ff 74 case UART_1: LPC_SC->PCONP |= 1 << 4; break;
bogdanm 0:9b334a45a8ff 75 case UART_2: LPC_SC->PCONP |= 1 << 24; break;
bogdanm 0:9b334a45a8ff 76 case UART_3: LPC_SC->PCONP |= 1 << 25; break;
bogdanm 0:9b334a45a8ff 77 }
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 // enable fifos and default rx trigger level
bogdanm 0:9b334a45a8ff 80 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 0:9b334a45a8ff 81 | 0 << 1 // Rx Fifo Reset
bogdanm 0:9b334a45a8ff 82 | 0 << 2 // Tx Fifo Reset
bogdanm 0:9b334a45a8ff 83 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 // disable irqs
bogdanm 0:9b334a45a8ff 86 obj->uart->IER = 0 << 0 // Rx Data available irq enable
bogdanm 0:9b334a45a8ff 87 | 0 << 1 // Tx Fifo empty irq enable
bogdanm 0:9b334a45a8ff 88 | 0 << 2; // Rx Line Status irq enable
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // set default baud rate and format
bogdanm 0:9b334a45a8ff 91 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 92 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 // pinout the chosen uart
bogdanm 0:9b334a45a8ff 95 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 96 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 // set rx/tx pins in PullUp mode
bogdanm 0:9b334a45a8ff 99 if (tx != NC) {
bogdanm 0:9b334a45a8ff 100 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 101 }
bogdanm 0:9b334a45a8ff 102 if (rx != NC) {
bogdanm 0:9b334a45a8ff 103 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 104 }
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 switch (uart) {
bogdanm 0:9b334a45a8ff 107 case UART_0: obj->index = 0; break;
bogdanm 0:9b334a45a8ff 108 case UART_1: obj->index = 1; break;
bogdanm 0:9b334a45a8ff 109 case UART_2: obj->index = 2; break;
bogdanm 0:9b334a45a8ff 110 case UART_3: obj->index = 3; break;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 if (is_stdio_uart) {
bogdanm 0:9b334a45a8ff 116 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 117 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 118 }
bogdanm 0:9b334a45a8ff 119 }
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 void serial_free(serial_t *obj) {
bogdanm 0:9b334a45a8ff 122 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 123 }
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 // serial_baud
bogdanm 0:9b334a45a8ff 126 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 0:9b334a45a8ff 127 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 0:9b334a45a8ff 128 MBED_ASSERT((int)obj->uart <= UART_3);
bogdanm 0:9b334a45a8ff 129 // The LPC2300 and LPC1700 have a divider and a fractional divider to control the
bogdanm 0:9b334a45a8ff 130 // baud rate. The formula is:
bogdanm 0:9b334a45a8ff 131 //
bogdanm 0:9b334a45a8ff 132 // Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
bogdanm 0:9b334a45a8ff 133 // where:
bogdanm 0:9b334a45a8ff 134 // 1 < MulVal <= 15
bogdanm 0:9b334a45a8ff 135 // 0 <= DivAddVal < 14
bogdanm 0:9b334a45a8ff 136 // DivAddVal < MulVal
bogdanm 0:9b334a45a8ff 137 //
bogdanm 0:9b334a45a8ff 138 // set pclk to /1
bogdanm 0:9b334a45a8ff 139 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 140 case UART_0: LPC_SC->PCLKSEL0 &= ~(0x3 << 6); LPC_SC->PCLKSEL0 |= (0x1 << 6); break;
bogdanm 0:9b334a45a8ff 141 case UART_1: LPC_SC->PCLKSEL0 &= ~(0x3 << 8); LPC_SC->PCLKSEL0 |= (0x1 << 8); break;
bogdanm 0:9b334a45a8ff 142 case UART_2: LPC_SC->PCLKSEL1 &= ~(0x3 << 16); LPC_SC->PCLKSEL1 |= (0x1 << 16); break;
bogdanm 0:9b334a45a8ff 143 case UART_3: LPC_SC->PCLKSEL1 &= ~(0x3 << 18); LPC_SC->PCLKSEL1 |= (0x1 << 18); break;
bogdanm 0:9b334a45a8ff 144 default: break;
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 0:9b334a45a8ff 150 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 0:9b334a45a8ff 151 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 0:9b334a45a8ff 152 // the closest match. This could be more elegant, using search methods
bogdanm 0:9b334a45a8ff 153 // and/or lookup tables, but the brute force method is not that much
bogdanm 0:9b334a45a8ff 154 // slower, and is more maintainable.
bogdanm 0:9b334a45a8ff 155 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 uint8_t DivAddVal = 0;
bogdanm 0:9b334a45a8ff 158 uint8_t MulVal = 1;
bogdanm 0:9b334a45a8ff 159 int hit = 0;
bogdanm 0:9b334a45a8ff 160 uint16_t dlv;
bogdanm 0:9b334a45a8ff 161 uint8_t mv, dav;
bogdanm 0:9b334a45a8ff 162 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
bogdanm 0:9b334a45a8ff 163 int err_best = baudrate, b;
bogdanm 0:9b334a45a8ff 164 for (mv = 1; mv < 16 && !hit; mv++)
bogdanm 0:9b334a45a8ff 165 {
bogdanm 0:9b334a45a8ff 166 for (dav = 0; dav < mv; dav++)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
bogdanm 0:9b334a45a8ff 169 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
bogdanm 0:9b334a45a8ff 170 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
bogdanm 0:9b334a45a8ff 171 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
bogdanm 0:9b334a45a8ff 172 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
bogdanm 0:9b334a45a8ff 175 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
bogdanm 0:9b334a45a8ff 176 else // 2 bits headroom, use more precision
bogdanm 0:9b334a45a8ff 177 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
bogdanm 0:9b334a45a8ff 180 if (dlv == 0)
bogdanm 0:9b334a45a8ff 181 dlv = 1;
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 // datasheet says if dav > 0 then DL must be >= 2
bogdanm 0:9b334a45a8ff 184 if ((dav > 0) && (dlv < 2))
bogdanm 0:9b334a45a8ff 185 dlv = 2;
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 // integer rearrangement of the baudrate equation (with rounding)
bogdanm 0:9b334a45a8ff 188 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 // check to see how we went
bogdanm 0:9b334a45a8ff 191 b = abs(b - baudrate);
bogdanm 0:9b334a45a8ff 192 if (b < err_best)
bogdanm 0:9b334a45a8ff 193 {
bogdanm 0:9b334a45a8ff 194 err_best = b;
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 DL = dlv;
bogdanm 0:9b334a45a8ff 197 MulVal = mv;
bogdanm 0:9b334a45a8ff 198 DivAddVal = dav;
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 if (b == baudrate)
bogdanm 0:9b334a45a8ff 201 {
bogdanm 0:9b334a45a8ff 202 hit = 1;
bogdanm 0:9b334a45a8ff 203 break;
bogdanm 0:9b334a45a8ff 204 }
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 }
bogdanm 0:9b334a45a8ff 208 }
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 // set LCR[DLAB] to enable writing to divider registers
bogdanm 0:9b334a45a8ff 211 obj->uart->LCR |= (1 << 7);
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 // set divider values
bogdanm 0:9b334a45a8ff 214 obj->uart->DLM = (DL >> 8) & 0xFF;
bogdanm 0:9b334a45a8ff 215 obj->uart->DLL = (DL >> 0) & 0xFF;
bogdanm 0:9b334a45a8ff 216 obj->uart->FDR = (uint32_t) DivAddVal << 0
bogdanm 0:9b334a45a8ff 217 | (uint32_t) MulVal << 4;
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 // clear LCR[DLAB]
bogdanm 0:9b334a45a8ff 220 obj->uart->LCR &= ~(1 << 7);
bogdanm 0:9b334a45a8ff 221 }
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 0:9b334a45a8ff 224 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
bogdanm 0:9b334a45a8ff 225 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
bogdanm 0:9b334a45a8ff 226 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
bogdanm 0:9b334a45a8ff 227 (parity == ParityForced1) || (parity == ParityForced0));
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 230 data_bits -= 5;
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 int parity_enable = 0, parity_select = 0;
bogdanm 0:9b334a45a8ff 233 switch (parity) {
bogdanm 0:9b334a45a8ff 234 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 0:9b334a45a8ff 235 case ParityOdd : parity_enable = 1; parity_select = 0; break;
bogdanm 0:9b334a45a8ff 236 case ParityEven: parity_enable = 1; parity_select = 1; break;
bogdanm 0:9b334a45a8ff 237 case ParityForced1: parity_enable = 1; parity_select = 2; break;
bogdanm 0:9b334a45a8ff 238 case ParityForced0: parity_enable = 1; parity_select = 3; break;
bogdanm 0:9b334a45a8ff 239 default:
bogdanm 0:9b334a45a8ff 240 break;
bogdanm 0:9b334a45a8ff 241 }
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 obj->uart->LCR = data_bits << 0
bogdanm 0:9b334a45a8ff 244 | stop_bits << 2
bogdanm 0:9b334a45a8ff 245 | parity_enable << 3
bogdanm 0:9b334a45a8ff 246 | parity_select << 4;
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /******************************************************************************
bogdanm 0:9b334a45a8ff 250 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 251 ******************************************************************************/
bogdanm 0:9b334a45a8ff 252 static inline void uart_irq(uint32_t iir, uint32_t index) {
bogdanm 0:9b334a45a8ff 253 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
bogdanm 0:9b334a45a8ff 254 SerialIrq irq_type;
bogdanm 0:9b334a45a8ff 255 switch (iir) {
bogdanm 0:9b334a45a8ff 256 case 1: irq_type = TxIrq; break;
bogdanm 0:9b334a45a8ff 257 case 2: irq_type = RxIrq; break;
bogdanm 0:9b334a45a8ff 258 default: return;
bogdanm 0:9b334a45a8ff 259 }
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 if (serial_irq_ids[index] != 0)
bogdanm 0:9b334a45a8ff 262 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 0:9b334a45a8ff 263 }
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 void uart0_irq() {uart_irq((LPC_UART0->IIR >> 1) & 0x7, 0);}
bogdanm 0:9b334a45a8ff 266 void uart1_irq() {uart_irq((LPC_UART1->IIR >> 1) & 0x7, 1);}
bogdanm 0:9b334a45a8ff 267 void uart2_irq() {uart_irq((LPC_UART2->IIR >> 1) & 0x7, 2);}
bogdanm 0:9b334a45a8ff 268 void uart3_irq() {uart_irq((LPC_UART3->IIR >> 1) & 0x7, 3);}
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 271 irq_handler = handler;
bogdanm 0:9b334a45a8ff 272 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 273 }
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 0:9b334a45a8ff 276 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 277 uint32_t vector = 0;
bogdanm 0:9b334a45a8ff 278 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 279 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 0:9b334a45a8ff 280 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 0:9b334a45a8ff 281 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 0:9b334a45a8ff 282 case UART_3: irq_n=UART3_IRQn; vector = (uint32_t)&uart3_irq; break;
bogdanm 0:9b334a45a8ff 283 }
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 if (enable) {
bogdanm 0:9b334a45a8ff 286 obj->uart->IER |= 1 << irq;
bogdanm 0:9b334a45a8ff 287 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 288 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 289 } else { // disable
bogdanm 0:9b334a45a8ff 290 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 291 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 0:9b334a45a8ff 292 obj->uart->IER &= ~(1 << irq);
bogdanm 0:9b334a45a8ff 293 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
bogdanm 0:9b334a45a8ff 294 if (all_disabled)
bogdanm 0:9b334a45a8ff 295 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /******************************************************************************
bogdanm 0:9b334a45a8ff 300 * READ/WRITE
bogdanm 0:9b334a45a8ff 301 ******************************************************************************/
bogdanm 0:9b334a45a8ff 302 int serial_getc(serial_t *obj) {
bogdanm 0:9b334a45a8ff 303 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 304 return obj->uart->RBR;
bogdanm 0:9b334a45a8ff 305 }
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 void serial_putc(serial_t *obj, int c) {
bogdanm 0:9b334a45a8ff 308 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 309 obj->uart->THR = c;
bogdanm 0:9b334a45a8ff 310 }
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 int serial_readable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 313 return obj->uart->LSR & 0x01;
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 int serial_writable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 317 return obj->uart->LSR & 0x20;
bogdanm 0:9b334a45a8ff 318 }
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 321 obj->uart->FCR = 1 << 1 // rx FIFO reset
bogdanm 0:9b334a45a8ff 322 | 1 << 2 // tx FIFO reset
bogdanm 0:9b334a45a8ff 323 | 0 << 6; // interrupt depth
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 void serial_pinout_tx(PinName tx) {
bogdanm 0:9b334a45a8ff 327 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 328 }
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 void serial_break_set(serial_t *obj) {
bogdanm 0:9b334a45a8ff 331 obj->uart->LCR |= (1 << 6);
bogdanm 0:9b334a45a8ff 332 }
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 void serial_break_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 335 obj->uart->LCR &= ~(1 << 6);
bogdanm 0:9b334a45a8ff 336 }
bogdanm 0:9b334a45a8ff 337