Tomo Yamanaka / mbed-dev

mbed library sources. Supersedes mbed-src. GR-PEACH runs on RAM.

Fork of mbed-dev by mbed official

targets/hal/TARGET_NXP/TARGET_LPC23XX/analogin_api.c@103:493a29d2d4d7, 2016-03-30 (annotated)

Committer:
1050186
Date:
Wed Mar 30 11:41:25 2016 +0000
Revision:
103:493a29d2d4d7
Parent:
0:9b334a45a8ff 
GR-PEACH runs on RAM.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "analogin_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 #define ADC_10BIT_RANGE 0x3FF
bogdanm 0:9b334a45a8ff 24 #define ADC_12BIT_RANGE 0xFFF
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 static inline int div_round_up(int x, int y) {
bogdanm 0:9b334a45a8ff 27 return (x + (y - 1)) / y;
bogdanm 0:9b334a45a8ff 28 }
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 static const PinMap PinMap_ADC[] = {
bogdanm 0:9b334a45a8ff 31 {P0_23, ADC0_0, 1},
bogdanm 0:9b334a45a8ff 32 {P0_24, ADC0_1, 1},
bogdanm 0:9b334a45a8ff 33 {P0_25, ADC0_2, 1},
bogdanm 0:9b334a45a8ff 34 {P0_26, ADC0_3, 1},
bogdanm 0:9b334a45a8ff 35 {P1_30, ADC0_4, 3},
bogdanm 0:9b334a45a8ff 36 {P1_31, ADC0_5, 3},
bogdanm 0:9b334a45a8ff 37 {NC, NC, 0}
bogdanm 0:9b334a45a8ff 38 };
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 #define ADC_RANGE ADC_10BIT_RANGE
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 0:9b334a45a8ff 44 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 45 MBED_ASSERT(obj->adc != (ADCName)NC);
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 // ensure power is turned on
bogdanm 0:9b334a45a8ff 48 LPC_SC->PCONP |= (1 << 12);
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 // set PCLK of ADC to /1
bogdanm 0:9b334a45a8ff 51 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
bogdanm 0:9b334a45a8ff 52 LPC_SC->PCLKSEL0 |= (0x1 << 24);
bogdanm 0:9b334a45a8ff 53 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 // calculate minimum clock divider
bogdanm 0:9b334a45a8ff 56 // clkdiv = divider - 1
bogdanm 0:9b334a45a8ff 57 uint32_t MAX_ADC_CLK = 13000000;
bogdanm 0:9b334a45a8ff 58 uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1;
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 // Set the generic software-controlled ADC settings
bogdanm 0:9b334a45a8ff 61 LPC_ADC->ADCR = (0 << 0) // SEL: 0 = no channels selected
bogdanm 0:9b334a45a8ff 62 | (clkdiv << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
bogdanm 0:9b334a45a8ff 63 | (0 << 16) // BURST: 0 = software control
bogdanm 0:9b334a45a8ff 64 | (0 << 17) // CLKS: not applicable
bogdanm 0:9b334a45a8ff 65 | (1 << 21) // PDN: 1 = operational
bogdanm 0:9b334a45a8ff 66 | (0 << 24) // START: 0 = no start
bogdanm 0:9b334a45a8ff 67 | (0 << 27); // EDGE: not applicable
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 pinmap_pinout(pin, PinMap_ADC);
bogdanm 0:9b334a45a8ff 70 }
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 static inline uint32_t adc_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 73 // Select the appropriate channel and start conversion
bogdanm 0:9b334a45a8ff 74 LPC_ADC->ADCR &= ~0xFF;
bogdanm 0:9b334a45a8ff 75 LPC_ADC->ADCR |= 1 << (int)obj->adc;
bogdanm 0:9b334a45a8ff 76 LPC_ADC->ADCR |= 1 << 24;
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 // Repeatedly get the sample data until DONE bit
bogdanm 0:9b334a45a8ff 79 unsigned int data;
bogdanm 0:9b334a45a8ff 80 do {
bogdanm 0:9b334a45a8ff 81 data = LPC_ADC->ADGDR;
bogdanm 0:9b334a45a8ff 82 } while ((data & ((unsigned int)1 << 31)) == 0);
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 // Stop conversion
bogdanm 0:9b334a45a8ff 85 LPC_ADC->ADCR &= ~(1 << 24);
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 return (data >> 6) & ADC_RANGE; // 10 bit
bogdanm 0:9b334a45a8ff 88 }
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 0:9b334a45a8ff 91 if (*a > *b) {
bogdanm 0:9b334a45a8ff 92 uint32_t t = *a;
bogdanm 0:9b334a45a8ff 93 *a = *b;
bogdanm 0:9b334a45a8ff 94 *b = t;
bogdanm 0:9b334a45a8ff 95 }
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 99 uint32_t value;
bogdanm 0:9b334a45a8ff 100 #if ANALOGIN_MEDIAN_FILTER
bogdanm 0:9b334a45a8ff 101 uint32_t v1 = adc_read(obj);
bogdanm 0:9b334a45a8ff 102 uint32_t v2 = adc_read(obj);
bogdanm 0:9b334a45a8ff 103 uint32_t v3 = adc_read(obj);
bogdanm 0:9b334a45a8ff 104 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 105 order(&v2, &v3);
bogdanm 0:9b334a45a8ff 106 order(&v1, &v2);
bogdanm 0:9b334a45a8ff 107 value = v2;
bogdanm 0:9b334a45a8ff 108 #else
bogdanm 0:9b334a45a8ff 109 value = adc_read(obj);
bogdanm 0:9b334a45a8ff 110 #endif
bogdanm 0:9b334a45a8ff 111 return value;
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 115 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 116
bogdanm 0:9b334a45a8ff 117 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
bogdanm 0:9b334a45a8ff 118 }
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 float analogin_read(analogin_t *obj) {
bogdanm 0:9b334a45a8ff 121 uint32_t value = adc_read_u32(obj);
bogdanm 0:9b334a45a8ff 122 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 0:9b334a45a8ff 123 }