0x6d61726b / TextLCD

fixed compiler warnings

Fork of TextLCD by Wim Huiskamp

TextLCD.cpp@43:7f31a3a5e648, 2017-04-30 (annotated)

Committer:
0x6d61726b
Date:
Sun Apr 30 16:05:28 2017 +0000
Revision:
43:7f31a3a5e648
Parent:
42:7f270955a6b1 
display initialization for SSD1803 chipsets fixed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wim 37:ce348c002929 1 /* mbed TextLCD Library, for LCDs based on HD44780 controllers
simon 6:e4cb7ddee0d3 2 * Copyright (c) 2007-2010, sford, http://mbed.org
wim 14:0c32b66b14b8 3 * 2013, v01: WH, Added LCD types, fixed LCD address issues, added Cursor and UDCs
wim 14:0c32b66b14b8 4 * 2013, v02: WH, Added I2C and SPI bus interfaces
wim 15:b70ebfffb258 5 * 2013, v03: WH, Added support for LCD40x4 which uses 2 controllers
wim 18:bd65dc10f27f 6 * 2013, v04: WH, Added support for Display On/Off, improved 4bit bootprocess
wim 18:bd65dc10f27f 7 * 2013, v05: WH, Added support for 8x2B, added some UDCs
wim 19:c747b9e2e7b8 8 * 2013, v06: WH, Added support for devices that use internal DC/DC converters
wim 20:e0da005a777f 9 * 2013, v07: WH, Added support for backlight and include portdefinitions for LCD2004 Module from DFROBOT
wim 22:35742ec80c24 10 * 2014, v08: WH, Refactored in Base and Derived Classes to deal with mbed lib change regarding 'NC' defined pins
wim 25:6162b31128c9 11 * 2014, v09: WH/EO, Added Class for Native SPI controllers such as ST7032
wim 26:bd897a001012 12 * 2014, v10: WH, Added Class for Native I2C controllers such as ST7032i, Added support for MCP23008 I2C portexpander, Added support for Adafruit module
wim 30:033048611c01 13 * 2014, v11: WH, Added support for native I2C controllers such as PCF21XX, Improved the _initCtrl() method to deal with differences between all supported controllers
wim 32:59c4b8f648d4 14 * 2014, v12: WH, Added support for native I2C controller PCF2119 and native I2C/SPI controllers SSD1803, ST7036, added setContrast method (by JH1PJL) for supported devices (eg ST7032i)
wim 34:e5a0dcb43ecc 15 * 2014, v13: WH, Added support for controllers US2066/SSD1311 (OLED), added setUDCBlink() method for supported devices (eg SSD1803), fixed issue in setPower()
wim 34:e5a0dcb43ecc 16 * 2014, v14: WH, Added support for PT6314 (VFD), added setOrient() method for supported devices (eg SSD1803, US2066), added Double Height lines for supported devices,
wim 34:e5a0dcb43ecc 17 * added 16 UDCs for supported devices (eg PCF2103), moved UDC defines to TextLCD_UDC file, added TextLCD_Config.h for feature and footprint settings.
wim 35:311be6444a39 18 * 2014, v15: WH, Added AC780 support, added I2C expander modules, fixed setBacklight() for inverted logic modules. Fixed bug in LCD_SPI_N define
wim 36:9f5f86dfd44a 19 * 2014, v16: WH, Added ST7070 and KS0073 support, added setIcon(), clrIcon() and setInvert() method for supported devices
wim 37:ce348c002929 20 * 2015, v17: WH, Clean up low-level _writeCommand() and _writeData(), Added support for alternative fonttables (eg PCF21XX), Added ST7066_ACM controller for ACM1602 module
wim 38:cbe275b0b647 21 * 2015, v18: WH, Performance improvement I2C portexpander
wim 38:cbe275b0b647 22 * 2015, v19: WH, Fixed Adafruit I2C/SPI portexpander pinmappings, fixed SYDZ Backlight
wim 39:e9c2319de9c5 23 * 2015, v20: WH, Fixed occasional Init fail caused by insufficient wait time after ReturnHome command (0x02), Added defines to reduce memory footprint (eg LCD_ICON),
wim 40:d3496c3ea301 24 * Fixed and Added more fonttable support for PCF2119R_3V3, Added HD66712 controller.
wim 41:111ca62e8a59 25 * 2015, v21: WH, Added LCD32x2 defines and code, Fixed KS0073 DL=1 init for SPI, Added defines to reduce memory footprint (LCD_TWO_CTRL, LCD_CONTRAST, LCD_UTF8_FONT)
wim 41:111ca62e8a59 26 * Added SPLC792A controller, Added UTF8_2_LCD decode for Cyrilic font (By Andriy Ribalko). Added setFont()
simon 1:ac48b187213c 27 *
simon 1:ac48b187213c 28 * Permission is hereby granted, free of charge, to any person obtaining a copy
simon 1:ac48b187213c 29 * of this software and associated documentation files (the "Software"), to deal
simon 1:ac48b187213c 30 * in the Software without restriction, including without limitation the rights
simon 1:ac48b187213c 31 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
simon 1:ac48b187213c 32 * copies of the Software, and to permit persons to whom the Software is
simon 1:ac48b187213c 33 * furnished to do so, subject to the following conditions:
simon 1:ac48b187213c 34 *
simon 1:ac48b187213c 35 * The above copyright notice and this permission notice shall be included in
simon 1:ac48b187213c 36 * all copies or substantial portions of the Software.
simon 1:ac48b187213c 37 *
simon 1:ac48b187213c 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
simon 1:ac48b187213c 39 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
simon 1:ac48b187213c 40 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
simon 1:ac48b187213c 41 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
simon 1:ac48b187213c 42 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
simon 1:ac48b187213c 43 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
simon 1:ac48b187213c 44 * THE SOFTWARE.
simon 1:ac48b187213c 45 */
wim 34:e5a0dcb43ecc 46 #include "mbed.h"
simon 1:ac48b187213c 47 #include "TextLCD.h"
wim 34:e5a0dcb43ecc 48 #include "TextLCD_UDC.inc"
wim 41:111ca62e8a59 49 #include "TextLCD_UTF8.inc"
wim 34:e5a0dcb43ecc 50
wim 21:9eb628d9e164 51 /** Create a TextLCD_Base interface
wim 15:b70ebfffb258 52 *
wim 21:9eb628d9e164 53 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 54 * @param ctrl LCD controller (default = HD44780)
wim 15:b70ebfffb258 55 */
wim 21:9eb628d9e164 56 TextLCD_Base::TextLCD_Base(LCDType type, LCDCtrl ctrl) : _type(type), _ctrl(ctrl) {
wim 30:033048611c01 57
wim 30:033048611c01 58 // Extract LCDType data
wim 30:033048611c01 59
wim 41:111ca62e8a59 60 // Columns encoded in b15..b8
wim 41:111ca62e8a59 61 _nr_cols = (_type & LCD_T_COL_MSK) >> LCD_T_COL_SHFT;
wim 41:111ca62e8a59 62
wim 41:111ca62e8a59 63 // Rows encoded in b23..b16
wim 41:111ca62e8a59 64 _nr_rows = (_type & LCD_T_ROW_MSK) >> LCD_T_ROW_SHFT;
wim 41:111ca62e8a59 65
wim 41:111ca62e8a59 66 // Addressing mode encoded in b27..b24
wim 30:033048611c01 67 _addr_mode = _type & LCD_T_ADR_MSK;
wim 37:ce348c002929 68
wim 37:ce348c002929 69 // Font table, encoded in LCDCtrl
wim 39:e9c2319de9c5 70 _font = _ctrl & LCD_C_FNT_MSK;
wim 14:0c32b66b14b8 71 }
wim 14:0c32b66b14b8 72
wim 21:9eb628d9e164 73 /** Init the LCD Controller(s)
wim 21:9eb628d9e164 74 * Clear display
wim 36:9f5f86dfd44a 75 * @param _LCDDatalength dl sets the datalength of data/commands
wim 36:9f5f86dfd44a 76 * @return none
wim 21:9eb628d9e164 77 */
wim 36:9f5f86dfd44a 78 void TextLCD_Base::_init(_LCDDatalength dl) {
wim 38:cbe275b0b647 79
wim 38:cbe275b0b647 80 wait_ms(100); // Wait 100ms to ensure powered up
wim 15:b70ebfffb258 81
wim 41:111ca62e8a59 82 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 83 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 84 if(_type==LCD40x4) {
wim 30:033048611c01 85 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 36:9f5f86dfd44a 86 _initCtrl(dl); // Init 2nd controller
wim 15:b70ebfffb258 87 }
wim 41:111ca62e8a59 88 #endif
wim 15:b70ebfffb258 89
wim 15:b70ebfffb258 90 // Select and configure primary LCD controller
wim 27:22d5086f6ba6 91 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 36:9f5f86dfd44a 92 _initCtrl(dl); // Init primary controller
wim 28:30fa94f7341c 93
wim 32:59c4b8f648d4 94 // Clear whole display and Reset Cursor location
wim 32:59c4b8f648d4 95 // Note: This will make sure that some 3-line displays that skip topline of a 4-line configuration
wim 32:59c4b8f648d4 96 // are cleared and init cursor correctly.
wim 32:59c4b8f648d4 97 cls();
wim 15:b70ebfffb258 98 }
wim 15:b70ebfffb258 99
wim 21:9eb628d9e164 100 /** Init the LCD controller
wim 36:9f5f86dfd44a 101 * Set number of lines, fonttype, no cursor etc
wim 36:9f5f86dfd44a 102 * The controller is accessed in 4-bit parallel mode either directly via mbed pins or through I2C or SPI expander.
wim 36:9f5f86dfd44a 103 * Some controllers also support native I2C or SPI interfaces.
wim 36:9f5f86dfd44a 104 *
wim 41:111ca62e8a59 105 * @param _LCDDatalength dl sets the 4 or 8 bit datalength of data/commands. Required for some native serial modes that dont work when DL=0.
wim 36:9f5f86dfd44a 106 * @return none
wim 30:033048611c01 107 *
wim 30:033048611c01 108 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 21:9eb628d9e164 109 */
wim 36:9f5f86dfd44a 110 void TextLCD_Base::_initCtrl(_LCDDatalength dl) {
wim 32:59c4b8f648d4 111 int _bias_lines=0; // Set Bias and lines (Instr Set 1), temporary variable.
wim 32:59c4b8f648d4 112 int _lines=0; // Set lines (Ext Instr Set), temporary variable.
wim 36:9f5f86dfd44a 113
wim 26:bd897a001012 114 this->_setRS(false); // command mode
simon 1:ac48b187213c 115
wim 37:ce348c002929 116 if (dl == _LCD_DL_4) {
wim 37:ce348c002929 117 // The Controller could be in 8 bit mode (power-on reset) or in 4 bit mode (warm reboot) at this point.
wim 37:ce348c002929 118 // Follow this procedure to make sure the Controller enters the correct state. The hardware interface
wim 37:ce348c002929 119 // between the uP and the LCD can only write the 4 most significant bits (Most Significant Nibble, MSN).
wim 37:ce348c002929 120 // In 4 bit mode the LCD expects the MSN first, followed by the LSN.
wim 37:ce348c002929 121 //
wim 38:cbe275b0b647 122 // Current state: 8 bit mode | 4 bit mode, MSN is next | 4 bit mode, LSN is next
wim 37:ce348c002929 123 //-------------------------------------------------------------------------------------------------
wim 38:cbe275b0b647 124 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN), | set dummy LSN,
wim 38:cbe275b0b647 125 // remains in 8 bit mode | remains in 4 bit mode | remains in 4 bit mode
wim 37:ce348c002929 126 wait_ms(15); //
wim 37:ce348c002929 127
wim 38:cbe275b0b647 128 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set dummy LSN, | set 8bit mode (MSN),
wim 38:cbe275b0b647 129 // remains in 8 bit mode | change to 8 bit mode | remains in 4 bit mode
wim 37:ce348c002929 130 wait_ms(15); //
wim 33:900a94bc7585 131
wim 38:cbe275b0b647 132 _writeNibble(0x3); // set 8 bit mode (MSN) and dummy LSN, | set 8 bit mode (MSN) and dummy LSN, | set dummy LSN,
wim 38:cbe275b0b647 133 // remains in 8 bit mode | remains in 8 bit mode | change to 8 bit mode
wim 37:ce348c002929 134 wait_ms(15); //
wim 37:ce348c002929 135
wim 37:ce348c002929 136 // Controller is now in 8 bit mode
wim 37:ce348c002929 137
wim 37:ce348c002929 138 _writeNibble(0x2); // Change to 4-bit mode (MSN), the LSN is undefined dummy
wim 37:ce348c002929 139 wait_us(40); // most instructions take 40us
wim 37:ce348c002929 140
wim 37:ce348c002929 141 // Controller is now in 4-bit mode
wim 37:ce348c002929 142 // Note: 4/8 bit mode is ignored for most native SPI and I2C devices. They dont use the parallel bus.
wim 37:ce348c002929 143 // However, _writeNibble() method is void anyway for native SPI and I2C devices.
wim 38:cbe275b0b647 144 }
wim 38:cbe275b0b647 145 else {
wim 38:cbe275b0b647 146 // Reset in 8 bit mode, final Function set will follow
wim 38:cbe275b0b647 147 _writeCommand(0x30); // Function set 0 0 1 DL=1 N F x x
wim 39:e9c2319de9c5 148 wait_ms(1); // most instructions take 40us
wim 37:ce348c002929 149 }
wim 25:6162b31128c9 150
wim 29:a3663151aa65 151 // Device specific initialisations: DC/DC converter to generate VLCD or VLED, number of lines etc
wim 19:c747b9e2e7b8 152 switch (_ctrl) {
wim 32:59c4b8f648d4 153
wim 36:9f5f86dfd44a 154 case KS0073:
wim 36:9f5f86dfd44a 155 // Initialise Display configuration
wim 36:9f5f86dfd44a 156 switch (_type) {
wim 41:111ca62e8a59 157 // case LCD6x1:
wim 36:9f5f86dfd44a 158 case LCD8x1: //8x1 is a regular 1 line display
wim 41:111ca62e8a59 159 // case LCD8x2B: //8x1 is a 16x1 line display
wim 36:9f5f86dfd44a 160 case LCD12x1:
wim 36:9f5f86dfd44a 161 case LCD16x1:
wim 36:9f5f86dfd44a 162 case LCD20x1:
wim 36:9f5f86dfd44a 163 case LCD24x1:
wim 36:9f5f86dfd44a 164 // case LCD32x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 165 // case LCD40x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 166 // case LCD52x1: // EXT pin is High, extension driver needed
wim 41:111ca62e8a59 167 _function = dl | 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 168 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 169 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 170 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 171 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 172 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 173 // REV=0 (Reverse normal, special mode for KS0073)
wim 41:111ca62e8a59 174
wim 41:111ca62e8a59 175 _function_1 = dl | 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 176 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 177 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 178 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 179 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 180 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 181 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 182
wim 36:9f5f86dfd44a 183 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 41:111ca62e8a59 184 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 185 break;
wim 36:9f5f86dfd44a 186
wim 36:9f5f86dfd44a 187 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 188 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 189 case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 190 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 41:111ca62e8a59 191 // case LCD16x3D1: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 192 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 193 case LCD20x4D: // Special mode for KS0073, KS0078
wim 41:111ca62e8a59 194 _function = dl | 0x02; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 195 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 196 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 197 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 198 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 199 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 200 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 201
wim 41:111ca62e8a59 202 _function_1 = dl | 0x04; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 203 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 204 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 205 // N=0 (1-line mode), N=1 (2-line mode), dont care for 4 line mode
wim 41:111ca62e8a59 206 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 207 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 208 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 209
wim 36:9f5f86dfd44a 210 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 41:111ca62e8a59 211 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 212 break;
wim 36:9f5f86dfd44a 213
wim 41:111ca62e8a59 214 // case LCD6x2:
wim 41:111ca62e8a59 215 case LCD8x2:
wim 41:111ca62e8a59 216 case LCD16x2:
wim 41:111ca62e8a59 217 // case LCD16x1C:
wim 41:111ca62e8a59 218 case LCD20x2:
wim 41:111ca62e8a59 219 case LCD24x2:
wim 41:111ca62e8a59 220 case LCD32x2:
wim 41:111ca62e8a59 221 // All other LCD types are initialised as 2 Line displays
wim 41:111ca62e8a59 222 _function = dl | 0x0A; // Set function, 0 0 1 DL, N, RE(0), DH, REV
wim 41:111ca62e8a59 223 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 224 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 225 // N=1 (2-line mode), N=0 (1-line mode)
wim 41:111ca62e8a59 226 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 227 // DH=1 (Disp shift enable, special mode for KS0073)
wim 41:111ca62e8a59 228 // REV=0 (Reverse normal, special mode for KS0073)
wim 36:9f5f86dfd44a 229
wim 41:111ca62e8a59 230 _function_1 = dl | 0x0C; // Set function, 0 0 1 DL, N, RE(1), BE, LP (Ext Regs)
wim 41:111ca62e8a59 231 // Note: 4 bit mode is NOT ignored for native SPI !
wim 41:111ca62e8a59 232 // DL=1 (8 bits bus), DL=0 (4 bits bus)
wim 41:111ca62e8a59 233 // N=1 (2 line mode), N=0 (1-line mode)
wim 41:111ca62e8a59 234 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 41:111ca62e8a59 235 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0073)
wim 41:111ca62e8a59 236 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 237
wim 36:9f5f86dfd44a 238 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 239 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0073)
wim 36:9f5f86dfd44a 240 break;
wim 41:111ca62e8a59 241
wim 41:111ca62e8a59 242 default:
wim 41:111ca62e8a59 243 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 244 break;
wim 36:9f5f86dfd44a 245 } // switch type
wim 36:9f5f86dfd44a 246
wim 36:9f5f86dfd44a 247 // init special features
wim 36:9f5f86dfd44a 248 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 36:9f5f86dfd44a 249 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 250 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 251 // RE=1 (Ena Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 252 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0073)
wim 36:9f5f86dfd44a 253 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 36:9f5f86dfd44a 254
wim 36:9f5f86dfd44a 255 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 36:9f5f86dfd44a 256 // FW=0 (5-dot font, special mode for KS0073)
wim 36:9f5f86dfd44a 257 // BW=0 (Cur BW invert disable, special mode for KS0073)
wim 36:9f5f86dfd44a 258 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0073)
wim 36:9f5f86dfd44a 259
wim 36:9f5f86dfd44a 260 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 36:9f5f86dfd44a 261 // Dotscroll/Display shift enable (Special mode for KS0073)
wim 36:9f5f86dfd44a 262
wim 36:9f5f86dfd44a 263 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 36:9f5f86dfd44a 264 // Scroll quantity (Special mode for KS0073)
wim 36:9f5f86dfd44a 265
wim 36:9f5f86dfd44a 266 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 36:9f5f86dfd44a 267 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 36:9f5f86dfd44a 268 // N=0 (1 line mode), N=1 (2 line mode)
wim 36:9f5f86dfd44a 269 // RE=0 (Dis. Extended Regs, special mode for KS0073)
wim 36:9f5f86dfd44a 270 // DH=1 (Disp shift enable/disable, special mode for KS0073)
wim 36:9f5f86dfd44a 271 // REV=0 (Reverse/Normal, special mode for KS0073)
wim 36:9f5f86dfd44a 272 break; // case KS0073 Controller
wim 36:9f5f86dfd44a 273
wim 36:9f5f86dfd44a 274
wim 29:a3663151aa65 275 case KS0078:
wim 29:a3663151aa65 276 // Initialise Display configuration
wim 29:a3663151aa65 277 switch (_type) {
wim 29:a3663151aa65 278 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 279 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 280 // case LCD12x1:
wim 29:a3663151aa65 281 case LCD16x1:
wim 30:033048611c01 282 // case LCD20x1:
wim 29:a3663151aa65 283 case LCD24x1:
wim 41:111ca62e8a59 284 _function = dl | 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 285 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 286 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 287 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 288 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 289 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 290
wim 41:111ca62e8a59 291 _function_1 = dl | 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 292 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 293 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 294 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 295 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 296 // 0
wim 30:033048611c01 297
wim 32:59c4b8f648d4 298 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 299 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 300 break;
wim 29:a3663151aa65 301
wim 36:9f5f86dfd44a 302 // case LCD12x3D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 303 // case LCD12x3D1: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 304 // case LCD12x4D: // Special mode for KS0073, KS0078 and PCF21XX
wim 36:9f5f86dfd44a 305 // case LCD16x3D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 306 // case LCD16x4D: // Special mode for KS0073, KS0078
wim 36:9f5f86dfd44a 307 // case LCD20x4D: // Special mode for KS0073, KS0078
wim 30:033048611c01 308 // case LCD24x3D: // Special mode for KS0078
wim 30:033048611c01 309 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 310 case LCD24x4D: // Special mode for KS0078
wim 41:111ca62e8a59 311 _function = dl | 0x02; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 312 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 313 // N=0 (dont care for 4 line mode)
wim 32:59c4b8f648d4 314 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 315 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 316 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 317
wim 41:111ca62e8a59 318 _function_1 = dl | 0x04; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 319 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 320 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 321 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 322 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 323 // 0
wim 29:a3663151aa65 324
wim 32:59c4b8f648d4 325 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 326 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 30:033048611c01 327 break;
wim 33:900a94bc7585 328
wim 41:111ca62e8a59 329 // case LCD6x2:
wim 41:111ca62e8a59 330 case LCD8x2:
wim 41:111ca62e8a59 331 case LCD16x2:
wim 41:111ca62e8a59 332 // case LCD16x1C:
wim 41:111ca62e8a59 333 case LCD20x2:
wim 41:111ca62e8a59 334 case LCD24x2:
wim 41:111ca62e8a59 335 case LCD32x2:
wim 41:111ca62e8a59 336 case LCD40x2:
wim 30:033048611c01 337 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 41:111ca62e8a59 338 _function = dl | 0x0A; // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 339 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 340 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 341 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 342 // DH=1 (Disp shift enable, special mode for KS0078)
wim 32:59c4b8f648d4 343 // REV=0 (Reverse normal, special mode for KS0078)
wim 32:59c4b8f648d4 344
wim 41:111ca62e8a59 345 _function_1 = dl | 0x0C; // Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 346 // DL=0 (4 bits bus)
wim 32:59c4b8f648d4 347 // N=1 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 348 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 349 // BE=0 (Blink Enable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 350 // 0
wim 30:033048611c01 351
wim 32:59c4b8f648d4 352 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 353 // NW=0 (1,2 line), NW=1 (4 Line, special mode for KS0078)
wim 29:a3663151aa65 354 break;
wim 41:111ca62e8a59 355
wim 41:111ca62e8a59 356 default:
wim 41:111ca62e8a59 357 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 358 break;
wim 29:a3663151aa65 359 } // switch type
wim 29:a3663151aa65 360
wim 32:59c4b8f648d4 361 // init special features
wim 32:59c4b8f648d4 362 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE 0 (Ext Regs)
wim 32:59c4b8f648d4 363 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 364 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 365 // RE=1 (Ena Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 366 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for KS0078)
wim 32:59c4b8f648d4 367 // 0
wim 32:59c4b8f648d4 368
wim 32:59c4b8f648d4 369 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 32:59c4b8f648d4 370 // FW=0 (5-dot font, special mode for KS0078)
wim 32:59c4b8f648d4 371 // BW=0 (Cur BW invert disable, special mode for KS0078)
wim 32:59c4b8f648d4 372 // NW=0 (1,2 Line), NW=1 (4 line, special mode for KS0078)
wim 32:59c4b8f648d4 373
wim 32:59c4b8f648d4 374 _writeCommand(0x10); // Scroll/Shift set 0001 DS/HS4 DS/HS3 DS/HS2 DS/HS1 (Ext Regs)
wim 32:59c4b8f648d4 375 // Dotscroll/Display shift enable (Special mode for KS0078)
wim 32:59c4b8f648d4 376
wim 32:59c4b8f648d4 377 _writeCommand(0x80); // Scroll Quantity set 1 0 SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 (Ext Regs)
wim 32:59c4b8f648d4 378 // Scroll quantity (Special mode for KS0078)
wim 32:59c4b8f648d4 379
wim 32:59c4b8f648d4 380 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 32:59c4b8f648d4 381 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 32:59c4b8f648d4 382 // N=0 (1 line mode), N=1 (2 line mode)
wim 32:59c4b8f648d4 383 // RE=0 (Dis. Extended Regs, special mode for KS0078)
wim 32:59c4b8f648d4 384 // DH=1 (Disp shift enable/disable, special mode for KS0078)
wim 32:59c4b8f648d4 385 // REV=0 (Reverse/Normal, special mode for KS0078)
wim 29:a3663151aa65 386 break; // case KS0078 Controller
wim 29:a3663151aa65 387
wim 26:bd897a001012 388 case ST7032_3V3:
wim 26:bd897a001012 389 // ST7032 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 41:111ca62e8a59 390 // Note: very similar to SPLC792A
wim 26:bd897a001012 391 case ST7032_5V:
wim 32:59c4b8f648d4 392 // ST7032 controller: Disable Voltage booster for VLCD. VDD=5V
wim 41:111ca62e8a59 393
wim 29:a3663151aa65 394 // Initialise Display configuration
wim 29:a3663151aa65 395 switch (_type) {
wim 29:a3663151aa65 396 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 397 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 398 // case LCD12x1:
wim 29:a3663151aa65 399 case LCD16x1:
wim 30:033048611c01 400 // case LCD20x1:
wim 32:59c4b8f648d4 401 case LCD24x1:
wim 32:59c4b8f648d4 402 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 403 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 404 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 405 break;
wim 28:30fa94f7341c 406
wim 32:59c4b8f648d4 407 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 408 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 409 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 410 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 411 case LCD24x4D: // Special mode for KS0078
wim 32:59c4b8f648d4 412 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 413 break;
wim 29:a3663151aa65 414
wim 32:59c4b8f648d4 415 default:
wim 32:59c4b8f648d4 416 // All other LCD types are initialised as 2 Line displays
wim 32:59c4b8f648d4 417 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 32:59c4b8f648d4 418 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 419 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 420 break;
wim 32:59c4b8f648d4 421 } // switch type
wim 32:59c4b8f648d4 422
wim 32:59c4b8f648d4 423 // init special features
wim 33:900a94bc7585 424 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 33:900a94bc7585 425
wim 33:900a94bc7585 426 _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 41:111ca62e8a59 427 // Note: Bias and Osc register not available on SPLC792A
wim 32:59c4b8f648d4 428
wim 32:59c4b8f648d4 429 _contrast = LCD_ST7032_CONTRAST;
wim 32:59c4b8f648d4 430 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 32:59c4b8f648d4 431
wim 32:59c4b8f648d4 432
wim 32:59c4b8f648d4 433 if (_ctrl == ST7032_3V3) {
wim 41:111ca62e8a59 434 // _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 435 _icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 436 // Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim 32:59c4b8f648d4 437 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 438 }
wim 32:59c4b8f648d4 439 else {
wim 36:9f5f86dfd44a 440 // _icon_power = 0x00; // Icon display off, Booster circuit is turned off (IS=1)
wim 36:9f5f86dfd44a 441 _icon_power = 0x08; // Icon display on, Booster circuit is turned off (IS=1)
wim 32:59c4b8f648d4 442 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 443 }
wim 32:59c4b8f648d4 444 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 32:59c4b8f648d4 445 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 446
wim 32:59c4b8f648d4 447 _writeCommand(0x68 | (LCD_ST7032_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 32:59c4b8f648d4 448 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 449
wim 32:59c4b8f648d4 450 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 451
wim 32:59c4b8f648d4 452 break; // case ST7032_3V3 Controller
wim 32:59c4b8f648d4 453 // case ST7032_5V Controller
wim 32:59c4b8f648d4 454
wim 32:59c4b8f648d4 455 case ST7036_3V3:
wim 32:59c4b8f648d4 456 // ST7036 controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 457 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 458 case ST7036_5V:
wim 32:59c4b8f648d4 459 // ST7036 controller: Disable Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 460 // Note: supports 1,2 (LCD_T_A) or 3 lines (LCD_T_G)
wim 32:59c4b8f648d4 461
wim 32:59c4b8f648d4 462 // Initialise Display configuration
wim 32:59c4b8f648d4 463 switch (_type) {
wim 32:59c4b8f648d4 464 case LCD8x1: //8x1 is a regular 1 line display
wim 32:59c4b8f648d4 465 case LCD8x2B: //8x2D is a special case of 16x1
wim 32:59c4b8f648d4 466 // case LCD12x1:
wim 32:59c4b8f648d4 467 case LCD16x1:
wim 32:59c4b8f648d4 468 case LCD24x1:
wim 32:59c4b8f648d4 469 _function = 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), DH=0 (5x7font), IS2, IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 470 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 471 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 472
wim 32:59c4b8f648d4 473 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 474 break;
wim 32:59c4b8f648d4 475
wim 32:59c4b8f648d4 476 // case LCD12x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 477 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 478 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 479 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 480 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 481
wim 32:59c4b8f648d4 482 _bias_lines = 0x05; // Bias: 1/5, 3-Lines LCD
wim 32:59c4b8f648d4 483 break;
wim 32:59c4b8f648d4 484
wim 32:59c4b8f648d4 485 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 486 // case LCD16x3D1: // Special mode for SSD1803
wim 30:033048611c01 487 case LCD12x4D: // Special mode for PCF2116
wim 30:033048611c01 488 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 489 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 490 break;
wim 28:30fa94f7341c 491
wim 29:a3663151aa65 492 default:
wim 32:59c4b8f648d4 493 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 32:59c4b8f648d4 494 _function = 0x08; // Set function, 0 0 1 DL=0 (4-bit Databus), N=1 (2 Line), DH=0 (5x7font), IS2,IS1 (Select Instruction Set)
wim 32:59c4b8f648d4 495 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 32:59c4b8f648d4 496 // Saved to allow switch between Instruction sets at later time
wim 32:59c4b8f648d4 497
wim 32:59c4b8f648d4 498 _bias_lines = 0x04; // Bias: 1/5, 1 or 2-Lines LCD
wim 32:59c4b8f648d4 499 break;
wim 32:59c4b8f648d4 500 } // switch type
wim 32:59c4b8f648d4 501
wim 29:a3663151aa65 502
wim 32:59c4b8f648d4 503 // init special features
wim 33:900a94bc7585 504 _writeCommand(0x20 | _function | 0x01); // Set function, IS2,IS1 = 01 (Select Instr Set = 1)
wim 32:59c4b8f648d4 505 _writeCommand(0x10 | _bias_lines); // Set Bias and 1,2 or 3 lines (Instr Set 1)
wim 29:a3663151aa65 506
wim 32:59c4b8f648d4 507 _contrast = LCD_ST7036_CONTRAST;
wim 32:59c4b8f648d4 508 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast, 0 1 1 1 C3 C2 C1 C0 (Instr Set 1)
wim 32:59c4b8f648d4 509
wim 32:59c4b8f648d4 510 if (_ctrl == ST7036_3V3) {
wim 36:9f5f86dfd44a 511 _icon_power = 0x0C; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=1 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 512 // _icon_power = 0x04; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=1 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 513 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 514 }
wim 32:59c4b8f648d4 515 else {
wim 36:9f5f86dfd44a 516 _icon_power = 0x08; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=1 Bon=0 C5 C4 (Instr Set 1)
wim 36:9f5f86dfd44a 517 // _icon_power = 0x00; // Set Icon, Booster, Contrast High bits, 0 1 0 1 Ion=0 Bon=0 C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 518 }
wim 29:a3663151aa65 519
wim 32:59c4b8f648d4 520 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Contrast C5, C4 (Instr Set 1)
wim 32:59c4b8f648d4 521 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 522
wim 32:59c4b8f648d4 523 _writeCommand(0x68 | (LCD_ST7036_RAB & 0x07)); // Voltagefollower On = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 0 1 (Instr Set 1)
wim 32:59c4b8f648d4 524 wait_ms(10); // Wait 10ms to ensure powered up
wim 28:30fa94f7341c 525
wim 32:59c4b8f648d4 526 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instruction Set = 0)
wim 32:59c4b8f648d4 527
wim 32:59c4b8f648d4 528 break; // case ST7036_3V3 Controller
wim 32:59c4b8f648d4 529 // case ST7036_5V Controller
wim 36:9f5f86dfd44a 530
wim 36:9f5f86dfd44a 531 case ST7070:
wim 36:9f5f86dfd44a 532 // Initialise Display configuration
wim 36:9f5f86dfd44a 533 switch (_type) {
wim 36:9f5f86dfd44a 534 case LCD8x1: //8x1 is a regular 1 line display
wim 36:9f5f86dfd44a 535 case LCD8x2B: //8x2D is a special case of 16x1
wim 36:9f5f86dfd44a 536 // case LCD12x1:
wim 36:9f5f86dfd44a 537 case LCD16x1:
wim 36:9f5f86dfd44a 538 case LCD24x1:
wim 36:9f5f86dfd44a 539 _function = dl | 0x00; // Set function, 0 0 1 DL=0 (4-bit Databus), N=0 (1 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 540 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 541 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 542 break;
wim 36:9f5f86dfd44a 543
wim 36:9f5f86dfd44a 544 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 36:9f5f86dfd44a 545 // case LCD16x3D1: // Special mode for SSD1803
wim 36:9f5f86dfd44a 546 case LCD12x4D: // Special mode for PCF2116
wim 36:9f5f86dfd44a 547 case LCD24x4D: // Special mode for KS0078
wim 36:9f5f86dfd44a 548 // case LCD12x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 549 case LCD16x3G: // Special mode for ST7036
wim 36:9f5f86dfd44a 550 error("Error: LCD Controller type does not support this Display type\n\r");
wim 36:9f5f86dfd44a 551 break;
wim 36:9f5f86dfd44a 552
wim 36:9f5f86dfd44a 553 default:
wim 36:9f5f86dfd44a 554 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 36:9f5f86dfd44a 555 _function = dl | 0x08; // Set function, 0 0 1 DL, N=1 (2 Line), EXT=0, x, x
wim 36:9f5f86dfd44a 556 // Note: 4 bit mode is NOT ignored for native SPI !
wim 36:9f5f86dfd44a 557 // Saved to allow switch between Instruction sets at later time
wim 36:9f5f86dfd44a 558 break;
wim 36:9f5f86dfd44a 559 } // switch type
wim 36:9f5f86dfd44a 560
wim 36:9f5f86dfd44a 561 // _writeCommand(0x00); // NOP, make sure to sync SPI
wim 36:9f5f86dfd44a 562
wim 36:9f5f86dfd44a 563 // init special features
wim 36:9f5f86dfd44a 564 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 565
wim 36:9f5f86dfd44a 566 _writeCommand(0x04 | 0x00); // Set Bias resistors 0 0 0 0 0 1 Rb1,Rb0= 0 0 (Extern Res) (Instr Set 1)
wim 36:9f5f86dfd44a 567
wim 36:9f5f86dfd44a 568 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 569 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 570 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 571
wim 36:9f5f86dfd44a 572 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 573
wim 36:9f5f86dfd44a 574 break; // case ST7070 Controller
wim 36:9f5f86dfd44a 575
wim 32:59c4b8f648d4 576 case SSD1803_3V3:
0x6d61726b 43:7f31a3a5e648 577 // changes have been made according to the register description of SSD1803 Rev 2.0
0x6d61726b 43:7f31a3a5e648 578 // http://www.lcd-module.de/fileadmin/eng/pdf/zubehoer/ssd1803_2_0.pdf
0x6d61726b 43:7f31a3a5e648 579 // SSD1803 controller: Initialize Voltage booster for VLCD. VDD=3V3
wim 32:59c4b8f648d4 580 // Note: supports 1,2, 3 or 4 lines
wim 32:59c4b8f648d4 581 // case SSD1803_5V:
wim 32:59c4b8f648d4 582 // SSD1803 controller: No Voltage booster for VLCD. VDD=5V
wim 32:59c4b8f648d4 583
0x6d61726b 43:7f31a3a5e648 584 // Initialize Display configuration
wim 29:a3663151aa65 585 switch (_type) {
wim 29:a3663151aa65 586 case LCD8x1: //8x1 is a regular 1 line display
wim 30:033048611c01 587 case LCD8x2B: //8x2D is a special case of 16x1
wim 29:a3663151aa65 588 // case LCD12x1:
wim 29:a3663151aa65 589 case LCD16x1:
wim 29:a3663151aa65 590 case LCD24x1:
0x6d61726b 43:7f31a3a5e648 591 _function = 0x20; // Set function 0 0 1 DL N RE(0) DH REV
0x6d61726b 43:7f31a3a5e648 592 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 593 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 594 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 595 // N=0 1 Line / 3 Line
0x6d61726b 43:7f31a3a5e648 596 // DH=0 Double Height disable
0x6d61726b 43:7f31a3a5e648 597 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 598
0x6d61726b 43:7f31a3a5e648 599 _function_1 = 0x24; // Set function, 0 0 1 DL N RE(1) BE 0
0x6d61726b 43:7f31a3a5e648 600 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 601 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 602 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 603 // N=0 1 Line / 3 Line
0x6d61726b 43:7f31a3a5e648 604 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 605
0x6d61726b 43:7f31a3a5e648 606 _lines = 0x08; // Ext function set 0 0 0 0 1 FW BW NW
0x6d61726b 43:7f31a3a5e648 607 // FW=0 6-dot font width off
0x6d61726b 43:7f31a3a5e648 608 // BW=0 Black/White inversion at cursor position off
wim 32:59c4b8f648d4 609 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 610 break;
wim 32:59c4b8f648d4 611
wim 33:900a94bc7585 612 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 613 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 614 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 615 // case LCD16x3D1: // Special mode for SSD1803
wim 32:59c4b8f648d4 616 // case LCD20x3D: // Special mode for SSD1803
0x6d61726b 43:7f31a3a5e648 617 _function = 0x20; // Set function 0 0 1 DL N RE(0) DH REV
0x6d61726b 43:7f31a3a5e648 618 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 619 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 620 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 621 // N=0 1 Line / 3 Line
0x6d61726b 43:7f31a3a5e648 622 // DH=0 Double Height disable
0x6d61726b 43:7f31a3a5e648 623 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 624
0x6d61726b 43:7f31a3a5e648 625 _function_1 = 0x24; // Set function, 0 0 1 DL N RE(1) BE 0
0x6d61726b 43:7f31a3a5e648 626 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 627 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 628 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 629 // N=0 1 Line / 3 Line
0x6d61726b 43:7f31a3a5e648 630 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 631
0x6d61726b 43:7f31a3a5e648 632 _lines = 0x08; // Ext function set 0 0 0 0 1 FW BW NW
0x6d61726b 43:7f31a3a5e648 633 // FW=0 6-dot font width off
0x6d61726b 43:7f31a3a5e648 634 // BW=0 Black/White inversion at cursor position off
0x6d61726b 43:7f31a3a5e648 635 // NW=0 1-Line LCD (N=0)
wim 29:a3663151aa65 636 break;
wim 30:033048611c01 637
wim 39:e9c2319de9c5 638 // case LCD10x2D: // Special mode for SSD1803, 4-line mode but switch to double height font
wim 39:e9c2319de9c5 639 case LCD10x4D: // Special mode for SSD1803
0x6d61726b 43:7f31a3a5e648 640 case LCD20x4D: // Special mode for SSD1803 (register description according to SSD1803 Rev 2.0)
0x6d61726b 43:7f31a3a5e648 641 _function = 0x28; // Set function 0 0 1 DL N RE(0) DH REV
0x6d61726b 43:7f31a3a5e648 642 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 643 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 644 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 645 // N=1 4 Line mode when NW=1
0x6d61726b 43:7f31a3a5e648 646 // DH=0 Double Height disable
0x6d61726b 43:7f31a3a5e648 647 // REV=0 Reverse off, special feature of SSD1803
wim 32:59c4b8f648d4 648
0x6d61726b 43:7f31a3a5e648 649 _function_1 = 0x2C; // Set function, 0 0 1 DL N RE(1) BE 0
wim 32:59c4b8f648d4 650 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 651 // DL=0 4-bit data bus,
wim 32:59c4b8f648d4 652 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 653 // N=1 4 Line
wim 32:59c4b8f648d4 654 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 655
0x6d61726b 43:7f31a3a5e648 656 _lines = 0x09; // Ext function set 0 0 0 0 1 FW BW NW
0x6d61726b 43:7f31a3a5e648 657 // FW=0 6-dot font width off
0x6d61726b 43:7f31a3a5e648 658 // BW=0 Black/White inversion at cursor position off
wim 32:59c4b8f648d4 659 // NW=1 4-Line LCD (N=1)
wim 32:59c4b8f648d4 660 break;
wim 32:59c4b8f648d4 661
wim 33:900a94bc7585 662 case LCD16x3G: // Special mode for ST7036
wim 32:59c4b8f648d4 663 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 664 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 665 break;
wim 30:033048611c01 666
wim 29:a3663151aa65 667 default:
0x6d61726b 43:7f31a3a5e648 668 // All other LCD types are Initialized as 2 Line displays (including LCD16x1C and LCD40x4)
0x6d61726b 43:7f31a3a5e648 669 _function = 0x28; // Set function 0 0 1 DL N RE(0) DH REV
0x6d61726b 43:7f31a3a5e648 670 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 671 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 672 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 673 // N=1 4 Line mode when NW=1
0x6d61726b 43:7f31a3a5e648 674 // DH=0 Double Height disable
0x6d61726b 43:7f31a3a5e648 675 // REV=0 Reverse off, special feature of SSD1803
0x6d61726b 43:7f31a3a5e648 676
0x6d61726b 43:7f31a3a5e648 677 _function_1 = 0x2C; // Set function, 0 0 1 DL N RE(1) BE 0
0x6d61726b 43:7f31a3a5e648 678 // Saved to allow switch between Instruction sets at later time
0x6d61726b 43:7f31a3a5e648 679 // DL=0 4-bit data bus,
0x6d61726b 43:7f31a3a5e648 680 // Note: 4 bit mode is ignored for native SPI and I2C devices
0x6d61726b 43:7f31a3a5e648 681 // N=1 2 line / 4 Line
0x6d61726b 43:7f31a3a5e648 682 // BE=0 Blink Enable off, special feature of SSD1803
wim 32:59c4b8f648d4 683
0x6d61726b 43:7f31a3a5e648 684 _lines = 0x08; // Ext function set 0 0 0 0 1 FW BW NW
0x6d61726b 43:7f31a3a5e648 685 // FW=0 6-dot font width off
0x6d61726b 43:7f31a3a5e648 686 // BW=0 Black/White inversion at cursor position off
wim 32:59c4b8f648d4 687 // NW=0 2-Line LCD (N=1)
0x6d61726b 43:7f31a3a5e648 688
wim 32:59c4b8f648d4 689 break;
wim 32:59c4b8f648d4 690 } // switch type
wim 32:59c4b8f648d4 691
wim 32:59c4b8f648d4 692
wim 32:59c4b8f648d4 693 // init special features
wim 33:900a94bc7585 694 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 695 // Select Extended Instruction Set
wim 33:900a94bc7585 696
wim 33:900a94bc7585 697 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 698 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 699 wait_ms(5); // Wait to ensure completion or SSD1803 fails to set Top/Bottom after reset..
wim 33:900a94bc7585 700
wim 33:900a94bc7585 701 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 32:59c4b8f648d4 702
wim 32:59c4b8f648d4 703 _writeCommand(0x10); // Double Height and Bias, 0 0 0 1 UD2=0, UD1=0, BS1=0 Bias 1/5, DH=0 (Ext Instr Set)
wim 32:59c4b8f648d4 704
wim 32:59c4b8f648d4 705 // _writeCommand(0x76); // Set TC Control, 0 1 1 1 0 1 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 706 // _writeData(0x02); // Set TC data, 0 0 0 0 0 TC2,TC1,TC0 = 0 1 0 (Ext Instr Set)
wim 32:59c4b8f648d4 707
wim 32:59c4b8f648d4 708 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS=1 Select Instruction Set 1
wim 32:59c4b8f648d4 709 // Select Std Instr set, Select IS=1
wim 32:59c4b8f648d4 710
wim 32:59c4b8f648d4 711 _contrast = LCD_SSD1_CONTRAST;
wim 32:59c4b8f648d4 712 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast 0 1 1 1 C3, C2, C1, C0 (Instr Set 1)
wim 32:59c4b8f648d4 713
wim 36:9f5f86dfd44a 714 // _icon_power = 0x04; // Icon off, Booster on (Instr Set 1)
wim 36:9f5f86dfd44a 715 _icon_power = 0x0C; // Icon on, Booster on (Instr Set 1)
wim 32:59c4b8f648d4 716 // Saved to allow contrast change at later time
wim 32:59c4b8f648d4 717 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Power, Icon and Contrast, 0 1 0 1 Ion Bon C5 C4 (Instr Set 1)
wim 32:59c4b8f648d4 718 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 719
wim 32:59c4b8f648d4 720 _writeCommand(0x68 | (LCD_SSD1_RAB & 0x07)); // Set Voltagefollower 0 1 1 0 Don = 1, Ampl ratio Rab2, Rab1, Rab0 = 1 1 0 (Instr Set 1)
wim 32:59c4b8f648d4 721 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 722
wim 33:900a94bc7585 723 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 32:59c4b8f648d4 724 // Select Extended Instruction Set 1
wim 32:59c4b8f648d4 725 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set 1)
wim 32:59c4b8f648d4 726
wim 32:59c4b8f648d4 727
wim 32:59c4b8f648d4 728 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 32:59c4b8f648d4 729 // Select Std Instr set, Select IS=0
wim 32:59c4b8f648d4 730
wim 32:59c4b8f648d4 731 break; // case SSD1803 Controller
wim 32:59c4b8f648d4 732
wim 29:a3663151aa65 733
wim 32:59c4b8f648d4 734 // Note1: The PCF21XX family of controllers has several types that dont have an onboard voltage generator for V-LCD.
wim 32:59c4b8f648d4 735 // You must supply this LCD voltage externally and not try to enable VGen.
wim 32:59c4b8f648d4 736 // Note2: The early versions of PCF2116 controllers (eg PCF2116C) can not generate sufficiently negative voltage for the LCD at a VDD of 3V3.
wim 32:59c4b8f648d4 737 // You must supply this voltage externally and not enable VGen or you must use a higher VDD (e.g. 5V) and enable VGen.
wim 32:59c4b8f648d4 738 // More recent versions of the controller (eg PCF2116K) have an improved VGen that will work with 3V3.
wim 32:59c4b8f648d4 739 // Note3: See datasheet, PCF2116 and other types provide a V0 pin to control the LCD contrast voltage that is provided by VGen. This pins allows
wim 32:59c4b8f648d4 740 // contrast control similar to that of pin 3 on the standard 14pin LCD module connector.
wim 32:59c4b8f648d4 741 // You can disable VGen by connecting Vo to VDD. VLCD will then be used directly as LCD voltage.
wim 32:59c4b8f648d4 742 // Note4: PCF2113 and PCF2119 are different wrt to VLCD generator! There is no V0 pin. The contrast voltage is software controlled by setting the VA and VB registers.
wim 32:59c4b8f648d4 743 // Vgen is automatically switched off when the contrast voltage VA or VB is set to 0x00. Note that certain limits apply to allowed values for VA and VB.
wim 32:59c4b8f648d4 744 // Note5: See datasheet, members of the PCF21XX family support different numbers of rows/columns. Not all can support 3 or 4 rows.
wim 32:59c4b8f648d4 745 // Note6: See datasheet, the PCF21XX-C and PCF21XX-K use a non-standard character set. This may result is strange looking text when not corrected..
wim 32:59c4b8f648d4 746
wim 34:e5a0dcb43ecc 747 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 748 // PCF2103 controller: No Voltage generator for VLCD, VDD=3V3..5V, VLCD input controls contrast voltage.
wim 34:e5a0dcb43ecc 749 // Initialise Display configuration
wim 34:e5a0dcb43ecc 750 switch (_type) {
wim 34:e5a0dcb43ecc 751 case LCD24x1:
wim 34:e5a0dcb43ecc 752 _function = 0x00; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=0 1-line/24 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 753 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 754 break;
wim 34:e5a0dcb43ecc 755
wim 34:e5a0dcb43ecc 756 // case LCD12x1D: //Special mode for PCF21XX, Only top line used
wim 34:e5a0dcb43ecc 757 case LCD12x2:
wim 34:e5a0dcb43ecc 758 _function = 0x04; //FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/12 chars display mode, 0, H=0
wim 34:e5a0dcb43ecc 759 //Note: 4 bit mode is ignored for I2C mode
wim 34:e5a0dcb43ecc 760 break;
wim 34:e5a0dcb43ecc 761
wim 34:e5a0dcb43ecc 762 default:
wim 34:e5a0dcb43ecc 763 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 764 break;
wim 34:e5a0dcb43ecc 765
wim 34:e5a0dcb43ecc 766 } // switch type
wim 34:e5a0dcb43ecc 767
wim 34:e5a0dcb43ecc 768 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 769 wait_ms(10); // Wait 10ms to ensure powered up
wim 34:e5a0dcb43ecc 770
wim 34:e5a0dcb43ecc 771 // Note: Display from GA628 shows 12 chars. This is actually the right half of a 24x1 display. The commons have been connected in reverse order.
wim 34:e5a0dcb43ecc 772 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 773
wim 34:e5a0dcb43ecc 774 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 775 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no Icon blink), 0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 776
wim 34:e5a0dcb43ecc 777 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 778
wim 36:9f5f86dfd44a 779 #if(0)
wim 34:e5a0dcb43ecc 780 // Select CG RAM
wim 34:e5a0dcb43ecc 781 _writeCommand(0x40); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 782 // Store UDC/Icon pattern:
wim 34:e5a0dcb43ecc 783 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 34:e5a0dcb43ecc 784 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 34:e5a0dcb43ecc 785 for (int i=0; i<(8 * 8); i++) {
wim 34:e5a0dcb43ecc 786 // _writeData(0x1F); // All On
wim 34:e5a0dcb43ecc 787 _writeData(0x00); // All Off
wim 34:e5a0dcb43ecc 788 }
wim 36:9f5f86dfd44a 789 #endif
wim 34:e5a0dcb43ecc 790 break; // case PCF2103_3V3 Controller
wim 34:e5a0dcb43ecc 791
wim 30:033048611c01 792 case PCF2113_3V3:
wim 32:59c4b8f648d4 793 // PCF2113 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 29:a3663151aa65 794 // Initialise Display configuration
wim 29:a3663151aa65 795 switch (_type) {
wim 29:a3663151aa65 796 // case LCD12x1:
wim 33:900a94bc7585 797 // _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/12 chars display mode, SL=1, IS=0
wim 32:59c4b8f648d4 798 // Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 799 case LCD24x1:
wim 33:900a94bc7585 800 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=0 1-line/24 chars display mode, SL=0, IS=0
wim 32:59c4b8f648d4 801 // Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 802 break;
wim 30:033048611c01 803
wim 30:033048611c01 804 case LCD12x2:
wim 33:900a94bc7585 805 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4 bit, 0, M=1 2-line/12 chars display mode, SL=0, IS=0
wim 30:033048611c01 806 break;
wim 30:033048611c01 807
wim 30:033048611c01 808 default:
wim 30:033048611c01 809 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 810 break;
wim 30:033048611c01 811
wim 30:033048611c01 812 } // switch type
wim 30:033048611c01 813
wim 32:59c4b8f648d4 814 // Init special features
wim 33:900a94bc7585 815 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 33:900a94bc7585 816
wim 33:900a94bc7585 817 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 33:900a94bc7585 818 _writeCommand(0x10); // Temp Compensation Set 0001 0, 0, TC1=0, TC2=0 (Instr. Set 1)
wim 33:900a94bc7585 819 // _writeCommand(0x42); // HV GEN 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 33:900a94bc7585 820 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV Gen 0100 S1=1, S2=0 (2x multiplier) (Instr. Set 1)
wim 32:59c4b8f648d4 821
wim 32:59c4b8f648d4 822 _contrast = LCD_PCF2_CONTRAST;
wim 33:900a94bc7585 823 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=0, VA=contrast
wim 33:900a94bc7585 824 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) 1, V=1, VB=contrast
wim 32:59c4b8f648d4 825 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 826
wim 33:900a94bc7585 827 _writeCommand(0x02); // Screen Config 0000 001, L=0 (Instr. Set 1)
wim 33:900a94bc7585 828 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=0 (no icon blink) DM=0 (no direct mode) (Instr. Set 1)
wim 33:900a94bc7585 829
wim 33:900a94bc7585 830 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 32:59c4b8f648d4 831
wim 30:033048611c01 832 break; // case PCF2113_3V3 Controller
wim 30:033048611c01 833
wim 30:033048611c01 834
wim 32:59c4b8f648d4 835 // case PCF2113_5V:
wim 32:59c4b8f648d4 836 // PCF2113 controller: No Voltage generator for VLCD. VDD=5V. Contrast voltage controlled by VA or VB.
wim 32:59c4b8f648d4 837 //@TODO
wim 32:59c4b8f648d4 838
wim 30:033048611c01 839
wim 30:033048611c01 840 case PCF2116_3V3:
wim 32:59c4b8f648d4 841 // PCF2116 controller: Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 30:033048611c01 842 // Initialise Display configuration
wim 30:033048611c01 843 switch (_type) {
wim 30:033048611c01 844 // case LCD12x1:
wim 30:033048611c01 845 // case LCD12x2:
wim 30:033048611c01 846 case LCD24x1:
wim 34:e5a0dcb43ecc 847 _writeCommand(0x22); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=1 Vgen on, 0
wim 29:a3663151aa65 848 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 849 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 850 break;
wim 29:a3663151aa65 851
wim 32:59c4b8f648d4 852 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 853 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 854 case LCD12x4D: // Special mode for PCF21XX:
wim 34:e5a0dcb43ecc 855 _writeCommand(0x2E); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 856 //Note: 4 bit mode is ignored for I2C mode
wim 29:a3663151aa65 857 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 858 break;
wim 30:033048611c01 859
wim 30:033048611c01 860 case LCD24x2:
wim 34:e5a0dcb43ecc 861 _writeCommand(0x2A); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=0 2-line/24 chars display mode, G=1 VGen on, 0
wim 29:a3663151aa65 862 //Note: 4 bit mode is ignored for I2C mode
wim 30:033048611c01 863 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 864 break;
wim 32:59c4b8f648d4 865
wim 30:033048611c01 866 default:
wim 30:033048611c01 867 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 868 break;
wim 30:033048611c01 869
wim 29:a3663151aa65 870 } // switch type
wim 29:a3663151aa65 871
wim 30:033048611c01 872 break; // case PCF2116_3V3 Controller
wim 29:a3663151aa65 873
wim 32:59c4b8f648d4 874
wim 32:59c4b8f648d4 875 //Experimental for cellphone 3-line display, SA=0x74, No Ack supported, Character set C or K, DL = 8 bit, N=0,M=1 (reserved mode !!), external VLCD -2V5
wim 32:59c4b8f648d4 876 //@TODO
wim 32:59c4b8f648d4 877 case PCF2116_5V:
wim 32:59c4b8f648d4 878 // PCF2116 controller: No Voltage generator for VLCD. VDD=5V. V0 controls contrast voltage.
wim 32:59c4b8f648d4 879 // Initialise Display configuration
wim 32:59c4b8f648d4 880 switch (_type) {
wim 32:59c4b8f648d4 881 // case LCD12x1:
wim 32:59c4b8f648d4 882 // case LCD12x2:
wim 32:59c4b8f648d4 883 // case LCD24x1:
wim 34:e5a0dcb43ecc 884 // _writeCommand(0x20); //FUNCTION SET 0 0 1 DL=0 4-bit, N=0/M=0 1-line/24 chars display mode, G=0 no Vgen, 0
wim 32:59c4b8f648d4 885 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 886 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 887 // break;
wim 32:59c4b8f648d4 888
wim 32:59c4b8f648d4 889 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 890 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 891 case LCD12x4D: // Special mode for PCF21XX:
wim 32:59c4b8f648d4 892 // _writeCommand(0x34); //FUNCTION SET 8 bit, N=0/M=1 4-line/12 chars display mode OK
wim 32:59c4b8f648d4 893 // _writeCommand(0x24); //FUNCTION SET 4 bit, N=0/M=1 4-line/12 chars display mode OK
wim 34:e5a0dcb43ecc 894 _writeCommand(0x2C); //FUNCTION SET 0 0 1 DL=0 4-bit, N=1/M=1 4-line/12 chars display mode, G=0 no Vgen, 0 OK
wim 32:59c4b8f648d4 895 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 896 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 897 break;
wim 32:59c4b8f648d4 898
wim 32:59c4b8f648d4 899 // case LCD24x2:
wim 32:59c4b8f648d4 900 // _writeCommand(0x28); //FUNCTION SET 4 bit, N=1/M=0 2-line/24 chars display mode
wim 32:59c4b8f648d4 901 //Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 902 // wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 903 // break;
wim 32:59c4b8f648d4 904
wim 32:59c4b8f648d4 905 default:
wim 32:59c4b8f648d4 906 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 907 break;
wim 32:59c4b8f648d4 908
wim 32:59c4b8f648d4 909 } // switch type
wim 32:59c4b8f648d4 910
wim 32:59c4b8f648d4 911 break; // case PCF2116_5V Controller
wim 32:59c4b8f648d4 912
wim 32:59c4b8f648d4 913 case PCF2119_3V3:
wim 39:e9c2319de9c5 914 case PCF2119R_3V3:
wim 32:59c4b8f648d4 915 // PCF2119 controller: Initialise Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 916 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 917 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 32:59c4b8f648d4 918
wim 32:59c4b8f648d4 919 //POR or Hardware Reset should be applied
wim 32:59c4b8f648d4 920 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 921
wim 32:59c4b8f648d4 922 // Initialise Display configuration
wim 32:59c4b8f648d4 923 switch (_type) {
wim 32:59c4b8f648d4 924 case LCD8x1:
wim 32:59c4b8f648d4 925 // case LCD12x1:
wim 32:59c4b8f648d4 926 case LCD16x1:
wim 34:e5a0dcb43ecc 927 _function = 0x02; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/16 chars display mode, SL=1
wim 32:59c4b8f648d4 928 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 929 break;
wim 32:59c4b8f648d4 930
wim 32:59c4b8f648d4 931 case LCD24x1:
wim 32:59c4b8f648d4 932 // case LCD32x1:
wim 34:e5a0dcb43ecc 933 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 4-bit, 0 , M=0 1-line/32 chars display mode, SL=0
wim 32:59c4b8f648d4 934 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 935 break;
wim 32:59c4b8f648d4 936
wim 32:59c4b8f648d4 937 case LCD8x2:
wim 32:59c4b8f648d4 938 // case LCD12x2:
wim 32:59c4b8f648d4 939 case LCD16x2:
wim 34:e5a0dcb43ecc 940 _function = 0x04; // FUNCTION SET 0 0 1 DL=0 4-bit, 0, M=1 2-line/16 chars display mode, SL=0
wim 32:59c4b8f648d4 941 // Note: 4 bit mode is ignored for I2C mode
wim 32:59c4b8f648d4 942 break;
wim 32:59c4b8f648d4 943
wim 32:59c4b8f648d4 944 default:
wim 32:59c4b8f648d4 945 error("Error: LCD Controller type does not support this Display type\n\r");
wim 32:59c4b8f648d4 946 break;
wim 32:59c4b8f648d4 947
wim 32:59c4b8f648d4 948 } // switch type
wim 32:59c4b8f648d4 949
wim 32:59c4b8f648d4 950 // Init special features
wim 32:59c4b8f648d4 951 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 952
wim 39:e9c2319de9c5 953 // _writeCommand(0x04); // DISP CONF SET (Instr. Set 1) 0000, 0, 1, P=0, Q=0 (IC at Bottom)
wim 39:e9c2319de9c5 954 // _writeCommand(0x05); // Display Conf Set 0000, 0, 1, P=0, Q=1
wim 39:e9c2319de9c5 955 // _writeCommand(0x06); // Display Conf Set 0000, 0, 1, P=1, Q=0
wim 39:e9c2319de9c5 956 _writeCommand(0x07); // Display Conf Set 0000, 0, 1, P=1, Q=1 (IC at Top)
wim 39:e9c2319de9c5 957
wim 32:59c4b8f648d4 958 _writeCommand(0x10); // TEMP CTRL SET (Instr. Set 1) 0001, 0, 0, TC1=0, TC2=0
wim 32:59c4b8f648d4 959 // _writeCommand(0x42); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 960 _writeCommand(0x40 | (LCD_PCF2_S12 & 0x03)); // HV GEN (Instr. Set 1) 0100, 0, 0, S1=1, S2=0 (2x multiplier)
wim 32:59c4b8f648d4 961
wim 32:59c4b8f648d4 962 _contrast = LCD_PCF2_CONTRAST;
wim 32:59c4b8f648d4 963 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 964 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 965 wait_ms(10); // Wait 10ms to ensure powered up
wim 32:59c4b8f648d4 966
wim 32:59c4b8f648d4 967 _writeCommand(0x02); // SCRN CONF (Instr. Set 1) L=0
wim 32:59c4b8f648d4 968 _writeCommand(0x08); // ICON CONF (Instr. Set 1) IM=0 (Char mode) IB=0 (no icon blink) DM=0 (no direct mode)
wim 32:59c4b8f648d4 969
wim 32:59c4b8f648d4 970 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 971
wim 32:59c4b8f648d4 972 break; // case PCF2119_3V3 Controller
wim 32:59c4b8f648d4 973
wim 32:59c4b8f648d4 974 // case PCF2119_5V:
wim 32:59c4b8f648d4 975 // PCF2119 controller: No Voltage booster for VLCD. VDD=3V3. VA and VB control contrast.
wim 32:59c4b8f648d4 976 // Note1: See datasheet, the PCF2119 supports icons and provides separate constrast control for Icons and characters.
wim 32:59c4b8f648d4 977 // Note2: Vgen is switched off when the contrast voltage VA or VB is set to 0x00.
wim 30:033048611c01 978 //@TODO
wim 29:a3663151aa65 979
wim 19:c747b9e2e7b8 980 case WS0010:
wim 19:c747b9e2e7b8 981 // WS0010 OLED controller: Initialise DC/DC Voltage converter for LEDs
wim 30:033048611c01 982 // Note1: Identical to RS0010
wim 30:033048611c01 983 // Note2: supports 1 or 2 lines (and 16x100 graphics)
wim 30:033048611c01 984 // supports 4 fonts (English/Japanese (default), Western European-I, English/Russian, Western European-II)
wim 19:c747b9e2e7b8 985 // Cursor/Disp shift set 0001 SC RL 0 0
wim 19:c747b9e2e7b8 986 //
wim 30:033048611c01 987 // Mode and Power set 0001 GC PWR 1 1
wim 19:c747b9e2e7b8 988 // GC = 0 (Graph Mode=1, Char Mode=0)
wim 30:033048611c01 989 // PWR = 1 (DC/DC On/Off)
wim 30:033048611c01 990
wim 30:033048611c01 991 //@Todo: This may be needed to enable a warm reboot
wim 32:59c4b8f648d4 992 //_writeCommand(0x13); // Char mode, DC/DC off
wim 30:033048611c01 993 //wait_ms(10); // Wait 10ms to ensure powered down
wim 32:59c4b8f648d4 994 _writeCommand(0x17); // Char mode, DC/DC on
wim 30:033048611c01 995 wait_ms(10); // Wait 10ms to ensure powered up
wim 29:a3663151aa65 996
wim 29:a3663151aa65 997 // Initialise Display configuration
wim 29:a3663151aa65 998 switch (_type) {
wim 29:a3663151aa65 999 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1000 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1001 // case LCD12x1:
wim 29:a3663151aa65 1002 case LCD16x1:
wim 30:033048611c01 1003 case LCD24x1:
wim 30:033048611c01 1004 _writeCommand(0x20); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 1005 // DL=0 (4 bits bus)
wim 30:033048611c01 1006 // N=0 (1 line)
wim 30:033048611c01 1007 // F=0 (5x7 dots font)
wim 30:033048611c01 1008 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 1009 break;
wim 30:033048611c01 1010
wim 32:59c4b8f648d4 1011 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1012 case LCD12x3D1: // Special mode for PCF21XX
wim 32:59c4b8f648d4 1013 case LCD12x4D: // Special mode for PCF21XX:
wim 33:900a94bc7585 1014 case LCD16x3G: // Special mode for ST7036
wim 30:033048611c01 1015 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1016 error("Error: LCD Controller type does not support this Display type\n\r");
wim 29:a3663151aa65 1017 break;
wim 29:a3663151aa65 1018
wim 29:a3663151aa65 1019 default:
wim 30:033048611c01 1020 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 30:033048611c01 1021 _writeCommand(0x28); // Function set 001 DL N F FT1 FT0
wim 30:033048611c01 1022 // DL=0 (4 bits bus)
wim 30:033048611c01 1023 // N=1 (2 lines)
wim 30:033048611c01 1024 // F=0 (5x7 dots font)
wim 30:033048611c01 1025 // FT=00 (00 = Engl/Jap, 01 = WestEur1, 10 = Engl/Russian, 11 = WestEur2
wim 30:033048611c01 1026
wim 29:a3663151aa65 1027 break;
wim 29:a3663151aa65 1028 } // switch type
wim 29:a3663151aa65 1029
wim 32:59c4b8f648d4 1030 break; // case WS0010 Controller
wim 33:900a94bc7585 1031
wim 33:900a94bc7585 1032
wim 33:900a94bc7585 1033 case US2066_3V3:
wim 33:900a94bc7585 1034 // US2066/SSD1311 OLED controller, Initialise for VDD=3V3
wim 33:900a94bc7585 1035 // Note: supports 1,2, 3 or 4 lines
wim 33:900a94bc7585 1036 // case USS2066_5V:
wim 33:900a94bc7585 1037 // US2066 controller, VDD=5V
wim 33:900a94bc7585 1038
wim 33:900a94bc7585 1039 // Initialise Display configuration
wim 33:900a94bc7585 1040 switch (_type) {
wim 33:900a94bc7585 1041 case LCD8x1: //8x1 is a regular 1 line display
wim 33:900a94bc7585 1042 case LCD8x2B: //8x2D is a special case of 16x1
wim 33:900a94bc7585 1043 // case LCD12x1:
wim 33:900a94bc7585 1044 case LCD16x1:
wim 33:900a94bc7585 1045 // case LCD20x1:
wim 33:900a94bc7585 1046 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1047 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1048 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1049 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1050 // DH=0 Double Height disable
wim 33:900a94bc7585 1051 // IS=0
wim 33:900a94bc7585 1052
wim 33:900a94bc7585 1053 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1054 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1055 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1056 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1057 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1058 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1059
wim 33:900a94bc7585 1060 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1061 // NW=0 1-Line LCD (N=0)
wim 33:900a94bc7585 1062 break;
wim 33:900a94bc7585 1063
wim 33:900a94bc7585 1064 case LCD16x1C:
wim 33:900a94bc7585 1065 case LCD8x2:
wim 33:900a94bc7585 1066 case LCD16x2:
wim 33:900a94bc7585 1067 case LCD20x2:
wim 33:900a94bc7585 1068 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1069 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1070 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1071 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1072 // DH=0 Double Height disable
wim 33:900a94bc7585 1073 // IS=0
wim 33:900a94bc7585 1074
wim 33:900a94bc7585 1075 _function_1 = 0x0A; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1076 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1077 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1078 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1079 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1080 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1081
wim 33:900a94bc7585 1082 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1083 // NW=0 2-Line LCD (N=1)
wim 33:900a94bc7585 1084 break;
wim 33:900a94bc7585 1085
wim 33:900a94bc7585 1086 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1087 // case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 33:900a94bc7585 1088 case LCD16x3D: // Special mode for KS0078, SSD1803 and US2066
wim 33:900a94bc7585 1089 // case LCD16x3D1: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1090 // case LCD20x3D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1091 _function = 0x00; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1092 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1093 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1094 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1095 // DH=0 Double Height disable
wim 33:900a94bc7585 1096 // IS=0
wim 33:900a94bc7585 1097
wim 33:900a94bc7585 1098 _function_1 = 0x02; // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1099 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1100 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1101 // N=0 1 Line / 3 Line
wim 33:900a94bc7585 1102 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1103 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1104
wim 33:900a94bc7585 1105 _lines = 0x00; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1106 // NW=1 3-Line LCD (N=0)
wim 33:900a94bc7585 1107 break;
wim 33:900a94bc7585 1108
wim 33:900a94bc7585 1109 case LCD20x4D: // Special mode for SSD1803, US2066
wim 33:900a94bc7585 1110 _function = 0x08; // Set function 0 0 1 X N DH RE(0) IS
wim 33:900a94bc7585 1111 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1112 // DL=X bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1113 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1114 // DH=0 Double Height disable
wim 33:900a94bc7585 1115 // IS=0
wim 33:900a94bc7585 1116
wim 33:900a94bc7585 1117 _function_1 = 0x0A; // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 1118 // Saved to allow switch between Instruction sets at later time
wim 33:900a94bc7585 1119 // DL=0 bit is ignored for US2066. Uses hardwired pins instead
wim 33:900a94bc7585 1120 // N=1 2 line / 4 Line
wim 33:900a94bc7585 1121 // BE=0 Blink Enable off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1122 // REV=0 Reverse off, special feature of SSD1803, US2066
wim 33:900a94bc7585 1123
wim 33:900a94bc7585 1124 _lines = 0x01; // Ext function set 0 0 0 0 1 FW BW NW
wim 33:900a94bc7585 1125 // NW=1 4-Line LCD (N=1)
wim 33:900a94bc7585 1126 break;
wim 33:900a94bc7585 1127
wim 33:900a94bc7585 1128 // case LCD24x1:
wim 33:900a94bc7585 1129 // case LCD16x3G: // Special mode for ST7036
wim 33:900a94bc7585 1130 // case LCD24x4D: // Special mode for KS0078
wim 33:900a94bc7585 1131 default:
wim 33:900a94bc7585 1132 error("Error: LCD Controller type does not support this Display type\n\r");
wim 33:900a94bc7585 1133 break;
wim 33:900a94bc7585 1134
wim 33:900a94bc7585 1135 } // switch type
wim 33:900a94bc7585 1136
wim 34:e5a0dcb43ecc 1137 _writeCommand(0x00); // NOP, make sure to sync SPI
wim 33:900a94bc7585 1138
wim 33:900a94bc7585 1139 // init special features
wim 33:900a94bc7585 1140 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1141 // Select Extended Instruction Set
wim 33:900a94bc7585 1142
wim 33:900a94bc7585 1143 _writeCommand(0x71); // Function Select A: 0 1 1 1 0 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1144 _writeData(0x00); // Disable Internal VDD
wim 33:900a94bc7585 1145
wim 33:900a94bc7585 1146 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1147
wim 33:900a94bc7585 1148 _writeCommand(0xD5); // Display Clock Divide Ratio: 1 1 0 1 0 1 0 1 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1149 _writeCommand(0x70); // Display Clock Divide Ratio value: 0 1 1 1 0 0 0 0 (Ext Instr Set, OLED Instr Set)
wim 33:900a94bc7585 1150
wim 33:900a94bc7585 1151 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1152
wim 33:900a94bc7585 1153 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 1154 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 1155
wim 33:900a94bc7585 1156 _writeCommand(0x08 | _lines); // Set ext function 0 0 0 0 1 FW BW NW 1,2,3 or 4 lines (Ext Instr Set)
wim 33:900a94bc7585 1157
wim 34:e5a0dcb43ecc 1158 // _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 33:900a94bc7585 1159 // // Default
wim 33:900a94bc7585 1160
wim 33:900a94bc7585 1161 _writeCommand(0x72); // Function Select B: 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 33:900a94bc7585 1162 _writeData(0x01); // Select ROM A (CGRAM 8, CGROM 248)
wim 33:900a94bc7585 1163
wim 33:900a94bc7585 1164 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 1165
wim 33:900a94bc7585 1166 _writeCommand(0xDA); // Set Segm Pins Config: 1 1 0 1 1 0 1 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1167 _writeCommand(0x10); // Set Segm Pins Config value: Altern Odd/Even, Disable Remap (Ext Instr Set, OLED)
wim 33:900a94bc7585 1168
wim 33:900a94bc7585 1169 _writeCommand(0xDC); // Function Select C: 1 1 0 1 1 1 0 0 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1170 // _writeCommand(0x00); // Set internal VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1171 _writeCommand(0x80); // Set external VSL, GPIO pin HiZ (always read low)
wim 33:900a94bc7585 1172
wim 33:900a94bc7585 1173 _contrast = LCD_US20_CONTRAST;
wim 33:900a94bc7585 1174 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1175 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits, use 6 bits for compatibility
wim 33:900a94bc7585 1176
wim 33:900a94bc7585 1177 _writeCommand(0xD9); // Set Phase Length: 1 1 0 1 1 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1178 _writeCommand(0xF1); // Set Phase Length Value:
wim 33:900a94bc7585 1179
wim 33:900a94bc7585 1180 _writeCommand(0xDB); // Set VCOMH Deselect Lvl: 1 1 0 1 1 0 1 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 1181 _writeCommand(0x30); // Set VCOMH Deselect Value: 0.83 x VCC
wim 33:900a94bc7585 1182
wim 33:900a94bc7585 1183 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 1184
wim 33:900a94bc7585 1185 //Test Fade/Blinking. Hard Blink on/off, No fade in/out ??
wim 33:900a94bc7585 1186 // _writeCommand(0x23); // Set (Ext Instr Set, OLED)
wim 33:900a94bc7585 1187 // _writeCommand(0x3F); // Set interval 128 frames
wim 33:900a94bc7585 1188 //End Test Blinking
wim 33:900a94bc7585 1189
wim 33:900a94bc7585 1190 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 1191
wim 33:900a94bc7585 1192 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 X N DH RE(0) IS=1 Select Instruction Set 1
wim 33:900a94bc7585 1193 // Select Std Instr set, Select IS=1
wim 33:900a94bc7585 1194
wim 33:900a94bc7585 1195 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 1196 // Select Ext Instr Set, IS=1
wim 33:900a94bc7585 1197 _writeCommand(0x10); // Shift/Scroll enable, 0 0 0 1 DS4/HS4 DS3/HS3 DS2/HS2 DS1/HS1 (Ext Instr Set, IS=1)
wim 33:900a94bc7585 1198
wim 33:900a94bc7585 1199 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 1200 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 1201 break; // case US2066/SSD1311 Controller
wim 33:900a94bc7585 1202
wim 34:e5a0dcb43ecc 1203 //not yet tested on hardware
wim 34:e5a0dcb43ecc 1204 case PT6314 :
wim 34:e5a0dcb43ecc 1205 // Initialise Display configuration
wim 34:e5a0dcb43ecc 1206 switch (_type) {
wim 34:e5a0dcb43ecc 1207 case LCD8x1: //8x1 is a regular 1 line display
wim 34:e5a0dcb43ecc 1208 case LCD8x2B: //8x2B is a special case of 16x1
wim 34:e5a0dcb43ecc 1209 // case LCD12x1:
wim 34:e5a0dcb43ecc 1210 case LCD16x1:
wim 34:e5a0dcb43ecc 1211 case LCD20x1:
wim 34:e5a0dcb43ecc 1212 case LCD24x1:
wim 34:e5a0dcb43ecc 1213 _function = 0x00; // Function set 001 DL N X BR1 BR0
wim 34:e5a0dcb43ecc 1214 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1215 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1216 // N=0 (1 line)
wim 34:e5a0dcb43ecc 1217 // X
wim 34:e5a0dcb43ecc 1218 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1219 // BR0=0
wim 34:e5a0dcb43ecc 1220 // 0x0 = 100%
wim 34:e5a0dcb43ecc 1221 // 0x1 = 75%
wim 34:e5a0dcb43ecc 1222 // 0x2 = 50%
wim 34:e5a0dcb43ecc 1223 // 0x3 = 25%
wim 34:e5a0dcb43ecc 1224
wim 34:e5a0dcb43ecc 1225 break;
wim 34:e5a0dcb43ecc 1226
wim 34:e5a0dcb43ecc 1227 // All other valid LCD types are initialised as 2 Line displays
wim 34:e5a0dcb43ecc 1228 case LCD8x2:
wim 34:e5a0dcb43ecc 1229 case LCD16x2:
wim 34:e5a0dcb43ecc 1230 case LCD20x2:
wim 34:e5a0dcb43ecc 1231 case LCD24x2:
wim 34:e5a0dcb43ecc 1232 _function = 0x08; // Function set 001 DL N X BR1 BR2
wim 34:e5a0dcb43ecc 1233 // DL=0 (4 bits bus)
wim 34:e5a0dcb43ecc 1234 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 34:e5a0dcb43ecc 1235 // N=1 (2 lines)
wim 34:e5a0dcb43ecc 1236 // X
wim 34:e5a0dcb43ecc 1237 // BR1=0 (2 significant bits for brightness
wim 34:e5a0dcb43ecc 1238 // BR0=0
wim 34:e5a0dcb43ecc 1239 break;
wim 34:e5a0dcb43ecc 1240
wim 34:e5a0dcb43ecc 1241 default:
wim 34:e5a0dcb43ecc 1242 error("Error: LCD Controller type does not support this Display type\n\r");
wim 34:e5a0dcb43ecc 1243 break;
wim 34:e5a0dcb43ecc 1244 } // switch type
wim 34:e5a0dcb43ecc 1245
wim 34:e5a0dcb43ecc 1246 _contrast = LCD_PT63_CONTRAST;
wim 34:e5a0dcb43ecc 1247 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 34:e5a0dcb43ecc 1248 break; // case PT6314 Controller (VFD)
wim 39:e9c2319de9c5 1249
wim 39:e9c2319de9c5 1250
wim 39:e9c2319de9c5 1251 case HD66712:
wim 39:e9c2319de9c5 1252 // Initialise Display configuration
wim 39:e9c2319de9c5 1253 switch (_type) {
wim 39:e9c2319de9c5 1254 case LCD8x1: //8x1 is a regular 1 line display
wim 39:e9c2319de9c5 1255 case LCD12x1:
wim 39:e9c2319de9c5 1256 case LCD16x1:
wim 39:e9c2319de9c5 1257 case LCD20x1:
wim 39:e9c2319de9c5 1258 case LCD24x1:
wim 39:e9c2319de9c5 1259 // case LCD32x1: // EXT pin is High, extension driver needed
wim 40:d3496c3ea301 1260 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1261 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1262 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1263 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1264 //
wim 39:e9c2319de9c5 1265
wim 39:e9c2319de9c5 1266 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1267 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1268 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1269 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1270 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1271 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1272
wim 39:e9c2319de9c5 1273 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1274 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1275 break;
wim 39:e9c2319de9c5 1276
wim 40:d3496c3ea301 1277 // case LCD12x3D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1278 // case LCD12x3D1: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 39:e9c2319de9c5 1279 case LCD12x4D: // Special mode for KS0073, KS0078, PCF21XX and HD66712
wim 40:d3496c3ea301 1280 // case LCD16x3D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1281 // case LCD16x4D: // Special mode for KS0073, KS0078 and HD66712
wim 39:e9c2319de9c5 1282 case LCD20x4D: // Special mode for KS0073, KS0078 and HD66712
wim 40:d3496c3ea301 1283 _function = 0x02; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1284 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1285 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1286 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1287 //
wim 39:e9c2319de9c5 1288
wim 39:e9c2319de9c5 1289 _function_1 = 0x04; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1290 // DL=0 (4 bits bus)
wim 40:d3496c3ea301 1291 // N=0 (1-line mode, N=1 2-line mode)
wim 40:d3496c3ea301 1292 // RE=1 (Ena Extended Regs; special mode for HD66712)
wim 40:d3496c3ea301 1293 // BE=0 (Blink Enable, CG/SEG RAM; special mode for HD66712)
wim 40:d3496c3ea301 1294 // LP=0 (LP=1 Low power mode, LP=0 Normal; special mode for HD66712)
wim 39:e9c2319de9c5 1295
wim 39:e9c2319de9c5 1296 _function_x = 0x01; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1297 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1298 break;
wim 39:e9c2319de9c5 1299
wim 39:e9c2319de9c5 1300 case LCD16x3G: // Special mode for ST7036
wim 39:e9c2319de9c5 1301 // case LCD24x3D: // Special mode for KS0078
wim 39:e9c2319de9c5 1302 // case LCD24x3D1: // Special mode for KS0078
wim 39:e9c2319de9c5 1303 case LCD24x4D: // Special mode for KS0078
wim 39:e9c2319de9c5 1304 error("Error: LCD Controller type does not support this Display type\n\r");
wim 39:e9c2319de9c5 1305 break;
wim 39:e9c2319de9c5 1306
wim 39:e9c2319de9c5 1307 default:
wim 39:e9c2319de9c5 1308 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 40:d3496c3ea301 1309 _function = 0x0A; // Function set 001 DL N RE(0) - - (Std Regs)
wim 39:e9c2319de9c5 1310 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1311 // N=1 (2-line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1312 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 39:e9c2319de9c5 1313
wim 39:e9c2319de9c5 1314 _function_1 = 0x0C; // Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1315 // DL=0 (4 bits bus)
wim 39:e9c2319de9c5 1316 // N=1 (2 line mode), N=0 (1-line mode)
wim 40:d3496c3ea301 1317 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1318 // BE=0 (Blink Enable, CG/SEG RAM, special mode for HD66712)
wim 40:d3496c3ea301 1319 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1320
wim 39:e9c2319de9c5 1321 _function_x = 0x00; // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1322 // NW=0 (1,2 line), NW=1 (4 Line, special mode for HD66712)
wim 39:e9c2319de9c5 1323 break;
wim 39:e9c2319de9c5 1324 } // switch type
wim 39:e9c2319de9c5 1325
wim 39:e9c2319de9c5 1326 // init special features
wim 39:e9c2319de9c5 1327 _writeCommand(0x20 | _function_1);// Function set 001 DL N RE(1) BE LP (Ext Regs)
wim 39:e9c2319de9c5 1328 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1329 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1330 // RE=1 (Ena Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1331 // BE=0 (Blink Enable/Disable, CG/SEG RAM, special mode for HD66712)
wim 39:e9c2319de9c5 1332 // LP=0 (LP=1 Low power mode, LP=0 Normal)
wim 39:e9c2319de9c5 1333
wim 39:e9c2319de9c5 1334 _writeCommand(0x08 | _function_x); // Ext Function set 0000 1 FW BW NW (Ext Regs)
wim 40:d3496c3ea301 1335 // FW=0 (5-dot font, special mode for HD66712)
wim 40:d3496c3ea301 1336 // BW=0 (Cur BW invert disable, special mode for HD66712)
wim 40:d3496c3ea301 1337 // NW=0 (1,2 Line), NW=1 (4 line, special mode for HD66712)
wim 40:d3496c3ea301 1338
wim 40:d3496c3ea301 1339 _writeCommand(0x10); // Scroll/Shift set 0001 HS4 HS3 HS2 HS1 (Ext Regs)
wim 40:d3496c3ea301 1340 // Dotscroll/Display shift enable (Special mode for HD66712)
wim 40:d3496c3ea301 1341
wim 40:d3496c3ea301 1342 _writeCommand(0x80); // Scroll Quantity set 1 0 HDS5 HDS4 HDS3 HDS2 HDS1 HDS0 (Ext Regs)
wim 40:d3496c3ea301 1343 // Scroll quantity (Special mode for HD66712)
wim 39:e9c2319de9c5 1344
wim 39:e9c2319de9c5 1345 _writeCommand(0x20 | _function); // Function set 001 DL N RE(0) DH REV (Std Regs)
wim 39:e9c2319de9c5 1346 // DL=0 (4 bits bus), DL=1 (8 bits mode)
wim 39:e9c2319de9c5 1347 // N=0 (1 line mode), N=1 (2 line mode)
wim 40:d3496c3ea301 1348 // RE=0 (Dis. Extended Regs, special mode for HD66712)
wim 40:d3496c3ea301 1349 // DH=1 (Disp shift enable/disable, special mode for HD66712)
wim 40:d3496c3ea301 1350 // REV=0 (Reverse/Normal, special mode for HD66712)
wim 39:e9c2319de9c5 1351 break; // case HD66712 Controller
wim 39:e9c2319de9c5 1352
wim 41:111ca62e8a59 1353 case SPLC792A_3V3:
wim 41:111ca62e8a59 1354 // SPLC792A controller: Initialise Voltage booster for VLCD. VDD=3V3
wim 41:111ca62e8a59 1355 // Note very similar to ST7032
wim 41:111ca62e8a59 1356
wim 41:111ca62e8a59 1357 // Initialise Display configuration
wim 41:111ca62e8a59 1358 switch (_type) {
wim 41:111ca62e8a59 1359 case LCD8x1: //8x1 is a regular 1 line display
wim 41:111ca62e8a59 1360 case LCD8x2B: //8x2B is a special case of 16x1
wim 41:111ca62e8a59 1361 // case LCD12x1:
wim 41:111ca62e8a59 1362 case LCD16x1:
wim 41:111ca62e8a59 1363 // case LCD20x1:
wim 41:111ca62e8a59 1364 case LCD24x1:
wim 41:111ca62e8a59 1365 _function = 0x00; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=0 (1-line display mode), F=0 (5*7dot), 0, IS
wim 41:111ca62e8a59 1366 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 41:111ca62e8a59 1367 // Saved to allow switch between Instruction sets at later time
wim 41:111ca62e8a59 1368 break;
wim 41:111ca62e8a59 1369
wim 41:111ca62e8a59 1370 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1371 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1372 case LCD12x4D: // Special mode for KS0078 and PCF21XX
wim 41:111ca62e8a59 1373 case LCD16x3G: // Special mode for ST7036
wim 41:111ca62e8a59 1374 case LCD24x4D: // Special mode for KS0078
wim 41:111ca62e8a59 1375 error("Error: LCD Controller type does not support this Display type\n\r");
wim 41:111ca62e8a59 1376 break;
wim 41:111ca62e8a59 1377
wim 41:111ca62e8a59 1378 default:
wim 41:111ca62e8a59 1379 // All other LCD types are initialised as 2 Line displays
wim 41:111ca62e8a59 1380 _function = 0x08; // FUNCTION SET 0 0 1 DL=0 (4 bit), N=1 (2-line display mode), F=0 (5*7dot), 0, IS
wim 41:111ca62e8a59 1381 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 41:111ca62e8a59 1382 // Saved to allow switch between Instruction sets at later time
wim 41:111ca62e8a59 1383 break;
wim 41:111ca62e8a59 1384 } // switch type
wim 41:111ca62e8a59 1385
wim 41:111ca62e8a59 1386 // init special features
wim 41:111ca62e8a59 1387 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 41:111ca62e8a59 1388
wim 41:111ca62e8a59 1389 //SPLC792A Does not support Bias and Internal Osc register
wim 41:111ca62e8a59 1390 // _writeCommand(0x1C); // Internal OSC frequency adjustment Framefreq=183HZ, Bias will be 1/4 (Instr Set=1)
wim 41:111ca62e8a59 1391
wim 41:111ca62e8a59 1392 _contrast = LCD_SPLC792A_CONTRAST;
wim 41:111ca62e8a59 1393 _writeCommand(0x70 | (_contrast & 0x0F)); // Set Contrast Low bits, 0 1 1 1 C3 C2 C1 C0 (IS=1)
wim 41:111ca62e8a59 1394
wim 41:111ca62e8a59 1395
wim 41:111ca62e8a59 1396 // _icon_power = 0x04; // Icon display off (Bit3=0), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 1397 _icon_power = 0x0C; // Icon display on (Bit3=1), Booster circuit is turned on (Bit2=1) (IS=1)
wim 41:111ca62e8a59 1398 // Note: Booster circuit always on for SPLC792A, Bit2 is dont care
wim 41:111ca62e8a59 1399 // Saved to allow contrast change at later time
wim 41:111ca62e8a59 1400
wim 41:111ca62e8a59 1401 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Set Icon, Booster and Contrast High bits, 0 1 0 1 Ion Bon C5 C4 (IS=1)
wim 41:111ca62e8a59 1402 wait_ms(10); // Wait 10ms to ensure powered up
wim 41:111ca62e8a59 1403
wim 41:111ca62e8a59 1404 _writeCommand(0x68 | (LCD_SPLC792A_RAB & 0x07)); // Voltage follower, 0 1 1 0 FOn=1, Ampl ratio Rab2=1, Rab1=0, Rab0=0 (IS=1)
wim 41:111ca62e8a59 1405 // Note: Follower circuit always on for SPLC792A, Bit3 is dont care
wim 41:111ca62e8a59 1406 wait_ms(10); // Wait 10ms to ensure powered up
wim 41:111ca62e8a59 1407
wim 41:111ca62e8a59 1408 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 41:111ca62e8a59 1409
wim 41:111ca62e8a59 1410 break; // case SPLC792A_3V3 Controller
wim 41:111ca62e8a59 1411
wim 37:ce348c002929 1412 case ST7066_ACM: // ST7066 4/8 bit, I2C on ACM1602 using a PIC
wim 19:c747b9e2e7b8 1413 default:
wim 32:59c4b8f648d4 1414 // Devices fully compatible to HD44780 that do not use any DC/DC Voltage converters but external VLCD, no icons etc
wim 10:dd9b3a696acd 1415
wim 29:a3663151aa65 1416 // Initialise Display configuration
wim 29:a3663151aa65 1417 switch (_type) {
wim 29:a3663151aa65 1418 case LCD8x1: //8x1 is a regular 1 line display
wim 29:a3663151aa65 1419 case LCD8x2B: //8x2B is a special case of 16x1
wim 29:a3663151aa65 1420 // case LCD12x1:
wim 29:a3663151aa65 1421 case LCD16x1:
wim 30:033048611c01 1422 // case LCD20x1:
wim 29:a3663151aa65 1423 case LCD24x1:
wim 30:033048611c01 1424 // case LCD40x1:
wim 32:59c4b8f648d4 1425 _function = 0x00; // Function set 001 DL N F - -
wim 29:a3663151aa65 1426 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1427 // N=0 (1 line)
wim 29:a3663151aa65 1428 // F=0 (5x7 dots font)
wim 29:a3663151aa65 1429 break;
wim 29:a3663151aa65 1430
wim 32:59c4b8f648d4 1431 case LCD12x3D: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1432 case LCD12x3D1: // Special mode for KS0078 and PCF21XX
wim 32:59c4b8f648d4 1433 case LCD12x4D: // Special mode for KS0078 and PCF21XX:
wim 33:900a94bc7585 1434 case LCD16x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1435 // case LCD16x3D1: // Special mode for KS0078
wim 30:033048611c01 1436 // case LCD24x3D: // Special mode for KS0078
wim 32:59c4b8f648d4 1437 // case LCD24x3D1: // Special mode for KS0078
wim 30:033048611c01 1438 case LCD24x4D: // Special mode for KS0078
wim 30:033048611c01 1439 error("Error: LCD Controller type does not support this Display type\n\r");
wim 30:033048611c01 1440 break;
wim 30:033048611c01 1441
wim 30:033048611c01 1442 // All other LCD types are initialised as 2 Line displays (including LCD16x1C and LCD40x4)
wim 29:a3663151aa65 1443 default:
wim 32:59c4b8f648d4 1444 _function = 0x08; // Function set 001 DL N F - -
wim 29:a3663151aa65 1445 // DL=0 (4 bits bus)
wim 29:a3663151aa65 1446 // Note: 4 bit mode is ignored for native SPI and I2C devices
wim 29:a3663151aa65 1447 // N=1 (2 lines)
wim 29:a3663151aa65 1448 // F=0 (5x7 dots font, only option for 2 line display)
wim 32:59c4b8f648d4 1449 // - (Don't care)
wim 29:a3663151aa65 1450 break;
wim 29:a3663151aa65 1451 } // switch type
wim 10:dd9b3a696acd 1452
wim 34:e5a0dcb43ecc 1453 _writeCommand(0x20 | _function);
wim 29:a3663151aa65 1454 break; // case default Controller
wim 29:a3663151aa65 1455
wim 34:e5a0dcb43ecc 1456 } // switch Controller specific initialisations
wim 10:dd9b3a696acd 1457
wim 30:033048611c01 1458 // Controller general initialisations
wim 39:e9c2319de9c5 1459 // _writeCommand(0x01); // Clear Display and set cursor to 0
wim 32:59c4b8f648d4 1460 // wait_ms(10); // The CLS command takes 1.64 ms.
wim 32:59c4b8f648d4 1461 // // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1462
wim 39:e9c2319de9c5 1463 _writeCommand(0x02); // Cursor Home, DDRAM Address to Origin
wim 39:e9c2319de9c5 1464 wait_ms(10); // The Return Home command takes 1.64 ms.
wim 39:e9c2319de9c5 1465 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 28:30fa94f7341c 1466
wim 28:30fa94f7341c 1467 _writeCommand(0x06); // Entry Mode 0000 0 1 I/D S
wim 13:24506ba22480 1468 // Cursor Direction and Display Shift
wim 28:30fa94f7341c 1469 // I/D=1 (Cur incr)
wim 28:30fa94f7341c 1470 // S=0 (No display shift)
wim 10:dd9b3a696acd 1471
wim 29:a3663151aa65 1472 _writeCommand(0x14); // Cursor or Display shift 0001 S/C R/L x x
wim 29:a3663151aa65 1473 // S/C=0 Cursor moves
wim 29:a3663151aa65 1474 // R/L=1 Right
wim 29:a3663151aa65 1475 //
wim 29:a3663151aa65 1476
wim 13:24506ba22480 1477 // _writeCommand(0x0C); // Display Ctrl 0000 1 D C B
wim 17:652ab113bc2e 1478 // // Display On, Cursor Off, Blink Off
wim 36:9f5f86dfd44a 1479
wim 39:e9c2319de9c5 1480 // setCursor(CurOff_BlkOff);
wim 39:e9c2319de9c5 1481 setCursor(CurOn_BlkOff);
wim 21:9eb628d9e164 1482 setMode(DispOn);
simon 1:ac48b187213c 1483 }
simon 1:ac48b187213c 1484
wim 8:03116f75b66e 1485
wim 21:9eb628d9e164 1486 /** Clear the screen, Cursor home.
wim 39:e9c2319de9c5 1487 * Note: The whole display is initialised to charcode 0x20, which may not be a 'space' on some controllers with a
wim 39:e9c2319de9c5 1488 * different fontset such as the PCF2116C or PCF2119R. In this case you should fill the display with 'spaces'.
wim 21:9eb628d9e164 1489 */
wim 21:9eb628d9e164 1490 void TextLCD_Base::cls() {
wim 15:b70ebfffb258 1491
wim 41:111ca62e8a59 1492 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 1493 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 1494 if(_type==LCD40x4) {
wim 21:9eb628d9e164 1495 _ctrl_idx=_LCDCtrl_1; // Select 2nd controller
wim 15:b70ebfffb258 1496
wim 15:b70ebfffb258 1497 // Second LCD controller Cursor always Off
wim 21:9eb628d9e164 1498 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 15:b70ebfffb258 1499
wim 15:b70ebfffb258 1500 // Second LCD controller Clearscreen
wim 27:22d5086f6ba6 1501 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1502 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1503 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1504
wim 21:9eb628d9e164 1505 _ctrl_idx=_LCDCtrl_0; // Select primary controller
wim 15:b70ebfffb258 1506 }
wim 41:111ca62e8a59 1507
wim 15:b70ebfffb258 1508
wim 15:b70ebfffb258 1509 // Primary LCD controller Clearscreen
wim 27:22d5086f6ba6 1510 _writeCommand(0x01); // cls, and set cursor to 0
wim 39:e9c2319de9c5 1511 wait_ms(20); // The CLS command takes 1.64 ms.
wim 29:a3663151aa65 1512 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 15:b70ebfffb258 1513
wim 15:b70ebfffb258 1514 // Restore cursormode on primary LCD controller when needed
wim 15:b70ebfffb258 1515 if(_type==LCD40x4) {
wim 17:652ab113bc2e 1516 _setCursorAndDisplayMode(_currentMode,_currentCursor);
wim 15:b70ebfffb258 1517 }
wim 41:111ca62e8a59 1518
wim 41:111ca62e8a59 1519 #else
wim 41:111ca62e8a59 1520 // Support only one LCD controller
wim 41:111ca62e8a59 1521 _writeCommand(0x01); // cls, and set cursor to 0
wim 41:111ca62e8a59 1522 wait_ms(20); // The CLS command takes 1.64 ms.
wim 41:111ca62e8a59 1523 // Since we are not using the Busy flag, Lets be safe and take 10 ms
wim 41:111ca62e8a59 1524 #endif
wim 15:b70ebfffb258 1525
wim 29:a3663151aa65 1526 setAddress(0, 0); // Reset Cursor location
wim 32:59c4b8f648d4 1527 // Note: This is needed because some displays (eg PCF21XX) don't use line 0 in the '3 Line' mode.
simon 1:ac48b187213c 1528 }
simon 1:ac48b187213c 1529
wim 29:a3663151aa65 1530 /** Locate cursor to a screen column and row
wim 29:a3663151aa65 1531 *
wim 29:a3663151aa65 1532 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1533 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1534 */
wim 21:9eb628d9e164 1535 void TextLCD_Base::locate(int column, int row) {
wim 15:b70ebfffb258 1536
wim 15:b70ebfffb258 1537 // setAddress() does all the heavy lifting:
wim 15:b70ebfffb258 1538 // check column and row sanity,
wim 15:b70ebfffb258 1539 // switch controllers for LCD40x4 if needed
wim 15:b70ebfffb258 1540 // switch cursor for LCD40x4 if needed
wim 15:b70ebfffb258 1541 // set the new memory address to show cursor at correct location
wim 32:59c4b8f648d4 1542 setAddress(column, row);
wim 15:b70ebfffb258 1543 }
wim 30:033048611c01 1544
wim 15:b70ebfffb258 1545
wim 21:9eb628d9e164 1546 /** Write a single character (Stream implementation)
wim 21:9eb628d9e164 1547 */
wim 21:9eb628d9e164 1548 int TextLCD_Base::_putc(int value) {
wim 15:b70ebfffb258 1549 int addr;
wim 15:b70ebfffb258 1550
wim 15:b70ebfffb258 1551 if (value == '\n') {
wim 15:b70ebfffb258 1552 //No character to write
wim 15:b70ebfffb258 1553
wim 15:b70ebfffb258 1554 //Update Cursor
wim 15:b70ebfffb258 1555 _column = 0;
wim 15:b70ebfffb258 1556 _row++;
wim 15:b70ebfffb258 1557 if (_row >= rows()) {
wim 15:b70ebfffb258 1558 _row = 0;
wim 15:b70ebfffb258 1559 }
wim 15:b70ebfffb258 1560 }
wim 15:b70ebfffb258 1561 else {
wim 37:ce348c002929 1562 //Character to write
wim 41:111ca62e8a59 1563
wim 41:111ca62e8a59 1564 #if (LCD_DEF_FONT == 1) //Default HD44780 font
wim 37:ce348c002929 1565 _writeData(value);
wim 41:111ca62e8a59 1566 #elif (LCD_C_FONT == 1) || (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim 41:111ca62e8a59 1567 _writeData(ASCII_2_LCD(value));
wim 41:111ca62e8a59 1568 #elif (LCD_UTF8_FONT == 1) // UTF8 2 byte font (eg Cyrillic)
wim 41:111ca62e8a59 1569 // value = UTF_2_LCD(value, utf_seq_rec_first_cyr, utf_seq_recode_cyr, &utf_rnd_recode_cyr[0][0]);
wim 41:111ca62e8a59 1570 value = UTF_2_LCD(value);
wim 41:111ca62e8a59 1571 if (value >= 0) {
wim 41:111ca62e8a59 1572 _writeData(value);
wim 41:111ca62e8a59 1573
wim 41:111ca62e8a59 1574 // Only increment cursor when there is something to write
wim 41:111ca62e8a59 1575 // Continue below to closing bracket...
wim 37:ce348c002929 1576 #else
wim 41:111ca62e8a59 1577 _writeData('?'); //Oops, no font defined
wim 41:111ca62e8a59 1578 #endif
wim 41:111ca62e8a59 1579
wim 15:b70ebfffb258 1580 //Update Cursor
wim 15:b70ebfffb258 1581 _column++;
wim 15:b70ebfffb258 1582 if (_column >= columns()) {
wim 15:b70ebfffb258 1583 _column = 0;
wim 15:b70ebfffb258 1584 _row++;
wim 15:b70ebfffb258 1585 if (_row >= rows()) {
wim 15:b70ebfffb258 1586 _row = 0;
wim 15:b70ebfffb258 1587 }
wim 41:111ca62e8a59 1588 }
wim 41:111ca62e8a59 1589
wim 41:111ca62e8a59 1590 #if (LCD_DEF_FONT == 1) //Default HD44780 font
wim 41:111ca62e8a59 1591
wim 41:111ca62e8a59 1592 #elif (LCD_C_FONT == 1) || (LCD_R_FONT == 1) //PCF21xxC or PCF21xxR font
wim 41:111ca62e8a59 1593
wim 41:111ca62e8a59 1594 #elif (LCD_UTF8_FONT == 1) //UTF8 2 byte font (eg Cyrillic)
wim 41:111ca62e8a59 1595 // Continue code above to close bracket...
wim 41:111ca62e8a59 1596 } // if (value >= 0) {..
wim 41:111ca62e8a59 1597 #else
wim 41:111ca62e8a59 1598
wim 41:111ca62e8a59 1599 #endif
wim 41:111ca62e8a59 1600
wim 15:b70ebfffb258 1601 } //else
wim 15:b70ebfffb258 1602
wim 15:b70ebfffb258 1603 //Set next memoryaddress, make sure cursor blinks at next location
wim 15:b70ebfffb258 1604 addr = getAddress(_column, _row);
wim 15:b70ebfffb258 1605 _writeCommand(0x80 | addr);
wim 15:b70ebfffb258 1606
wim 15:b70ebfffb258 1607 return value;
wim 15:b70ebfffb258 1608 }
wim 15:b70ebfffb258 1609
wim 15:b70ebfffb258 1610
wim 16:c276b75e6585 1611 // get a single character (Stream implementation)
wim 21:9eb628d9e164 1612 int TextLCD_Base::_getc() {
simon 1:ac48b187213c 1613 return -1;
simon 1:ac48b187213c 1614 }
simon 1:ac48b187213c 1615
wim 41:111ca62e8a59 1616
wim 41:111ca62e8a59 1617 #if ((LCD_C_FONT == 1) || (LCD_R_FONT == 1)) //PCF21xxC or PCF21xxR font
wim 37:ce348c002929 1618 /** Convert ASCII character code to the LCD fonttable code
wim 37:ce348c002929 1619 *
wim 37:ce348c002929 1620 * @param c The character to write to the display
wim 37:ce348c002929 1621 * @return The character code for the specific fonttable of the controller
wim 37:ce348c002929 1622 */
wim 37:ce348c002929 1623 int TextLCD_Base::ASCII_2_LCD (int c) {
wim 37:ce348c002929 1624
wim 41:111ca62e8a59 1625 //LCD_C_F0 is default for HD44780 and compatible series
wim 41:111ca62e8a59 1626 // if (_font == LCD_C_F0) return c;
wim 41:111ca62e8a59 1627
wim 41:111ca62e8a59 1628 //LCD_C_FC for PCF21XXC series
wim 41:111ca62e8a59 1629 //LCD_C_FR for PCF21XXR series
wim 39:e9c2319de9c5 1630 //Used code from Suga koubou library for PCF2119K and PCF2119R
wim 37:ce348c002929 1631 if (((c >= ' ') && (c <= '?')) || ((c >= 'A') && (c <= 'Z')) || ((c >= 'a') && (c <= 'z'))) {
wim 37:ce348c002929 1632 c |= 0x80;
wim 39:e9c2319de9c5 1633 } else if (c >= 0xF0 && c <= 0xFF) {
wim 41:111ca62e8a59 1634 c &= 0x0F;
wim 37:ce348c002929 1635 }
wim 37:ce348c002929 1636 return c;
wim 37:ce348c002929 1637 }
wim 41:111ca62e8a59 1638 #endif
wim 41:111ca62e8a59 1639
wim 41:111ca62e8a59 1640 #if(LCD_UTF8_FONT == 1)
wim 41:111ca62e8a59 1641
wim 41:111ca62e8a59 1642 /** Convert UTF8 2-byte character code to the LCD fonttable code
wim 41:111ca62e8a59 1643 * @param c The character to write to the display
wim 41:111ca62e8a59 1644 * @return character code for the specific fonttable of the controller or -1 if UTF8 code is not yet complete or incorrect
wim 41:111ca62e8a59 1645 *
wim 41:111ca62e8a59 1646 * Orig by Andriy, Modified by WH
wim 41:111ca62e8a59 1647 *
wim 41:111ca62e8a59 1648 * Note: The UTF8 decoding table for a specific controller is defined and selected in file TextLCD_UTF8.inc
wim 41:111ca62e8a59 1649 * The table is accessed in this UTF_2_LCD() method through
wim 41:111ca62e8a59 1650 * #define UTF_FIRST, UTF_LAST, UTF_SEQ_REC_FIRST, UTF_SEQ_REC_LAST and
wim 41:111ca62e8a59 1651 * #define UTF_SEQ_RECODE and UTF_RND_RECODE
wim 41:111ca62e8a59 1652 */
wim 41:111ca62e8a59 1653 int TextLCD_Base::UTF_2_LCD (int c) {
wim 41:111ca62e8a59 1654 int utf_code;
wim 41:111ca62e8a59 1655 int utf_low_byte; // Low byte UTF8
wim 41:111ca62e8a59 1656 static int utf_hi_byte = 0; // High byte UTF8
wim 41:111ca62e8a59 1657
wim 41:111ca62e8a59 1658 if (c < 0x80) { // Regular ASCII code, no need to convert
wim 41:111ca62e8a59 1659 return c;
wim 41:111ca62e8a59 1660 }
wim 41:111ca62e8a59 1661 else { // UTF8 handling, See wikipedia.org/wiki/UTF-8 and www.utf8-chartable.de
wim 41:111ca62e8a59 1662 // printf("0x%X ", c);
wim 41:111ca62e8a59 1663
wim 41:111ca62e8a59 1664 if (c >= 0xC0) { // First UTF8 byte should be formatted as 110b bbaa, Do sanity check
wim 41:111ca62e8a59 1665 utf_hi_byte = c & 0x1F; // Mask out significant bits (0x1F) and save high byte
wim 41:111ca62e8a59 1666 return -1; // Nothing to display as yet, wait for second UTF8 byte
wim 41:111ca62e8a59 1667 }
wim 41:111ca62e8a59 1668
wim 41:111ca62e8a59 1669 if (c <= 0xBF) { // Second UTF8 byte should be formatted as 10aa aaaa, Do sanity check
wim 41:111ca62e8a59 1670 utf_low_byte = c & 0x3F; // Mask out significant bits (0x3F)
wim 41:111ca62e8a59 1671
wim 41:111ca62e8a59 1672 // Compose UTF character code from UTF8 bytes. The UTF codes will be between U+0080 and U+07FF
wim 41:111ca62e8a59 1673 utf_code = (utf_hi_byte << 6) | utf_low_byte; // 00000bbb aaaaaaaa
wim 41:111ca62e8a59 1674 // printf("0x%4X ", utf_code);
wim 41:111ca62e8a59 1675
wim 41:111ca62e8a59 1676 // Sanity check on UTF codes
wim 41:111ca62e8a59 1677 // For example Cyrillic characters are UTF encoded between 0x0400 and 0x04FF
wim 41:111ca62e8a59 1678 if ((utf_code < UTF_FIRST) || (utf_code > UTF_LAST)) {
wim 41:111ca62e8a59 1679 return -1; // Invalid UTF8 code
wim 41:111ca62e8a59 1680 };
wim 41:111ca62e8a59 1681
wim 41:111ca62e8a59 1682 //Map some specific UTF codes on a character in LCD fonttable using a special correcting lookup table
wim 41:111ca62e8a59 1683 for (char i=0; UTF_RND_RECODE[i][0]; i++) { // Step through table until endvalue 0 is found or until a match is found
wim 41:111ca62e8a59 1684 if (utf_code == UTF_RND_RECODE[i][0]) { // UTF8 code match is found
wim 41:111ca62e8a59 1685 c = UTF_RND_RECODE[1][1];
wim 41:111ca62e8a59 1686 return c; // found match in correcting random table
wim 41:111ca62e8a59 1687 }
wim 41:111ca62e8a59 1688 }
wim 41:111ca62e8a59 1689
wim 41:111ca62e8a59 1690 //Sanity check on table idx range
wim 41:111ca62e8a59 1691 if ((utf_code < UTF_SEQ_REC_FIRST) || (utf_code > UTF_SEQ_REC_LAST)) {
wim 41:111ca62e8a59 1692 return -1; // Invalid UTF8 code
wim 41:111ca62e8a59 1693 };
wim 41:111ca62e8a59 1694
wim 41:111ca62e8a59 1695 //Map all other UTF codes on a character in LCD fonttable using a sequential lookup table
wim 41:111ca62e8a59 1696 c = UTF_SEQ_RECODE[utf_code - UTF_SEQ_REC_FIRST];
wim 41:111ca62e8a59 1697 return c; // entry in sequential table
wim 41:111ca62e8a59 1698 }
wim 41:111ca62e8a59 1699 else {
wim 41:111ca62e8a59 1700 return -1; // Invalid UTF8 code for second byte
wim 41:111ca62e8a59 1701 }
wim 41:111ca62e8a59 1702 } // End UTF8 handling
wim 41:111ca62e8a59 1703 }
wim 41:111ca62e8a59 1704
wim 41:111ca62e8a59 1705 #endif
wim 41:111ca62e8a59 1706
wim 14:0c32b66b14b8 1707
wim 34:e5a0dcb43ecc 1708 #if(LCD_PRINTF != 1)
wim 34:e5a0dcb43ecc 1709 /** Write a character to the LCD
wim 34:e5a0dcb43ecc 1710 *
wim 34:e5a0dcb43ecc 1711 * @param c The character to write to the display
wim 34:e5a0dcb43ecc 1712 */
wim 34:e5a0dcb43ecc 1713 int TextLCD_Base::putc(int c){
wim 34:e5a0dcb43ecc 1714 return _putc(c);
wim 34:e5a0dcb43ecc 1715 }
wim 34:e5a0dcb43ecc 1716
wim 34:e5a0dcb43ecc 1717
wim 34:e5a0dcb43ecc 1718 /** Write a raw string to the LCD
wim 34:e5a0dcb43ecc 1719 *
wim 34:e5a0dcb43ecc 1720 * @param string text, may be followed by variables to emulate formatting the string.
wim 34:e5a0dcb43ecc 1721 * However, printf formatting is NOT supported and variables will be ignored!
wim 34:e5a0dcb43ecc 1722 */
wim 34:e5a0dcb43ecc 1723 int TextLCD_Base::printf(const char* text, ...) {
wim 34:e5a0dcb43ecc 1724
wim 34:e5a0dcb43ecc 1725 while (*text !=0) {
wim 34:e5a0dcb43ecc 1726 _putc(*text);
wim 34:e5a0dcb43ecc 1727 text++;
wim 34:e5a0dcb43ecc 1728 }
wim 34:e5a0dcb43ecc 1729 return 0;
wim 34:e5a0dcb43ecc 1730 }
wim 34:e5a0dcb43ecc 1731 #endif
wim 34:e5a0dcb43ecc 1732
wim 34:e5a0dcb43ecc 1733
wim 17:652ab113bc2e 1734 // Write a nibble using the 4-bit interface
wim 21:9eb628d9e164 1735 void TextLCD_Base::_writeNibble(int value) {
wim 17:652ab113bc2e 1736
wim 17:652ab113bc2e 1737 // Enable is Low
wim 21:9eb628d9e164 1738 this->_setEnable(true);
wim 38:cbe275b0b647 1739 this->_setData(value); // Low nibble of value on D4..D7
wim 17:652ab113bc2e 1740 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1741 this->_setEnable(false);
wim 17:652ab113bc2e 1742 wait_us(1); // Datahold time
wim 17:652ab113bc2e 1743 // Enable is Low
wim 17:652ab113bc2e 1744 }
wim 17:652ab113bc2e 1745
wim 16:c276b75e6585 1746 // Write a byte using the 4-bit interface
wim 21:9eb628d9e164 1747 void TextLCD_Base::_writeByte(int value) {
wim 15:b70ebfffb258 1748
wim 15:b70ebfffb258 1749 // Enable is Low
wim 21:9eb628d9e164 1750 this->_setEnable(true);
wim 21:9eb628d9e164 1751 this->_setData(value >> 4); // High nibble
wim 15:b70ebfffb258 1752 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1753 this->_setEnable(false);
wim 15:b70ebfffb258 1754 wait_us(1); // Data hold time
wim 15:b70ebfffb258 1755
wim 21:9eb628d9e164 1756 this->_setEnable(true);
wim 37:ce348c002929 1757 this->_setData(value); // Low nibble
wim 15:b70ebfffb258 1758 wait_us(1); // Data setup time
wim 21:9eb628d9e164 1759 this->_setEnable(false);
wim 15:b70ebfffb258 1760 wait_us(1); // Datahold time
wim 15:b70ebfffb258 1761
wim 15:b70ebfffb258 1762 // Enable is Low
simon 1:ac48b187213c 1763 }
simon 1:ac48b187213c 1764
wim 21:9eb628d9e164 1765 // Write a command byte to the LCD controller
wim 21:9eb628d9e164 1766 void TextLCD_Base::_writeCommand(int command) {
wim 15:b70ebfffb258 1767
wim 21:9eb628d9e164 1768 this->_setRS(false);
wim 16:c276b75e6585 1769 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1770
wim 21:9eb628d9e164 1771 this->_writeByte(command);
wim 15:b70ebfffb258 1772 wait_us(40); // most instructions take 40us
simon 1:ac48b187213c 1773 }
simon 1:ac48b187213c 1774
wim 21:9eb628d9e164 1775 // Write a data byte to the LCD controller
wim 21:9eb628d9e164 1776 void TextLCD_Base::_writeData(int data) {
wim 15:b70ebfffb258 1777
wim 21:9eb628d9e164 1778 this->_setRS(true);
wim 16:c276b75e6585 1779 wait_us(1); // Data setup time for RS
wim 15:b70ebfffb258 1780
wim 21:9eb628d9e164 1781 this->_writeByte(data);
wim 15:b70ebfffb258 1782 wait_us(40); // data writes take 40us
simon 1:ac48b187213c 1783 }
simon 1:ac48b187213c 1784
wim 8:03116f75b66e 1785
wim 32:59c4b8f648d4 1786 // This replaces the original _address() method.
wim 8:03116f75b66e 1787 // It is confusing since it returns the memoryaddress or-ed with the set memorycommand 0x80.
wim 8:03116f75b66e 1788 // Left it in here for compatibility with older code. New applications should use getAddress() instead.
wim 21:9eb628d9e164 1789 int TextLCD_Base::_address(int column, int row) {
wim 8:03116f75b66e 1790 return 0x80 | getAddress(column, row);
wim 8:03116f75b66e 1791 }
wim 8:03116f75b66e 1792
wim 30:033048611c01 1793
wim 30:033048611c01 1794 // This is new method to return the memory address based on row, column and displaytype.
wim 30:033048611c01 1795 //
wim 30:033048611c01 1796 /** Return the memoryaddress of screen column and row location
wim 30:033048611c01 1797 *
wim 30:033048611c01 1798 * @param column The horizontal position from the left, indexed from 0
wim 30:033048611c01 1799 * @param row The vertical position from the top, indexed from 0
wim 36:9f5f86dfd44a 1800 * @return The memoryaddress of screen column and row location
wim 30:033048611c01 1801 *
wim 30:033048611c01 1802 */
wim 30:033048611c01 1803 int TextLCD_Base::getAddress(int column, int row) {
wim 30:033048611c01 1804
wim 30:033048611c01 1805 switch (_addr_mode) {
wim 30:033048611c01 1806
wim 30:033048611c01 1807 case LCD_T_A:
wim 30:033048611c01 1808 //Default addressing mode for 1, 2 and 4 rows (except 40x4)
wim 30:033048611c01 1809 //The two available rows are split and stacked on top of eachother. Addressing for 3rd and 4th line continues where lines 1 and 2 were split.
wim 30:033048611c01 1810 //Displays top rows when less than four are used.
wim 30:033048611c01 1811 switch (row) {
wim 30:033048611c01 1812 case 0:
wim 30:033048611c01 1813 return 0x00 + column;
wim 30:033048611c01 1814 case 1:
wim 30:033048611c01 1815 return 0x40 + column;
wim 30:033048611c01 1816 case 2:
wim 30:033048611c01 1817 return 0x00 + _nr_cols + column;
wim 30:033048611c01 1818 case 3:
wim 30:033048611c01 1819 return 0x40 + _nr_cols + column;
wim 30:033048611c01 1820 // Should never get here.
wim 39:e9c2319de9c5 1821 // default:
wim 39:e9c2319de9c5 1822 // return 0x00;
wim 30:033048611c01 1823 }
wim 30:033048611c01 1824
wim 30:033048611c01 1825 case LCD_T_B:
wim 30:033048611c01 1826 // LCD8x2B is a special layout of LCD16x1
wim 30:033048611c01 1827 if (row==0)
wim 30:033048611c01 1828 return 0x00 + column;
wim 30:033048611c01 1829 else
wim 30:033048611c01 1830 // return _nr_cols + column;
wim 30:033048611c01 1831 return 0x08 + column;
wim 30:033048611c01 1832
wim 30:033048611c01 1833 case LCD_T_C:
wim 30:033048611c01 1834 // LCD16x1C is a special layout of LCD8x2
wim 33:900a94bc7585 1835 // LCD32x1C is a special layout of LCD16x2
wim 33:900a94bc7585 1836 // LCD40x1C is a special layout of LCD20x2
wim 33:900a94bc7585 1837 #if(0)
wim 32:59c4b8f648d4 1838 if (column < 8)
wim 30:033048611c01 1839 return 0x00 + column;
wim 30:033048611c01 1840 else
wim 30:033048611c01 1841 return 0x40 + (column - 8);
wim 32:59c4b8f648d4 1842 #else
wim 32:59c4b8f648d4 1843 if (column < (_nr_cols >> 1))
wim 32:59c4b8f648d4 1844 return 0x00 + column;
wim 32:59c4b8f648d4 1845 else
wim 32:59c4b8f648d4 1846 return 0x40 + (column - (_nr_cols >> 1));
wim 32:59c4b8f648d4 1847 #endif
wim 30:033048611c01 1848
wim 30:033048611c01 1849 case LCD_T_D:
wim 36:9f5f86dfd44a 1850 //Alternate addressing mode for 3 and 4 row displays (except 40x4). Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1851 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1852 //Displays top rows when less than four are used.
wim 30:033048611c01 1853 switch (row) {
wim 30:033048611c01 1854 case 0:
wim 30:033048611c01 1855 return 0x00 + column;
wim 30:033048611c01 1856 case 1:
wim 30:033048611c01 1857 return 0x20 + column;
wim 30:033048611c01 1858 case 2:
wim 30:033048611c01 1859 return 0x40 + column;
wim 30:033048611c01 1860 case 3:
wim 30:033048611c01 1861 return 0x60 + column;
wim 30:033048611c01 1862 // Should never get here.
wim 39:e9c2319de9c5 1863 // default:
wim 39:e9c2319de9c5 1864 // return 0x00;
wim 30:033048611c01 1865 }
wim 30:033048611c01 1866
wim 30:033048611c01 1867 case LCD_T_D1:
wim 36:9f5f86dfd44a 1868 //Alternate addressing mode for 3 row displays. Used by PCF21XX, KS0073, KS0078, SSD1803
wim 30:033048611c01 1869 //The 4 available rows start at a hardcoded address.
wim 30:033048611c01 1870 //Skips top row of 4 row display and starts display at row 1
wim 30:033048611c01 1871 switch (row) {
wim 30:033048611c01 1872 case 0:
wim 30:033048611c01 1873 return 0x20 + column;
wim 30:033048611c01 1874 case 1:
wim 30:033048611c01 1875 return 0x40 + column;
wim 30:033048611c01 1876 case 2:
wim 30:033048611c01 1877 return 0x60 + column;
wim 30:033048611c01 1878 // Should never get here.
wim 39:e9c2319de9c5 1879 // default:
wim 39:e9c2319de9c5 1880 // return 0x00;
wim 30:033048611c01 1881 }
wim 30:033048611c01 1882
wim 30:033048611c01 1883 case LCD_T_E:
wim 30:033048611c01 1884 // LCD40x4 is a special case since it has 2 controllers.
wim 30:033048611c01 1885 // Each controller is configured as 40x2 (Type A)
wim 30:033048611c01 1886 if (row<2) {
wim 30:033048611c01 1887 // Test to see if we need to switch between controllers
wim 30:033048611c01 1888 if (_ctrl_idx != _LCDCtrl_0) {
wim 30:033048611c01 1889
wim 30:033048611c01 1890 // Second LCD controller Cursor Off
wim 30:033048611c01 1891 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1892
wim 30:033048611c01 1893 // Select primary controller
wim 30:033048611c01 1894 _ctrl_idx = _LCDCtrl_0;
wim 30:033048611c01 1895
wim 30:033048611c01 1896 // Restore cursormode on primary LCD controller
wim 30:033048611c01 1897 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1898 }
wim 30:033048611c01 1899
wim 30:033048611c01 1900 return 0x00 + (row * 0x40) + column;
wim 30:033048611c01 1901 }
wim 30:033048611c01 1902 else {
wim 30:033048611c01 1903
wim 30:033048611c01 1904 // Test to see if we need to switch between controllers
wim 30:033048611c01 1905 if (_ctrl_idx != _LCDCtrl_1) {
wim 30:033048611c01 1906 // Primary LCD controller Cursor Off
wim 30:033048611c01 1907 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 30:033048611c01 1908
wim 30:033048611c01 1909 // Select secondary controller
wim 30:033048611c01 1910 _ctrl_idx = _LCDCtrl_1;
wim 30:033048611c01 1911
wim 30:033048611c01 1912 // Restore cursormode on secondary LCD controller
wim 30:033048611c01 1913 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 1914 }
wim 30:033048611c01 1915
wim 30:033048611c01 1916 return 0x00 + ((row-2) * 0x40) + column;
wim 30:033048611c01 1917 }
wim 30:033048611c01 1918
wim 32:59c4b8f648d4 1919 case LCD_T_F:
wim 32:59c4b8f648d4 1920 //Alternate addressing mode for 3 row displays.
wim 32:59c4b8f648d4 1921 //The first half of 3rd row continues from 1st row, the second half continues from 2nd row.
wim 32:59c4b8f648d4 1922 switch (row) {
wim 32:59c4b8f648d4 1923 case 0:
wim 32:59c4b8f648d4 1924 return 0x00 + column;
wim 32:59c4b8f648d4 1925 case 1:
wim 32:59c4b8f648d4 1926 return 0x40 + column;
wim 32:59c4b8f648d4 1927 case 2:
wim 32:59c4b8f648d4 1928 if (column < (_nr_cols >> 1)) // check first or second half of line
wim 32:59c4b8f648d4 1929 return (0x00 + _nr_cols + column);
wim 32:59c4b8f648d4 1930 else
wim 32:59c4b8f648d4 1931 return (0x40 + _nr_cols + (column - (_nr_cols >> 1)));
wim 32:59c4b8f648d4 1932 // Should never get here.
wim 39:e9c2319de9c5 1933 // default:
wim 39:e9c2319de9c5 1934 // return 0x00;
wim 32:59c4b8f648d4 1935 }
wim 32:59c4b8f648d4 1936
wim 32:59c4b8f648d4 1937 case LCD_T_G:
wim 32:59c4b8f648d4 1938 //Alternate addressing mode for 3 row displays. Used by ST7036
wim 32:59c4b8f648d4 1939 switch (row) {
wim 32:59c4b8f648d4 1940 case 0:
wim 32:59c4b8f648d4 1941 return 0x00 + column;
wim 32:59c4b8f648d4 1942 case 1:
wim 32:59c4b8f648d4 1943 return 0x10 + column;
wim 32:59c4b8f648d4 1944 case 2:
wim 32:59c4b8f648d4 1945 return 0x20 + column;
wim 32:59c4b8f648d4 1946 // Should never get here.
wim 39:e9c2319de9c5 1947 // default:
wim 39:e9c2319de9c5 1948 // return 0x00;
wim 32:59c4b8f648d4 1949 }
wim 32:59c4b8f648d4 1950
wim 30:033048611c01 1951 // Should never get here.
wim 30:033048611c01 1952 default:
wim 30:033048611c01 1953 return 0x00;
wim 32:59c4b8f648d4 1954
wim 32:59c4b8f648d4 1955 } // switch _addr_mode
wim 30:033048611c01 1956 }
wim 30:033048611c01 1957
wim 30:033048611c01 1958
wim 29:a3663151aa65 1959 /** Set the memoryaddress of screen column and row location
wim 29:a3663151aa65 1960 *
wim 29:a3663151aa65 1961 * @param column The horizontal position from the left, indexed from 0
wim 29:a3663151aa65 1962 * @param row The vertical position from the top, indexed from 0
wim 29:a3663151aa65 1963 */
wim 21:9eb628d9e164 1964 void TextLCD_Base::setAddress(int column, int row) {
wim 15:b70ebfffb258 1965
wim 15:b70ebfffb258 1966 // Sanity Check column
wim 15:b70ebfffb258 1967 if (column < 0) {
wim 15:b70ebfffb258 1968 _column = 0;
wim 15:b70ebfffb258 1969 }
wim 36:9f5f86dfd44a 1970 else if (column >= _nr_cols) {
wim 36:9f5f86dfd44a 1971 _column = _nr_cols - 1;
wim 15:b70ebfffb258 1972 } else _column = column;
wim 8:03116f75b66e 1973
wim 15:b70ebfffb258 1974 // Sanity Check row
wim 15:b70ebfffb258 1975 if (row < 0) {
wim 15:b70ebfffb258 1976 _row = 0;
wim 15:b70ebfffb258 1977 }
wim 36:9f5f86dfd44a 1978 else if (row >= _nr_rows) {
wim 36:9f5f86dfd44a 1979 _row = _nr_rows - 1;
wim 15:b70ebfffb258 1980 } else _row = row;
wim 15:b70ebfffb258 1981
wim 15:b70ebfffb258 1982
wim 15:b70ebfffb258 1983 // Compute the memory address
wim 15:b70ebfffb258 1984 // For LCD40x4: switch controllers if needed
wim 15:b70ebfffb258 1985 // switch cursor if needed
wim 15:b70ebfffb258 1986 int addr = getAddress(_column, _row);
wim 8:03116f75b66e 1987
wim 13:24506ba22480 1988 _writeCommand(0x80 | addr);
wim 8:03116f75b66e 1989 }
simon 1:ac48b187213c 1990
wim 29:a3663151aa65 1991
wim 29:a3663151aa65 1992 /** Return the number of columns
wim 29:a3663151aa65 1993 *
wim 36:9f5f86dfd44a 1994 * @return The number of columns
wim 30:033048611c01 1995 *
wim 30:033048611c01 1996 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 1997 */
wim 21:9eb628d9e164 1998 int TextLCD_Base::columns() {
wim 30:033048611c01 1999
wim 30:033048611c01 2000 // Columns encoded in b7..b0
wim 30:033048611c01 2001 //return (_type & 0xFF);
wim 31:ef31cd8a00d1 2002 return _nr_cols;
simon 1:ac48b187213c 2003 }
simon 1:ac48b187213c 2004
wim 29:a3663151aa65 2005 /** Return the number of rows
wim 29:a3663151aa65 2006 *
wim 36:9f5f86dfd44a 2007 * @return The number of rows
wim 30:033048611c01 2008 *
wim 30:033048611c01 2009 * Note: some configurations are commented out because they have not yet been tested due to lack of hardware
wim 29:a3663151aa65 2010 */
wim 21:9eb628d9e164 2011 int TextLCD_Base::rows() {
wim 30:033048611c01 2012
wim 30:033048611c01 2013 // Rows encoded in b15..b8
wim 30:033048611c01 2014 //return ((_type >> 8) & 0xFF);
wim 30:033048611c01 2015 return _nr_rows;
simon 1:ac48b187213c 2016 }
wim 10:dd9b3a696acd 2017
wim 29:a3663151aa65 2018 /** Set the Cursormode
wim 29:a3663151aa65 2019 *
wim 29:a3663151aa65 2020 * @param cursorMode The Cursor mode (CurOff_BlkOff, CurOn_BlkOff, CurOff_BlkOn, CurOn_BlkOn)
wim 29:a3663151aa65 2021 */
wim 21:9eb628d9e164 2022 void TextLCD_Base::setCursor(LCDCursor cursorMode) {
wim 15:b70ebfffb258 2023
wim 17:652ab113bc2e 2024 // Save new cursor mode, needed when 2 controllers are in use or when display is switched off/on
wim 17:652ab113bc2e 2025 _currentCursor = cursorMode;
wim 10:dd9b3a696acd 2026
wim 17:652ab113bc2e 2027 // Configure only current LCD controller
wim 31:ef31cd8a00d1 2028 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 15:b70ebfffb258 2029 }
wim 15:b70ebfffb258 2030
wim 29:a3663151aa65 2031 /** Set the Displaymode
wim 29:a3663151aa65 2032 *
wim 29:a3663151aa65 2033 * @param displayMode The Display mode (DispOff, DispOn)
wim 29:a3663151aa65 2034 */
wim 21:9eb628d9e164 2035 void TextLCD_Base::setMode(LCDMode displayMode) {
wim 17:652ab113bc2e 2036
wim 17:652ab113bc2e 2037 // Save new displayMode, needed when 2 controllers are in use or when cursor is changed
wim 17:652ab113bc2e 2038 _currentMode = displayMode;
wim 41:111ca62e8a59 2039
wim 41:111ca62e8a59 2040 #if (LCD_TWO_CTRL == 1)
wim 17:652ab113bc2e 2041 // Select and configure second LCD controller when needed
wim 17:652ab113bc2e 2042 if(_type==LCD40x4) {
wim 21:9eb628d9e164 2043 if (_ctrl_idx==_LCDCtrl_0) {
wim 17:652ab113bc2e 2044 // Configure primary LCD controller
wim 17:652ab113bc2e 2045 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 11:9ec02df863a1 2046
wim 17:652ab113bc2e 2047 // Select 2nd controller
wim 21:9eb628d9e164 2048 _ctrl_idx=_LCDCtrl_1;
wim 17:652ab113bc2e 2049
wim 17:652ab113bc2e 2050 // Configure secondary LCD controller
wim 21:9eb628d9e164 2051 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 11:9ec02df863a1 2052
wim 17:652ab113bc2e 2053 // Restore current controller
wim 21:9eb628d9e164 2054 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 2055 }
wim 17:652ab113bc2e 2056 else {
wim 17:652ab113bc2e 2057 // Select primary controller
wim 21:9eb628d9e164 2058 _ctrl_idx=_LCDCtrl_0;
wim 17:652ab113bc2e 2059
wim 17:652ab113bc2e 2060 // Configure primary LCD controller
wim 21:9eb628d9e164 2061 _setCursorAndDisplayMode(_currentMode, CurOff_BlkOff);
wim 17:652ab113bc2e 2062
wim 17:652ab113bc2e 2063 // Restore current controller
wim 21:9eb628d9e164 2064 _ctrl_idx=_LCDCtrl_1;
wim 11:9ec02df863a1 2065
wim 17:652ab113bc2e 2066 // Configure secondary LCD controller
wim 17:652ab113bc2e 2067 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 10:dd9b3a696acd 2068 }
wim 17:652ab113bc2e 2069 }
wim 17:652ab113bc2e 2070 else {
wim 17:652ab113bc2e 2071 // Configure primary LCD controller
wim 17:652ab113bc2e 2072 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 30:033048611c01 2073 }
wim 41:111ca62e8a59 2074 #else
wim 41:111ca62e8a59 2075 // Support only one LCD controller
wim 41:111ca62e8a59 2076 _setCursorAndDisplayMode(_currentMode, _currentCursor);
wim 41:111ca62e8a59 2077
wim 41:111ca62e8a59 2078 #endif
wim 17:652ab113bc2e 2079 }
wim 17:652ab113bc2e 2080
wim 29:a3663151aa65 2081 /** Low level method to restore the cursortype and display mode for current controller
wim 29:a3663151aa65 2082 */
wim 36:9f5f86dfd44a 2083 void TextLCD_Base::_setCursorAndDisplayMode(LCDMode displayMode, LCDCursor cursorType) {
wim 36:9f5f86dfd44a 2084
wim 36:9f5f86dfd44a 2085 // Configure current LCD controller
wim 36:9f5f86dfd44a 2086 switch (_ctrl) {
wim 36:9f5f86dfd44a 2087 case ST7070:
wim 36:9f5f86dfd44a 2088 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 36:9f5f86dfd44a 2089 _writeCommand(0x08 | displayMode | (cursorType & 0x02));
wim 36:9f5f86dfd44a 2090 break;
wim 36:9f5f86dfd44a 2091 default:
wim 36:9f5f86dfd44a 2092 _writeCommand(0x08 | displayMode | cursorType);
wim 36:9f5f86dfd44a 2093 break;
wim 36:9f5f86dfd44a 2094 } //switch
wim 10:dd9b3a696acd 2095 }
wim 10:dd9b3a696acd 2096
wim 29:a3663151aa65 2097 /** Set the Backlight mode
wim 29:a3663151aa65 2098 *
wim 29:a3663151aa65 2099 * @param backlightMode The Backlight mode (LightOff, LightOn)
wim 29:a3663151aa65 2100 */
wim 21:9eb628d9e164 2101 void TextLCD_Base::setBacklight(LCDBacklight backlightMode) {
wim 20:e0da005a777f 2102
wim 35:311be6444a39 2103 #if (BACKLIGHT_INV==0)
wim 35:311be6444a39 2104 // Positive Backlight control pin logic
wim 20:e0da005a777f 2105 if (backlightMode == LightOn) {
wim 35:311be6444a39 2106 this->_setBL(true);
wim 20:e0da005a777f 2107 }
wim 20:e0da005a777f 2108 else {
wim 21:9eb628d9e164 2109 this->_setBL(false);
wim 20:e0da005a777f 2110 }
wim 35:311be6444a39 2111 #else
wim 35:311be6444a39 2112 // Inverted Backlight control pin logic
wim 35:311be6444a39 2113 if (backlightMode == LightOn) {
wim 35:311be6444a39 2114 this->_setBL(false);
wim 35:311be6444a39 2115 }
wim 35:311be6444a39 2116 else {
wim 35:311be6444a39 2117 this->_setBL(true);
wim 35:311be6444a39 2118 }
wim 35:311be6444a39 2119 #endif
wim 20:e0da005a777f 2120 }
wim 20:e0da005a777f 2121
wim 29:a3663151aa65 2122 /** Set User Defined Characters
wim 29:a3663151aa65 2123 *
wim 34:e5a0dcb43ecc 2124 * @param unsigned char c The Index of the UDC (0..7) for HD44780 or clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 2125 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 29:a3663151aa65 2126 */
wim 21:9eb628d9e164 2127 void TextLCD_Base::setUDC(unsigned char c, char *udc_data) {
wim 41:111ca62e8a59 2128
wim 41:111ca62e8a59 2129 #if (LCD_TWO_CTRL == 1)
wim 15:b70ebfffb258 2130 // Select and configure second LCD controller when needed
wim 15:b70ebfffb258 2131 if(_type==LCD40x4) {
wim 19:c747b9e2e7b8 2132 _LCDCtrl_Idx current_ctrl_idx = _ctrl_idx; // Temp save current controller
wim 15:b70ebfffb258 2133
wim 15:b70ebfffb258 2134 // Select primary controller
wim 21:9eb628d9e164 2135 _ctrl_idx=_LCDCtrl_0;
wim 15:b70ebfffb258 2136
wim 15:b70ebfffb258 2137 // Configure primary LCD controller
wim 15:b70ebfffb258 2138 _setUDC(c, udc_data);
wim 15:b70ebfffb258 2139
wim 15:b70ebfffb258 2140 // Select 2nd controller
wim 21:9eb628d9e164 2141 _ctrl_idx=_LCDCtrl_1;
wim 15:b70ebfffb258 2142
wim 15:b70ebfffb258 2143 // Configure secondary LCD controller
wim 15:b70ebfffb258 2144 _setUDC(c, udc_data);
wim 11:9ec02df863a1 2145
wim 15:b70ebfffb258 2146 // Restore current controller
wim 19:c747b9e2e7b8 2147 _ctrl_idx=current_ctrl_idx;
wim 15:b70ebfffb258 2148 }
wim 15:b70ebfffb258 2149 else {
wim 15:b70ebfffb258 2150 // Configure primary LCD controller
wim 15:b70ebfffb258 2151 _setUDC(c, udc_data);
wim 34:e5a0dcb43ecc 2152 }
wim 41:111ca62e8a59 2153 #else
wim 41:111ca62e8a59 2154 // Support only one LCD controller
wim 41:111ca62e8a59 2155 _setUDC(c, udc_data);
wim 41:111ca62e8a59 2156 #endif
wim 15:b70ebfffb258 2157 }
wim 15:b70ebfffb258 2158
wim 34:e5a0dcb43ecc 2159 /** Low level method to store user defined characters for current controller
wim 34:e5a0dcb43ecc 2160 *
wim 34:e5a0dcb43ecc 2161 * @param unsigned char c The Index of the UDC (0..7) for HD44780 clones and (0..15) for some more advanced controllers
wim 34:e5a0dcb43ecc 2162 * @param char *udc_data The bitpatterns for the UDC (8 bytes of 5 significant bits for bitpattern and 3 bits for blinkmode (advanced types))
wim 34:e5a0dcb43ecc 2163 */
wim 34:e5a0dcb43ecc 2164 void TextLCD_Base::_setUDC(unsigned char c, char *udc_data) {
wim 34:e5a0dcb43ecc 2165
wim 34:e5a0dcb43ecc 2166 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2167 case PCF2103_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2168 case PCF2113_3V3 : // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2169 case PCF2116_3V3 :
wim 34:e5a0dcb43ecc 2170 case PCF2116_5V :
wim 40:d3496c3ea301 2171 case PCF2119_3V3 : // Some UDCs may be used for Icons
wim 40:d3496c3ea301 2172 case PCF2119R_3V3: // Some UDCs may be used for Icons
wim 34:e5a0dcb43ecc 2173 c = c & 0x0F; // mask down to valid range
wim 34:e5a0dcb43ecc 2174 break;
wim 34:e5a0dcb43ecc 2175
wim 34:e5a0dcb43ecc 2176 default:
wim 34:e5a0dcb43ecc 2177 c = c & 0x07; // mask down to valid range
wim 34:e5a0dcb43ecc 2178 break;
wim 34:e5a0dcb43ecc 2179 } //switch _ctrl
wim 34:e5a0dcb43ecc 2180
wim 34:e5a0dcb43ecc 2181 // Select DD RAM for current LCD controller
wim 34:e5a0dcb43ecc 2182 // This is needed to correctly set Bit 6 of the addresspointer for controllers that support 16 UDCs
wim 34:e5a0dcb43ecc 2183 _writeCommand(0x80 | ((c << 3) & 0x40)) ;
wim 34:e5a0dcb43ecc 2184
wim 34:e5a0dcb43ecc 2185 // Select CG RAM for current LCD controller
wim 34:e5a0dcb43ecc 2186 _writeCommand(0x40 | ((c << 3) & 0x3F)); //Set CG-RAM address, (note that Bit 6 is retained and can not be set by this command !)
wim 34:e5a0dcb43ecc 2187 //8 sequential locations needed per UDC
wim 34:e5a0dcb43ecc 2188 // Store UDC pattern
wim 34:e5a0dcb43ecc 2189 for (int i=0; i<8; i++) {
wim 34:e5a0dcb43ecc 2190 _writeData(*udc_data++);
wim 34:e5a0dcb43ecc 2191 }
wim 34:e5a0dcb43ecc 2192
wim 34:e5a0dcb43ecc 2193 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 34:e5a0dcb43ecc 2194 int addr = getAddress(_column, _row);
wim 34:e5a0dcb43ecc 2195 _writeCommand(0x80 | addr);
wim 34:e5a0dcb43ecc 2196 }
wim 32:59c4b8f648d4 2197
wim 39:e9c2319de9c5 2198 #if(LCD_BLINK == 1)
wim 36:9f5f86dfd44a 2199 /** Set UDC Blink and Icon blink
wim 33:900a94bc7585 2200 * setUDCBlink method is supported by some compatible devices (eg SSD1803)
wim 33:900a94bc7585 2201 *
wim 33:900a94bc7585 2202 * @param blinkMode The Blink mode (BlinkOff, BlinkOn)
wim 33:900a94bc7585 2203 */
wim 33:900a94bc7585 2204 void TextLCD_Base::setUDCBlink(LCDBlink blinkMode){
wim 36:9f5f86dfd44a 2205 // Blinking UDCs (and icons) are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2206 // The blinking pixels in the UDC and icons can be controlled by setting additional bits in the UDC or icon bitpattern.
wim 36:9f5f86dfd44a 2207 // UDCs are defined by an 8 byte bitpattern. The P0..P4 form the character pattern.
wim 33:900a94bc7585 2208 // P7 P6 P5 P4 P3 P2 P1 P0
wim 33:900a94bc7585 2209 // 0 B1 B0 x 0 1 1 1 0
wim 33:900a94bc7585 2210 // 1 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2211 // .............
wim 33:900a94bc7585 2212 // 7 B1 B0 x 1 0 0 0 1
wim 33:900a94bc7585 2213 //
wim 33:900a94bc7585 2214 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 33:900a94bc7585 2215 // B1 B0 Mode
wim 33:900a94bc7585 2216 // 0 0 No Blinking in this row of the UDC
wim 33:900a94bc7585 2217 // 0 1 Enabled pixels in P4 will blink
wim 33:900a94bc7585 2218 // 1 x Enabled pixels in P0..P4 will blink
wim 36:9f5f86dfd44a 2219 //
wim 36:9f5f86dfd44a 2220 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2221 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2222 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2223 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2224 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2225 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 33:900a94bc7585 2226 switch (blinkMode) {
wim 33:900a94bc7585 2227 case BlinkOn:
wim 36:9f5f86dfd44a 2228 // Controllers that support UDC/Icon Blink
wim 33:900a94bc7585 2229 switch (_ctrl) {
wim 40:d3496c3ea301 2230 case KS0073 :
wim 40:d3496c3ea301 2231 case KS0078 :
wim 40:d3496c3ea301 2232 case HD66712 :
wim 36:9f5f86dfd44a 2233 _function_1 |= 0x02; // Enable UDC/Icon Blink
wim 36:9f5f86dfd44a 2234 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2235
wim 33:900a94bc7585 2236 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2237 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2238
wim 33:900a94bc7585 2239 case US2066_3V3 :
wim 33:900a94bc7585 2240 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2241 _function_1 |= 0x04; // Enable UDC/Icon Blink
wim 33:900a94bc7585 2242 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2243 // Select Ext Instr Set
wim 33:900a94bc7585 2244
wim 33:900a94bc7585 2245 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2246 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2247 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2248
wim 36:9f5f86dfd44a 2249 case PCF2103_3V3 :
wim 36:9f5f86dfd44a 2250 case PCF2113_3V3 :
wim 36:9f5f86dfd44a 2251 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2252 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2253 // Enable Icon Blink
wim 36:9f5f86dfd44a 2254 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2255 _writeCommand(0x08 | 0x02); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2256 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2257
wim 36:9f5f86dfd44a 2258 break;
wim 33:900a94bc7585 2259
wim 33:900a94bc7585 2260 default:
wim 33:900a94bc7585 2261 //Unsupported feature for other controllers
wim 33:900a94bc7585 2262 break;
wim 33:900a94bc7585 2263 } //switch _ctrl
wim 33:900a94bc7585 2264
wim 36:9f5f86dfd44a 2265 break; // BlinkOn
wim 33:900a94bc7585 2266
wim 33:900a94bc7585 2267 case BlinkOff:
wim 33:900a94bc7585 2268 // Controllers that support UDC Blink
wim 33:900a94bc7585 2269 switch (_ctrl) {
wim 40:d3496c3ea301 2270 case KS0073 :
wim 40:d3496c3ea301 2271 case KS0078 :
wim 40:d3496c3ea301 2272 case HD66712:
wim 36:9f5f86dfd44a 2273 _function_1 &= ~0x02; // Disable UDC/Icon Blink
wim 36:9f5f86dfd44a 2274 _writeCommand(0x20 | _function_1); // Function set 0 0 1 DL N RE(1) BE 0/LP (Ext Regs)
wim 33:900a94bc7585 2275
wim 33:900a94bc7585 2276 _writeCommand(0x20 | _function); // Function set 0 0 1 DL N RE(0) DH REV (Std Regs)
wim 40:d3496c3ea301 2277 break; // case KS0073, KS0078, HD66712 Controller
wim 33:900a94bc7585 2278
wim 33:900a94bc7585 2279 case US2066_3V3 :
wim 33:900a94bc7585 2280 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 2281 _function_1 &= ~0x04; // Disable UDC/Icon Blink
wim 33:900a94bc7585 2282 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2283 // Select Ext Instr Set
wim 33:900a94bc7585 2284
wim 33:900a94bc7585 2285 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2286 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2287 break; // case SSD1803, US2066
wim 36:9f5f86dfd44a 2288
wim 36:9f5f86dfd44a 2289 case PCF2103_3V3 :
wim 39:e9c2319de9c5 2290 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2291 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2292 case PCF2119R_3V3 :
wim 36:9f5f86dfd44a 2293 // Disable Icon Blink
wim 36:9f5f86dfd44a 2294 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 36:9f5f86dfd44a 2295 _writeCommand(0x08); // ICON Conf 0000 1, IM=0 (Char mode), IB=1 (Icon blink), 0 (Instr. Set 1)
wim 36:9f5f86dfd44a 2296 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 36:9f5f86dfd44a 2297
wim 36:9f5f86dfd44a 2298 break;
wim 33:900a94bc7585 2299
wim 33:900a94bc7585 2300 default:
wim 33:900a94bc7585 2301 //Unsupported feature for other controllers
wim 33:900a94bc7585 2302 break;
wim 33:900a94bc7585 2303 } //switch _ctrl
wim 33:900a94bc7585 2304
wim 36:9f5f86dfd44a 2305 break; //BlinkOff
wim 33:900a94bc7585 2306
wim 33:900a94bc7585 2307 default:
wim 33:900a94bc7585 2308 break;
wim 33:900a94bc7585 2309 } // blinkMode
wim 33:900a94bc7585 2310
wim 33:900a94bc7585 2311 } // setUDCBlink()
wim 39:e9c2319de9c5 2312 #endif
wim 33:900a94bc7585 2313
wim 41:111ca62e8a59 2314 #if(LCD_CONTRAST == 1)
wim 32:59c4b8f648d4 2315 /** Set Contrast
wim 32:59c4b8f648d4 2316 * setContrast method is supported by some compatible devices (eg ST7032i) that have onboard LCD voltage generation
wim 32:59c4b8f648d4 2317 * Initial code for ST70XX imported from fork by JH1PJL
wim 32:59c4b8f648d4 2318 *
wim 32:59c4b8f648d4 2319 * @param unsigned char c contrast data (6 significant bits, valid range 0..63, Value 0 will disable the Vgen)
wim 32:59c4b8f648d4 2320 * @return none
wim 32:59c4b8f648d4 2321 */
wim 32:59c4b8f648d4 2322 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2323 void TextLCD_Base::setContrast(unsigned char c) {
wim 32:59c4b8f648d4 2324
wim 32:59c4b8f648d4 2325 // Function set mode stored during Init. Make sure we dont accidentally switch between 1-line and 2-line mode!
wim 32:59c4b8f648d4 2326 // Icon/Booster mode stored during Init. Make sure we dont accidentally change this!
wim 32:59c4b8f648d4 2327
wim 32:59c4b8f648d4 2328 _contrast = c & 0x3F; // Sanity check
wim 32:59c4b8f648d4 2329
wim 33:900a94bc7585 2330 switch (_ctrl) {
wim 32:59c4b8f648d4 2331 case PCF2113_3V3 :
wim 39:e9c2319de9c5 2332 case PCF2119_3V3 :
wim 39:e9c2319de9c5 2333 case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2334 if (_contrast < 5) _contrast = 0; // See datasheet. Sanity check for PCF2113/PCF2119
wim 32:59c4b8f648d4 2335 if (_contrast > 55) _contrast = 55;
wim 32:59c4b8f648d4 2336
wim 32:59c4b8f648d4 2337 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instruction Set = 1
wim 32:59c4b8f648d4 2338 _writeCommand(0x80 | 0x00 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=0, VA=contrast
wim 32:59c4b8f648d4 2339 _writeCommand(0x80 | 0x40 | (_contrast & 0x3F)); // VLCD_set (Instr. Set 1) V=1, VB=contrast
wim 32:59c4b8f648d4 2340 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2341 break;
wim 32:59c4b8f648d4 2342
wim 32:59c4b8f648d4 2343 case ST7032_3V3 :
wim 32:59c4b8f648d4 2344 case ST7032_5V :
wim 32:59c4b8f648d4 2345 case ST7036_3V3 :
wim 32:59c4b8f648d4 2346 // case ST7036_5V :
wim 41:111ca62e8a59 2347 case SSD1803_3V3 :
wim 41:111ca62e8a59 2348 case SPLC792A_3V3 :
wim 32:59c4b8f648d4 2349 _writeCommand(0x20 | _function | 0x01); // Select Instruction Set = 1
wim 32:59c4b8f648d4 2350 _writeCommand(0x70 | (_contrast & 0x0F)); // Contrast Low bits
wim 32:59c4b8f648d4 2351 _writeCommand(0x50 | _icon_power | ((_contrast >> 4) & 0x03)); // Contrast High bits
wim 32:59c4b8f648d4 2352 _writeCommand(0x20 | _function); // Select Instruction Set = 0
wim 32:59c4b8f648d4 2353 break;
wim 32:59c4b8f648d4 2354
wim 33:900a94bc7585 2355 case US2066_3V3 :
wim 33:900a94bc7585 2356 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N BE RE(1) REV
wim 33:900a94bc7585 2357 // Select Extended Instruction Set
wim 33:900a94bc7585 2358
wim 33:900a94bc7585 2359 _writeCommand(0x79); // Function Select OLED: 0 1 1 1 1 0 0 1 (Ext Instr Set)
wim 33:900a94bc7585 2360
wim 33:900a94bc7585 2361 _writeCommand(0x81); // Set Contrast Control: 1 0 0 0 0 0 0 1 (Ext Instr Set, OLED)
wim 33:900a94bc7585 2362 _writeCommand((_contrast << 2) | 0x03); // Set Contrast Value: 8 bits. Use 6 bits for compatibility
wim 33:900a94bc7585 2363
wim 33:900a94bc7585 2364 _writeCommand(0x78); // Function Disable OLED: 0 1 1 1 1 0 0 0 (Ext Instr Set)
wim 33:900a94bc7585 2365
wim 33:900a94bc7585 2366 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2367 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2368 break;
wim 33:900a94bc7585 2369
wim 34:e5a0dcb43ecc 2370 //not yet tested on hardware
wim 32:59c4b8f648d4 2371 case PT6314 :
wim 32:59c4b8f648d4 2372 // Only 2 significant bits
wim 32:59c4b8f648d4 2373 // 0x00 = 100%
wim 32:59c4b8f648d4 2374 // 0x01 = 75%
wim 32:59c4b8f648d4 2375 // 0x02 = 50%
wim 32:59c4b8f648d4 2376 // 0x03 = 25%
wim 32:59c4b8f648d4 2377 _writeCommand(0x20 | _function | ((~_contrast) >> 4)); // Invert and shift to use 2 MSBs
wim 32:59c4b8f648d4 2378 break;
wim 32:59c4b8f648d4 2379
wim 32:59c4b8f648d4 2380 default:
wim 32:59c4b8f648d4 2381 //Unsupported feature for other controllers
wim 33:900a94bc7585 2382 break;
wim 33:900a94bc7585 2383 } // end switch
wim 33:900a94bc7585 2384 } // end setContrast()
wim 41:111ca62e8a59 2385 #endif
wim 32:59c4b8f648d4 2386
wim 39:e9c2319de9c5 2387 #if(LCD_POWER == 1)
wim 32:59c4b8f648d4 2388 /** Set Power
wim 32:59c4b8f648d4 2389 * setPower method is supported by some compatible devices (eg SSD1803) that have power down modes
wim 32:59c4b8f648d4 2390 *
wim 32:59c4b8f648d4 2391 * @param bool powerOn Power on/off
wim 32:59c4b8f648d4 2392 * @return none
wim 32:59c4b8f648d4 2393 */
wim 32:59c4b8f648d4 2394 //@TODO Add support for 40x4 dual controller
wim 32:59c4b8f648d4 2395 void TextLCD_Base::setPower(bool powerOn) {
wim 32:59c4b8f648d4 2396
wim 32:59c4b8f648d4 2397 if (powerOn) {
wim 32:59c4b8f648d4 2398 // Switch on
wim 32:59c4b8f648d4 2399 setMode(DispOn);
wim 32:59c4b8f648d4 2400
wim 32:59c4b8f648d4 2401 // Controllers that supports specific Power Down mode
wim 32:59c4b8f648d4 2402 switch (_ctrl) {
wim 32:59c4b8f648d4 2403
wim 32:59c4b8f648d4 2404 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2405 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2406 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2407 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2408 //@todo
wim 33:900a94bc7585 2409 // enable Booster Bon
wim 33:900a94bc7585 2410
wim 33:900a94bc7585 2411 case WS0010:
wim 33:900a94bc7585 2412 _writeCommand(0x17); // Char mode, DC/DC on
wim 33:900a94bc7585 2413 wait_ms(10); // Wait 10ms to ensure powered up
wim 33:900a94bc7585 2414 break;
wim 33:900a94bc7585 2415
wim 36:9f5f86dfd44a 2416 case KS0073:
wim 33:900a94bc7585 2417 case KS0078:
wim 32:59c4b8f648d4 2418 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2419 // case SSD1803_5V :
wim 33:900a94bc7585 2420 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2421 _writeCommand(0x02); // Power On
wim 32:59c4b8f648d4 2422 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2423 break;
wim 32:59c4b8f648d4 2424
wim 32:59c4b8f648d4 2425 default:
wim 32:59c4b8f648d4 2426 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2427 break;
wim 32:59c4b8f648d4 2428 } // end switch
wim 32:59c4b8f648d4 2429 }
wim 32:59c4b8f648d4 2430 else {
wim 32:59c4b8f648d4 2431 // Switch off
wim 32:59c4b8f648d4 2432 setMode(DispOff);
wim 32:59c4b8f648d4 2433
wim 32:59c4b8f648d4 2434 // Controllers that support specific Power Down mode
wim 32:59c4b8f648d4 2435 switch (_ctrl) {
wim 32:59c4b8f648d4 2436
wim 32:59c4b8f648d4 2437 // case PCF2113_3V3 :
wim 39:e9c2319de9c5 2438 // case PCF2119_3V3 :
wim 39:e9c2319de9c5 2439 // case PCF2119R_3V3 :
wim 32:59c4b8f648d4 2440 // case ST7032_3V3 :
wim 32:59c4b8f648d4 2441 //@todo
wim 33:900a94bc7585 2442 // disable Booster Bon
wim 33:900a94bc7585 2443
wim 33:900a94bc7585 2444 case WS0010:
wim 33:900a94bc7585 2445 _writeCommand(0x13); // Char mode, DC/DC off
wim 33:900a94bc7585 2446 break;
wim 33:900a94bc7585 2447
wim 36:9f5f86dfd44a 2448 case KS0073:
wim 33:900a94bc7585 2449 case KS0078:
wim 32:59c4b8f648d4 2450 case SSD1803_3V3 :
wim 32:59c4b8f648d4 2451 // case SSD1803_5V :
wim 33:900a94bc7585 2452 _writeCommand(0x20 | _function_1); // Select Ext Instr Set
wim 33:900a94bc7585 2453 _writeCommand(0x03); // Power Down
wim 32:59c4b8f648d4 2454 _writeCommand(0x20 | _function); // Select Std Instr Set
wim 32:59c4b8f648d4 2455 break;
wim 32:59c4b8f648d4 2456
wim 32:59c4b8f648d4 2457 default:
wim 32:59c4b8f648d4 2458 //Unsupported feature for other controllers
wim 32:59c4b8f648d4 2459 break;
wim 32:59c4b8f648d4 2460 } // end switch
wim 32:59c4b8f648d4 2461 }
wim 33:900a94bc7585 2462 } // end setPower()
wim 39:e9c2319de9c5 2463 #endif
wim 39:e9c2319de9c5 2464
wim 39:e9c2319de9c5 2465 #if(LCD_ORIENT == 1)
wim 33:900a94bc7585 2466 /** Set Orient
wim 33:900a94bc7585 2467 * setOrient method is supported by some compatible devices (eg SSD1803, US2066) that have top/bottom view modes
wim 33:900a94bc7585 2468 *
wim 33:900a94bc7585 2469 * @param LCDOrient orient Orientation
wim 33:900a94bc7585 2470 * @return none
wim 33:900a94bc7585 2471 */
wim 33:900a94bc7585 2472 void TextLCD_Base::setOrient(LCDOrient orient){
wim 33:900a94bc7585 2473
wim 33:900a94bc7585 2474 switch (orient) {
wim 33:900a94bc7585 2475
wim 33:900a94bc7585 2476 case Top:
wim 33:900a94bc7585 2477 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2478 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2479 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2480 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2481 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2482 _writeCommand(0x05); // Display Conf Set 0000 0, 1, P=0, Q=1 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2483 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2484 break;
wim 39:e9c2319de9c5 2485
wim 39:e9c2319de9c5 2486 case PCF2119_3V3:
wim 39:e9c2319de9c5 2487 case PCF2119R_3V3:
wim 39:e9c2319de9c5 2488 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2489 _writeCommand(0x07); // Display Conf Set 0000 0, 1, P=1, Q=1 (Instr. Set 1)
wim 39:e9c2319de9c5 2490 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2491 break;
wim 34:e5a0dcb43ecc 2492
wim 33:900a94bc7585 2493 case SSD1803_3V3 :
wim 33:900a94bc7585 2494 // case SSD1803_5V :
wim 33:900a94bc7585 2495 case US2066_3V3 :
wim 33:900a94bc7585 2496 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2497 // Select Extended Instruction Set
wim 33:900a94bc7585 2498 // _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2499 _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2500
wim 33:900a94bc7585 2501 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2502 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2503 break;
wim 36:9f5f86dfd44a 2504
wim 36:9f5f86dfd44a 2505 case ST7070:
wim 36:9f5f86dfd44a 2506 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL, N, EXT=1, x, x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2507
wim 36:9f5f86dfd44a 2508 _writeCommand(0x40 | 0x00); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2509 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2510 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2511 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2512
wim 36:9f5f86dfd44a 2513 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2514
wim 36:9f5f86dfd44a 2515 break; // case ST7070 Controller
wim 33:900a94bc7585 2516
wim 33:900a94bc7585 2517 default:
wim 33:900a94bc7585 2518 //Unsupported feature for other controllers
wim 33:900a94bc7585 2519 break;
wim 33:900a94bc7585 2520
wim 33:900a94bc7585 2521 } // end switch _ctrl
wim 33:900a94bc7585 2522 break; // end Top
wim 33:900a94bc7585 2523
wim 33:900a94bc7585 2524 case Bottom:
wim 33:900a94bc7585 2525 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2526 case PCF2103_3V3:
wim 34:e5a0dcb43ecc 2527 case PCF2116_3V3:
wim 34:e5a0dcb43ecc 2528 case PCF2116_5V:
wim 34:e5a0dcb43ecc 2529 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 34:e5a0dcb43ecc 2530 _writeCommand(0x06); // Display Conf Set 0000 0, 1, P=1, Q=0 (Instr. Set 1)
wim 34:e5a0dcb43ecc 2531 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 34:e5a0dcb43ecc 2532 break;
wim 39:e9c2319de9c5 2533
wim 39:e9c2319de9c5 2534 case PCF2119_3V3:
wim 39:e9c2319de9c5 2535 case PCF2119R_3V3 :
wim 39:e9c2319de9c5 2536 _writeCommand(0x20 | _function | 0x01); // Set function, Select Instr Set = 1
wim 39:e9c2319de9c5 2537 _writeCommand(0x04); // Display Conf Set 0000 0, 1, P=0, Q=0 (Instr. Set 1)
wim 39:e9c2319de9c5 2538 _writeCommand(0x20 | _function); // Set function, Select Instr Set = 0
wim 39:e9c2319de9c5 2539 break;
wim 34:e5a0dcb43ecc 2540
wim 33:900a94bc7585 2541 case SSD1803_3V3 :
wim 33:900a94bc7585 2542 // case SSD1803_5V :
wim 33:900a94bc7585 2543 case US2066_3V3 :
wim 33:900a94bc7585 2544 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 33:900a94bc7585 2545 // Select Extended Instruction Set
wim 33:900a94bc7585 2546 _writeCommand(0x06); // Set ext entry mode, 0 0 0 0 0 1 BDC=1 COM1-32, BDS=0 SEG100-1 "Bottom View" (Ext Instr Set)
wim 33:900a94bc7585 2547 // _writeCommand(0x05); // Set ext entry mode, 0 0 0 0 0 1 BDC=0 COM32-1, BDS=1 SEG1-100 "Top View" (Ext Instr Set)
wim 33:900a94bc7585 2548
wim 33:900a94bc7585 2549 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 33:900a94bc7585 2550 // Select Std Instr set, Select IS=0
wim 33:900a94bc7585 2551 break;
wim 36:9f5f86dfd44a 2552
wim 36:9f5f86dfd44a 2553 case ST7070:
wim 36:9f5f86dfd44a 2554 //Note: this does not result in correct top/bottom view.
wim 36:9f5f86dfd44a 2555 //The left and right half of each row are reversed and the addressing of both rows is also incorrect:
wim 36:9f5f86dfd44a 2556 //Top/bottomline when orientation is flipped:
wim 36:9f5f86dfd44a 2557 // 0x48...0x4F 0x40...0x47
wim 36:9f5f86dfd44a 2558 // 0x08...0x0F 0x00...0x07
wim 36:9f5f86dfd44a 2559 _writeCommand(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2560
wim 36:9f5f86dfd44a 2561 _writeCommand(0x40 | 0x0F); // COM/SEG directions 0 1 0 0 C1, C2, S1, S2 (Instr Set 1)
wim 36:9f5f86dfd44a 2562 // C1=1: Com1-8 -> Com8-1; C2=1: Com9-16 -> Com16-9
wim 36:9f5f86dfd44a 2563 // S1=1: Seg1-40 -> Seg40-1; S2=1: Seg41-80 -> Seg80-41
wim 36:9f5f86dfd44a 2564 wait_ms(5); // Wait to ensure completion or ST7070 fails to set Top/Bottom after reset..
wim 36:9f5f86dfd44a 2565
wim 36:9f5f86dfd44a 2566 _writeCommand(0x20 | _function); // Set function, EXT=0 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2567
wim 36:9f5f86dfd44a 2568 break; // case ST7070 Controller
wim 33:900a94bc7585 2569
wim 33:900a94bc7585 2570 default:
wim 33:900a94bc7585 2571 //Unsupported feature for other controllers
wim 33:900a94bc7585 2572 break;
wim 33:900a94bc7585 2573
wim 33:900a94bc7585 2574 } // end switch _ctrl
wim 33:900a94bc7585 2575
wim 33:900a94bc7585 2576 break; // end Bottom
wim 33:900a94bc7585 2577 } // end switch orient
wim 33:900a94bc7585 2578 } // end setOrient()
wim 39:e9c2319de9c5 2579 #endif
wim 39:e9c2319de9c5 2580
wim 39:e9c2319de9c5 2581 #if(LCD_BIGFONT == 1)
wim 34:e5a0dcb43ecc 2582 /** Set Big Font
wim 34:e5a0dcb43ecc 2583 * setBigFont method is supported by some compatible devices (eg SSD1803, US2066)
wim 34:e5a0dcb43ecc 2584 *
wim 34:e5a0dcb43ecc 2585 * @param lines The selected Big Font lines (None, TopLine, CenterLine, BottomLine, TopBottomLine)
wim 34:e5a0dcb43ecc 2586 * Double height characters can be shown on lines 1+2, 2+3, 3+4 or 1+2 and 3+4
wim 34:e5a0dcb43ecc 2587 * Valid double height lines depend on the LCDs number of rows.
wim 34:e5a0dcb43ecc 2588 */
wim 34:e5a0dcb43ecc 2589 void TextLCD_Base::setBigFont(LCDBigFont lines) {
wim 34:e5a0dcb43ecc 2590
wim 34:e5a0dcb43ecc 2591 switch (lines) {
wim 34:e5a0dcb43ecc 2592 case None:
wim 34:e5a0dcb43ecc 2593 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2594 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2595 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2596 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2597 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2598 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2599 // Default
wim 34:e5a0dcb43ecc 2600 _function = _function & ~0x04; // Set function, 0 0 1 DL N DH=0 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2601 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2602 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2603 break; // end US2066
wim 34:e5a0dcb43ecc 2604
wim 34:e5a0dcb43ecc 2605 default:
wim 34:e5a0dcb43ecc 2606 break; // end default
wim 34:e5a0dcb43ecc 2607 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2608 break; // end None
wim 34:e5a0dcb43ecc 2609
wim 34:e5a0dcb43ecc 2610 case TopLine:
wim 34:e5a0dcb43ecc 2611 if (_nr_rows < 2) return; //Sanity check
wim 34:e5a0dcb43ecc 2612
wim 34:e5a0dcb43ecc 2613 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2614 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2615 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2616 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2617 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2618 _writeCommand(0x1C); // Double Height, 0 0 0 1 UD2=1, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2619 // Default
wim 34:e5a0dcb43ecc 2620 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2621 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2622 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2623 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2624
wim 34:e5a0dcb43ecc 2625 default:
wim 34:e5a0dcb43ecc 2626 break; // end default
wim 34:e5a0dcb43ecc 2627 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2628 break; // end TopLine
wim 34:e5a0dcb43ecc 2629
wim 34:e5a0dcb43ecc 2630 case CenterLine:
wim 34:e5a0dcb43ecc 2631 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2632
wim 34:e5a0dcb43ecc 2633 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2634 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2635 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2636 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2637 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2638 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2639 // Default
wim 34:e5a0dcb43ecc 2640 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2641 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2642 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2643 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2644
wim 34:e5a0dcb43ecc 2645 default:
wim 34:e5a0dcb43ecc 2646 break; // end default
wim 34:e5a0dcb43ecc 2647 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2648 break; // end CenterLine
wim 34:e5a0dcb43ecc 2649
wim 34:e5a0dcb43ecc 2650 case BottomLine:
wim 34:e5a0dcb43ecc 2651 if (_nr_rows < 3) return; //Sanity check
wim 34:e5a0dcb43ecc 2652
wim 34:e5a0dcb43ecc 2653 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2654 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2655 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2656 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2657 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2658 if (_nr_rows == 3) {
wim 34:e5a0dcb43ecc 2659 _writeCommand(0x14); // Double Height, 0 0 0 1 UD2=0, UD1=1, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2660 }
wim 34:e5a0dcb43ecc 2661 else {
wim 34:e5a0dcb43ecc 2662 _writeCommand(0x10); // Double Height, 0 0 0 1 UD2=0, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2663 }
wim 34:e5a0dcb43ecc 2664 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2665 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2666 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2667 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2668
wim 34:e5a0dcb43ecc 2669 default:
wim 34:e5a0dcb43ecc 2670 break; // end default
wim 34:e5a0dcb43ecc 2671 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2672 break; // end BottomLine
wim 34:e5a0dcb43ecc 2673
wim 34:e5a0dcb43ecc 2674 case TopBottomLine:
wim 34:e5a0dcb43ecc 2675 if (_nr_rows != 4) return; //Sanity check
wim 34:e5a0dcb43ecc 2676
wim 34:e5a0dcb43ecc 2677 switch (_ctrl) {
wim 34:e5a0dcb43ecc 2678 case SSD1803_3V3 :
wim 34:e5a0dcb43ecc 2679 case US2066_3V3 :
wim 34:e5a0dcb43ecc 2680 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 34:e5a0dcb43ecc 2681 // Select Extended Instruction Set
wim 34:e5a0dcb43ecc 2682 _writeCommand(0x18); // Double Height, 0 0 0 1 UD2=1, UD1=0, X, DH'=0 (Ext Instr Set)
wim 34:e5a0dcb43ecc 2683 // Default
wim 34:e5a0dcb43ecc 2684 _function = _function | 0x04; // Set function, 0 0 1 DL N DH=1 RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2685 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS=0 Select Instruction Set 0
wim 34:e5a0dcb43ecc 2686 // Select Std Instr set, Select IS=0
wim 34:e5a0dcb43ecc 2687 break; // end US2066, SSD1803
wim 34:e5a0dcb43ecc 2688
wim 34:e5a0dcb43ecc 2689 default:
wim 34:e5a0dcb43ecc 2690 break; // end default
wim 34:e5a0dcb43ecc 2691 } // end switch _ctrl
wim 34:e5a0dcb43ecc 2692 break; // end TopBottomLine
wim 34:e5a0dcb43ecc 2693
wim 34:e5a0dcb43ecc 2694 } // end switch lines
wim 34:e5a0dcb43ecc 2695
wim 34:e5a0dcb43ecc 2696 } // end setBigFont()
wim 39:e9c2319de9c5 2697 #endif
wim 39:e9c2319de9c5 2698
wim 41:111ca62e8a59 2699
wim 41:111ca62e8a59 2700 #if (LCD_FONTSEL == 1)
wim 41:111ca62e8a59 2701 /** Set Font
wim 41:111ca62e8a59 2702 * setFont method is supported by some compatible devices (eg SSD1803, US2066, ST7070)
wim 41:111ca62e8a59 2703 *
wim 41:111ca62e8a59 2704 * @param LCDFont font The selected Font
wim 41:111ca62e8a59 2705 * @return none
wim 41:111ca62e8a59 2706 *
wim 41:111ca62e8a59 2707 * Note: most controllers support only one font and the hardware specific
wim 41:111ca62e8a59 2708 * fonttable is encoded as part of the controller type number (eg PCF21XXC or PCF21XXR).
wim 41:111ca62e8a59 2709 * Some controllers support multiple tables that can only be selected by logic levels on a few pins.
wim 41:111ca62e8a59 2710 * Some controllers also support runtime fontable switching through a specific instruction
wim 41:111ca62e8a59 2711 */
wim 41:111ca62e8a59 2712 void TextLCD_Base::setFont(LCDFont font) {
wim 41:111ca62e8a59 2713
wim 41:111ca62e8a59 2714 switch (font) {
wim 41:111ca62e8a59 2715 case Font_RA: // UK/EU
wim 41:111ca62e8a59 2716 switch (_ctrl) {
wim 41:111ca62e8a59 2717 case SSD1803_3V3 :
wim 41:111ca62e8a59 2718 case US2066_3V3 :
wim 41:111ca62e8a59 2719 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2720 // Select Extended Instruction Set
wim 41:111ca62e8a59 2721 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2722 _writeData(0x00); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2723
wim 41:111ca62e8a59 2724 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2725
wim 41:111ca62e8a59 2726 _font = font; // Save active font
wim 41:111ca62e8a59 2727 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2728
wim 41:111ca62e8a59 2729 case ST7070:
wim 41:111ca62e8a59 2730 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 41:111ca62e8a59 2731 _writeCommand(0x08 | _currentMode | (_currentCursor & 0x02));
wim 41:111ca62e8a59 2732
wim 41:111ca62e8a59 2733 _font = font; // Save active font
wim 41:111ca62e8a59 2734 break; // end ST7070
wim 41:111ca62e8a59 2735
wim 41:111ca62e8a59 2736 default:
wim 41:111ca62e8a59 2737 break; // end default
wim 41:111ca62e8a59 2738 } // end switch _ctrl
wim 41:111ca62e8a59 2739 break; // end Font_RA
wim 41:111ca62e8a59 2740
wim 41:111ca62e8a59 2741 case Font_RB: // UK/CYR
wim 41:111ca62e8a59 2742 switch (_ctrl) {
wim 41:111ca62e8a59 2743 case SSD1803_3V3 :
wim 41:111ca62e8a59 2744 case US2066_3V3 :
wim 41:111ca62e8a59 2745 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2746 // Select Extended Instruction Set
wim 41:111ca62e8a59 2747 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2748 _writeData(0x04); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2749
wim 41:111ca62e8a59 2750 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2751
wim 41:111ca62e8a59 2752 _font = font; // Save active font
wim 41:111ca62e8a59 2753 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2754
wim 41:111ca62e8a59 2755 case ST7070:
wim 41:111ca62e8a59 2756 //ST7070 does not support Cursorblink. The P bit selects the font instead !
wim 41:111ca62e8a59 2757 _writeCommand(0x08 | _currentMode | (_currentCursor & 0x02) | 0x01);
wim 41:111ca62e8a59 2758
wim 41:111ca62e8a59 2759 _font = font; // Save active font
wim 41:111ca62e8a59 2760 break; // end ST7070
wim 41:111ca62e8a59 2761
wim 41:111ca62e8a59 2762 default:
wim 41:111ca62e8a59 2763 break; // end default
wim 41:111ca62e8a59 2764 } // end switch _ctrl
wim 41:111ca62e8a59 2765 break; // end Font_RB
wim 41:111ca62e8a59 2766
wim 41:111ca62e8a59 2767 case Font_0: //Font_O is pretty similar to ROM_C
wim 41:111ca62e8a59 2768 case Font_RC: // UK/JAP
wim 41:111ca62e8a59 2769 switch (_ctrl) {
wim 41:111ca62e8a59 2770 case SSD1803_3V3 :
wim 41:111ca62e8a59 2771 case US2066_3V3 :
wim 41:111ca62e8a59 2772 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 X N BE RE(1) REV
wim 41:111ca62e8a59 2773 // Select Extended Instruction Set
wim 41:111ca62e8a59 2774 _writeCommand(0x72); // ROM Select command, 0 1 1 1 0 0 1 0 (Ext Instr Set)
wim 41:111ca62e8a59 2775 _writeData(0x08); // ROM_0 Select data, 0 0 0 0 ROM2 ROM1 0 0 (Ext Instr Set)
wim 41:111ca62e8a59 2776
wim 41:111ca62e8a59 2777 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS (Std Instr Set)
wim 41:111ca62e8a59 2778
wim 41:111ca62e8a59 2779 _font = font; // Save active font
wim 41:111ca62e8a59 2780 break; // end SSD1803, US2066
wim 41:111ca62e8a59 2781
wim 41:111ca62e8a59 2782 default:
wim 41:111ca62e8a59 2783 break; // end default
wim 41:111ca62e8a59 2784 } // end switch _ctrl
wim 41:111ca62e8a59 2785 break; // end Font_RC
wim 41:111ca62e8a59 2786 } // end switch font
wim 41:111ca62e8a59 2787
wim 41:111ca62e8a59 2788 //SSD1803 seems to screw up cursor position after selecting new font. Restore to make sure...
wim 41:111ca62e8a59 2789 //Set next memoryaddress, make sure cursor blinks at next location
wim 41:111ca62e8a59 2790 int addr = getAddress(_column, _row);
wim 41:111ca62e8a59 2791 _writeCommand(0x80 | addr);
wim 41:111ca62e8a59 2792
wim 41:111ca62e8a59 2793 }
wim 41:111ca62e8a59 2794 #endif
wim 41:111ca62e8a59 2795
wim 41:111ca62e8a59 2796
wim 39:e9c2319de9c5 2797 #if(LCD_ICON==1)
wim 36:9f5f86dfd44a 2798 /** Set Icons
wim 36:9f5f86dfd44a 2799 *
wim 36:9f5f86dfd44a 2800 * @param unsigned char idx The Index of the icon pattern (0..15) for KS0073 and similar controllers
wim 36:9f5f86dfd44a 2801 * and Index (0..31) for PCF2103 and similar controllers
wim 36:9f5f86dfd44a 2802 * @param unsigned char data The bitpattern for the icons (6 lsb for KS0073 bitpattern (5 lsb for KS0078) and 2 msb for blinkmode)
wim 36:9f5f86dfd44a 2803 * The bitpattern for the PCF2103 icons is 5 lsb (UDC 0..2) and 5 lsb for blinkmode (UDC 4..6)
wim 36:9f5f86dfd44a 2804 */
wim 36:9f5f86dfd44a 2805 void TextLCD_Base::setIcon(unsigned char idx, unsigned char data) {
wim 36:9f5f86dfd44a 2806 // Blinking icons are enabled when a specific controlbit (BE) is set.
wim 36:9f5f86dfd44a 2807 // The blinking pixels in the icons can be controlled by setting additional bits in the icon bitpattern.
wim 36:9f5f86dfd44a 2808 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2809 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2810 // 0 B1 B0 0 0 1 1 1 0
wim 36:9f5f86dfd44a 2811 // 1 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2812 // .............
wim 36:9f5f86dfd44a 2813 // 15 B1 B0 1 1 0 0 0 1
wim 36:9f5f86dfd44a 2814 //
wim 36:9f5f86dfd44a 2815 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2816 // B1 B0 Mode
wim 36:9f5f86dfd44a 2817 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2818 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2819 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2820 //
wim 36:9f5f86dfd44a 2821 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2822 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2823 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2824 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2825 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2826 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2827
wim 36:9f5f86dfd44a 2828 switch (_ctrl) {
wim 36:9f5f86dfd44a 2829 case KS0073:
wim 36:9f5f86dfd44a 2830 case KS0078:
wim 36:9f5f86dfd44a 2831 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2832 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2833 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2834
wim 36:9f5f86dfd44a 2835 _writeData(data); // Set Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2836
wim 36:9f5f86dfd44a 2837 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2838 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2839 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2840
wim 36:9f5f86dfd44a 2841 case ST7032_3V3:
wim 36:9f5f86dfd44a 2842 case ST7032_5V:
wim 41:111ca62e8a59 2843 case SPLC792A_3V3:
wim 36:9f5f86dfd44a 2844 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2845 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2846
wim 36:9f5f86dfd44a 2847 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2848
wim 36:9f5f86dfd44a 2849 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2850 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2851 break; // end ST7032
wim 36:9f5f86dfd44a 2852
wim 36:9f5f86dfd44a 2853 case ST7036_3V3:
wim 36:9f5f86dfd44a 2854 case ST7036_5V:
wim 36:9f5f86dfd44a 2855 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2856 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2857
wim 36:9f5f86dfd44a 2858 _writeData(data & 0x1F); // Set Icon pattern, no blink support (Instr Set 1)
wim 36:9f5f86dfd44a 2859
wim 36:9f5f86dfd44a 2860 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2861 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2862 break; // end ST7036
wim 36:9f5f86dfd44a 2863
wim 36:9f5f86dfd44a 2864 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2865 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2866 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2867 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2868 _writeCommand(0x40 | (idx & 0x0F)); // Set Icon Address, mask Address to valid range (Instr Set = 1)
wim 36:9f5f86dfd44a 2869 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2870
wim 36:9f5f86dfd44a 2871 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2872 // Select IS=0
wim 36:9f5f86dfd44a 2873 break; // end SSD1803
wim 36:9f5f86dfd44a 2874
wim 36:9f5f86dfd44a 2875 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2876 case PCF2113_3V3:
wim 39:e9c2319de9c5 2877 case PCF2119_3V3:
wim 39:e9c2319de9c5 2878 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 2879 // Store UDC/Icon pattern for PCF2103 and PCF2113:
wim 36:9f5f86dfd44a 2880 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2881 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2882 // Store UDC/Icon pattern for PCF2119:
wim 36:9f5f86dfd44a 2883 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2884 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2885 _writeCommand(0x40 | (idx & 0x3F)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2886 _writeData(data); // Set Icon pattern (Instr Set = 1)
wim 36:9f5f86dfd44a 2887 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2888
wim 36:9f5f86dfd44a 2889 default:
wim 36:9f5f86dfd44a 2890 break; // end default
wim 36:9f5f86dfd44a 2891 } // end switch _ctrl
wim 36:9f5f86dfd44a 2892
wim 36:9f5f86dfd44a 2893 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 2894 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 2895 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 2896
wim 36:9f5f86dfd44a 2897 } // end setIcon()
wim 36:9f5f86dfd44a 2898
wim 36:9f5f86dfd44a 2899 /** Clear Icons
wim 36:9f5f86dfd44a 2900 *
wim 36:9f5f86dfd44a 2901 * @param none
wim 36:9f5f86dfd44a 2902 * @return none
wim 36:9f5f86dfd44a 2903 */
wim 36:9f5f86dfd44a 2904 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 2905 void TextLCD_Base::clrIcon() {
wim 36:9f5f86dfd44a 2906 // Icons are defined by a byte bitpattern. The P0..P5 form the Icon pattern for KS0073, and P0..P4 for KS0078
wim 36:9f5f86dfd44a 2907 // P7 P6 P5 P4 P3 P2 P1 P0
wim 36:9f5f86dfd44a 2908 // 0 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2909 // 1 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2910 // .............
wim 36:9f5f86dfd44a 2911 // 15 B1 B0 0 0 0 0 0 0
wim 36:9f5f86dfd44a 2912 //
wim 36:9f5f86dfd44a 2913 // Bit 6 and Bit 7 in the pattern will control the blinking mode when Blink is enabled through BE.
wim 36:9f5f86dfd44a 2914 // B1 B0 Mode
wim 36:9f5f86dfd44a 2915 // 0 0 No Blinking for this icon row
wim 36:9f5f86dfd44a 2916 // 0 1 Enabled pixels in P5 will blink
wim 36:9f5f86dfd44a 2917 // 1 x Enabled pixels in P0..P5 will blink
wim 36:9f5f86dfd44a 2918 //
wim 36:9f5f86dfd44a 2919 // Note: the PCF2103 and PCF2113 use UDCs to set Icons
wim 36:9f5f86dfd44a 2920 // 3 x 8 rows x 5 bits = 120 bits Icons for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2921 // 3 x 8 rows x 5 bits = 120 bits Icons for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2922 // Note: the PCF2119 uses UDCs to set Icons
wim 36:9f5f86dfd44a 2923 // 4 x 8 rows x 5 bits = 160 bits Icons for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 2924 // 4 x 8 rows x 5 bits = 160 bits Icons for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 2925 int idx;
wim 36:9f5f86dfd44a 2926
wim 36:9f5f86dfd44a 2927 switch (_ctrl) {
wim 36:9f5f86dfd44a 2928 case KS0073:
wim 36:9f5f86dfd44a 2929 case KS0078:
wim 36:9f5f86dfd44a 2930 _writeCommand(0x20 | _function_1); // Set function, 0 0 1 DL N RE(1) BE LP
wim 36:9f5f86dfd44a 2931 // Select Extended Instruction Set
wim 36:9f5f86dfd44a 2932 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2933 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2934 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2935 }
wim 36:9f5f86dfd44a 2936 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Std Instruction Set
wim 36:9f5f86dfd44a 2937 // Select Std Instr set
wim 36:9f5f86dfd44a 2938 break; // end KS0073, KS0078
wim 36:9f5f86dfd44a 2939
wim 36:9f5f86dfd44a 2940 case ST7032_3V3:
wim 36:9f5f86dfd44a 2941 case ST7032_5V:
wim 41:111ca62e8a59 2942 case SPLC792A_3V3:
wim 36:9f5f86dfd44a 2943 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N F 0 IS=1 Select Instr Set = 1
wim 36:9f5f86dfd44a 2944
wim 36:9f5f86dfd44a 2945 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2946 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2947 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2948 }
wim 36:9f5f86dfd44a 2949
wim 36:9f5f86dfd44a 2950 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N RE(0) DH REV Select Instruction Set 0
wim 36:9f5f86dfd44a 2951 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2952 break; // end ST7032
wim 36:9f5f86dfd44a 2953
wim 36:9f5f86dfd44a 2954 case ST7036_3V3:
wim 36:9f5f86dfd44a 2955 case ST7036_5V:
wim 36:9f5f86dfd44a 2956 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH IS2,IS1 = 01 (Select Instr Set = 1)
wim 36:9f5f86dfd44a 2957
wim 36:9f5f86dfd44a 2958 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2959 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Instr Set 1)
wim 36:9f5f86dfd44a 2960 _writeData(0x00); // Clear Icon pattern (Instr Set 1)
wim 36:9f5f86dfd44a 2961 }
wim 36:9f5f86dfd44a 2962
wim 36:9f5f86dfd44a 2963 _writeCommand(0x20 | _function); // Set function, IS2,IS1 = 00 (Select Instr Set = 0)
wim 36:9f5f86dfd44a 2964 // Select Std Instr set, Select IS=0
wim 36:9f5f86dfd44a 2965 break; // end ST7036
wim 36:9f5f86dfd44a 2966
wim 36:9f5f86dfd44a 2967 case SSD1803_3V3:
wim 36:9f5f86dfd44a 2968 // case SSD1803_5V:
wim 36:9f5f86dfd44a 2969 _writeCommand(0x20 | _function | 0x01); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2970 // Select Instruction Set 1
wim 36:9f5f86dfd44a 2971 for (idx=0; idx<16; idx++) {
wim 36:9f5f86dfd44a 2972 _writeCommand(0x40 | idx); // Set Icon Address, mask Address to valid range (Ext Instr Set)
wim 36:9f5f86dfd44a 2973 _writeData(0x00); // Clear Icon pattern (Ext Instr Set)
wim 36:9f5f86dfd44a 2974 }
wim 36:9f5f86dfd44a 2975 _writeCommand(0x20 | _function); // Set function, 0 0 1 DL N DH RE(0) IS
wim 36:9f5f86dfd44a 2976 // Select IS=0
wim 36:9f5f86dfd44a 2977 break; // end SSD1803
wim 36:9f5f86dfd44a 2978
wim 36:9f5f86dfd44a 2979 case PCF2103_3V3:
wim 36:9f5f86dfd44a 2980 case PCF2113_3V3:
wim 36:9f5f86dfd44a 2981 // PCF2103 and PCF2113 use part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 2982 // Select CG RAM
wim 36:9f5f86dfd44a 2983
wim 36:9f5f86dfd44a 2984 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2985 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 2986 // 3 x 8 rows x 5 bits = 120 bits for Normal pattern (UDC 0..2) and
wim 36:9f5f86dfd44a 2987 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2988 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2989 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2990 }
wim 36:9f5f86dfd44a 2991
wim 36:9f5f86dfd44a 2992 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 2993 // 3 x 8 rows x 5 bits = 120 bits for Blink pattern (UDC 4..6)
wim 36:9f5f86dfd44a 2994 for (int i=0; i<(3 * 8); i++) {
wim 36:9f5f86dfd44a 2995 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 2996 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 2997 }
wim 36:9f5f86dfd44a 2998 break; // case PCF2103_3V3 Controller
wim 36:9f5f86dfd44a 2999
wim 39:e9c2319de9c5 3000 case PCF2119_3V3:
wim 39:e9c2319de9c5 3001 case PCF2119R_3V3:
wim 36:9f5f86dfd44a 3002 // PCF2119 uses part of the UDC RAM to control Icons
wim 36:9f5f86dfd44a 3003 // Select CG RAM
wim 36:9f5f86dfd44a 3004
wim 36:9f5f86dfd44a 3005 _writeCommand(0x40 | (0 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 3006 // Store UDC/Icon pattern:
wim 36:9f5f86dfd44a 3007 // 4 x 8 rows x 5 bits = 160 bits for Normal pattern (UDC 0..3) and
wim 36:9f5f86dfd44a 3008 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 3009 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 3010 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 3011 }
wim 36:9f5f86dfd44a 3012
wim 36:9f5f86dfd44a 3013 _writeCommand(0x40 | (4 * 8)); //Set CG-RAM address, 8 sequential locations needed per UDC
wim 36:9f5f86dfd44a 3014 // 4 x 8 rows x 5 bits = 160 bits for Blink pattern (UDC 4..7)
wim 36:9f5f86dfd44a 3015 for (int i=0; i<(4 * 8); i++) {
wim 36:9f5f86dfd44a 3016 // _writeData(0x1F); // All On
wim 36:9f5f86dfd44a 3017 _writeData(0x00); // All Off
wim 36:9f5f86dfd44a 3018 }
wim 36:9f5f86dfd44a 3019 break; // case PCF2119_3V3 Controller
wim 36:9f5f86dfd44a 3020
wim 36:9f5f86dfd44a 3021 default:
wim 36:9f5f86dfd44a 3022 break; // end default
wim 36:9f5f86dfd44a 3023 } // end switch _ctrl
wim 36:9f5f86dfd44a 3024
wim 36:9f5f86dfd44a 3025 //Select DD RAM again for current LCD controller and restore the addresspointer
wim 36:9f5f86dfd44a 3026 int addr = getAddress(_column, _row);
wim 36:9f5f86dfd44a 3027 _writeCommand(0x80 | addr);
wim 36:9f5f86dfd44a 3028 } //end clrIcon()
wim 39:e9c2319de9c5 3029 #endif
wim 39:e9c2319de9c5 3030
wim 39:e9c2319de9c5 3031 #if(LCD_INVERT == 1)
wim 36:9f5f86dfd44a 3032 /** Set Invert
wim 36:9f5f86dfd44a 3033 * setInvert method is supported by some compatible devices (eg KS0073) to swap between black and white
wim 36:9f5f86dfd44a 3034 *
wim 36:9f5f86dfd44a 3035 * @param bool invertOn Invert on/off
wim 36:9f5f86dfd44a 3036 * @return none
wim 36:9f5f86dfd44a 3037 */
wim 36:9f5f86dfd44a 3038 //@TODO Add support for 40x4 dual controller
wim 36:9f5f86dfd44a 3039 void TextLCD_Base::setInvert(bool invertOn) {
wim 36:9f5f86dfd44a 3040
wim 36:9f5f86dfd44a 3041 if (invertOn) {
wim 36:9f5f86dfd44a 3042 // Controllers that support Invert
wim 36:9f5f86dfd44a 3043 switch (_ctrl) {
wim 36:9f5f86dfd44a 3044 case KS0073:
wim 36:9f5f86dfd44a 3045 case KS0078:
wim 36:9f5f86dfd44a 3046 _function = _function | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 3047 _writeCommand(0x20 | _function); // Activate Invert (Std Instr Set)
wim 36:9f5f86dfd44a 3048 break;
wim 36:9f5f86dfd44a 3049 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 3050 // case SSD1803_5V :
wim 36:9f5f86dfd44a 3051 case US2066_3V3:
wim 36:9f5f86dfd44a 3052 // case USS2066_5V:
wim 36:9f5f86dfd44a 3053 _function_1 = _function_1 | 0x01; // Enable Invert
wim 36:9f5f86dfd44a 3054 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 3055 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 3056 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 3057 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 3058 break;
wim 36:9f5f86dfd44a 3059 default:
wim 36:9f5f86dfd44a 3060 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 3061 break;
wim 36:9f5f86dfd44a 3062 } // end switch
wim 36:9f5f86dfd44a 3063 }
wim 36:9f5f86dfd44a 3064 else {
wim 36:9f5f86dfd44a 3065 // Controllers that support Invert
wim 36:9f5f86dfd44a 3066 switch (_ctrl) {
wim 36:9f5f86dfd44a 3067 case KS0073:
wim 36:9f5f86dfd44a 3068 case KS0078:
wim 36:9f5f86dfd44a 3069 _function = _function & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 3070 _writeCommand(0x20 | _function); // Disable Invert (Std Instr Set)
wim 36:9f5f86dfd44a 3071 break;
wim 36:9f5f86dfd44a 3072 case SSD1803_3V3 :
wim 36:9f5f86dfd44a 3073 // case SSD1803_5V :
wim 36:9f5f86dfd44a 3074 case US2066_3V3:
wim 36:9f5f86dfd44a 3075 // case USS2066_5V:
wim 36:9f5f86dfd44a 3076 _function_1 = _function_1 & ~0x01; // Disable Invert
wim 36:9f5f86dfd44a 3077 // Set function, 0 0 1 DL N BE RE(1) REV (SSD1803)
wim 36:9f5f86dfd44a 3078 // Set function, 0 0 1 X N BE RE(1) REV (US2066)
wim 36:9f5f86dfd44a 3079 _writeCommand(0x20 | _function_1); // Activate Invert (Ext Instr Set)
wim 36:9f5f86dfd44a 3080 _writeCommand(0x20 | _function); // Return to Std Instr Set
wim 36:9f5f86dfd44a 3081 break;
wim 36:9f5f86dfd44a 3082
wim 36:9f5f86dfd44a 3083 default:
wim 36:9f5f86dfd44a 3084 //Unsupported feature for other controllers
wim 36:9f5f86dfd44a 3085 break;
wim 36:9f5f86dfd44a 3086 } // end switch
wim 36:9f5f86dfd44a 3087 }
wim 36:9f5f86dfd44a 3088 } // end setInvert()
wim 39:e9c2319de9c5 3089 #endif
wim 36:9f5f86dfd44a 3090
wim 23:d47f226efb24 3091 //--------- End TextLCD_Base -----------
wim 21:9eb628d9e164 3092
wim 22:35742ec80c24 3093
wim 23:d47f226efb24 3094 //--------- Start TextLCD Bus -----------
wim 21:9eb628d9e164 3095
wim 21:9eb628d9e164 3096 /* Create a TextLCD interface for using regular mbed pins
wim 21:9eb628d9e164 3097 *
wim 21:9eb628d9e164 3098 * @param rs Instruction/data control line
wim 21:9eb628d9e164 3099 * @param e Enable line (clock)
wim 21:9eb628d9e164 3100 * @param d4-d7 Data lines for using as a 4-bit interface
wim 21:9eb628d9e164 3101 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 21:9eb628d9e164 3102 * @param bl Backlight control line (optional, default = NC)
wim 21:9eb628d9e164 3103 * @param e2 Enable2 line (clock for second controller, LCD40x4 only)
wim 21:9eb628d9e164 3104 * @param ctrl LCD controller (default = HD44780)
wim 21:9eb628d9e164 3105 */
wim 21:9eb628d9e164 3106 TextLCD::TextLCD(PinName rs, PinName e,
wim 21:9eb628d9e164 3107 PinName d4, PinName d5, PinName d6, PinName d7,
wim 21:9eb628d9e164 3108 LCDType type, PinName bl, PinName e2, LCDCtrl ctrl) :
wim 21:9eb628d9e164 3109 TextLCD_Base(type, ctrl),
wim 22:35742ec80c24 3110 _rs(rs), _e(e), _d(d4, d5, d6, d7) {
wim 22:35742ec80c24 3111
wim 22:35742ec80c24 3112 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 3113 if (bl != NC) {
wim 22:35742ec80c24 3114 _bl = new DigitalOut(bl); //Construct new pin
wim 22:35742ec80c24 3115 _bl->write(0); //Deactivate
wim 22:35742ec80c24 3116 }
wim 22:35742ec80c24 3117 else {
wim 22:35742ec80c24 3118 // No Hardware Backlight pin
wim 22:35742ec80c24 3119 _bl = NULL; //Construct dummy pin
wim 22:35742ec80c24 3120 }
wim 22:35742ec80c24 3121
wim 22:35742ec80c24 3122 // The hardware Enable2 pin is only needed for LCD40x4. Test and make sure whether it exists or not to prevent illegal access.
wim 22:35742ec80c24 3123 if (e2 != NC) {
wim 22:35742ec80c24 3124 _e2 = new DigitalOut(e2); //Construct new pin
wim 22:35742ec80c24 3125 _e2->write(0); //Deactivate
wim 22:35742ec80c24 3126 }
wim 22:35742ec80c24 3127 else {
wim 22:35742ec80c24 3128 // No Hardware Enable pin
wim 22:35742ec80c24 3129 _e2 = NULL; //Construct dummy pin
wim 22:35742ec80c24 3130 }
wim 38:cbe275b0b647 3131
wim 38:cbe275b0b647 3132 _init(_LCD_DL_4); // Set Datalength to 4 bit for mbed bus interfaces
wim 21:9eb628d9e164 3133 }
wim 21:9eb628d9e164 3134
wim 29:a3663151aa65 3135 /** Destruct a TextLCD interface for using regular mbed pins
wim 29:a3663151aa65 3136 *
wim 29:a3663151aa65 3137 * @param none
wim 29:a3663151aa65 3138 * @return none
wim 29:a3663151aa65 3139 */
wim 29:a3663151aa65 3140 TextLCD::~TextLCD() {
wim 29:a3663151aa65 3141 if (_bl != NULL) {delete _bl;} // BL pin
wim 29:a3663151aa65 3142 if (_e2 != NULL) {delete _e2;} // E2 pin
wim 29:a3663151aa65 3143 }
wim 29:a3663151aa65 3144
wim 22:35742ec80c24 3145 /** Set E pin (or E2 pin)
wim 22:35742ec80c24 3146 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 3147 * Default PinName value for E2 is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 3148 * @param value true or false
wim 22:35742ec80c24 3149 * @return none
wim 22:35742ec80c24 3150 */
wim 21:9eb628d9e164 3151 void TextLCD::_setEnable(bool value) {
wim 21:9eb628d9e164 3152
wim 22:35742ec80c24 3153 if(_ctrl_idx==_LCDCtrl_0) {
wim 22:35742ec80c24 3154 if (value) {
wim 22:35742ec80c24 3155 _e = 1; // Set E bit
wim 22:35742ec80c24 3156 }
wim 22:35742ec80c24 3157 else {
wim 22:35742ec80c24 3158 _e = 0; // Reset E bit
wim 22:35742ec80c24 3159 }
wim 22:35742ec80c24 3160 }
wim 22:35742ec80c24 3161 else {
wim 22:35742ec80c24 3162 if (value) {
wim 22:35742ec80c24 3163 if (_e2 != NULL) {_e2->write(1);} //Set E2 bit
wim 22:35742ec80c24 3164 }
wim 22:35742ec80c24 3165 else {
wim 22:35742ec80c24 3166 if (_e2 != NULL) {_e2->write(0);} //Reset E2 bit
wim 22:35742ec80c24 3167 }
wim 22:35742ec80c24 3168 }
wim 21:9eb628d9e164 3169 }
wim 21:9eb628d9e164 3170
wim 21:9eb628d9e164 3171 // Set RS pin
wim 21:9eb628d9e164 3172 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3173 void TextLCD::_setRS(bool value) {
wim 21:9eb628d9e164 3174
wim 22:35742ec80c24 3175 if (value) {
wim 21:9eb628d9e164 3176 _rs = 1; // Set RS bit
wim 22:35742ec80c24 3177 }
wim 22:35742ec80c24 3178 else {
wim 21:9eb628d9e164 3179 _rs = 0; // Reset RS bit
wim 22:35742ec80c24 3180 }
wim 21:9eb628d9e164 3181 }
wim 21:9eb628d9e164 3182
wim 22:35742ec80c24 3183 /** Set BL pin
wim 22:35742ec80c24 3184 * Used for mbed pins, I2C bus expander or SPI shiftregister
wim 22:35742ec80c24 3185 * Default PinName value is NC, must be used as pointer to avoid issues with mbed lib and DigitalOut pins
wim 22:35742ec80c24 3186 * @param value true or false
wim 22:35742ec80c24 3187 * @return none
wim 22:35742ec80c24 3188 */
wim 21:9eb628d9e164 3189 void TextLCD::_setBL(bool value) {
wim 21:9eb628d9e164 3190
wim 22:35742ec80c24 3191 if (value) {
wim 22:35742ec80c24 3192 if (_bl != NULL) {_bl->write(1);} //Set BL bit
wim 22:35742ec80c24 3193 }
wim 22:35742ec80c24 3194 else {
wim 22:35742ec80c24 3195 if (_bl != NULL) {_bl->write(0);} //Reset BL bit
wim 22:35742ec80c24 3196 }
wim 21:9eb628d9e164 3197 }
wim 21:9eb628d9e164 3198
wim 21:9eb628d9e164 3199 // Place the 4bit data on the databus
wim 21:9eb628d9e164 3200 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 21:9eb628d9e164 3201 void TextLCD::_setData(int value) {
wim 21:9eb628d9e164 3202 _d = value & 0x0F; // Write Databits
wim 21:9eb628d9e164 3203 }
wim 34:e5a0dcb43ecc 3204
wim 23:d47f226efb24 3205 //----------- End TextLCD ---------------
wim 21:9eb628d9e164 3206
wim 21:9eb628d9e164 3207
wim 23:d47f226efb24 3208 //--------- Start TextLCD_I2C -----------
wim 34:e5a0dcb43ecc 3209 #if(LCD_I2C == 1) /* I2C Expander PCF8574/MCP23008 */
wim 26:bd897a001012 3210 /** Create a TextLCD interface using an I2C PC8574 (or PCF8574A) or MCP23008 portexpander
wim 22:35742ec80c24 3211 *
wim 22:35742ec80c24 3212 * @param i2c I2C Bus
wim 26:bd897a001012 3213 * @param deviceAddress I2C slave address (PCF8574, PCF8574A or MCP23008, default = 0x40)
wim 22:35742ec80c24 3214 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 22:35742ec80c24 3215 * @param ctrl LCD controller (default = HD44780)
wim 22:35742ec80c24 3216 */
wim 21:9eb628d9e164 3217 TextLCD_I2C::TextLCD_I2C(I2C *i2c, char deviceAddress, LCDType type, LCDCtrl ctrl) :
wim 21:9eb628d9e164 3218 TextLCD_Base(type, ctrl),
wim 21:9eb628d9e164 3219 _i2c(i2c){
wim 21:9eb628d9e164 3220
wim 22:35742ec80c24 3221 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3222
wim 28:30fa94f7341c 3223 // Setup the I2C bus
wim 28:30fa94f7341c 3224 // The max bitrate for PCF8574 is 100kbit, the max bitrate for MCP23008 is 400kbit,
wim 32:59c4b8f648d4 3225 _i2c->frequency(100000);
wim 21:9eb628d9e164 3226
wim 26:bd897a001012 3227 #if (MCP23008==1)
wim 26:bd897a001012 3228 // MCP23008 portexpander Init
wim 37:ce348c002929 3229 _writeRegister(IODIR, 0x00); // All pins are outputs
wim 37:ce348c002929 3230 _writeRegister(IPOL, 0x00); // No reverse polarity on inputs
wim 37:ce348c002929 3231 _writeRegister(GPINTEN, 0x00); // No interrupt on change of input pins
wim 37:ce348c002929 3232 _writeRegister(DEFVAL, 0x00); // Default value to compare against for interrupts
wim 37:ce348c002929 3233 _writeRegister(INTCON, 0x00); // No interrupt on changes, compare against previous pin value
wim 37:ce348c002929 3234 _writeRegister(IOCON, 0x20); // b1=0 - Interrupt polarity active low
wim 37:ce348c002929 3235 // b2=0 - Interrupt pin active driver output
wim 37:ce348c002929 3236 // b4=0 - Slew rate enable on SDA
wim 37:ce348c002929 3237 // b5=0 - Auto-increment on registeraddress
wim 37:ce348c002929 3238 // b5=1 - No auto-increment on registeraddress => needed for performance improved I2C expander mode
wim 37:ce348c002929 3239 _writeRegister(GPPU, 0x00); // No Pullup
wim 37:ce348c002929 3240 // INTF // Interrupt flags read (Read-Only)
wim 37:ce348c002929 3241 // INTCAP // Captured inputpins at time of interrupt (Read-Only)
wim 37:ce348c002929 3242 // _writeRegister(GPIO, 0x00); // Output/Input pins
wim 37:ce348c002929 3243 // _writeRegister(OLAT, 0x00); // Output Latch
wim 26:bd897a001012 3244
wim 21:9eb628d9e164 3245 // Init the portexpander bus
wim 38:cbe275b0b647 3246 _lcd_bus = LCD_BUS_I2C_DEF;
wim 21:9eb628d9e164 3247
wim 21:9eb628d9e164 3248 // write the new data to the portexpander
wim 37:ce348c002929 3249 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3250 #else
wim 26:bd897a001012 3251 // PCF8574 of PCF8574A portexpander
wim 26:bd897a001012 3252
wim 26:bd897a001012 3253 // Init the portexpander bus
wim 38:cbe275b0b647 3254 _lcd_bus = LCD_BUS_I2C_DEF;
wim 26:bd897a001012 3255
wim 26:bd897a001012 3256 // write the new data to the portexpander
wim 21:9eb628d9e164 3257 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3258 #endif
wim 21:9eb628d9e164 3259
wim 37:ce348c002929 3260 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 21:9eb628d9e164 3261 }
wim 21:9eb628d9e164 3262
wim 37:ce348c002929 3263 // Set E bit (or E2 bit) in the databus shadowvalue
wim 37:ce348c002929 3264 // Used for mbed I2C bus expander
wim 37:ce348c002929 3265 void TextLCD_I2C::_setEnableBit(bool value) {
wim 21:9eb628d9e164 3266
wim 41:111ca62e8a59 3267 #if (LCD_TWO_CTRL == 1)
wim 22:35742ec80c24 3268 if(_ctrl_idx==_LCDCtrl_0) {
wim 26:bd897a001012 3269 if (value) {
wim 38:cbe275b0b647 3270 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 26:bd897a001012 3271 }
wim 26:bd897a001012 3272 else {
wim 38:cbe275b0b647 3273 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 26:bd897a001012 3274 }
wim 22:35742ec80c24 3275 }
wim 22:35742ec80c24 3276 else {
wim 26:bd897a001012 3277 if (value) {
wim 38:cbe275b0b647 3278 _lcd_bus |= LCD_BUS_I2C_E2; // Set E2 bit
wim 26:bd897a001012 3279 }
wim 26:bd897a001012 3280 else {
wim 38:cbe275b0b647 3281 _lcd_bus &= ~LCD_BUS_I2C_E2; // Reset E2bit
wim 26:bd897a001012 3282 }
wim 26:bd897a001012 3283 }
wim 41:111ca62e8a59 3284 #else
wim 41:111ca62e8a59 3285 // Support only one controller
wim 41:111ca62e8a59 3286 if (value) {
wim 41:111ca62e8a59 3287 _lcd_bus |= LCD_BUS_I2C_E; // Set E bit
wim 41:111ca62e8a59 3288 }
wim 41:111ca62e8a59 3289 else {
wim 41:111ca62e8a59 3290 _lcd_bus &= ~LCD_BUS_I2C_E; // Reset E bit
wim 41:111ca62e8a59 3291 }
wim 41:111ca62e8a59 3292
wim 41:111ca62e8a59 3293 #endif
wim 37:ce348c002929 3294 }
wim 37:ce348c002929 3295
wim 37:ce348c002929 3296 // Set E pin (or E2 pin)
wim 37:ce348c002929 3297 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3298 void TextLCD_I2C::_setEnable(bool value) {
wim 37:ce348c002929 3299
wim 37:ce348c002929 3300 // Place the E or E2 bit data on the databus shadowvalue
wim 37:ce348c002929 3301 _setEnableBit(value);
wim 26:bd897a001012 3302
wim 26:bd897a001012 3303 #if (MCP23008==1)
wim 26:bd897a001012 3304 // MCP23008 portexpander
wim 26:bd897a001012 3305
wim 26:bd897a001012 3306 // write the new data to the portexpander
wim 37:ce348c002929 3307 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3308 #else
wim 26:bd897a001012 3309 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3310
wim 22:35742ec80c24 3311 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3312 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 26:bd897a001012 3313 #endif
wim 21:9eb628d9e164 3314 }
wim 21:9eb628d9e164 3315
wim 37:ce348c002929 3316
wim 21:9eb628d9e164 3317 // Set RS pin
wim 21:9eb628d9e164 3318 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3319 void TextLCD_I2C::_setRS(bool value) {
wim 21:9eb628d9e164 3320
wim 26:bd897a001012 3321 if (value) {
wim 38:cbe275b0b647 3322 _lcd_bus |= LCD_BUS_I2C_RS; // Set RS bit
wim 26:bd897a001012 3323 }
wim 26:bd897a001012 3324 else {
wim 38:cbe275b0b647 3325 _lcd_bus &= ~LCD_BUS_I2C_RS; // Reset RS bit
wim 26:bd897a001012 3326 }
wim 26:bd897a001012 3327
wim 26:bd897a001012 3328 #if (MCP23008==1)
wim 26:bd897a001012 3329 // MCP23008 portexpander
wim 26:bd897a001012 3330
wim 26:bd897a001012 3331 // write the new data to the portexpander
wim 37:ce348c002929 3332 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3333 #else
wim 26:bd897a001012 3334 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3335
wim 22:35742ec80c24 3336 // write the new data to the I2C portexpander
wim 22:35742ec80c24 3337 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3338 #endif
wim 21:9eb628d9e164 3339 }
wim 21:9eb628d9e164 3340
wim 21:9eb628d9e164 3341 // Set BL pin
wim 21:9eb628d9e164 3342 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 21:9eb628d9e164 3343 void TextLCD_I2C::_setBL(bool value) {
wim 21:9eb628d9e164 3344
wim 26:bd897a001012 3345 if (value) {
wim 38:cbe275b0b647 3346 _lcd_bus |= LCD_BUS_I2C_BL; // Set BL bit
wim 26:bd897a001012 3347 }
wim 26:bd897a001012 3348 else {
wim 38:cbe275b0b647 3349 _lcd_bus &= ~LCD_BUS_I2C_BL; // Reset BL bit
wim 26:bd897a001012 3350 }
wim 26:bd897a001012 3351
wim 26:bd897a001012 3352 #if (MCP23008==1)
wim 26:bd897a001012 3353 // MCP23008 portexpander
wim 26:bd897a001012 3354
wim 26:bd897a001012 3355 // write the new data to the portexpander
wim 37:ce348c002929 3356 _writeRegister(GPIO, _lcd_bus);
wim 37:ce348c002929 3357 #else
wim 37:ce348c002929 3358 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3359
wim 37:ce348c002929 3360 // write the new data to the I2C portexpander
wim 37:ce348c002929 3361 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 37:ce348c002929 3362 #endif
wim 37:ce348c002929 3363 }
wim 37:ce348c002929 3364
wim 38:cbe275b0b647 3365 #if(0)
wim 38:cbe275b0b647 3366 // New optimized v018
wim 38:cbe275b0b647 3367 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574), same as v018
wim 38:cbe275b0b647 3368 // Place the 4bit data in the databus shadowvalue
wim 38:cbe275b0b647 3369 // Used for mbed I2C bus expander
wim 38:cbe275b0b647 3370 const char _LCD_DATA_BITS[16] = {
wim 38:cbe275b0b647 3371 0x00,
wim 38:cbe275b0b647 3372 ( LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3373 ( LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3374 ( LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3375 ( LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3376 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3377 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3378 ( LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3379 (LCD_BUS_I2C_D7 ),
wim 38:cbe275b0b647 3380 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3381 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3382 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3383 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 ),
wim 38:cbe275b0b647 3384 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D4),
wim 38:cbe275b0b647 3385 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 ),
wim 38:cbe275b0b647 3386 (LCD_BUS_I2C_D7 | LCD_BUS_I2C_D6 | LCD_BUS_I2C_D5 | LCD_BUS_I2C_D4)
wim 38:cbe275b0b647 3387 };
wim 38:cbe275b0b647 3388 void TextLCD_I2C::_setDataBits(int value) {
wim 38:cbe275b0b647 3389
wim 38:cbe275b0b647 3390 //Clear all databits
wim 38:cbe275b0b647 3391 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 38:cbe275b0b647 3392
wim 38:cbe275b0b647 3393 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 38:cbe275b0b647 3394 _lcd_bus |= _LCD_DATA_BITS[value & 0x0F];
wim 38:cbe275b0b647 3395 }
wim 39:e9c2319de9c5 3396 #endif
wim 39:e9c2319de9c5 3397
wim 39:e9c2319de9c5 3398 // Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 39:e9c2319de9c5 3399 // Place the 4bit data in the databus shadowvalue
wim 39:e9c2319de9c5 3400 // Used for mbed I2C bus expander
wim 39:e9c2319de9c5 3401 void TextLCD_I2C::_setDataBits(int value) {
wim 39:e9c2319de9c5 3402
wim 39:e9c2319de9c5 3403 //Clear all databits
wim 39:e9c2319de9c5 3404 _lcd_bus &= ~LCD_BUS_I2C_MSK;
wim 39:e9c2319de9c5 3405
wim 39:e9c2319de9c5 3406 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 39:e9c2319de9c5 3407 if (value & 0x01){
wim 39:e9c2319de9c5 3408 _lcd_bus |= LCD_BUS_I2C_D4; // Set Databit
wim 39:e9c2319de9c5 3409 }
wim 39:e9c2319de9c5 3410
wim 39:e9c2319de9c5 3411 if (value & 0x02){
wim 39:e9c2319de9c5 3412 _lcd_bus |= LCD_BUS_I2C_D5; // Set Databit
wim 39:e9c2319de9c5 3413 }
wim 39:e9c2319de9c5 3414
wim 39:e9c2319de9c5 3415 if (value & 0x04) {
wim 39:e9c2319de9c5 3416 _lcd_bus |= LCD_BUS_I2C_D6; // Set Databit
wim 39:e9c2319de9c5 3417 }
wim 39:e9c2319de9c5 3418
wim 39:e9c2319de9c5 3419 if (value & 0x08) {
wim 39:e9c2319de9c5 3420 _lcd_bus |= LCD_BUS_I2C_D7; // Set Databit
wim 39:e9c2319de9c5 3421 }
wim 39:e9c2319de9c5 3422 }
wim 41:111ca62e8a59 3423
wim 37:ce348c002929 3424
wim 37:ce348c002929 3425 // Place the 4bit data on the databus
wim 37:ce348c002929 3426 // Used for mbed pins, I2C bus expander or SPI shifregister
wim 37:ce348c002929 3427 void TextLCD_I2C::_setData(int value) {
wim 37:ce348c002929 3428
wim 37:ce348c002929 3429 // Place the 4bit data on the databus shadowvalue
wim 37:ce348c002929 3430 _setDataBits(value);
wim 37:ce348c002929 3431
wim 37:ce348c002929 3432 // Place the 4bit data on the databus
wim 37:ce348c002929 3433 #if (MCP23008==1)
wim 37:ce348c002929 3434 // MCP23008 portexpander
wim 37:ce348c002929 3435
wim 37:ce348c002929 3436 // write the new data to the portexpander
wim 37:ce348c002929 3437 _writeRegister(GPIO, _lcd_bus);
wim 26:bd897a001012 3438 #else
wim 26:bd897a001012 3439 // PCF8574 of PCF8574A portexpander
wim 21:9eb628d9e164 3440
wim 21:9eb628d9e164 3441 // write the new data to the I2C portexpander
wim 21:9eb628d9e164 3442 _i2c->write(_slaveAddress, &_lcd_bus, 1);
wim 30:033048611c01 3443 #endif
wim 21:9eb628d9e164 3444 }
wim 21:9eb628d9e164 3445
wim 37:ce348c002929 3446 // Write data to MCP23008 I2C portexpander
wim 37:ce348c002929 3447 // Used for mbed I2C bus expander
wim 37:ce348c002929 3448 void TextLCD_I2C::_writeRegister (int reg, int value) {
0x6d61726b 42:7f270955a6b1 3449 char data[] = {(char)reg, (char)value};
wim 37:ce348c002929 3450
wim 37:ce348c002929 3451 _i2c->write(_slaveAddress, data, 2);
wim 37:ce348c002929 3452 }
wim 37:ce348c002929 3453
wim 37:ce348c002929 3454 //New optimized
wim 37:ce348c002929 3455 //Test faster _writeByte 0.11s vs 0.27s for a 20x4 fillscreen (PCF8574)
wim 37:ce348c002929 3456 //Test faster _writeByte 0.14s vs 0.34s for a 20x4 fillscreen (MCP23008)
wim 37:ce348c002929 3457
wim 37:ce348c002929 3458 // Write a byte using I2C
wim 37:ce348c002929 3459 void TextLCD_I2C::_writeByte(int value) {
wim 37:ce348c002929 3460 char data[6];
wim 37:ce348c002929 3461
wim 37:ce348c002929 3462 #if (MCP23008==1)
wim 37:ce348c002929 3463 // MCP23008 portexpander
wim 37:ce348c002929 3464
wim 37:ce348c002929 3465 data[0] = GPIO; // set registeraddres
wim 37:ce348c002929 3466 // Note: auto-increment is disabled so all data will go to GPIO register
wim 37:ce348c002929 3467
wim 37:ce348c002929 3468 _setEnableBit(true); // set E
wim 37:ce348c002929 3469 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3470 data[1] = _lcd_bus;
wim 37:ce348c002929 3471
wim 37:ce348c002929 3472 _setEnableBit(false); // clear E
wim 37:ce348c002929 3473 data[2] = _lcd_bus;
wim 37:ce348c002929 3474
wim 37:ce348c002929 3475 _setEnableBit(true); // set E
wim 37:ce348c002929 3476 _setDataBits(value); // set data low
wim 37:ce348c002929 3477 data[3] = _lcd_bus;
wim 37:ce348c002929 3478
wim 37:ce348c002929 3479 _setEnableBit(false); // clear E
wim 37:ce348c002929 3480 data[4] = _lcd_bus;
wim 37:ce348c002929 3481
wim 37:ce348c002929 3482 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3483 _i2c->write(_slaveAddress, data, 5);
wim 37:ce348c002929 3484 #else
wim 37:ce348c002929 3485 // PCF8574 of PCF8574A portexpander
wim 37:ce348c002929 3486
wim 37:ce348c002929 3487 _setEnableBit(true); // set E
wim 37:ce348c002929 3488 _setDataBits(value >> 4); // set data high
wim 37:ce348c002929 3489 data[0] = _lcd_bus;
wim 37:ce348c002929 3490
wim 37:ce348c002929 3491 _setEnableBit(false); // clear E
wim 37:ce348c002929 3492 data[1] = _lcd_bus;
wim 37:ce348c002929 3493
wim 37:ce348c002929 3494 _setEnableBit(true); // set E
wim 37:ce348c002929 3495 _setDataBits(value); // set data low
wim 37:ce348c002929 3496 data[2] = _lcd_bus;
wim 37:ce348c002929 3497
wim 37:ce348c002929 3498 _setEnableBit(false); // clear E
wim 37:ce348c002929 3499 data[3] = _lcd_bus;
wim 37:ce348c002929 3500
wim 37:ce348c002929 3501 // write the packed data to the I2C portexpander
wim 37:ce348c002929 3502 _i2c->write(_slaveAddress, data, 4);
wim 37:ce348c002929 3503 #endif
wim 37:ce348c002929 3504 }
wim 37:ce348c002929 3505
wim 37:ce348c002929 3506 #endif /* I2C Expander PCF8574/MCP23008 */
wim 37:ce348c002929 3507 //---------- End TextLCD_I2C ------------
wim 37:ce348c002929 3508
wim 37:ce348c002929 3509
wim 37:ce348c002929 3510 //--------- Start TextLCD_SPI -----------
wim 37:ce348c002929 3511 #if(LCD_SPI == 1) /* SPI Expander SN74595 */
wim 37:ce348c002929 3512
wim 37:ce348c002929 3513 /** Create a TextLCD interface using an SPI 74595 portexpander
wim 37:ce348c002929 3514 *
wim 37:ce348c002929 3515 * @param spi SPI Bus
wim 37:ce348c002929 3516 * @param cs chip select pin (active low)
wim 37:ce348c002929 3517 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 37:ce348c002929 3518 * @param ctrl LCD controller (default = HD44780)
wim 37:ce348c002929 3519 */
wim 37:ce348c002929 3520 TextLCD_SPI::TextLCD_SPI(SPI *spi, PinName cs, LCDType type, LCDCtrl ctrl) :
wim 37:ce348c002929 3521 TextLCD_Base(type, ctrl),
wim 37:ce348c002929 3522 _spi(spi),
wim 38:cbe275b0b647 3523 _cs(cs) {
wim 37:ce348c002929 3524 // Init cs
wim 37:ce348c002929 3525 _cs = 1;
wim 37:ce348c002929 3526
wim 37:ce348c002929 3527 // Setup the spi for 8 bit data, low steady state clock,
wim 37:ce348c002929 3528 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 37:ce348c002929 3529 _spi->format(8,0);
wim 37:ce348c002929 3530 _spi->frequency(500000);
wim 37:ce348c002929 3531 //_spi.frequency(1000000);
wim 37:ce348c002929 3532
wim 38:cbe275b0b647 3533 wait_ms(100); // Wait 100ms to ensure LCD powered up
wim 38:cbe275b0b647 3534
wim 37:ce348c002929 3535 // Init the portexpander bus
wim 38:cbe275b0b647 3536 _lcd_bus = LCD_BUS_SPI_DEF;
wim 37:ce348c002929 3537
wim 37:ce348c002929 3538 // write the new data to the portexpander
wim 37:ce348c002929 3539 _cs = 0;
wim 37:ce348c002929 3540 _spi->write(_lcd_bus);
wim 37:ce348c002929 3541 _cs = 1;
wim 37:ce348c002929 3542
wim 37:ce348c002929 3543 _init(_LCD_DL_4); // Set Datalength to 4 bit for all serial expander interfaces
wim 37:ce348c002929 3544 }
wim 37:ce348c002929 3545
wim 37:ce348c002929 3546 // Set E pin (or E2 pin)
wim 37:ce348c002929 3547 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3548 void TextLCD_SPI::_setEnable(bool value) {
wim 37:ce348c002929 3549
wim 37:ce348c002929 3550 if(_ctrl_idx==_LCDCtrl_0) {
wim 37:ce348c002929 3551 if (value) {
wim 38:cbe275b0b647 3552 _lcd_bus |= LCD_BUS_SPI_E; // Set E bit
wim 37:ce348c002929 3553 }
wim 37:ce348c002929 3554 else {
wim 38:cbe275b0b647 3555 _lcd_bus &= ~LCD_BUS_SPI_E; // Reset E bit
wim 37:ce348c002929 3556 }
wim 37:ce348c002929 3557 }
wim 37:ce348c002929 3558 else {
wim 37:ce348c002929 3559 if (value) {
wim 38:cbe275b0b647 3560 _lcd_bus |= LCD_BUS_SPI_E2; // Set E2 bit
wim 37:ce348c002929 3561 }
wim 37:ce348c002929 3562 else {
wim 38:cbe275b0b647 3563 _lcd_bus &= ~LCD_BUS_SPI_E2; // Reset E2 bit
wim 37:ce348c002929 3564 }
wim 37:ce348c002929 3565 }
wim 37:ce348c002929 3566
wim 37:ce348c002929 3567 // write the new data to the SPI portexpander
wim 37:ce348c002929 3568 _cs = 0;
wim 37:ce348c002929 3569 _spi->write(_lcd_bus);
wim 37:ce348c002929 3570 _cs = 1;
wim 37:ce348c002929 3571 }
wim 37:ce348c002929 3572
wim 37:ce348c002929 3573 // Set RS pin
wim 37:ce348c002929 3574 // Used for mbed pins, I2C bus expander or SPI shiftregister and SPI_N
wim 37:ce348c002929 3575 void TextLCD_SPI::_setRS(bool value) {
wim 37:ce348c002929 3576
wim 37:ce348c002929 3577 if (value) {
wim 38:cbe275b0b647 3578 _lcd_bus |= LCD_BUS_SPI_RS; // Set RS bit
wim 37:ce348c002929 3579 }
wim 37:ce348c002929 3580 else {
wim 38:cbe275b0b647 3581 _lcd_bus &= ~LCD_BUS_SPI_RS; // Reset RS bit
wim 37:ce348c002929 3582 }
wim 37:ce348c002929 3583
wim 37:ce348c002929 3584 // write the new data to the SPI portexpander
wim 37:ce348c002929 3585 _cs = 0;
wim 37:ce348c002929 3586 _spi->write(_lcd_bus);
wim 37:ce348c002929 3587 _cs = 1;
wim 37:ce348c002929 3588 }
wim 37:ce348c002929 3589
wim 37:ce348c002929 3590 // Set BL pin
wim 37:ce348c002929 3591 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3592 void TextLCD_SPI::_setBL(bool value) {
wim 37:ce348c002929 3593
wim 37:ce348c002929 3594 if (value) {
wim 38:cbe275b0b647 3595 _lcd_bus |= LCD_BUS_SPI_BL; // Set BL bit
wim 37:ce348c002929 3596 }
wim 37:ce348c002929 3597 else {
wim 38:cbe275b0b647 3598 _lcd_bus &= ~LCD_BUS_SPI_BL; // Reset BL bit
wim 37:ce348c002929 3599 }
wim 37:ce348c002929 3600
wim 37:ce348c002929 3601 // write the new data to the SPI portexpander
wim 37:ce348c002929 3602 _cs = 0;
wim 37:ce348c002929 3603 _spi->write(_lcd_bus);
wim 37:ce348c002929 3604 _cs = 1;
wim 37:ce348c002929 3605 }
wim 21:9eb628d9e164 3606
wim 21:9eb628d9e164 3607 // Place the 4bit data on the databus
wim 37:ce348c002929 3608 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 37:ce348c002929 3609 void TextLCD_SPI::_setData(int value) {
wim 22:35742ec80c24 3610
wim 22:35742ec80c24 3611 // Set bit by bit to support any mapping of expander portpins to LCD pins
wim 37:ce348c002929 3612 if (value & 0x01) {
wim 38:cbe275b0b647 3613 _lcd_bus |= LCD_BUS_SPI_D4; // Set Databit
wim 26:bd897a001012 3614 }
wim 37:ce348c002929 3615 else {
wim 38:cbe275b0b647 3616 _lcd_bus &= ~LCD_BUS_SPI_D4; // Reset Databit
wim 37:ce348c002929 3617 }
wim 37:ce348c002929 3618
wim 37:ce348c002929 3619 if (value & 0x02) {
wim 38:cbe275b0b647 3620 _lcd_bus |= LCD_BUS_SPI_D5; // Set Databit
wim 26:bd897a001012 3621 }
wim 26:bd897a001012 3622 else {
wim 38:cbe275b0b647 3623 _lcd_bus &= ~LCD_BUS_SPI_D5; // Reset Databit
wim 37:ce348c002929 3624 }
wim 37:ce348c002929 3625
wim 37:ce348c002929 3626 if (value & 0x04) {
wim 38:cbe275b0b647 3627 _lcd_bus |= LCD_BUS_SPI_D6; // Set Databit
wim 26:bd897a001012 3628 }
wim 37:ce348c002929 3629 else {
wim 38:cbe275b0b647 3630 _lcd_bus &= ~LCD_BUS_SPI_D6; // Reset Databit
wim 37:ce348c002929 3631 }
wim 37:ce348c002929 3632
wim 37:ce348c002929 3633 if (value & 0x08) {
wim 38:cbe275b0b647 3634 _lcd_bus |= LCD_BUS_SPI_D7; // Set Databit
wim 26:bd897a001012 3635 }
wim 26:bd897a001012 3636 else {
wim 38:cbe275b0b647 3637 _lcd_bus &= ~LCD_BUS_SPI_D7; // Reset Databit
wim 26:bd897a001012 3638 }
wim 21:9eb628d9e164 3639
wim 37:ce348c002929 3640 // write the new data to the SPI portexpander
wim 37:ce348c002929 3641 _cs = 0;
wim 37:ce348c002929 3642 _spi->write(_lcd_bus);
wim 37:ce348c002929 3643 _cs = 1;
wim 22:35742ec80c24 3644 }
wim 21:9eb628d9e164 3645
wim 37:ce348c002929 3646 #endif /* SPI Expander SN74595 */
wim 37:ce348c002929 3647 //---------- End TextLCD_SPI ------------
wim 21:9eb628d9e164 3648
wim 21:9eb628d9e164 3649
wim 28:30fa94f7341c 3650 //--------- Start TextLCD_I2C_N ---------
wim 34:e5a0dcb43ecc 3651 #if(LCD_I2C_N == 1) /* Native I2C */
wim 28:30fa94f7341c 3652
wim 28:30fa94f7341c 3653 /** Create a TextLCD interface using a controller with native I2C interface
wim 28:30fa94f7341c 3654 *
wim 28:30fa94f7341c 3655 * @param i2c I2C Bus
wim 28:30fa94f7341c 3656 * @param deviceAddress I2C slave address (default = 0x7C)
wim 28:30fa94f7341c 3657 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 28:30fa94f7341c 3658 * @param bl Backlight control line (optional, default = NC)
wim 28:30fa94f7341c 3659 * @param ctrl LCD controller (default = ST7032_3V3)
wim 28:30fa94f7341c 3660 */
wim 28:30fa94f7341c 3661 TextLCD_I2C_N::TextLCD_I2C_N(I2C *i2c, char deviceAddress, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 28:30fa94f7341c 3662 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 3663
wim 33:900a94bc7585 3664 _i2c(i2c){
wim 30:033048611c01 3665
wim 28:30fa94f7341c 3666 _slaveAddress = deviceAddress & 0xFE;
wim 28:30fa94f7341c 3667
wim 28:30fa94f7341c 3668 // Setup the I2C bus
wim 29:a3663151aa65 3669 // The max bitrate for ST7032i is 400kbit, lets stick to default here
wim 29:a3663151aa65 3670 _i2c->frequency(100000);
wim 32:59c4b8f648d4 3671
wim 30:033048611c01 3672
wim 28:30fa94f7341c 3673 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 28:30fa94f7341c 3674 if (bl != NC) {
wim 28:30fa94f7341c 3675 _bl = new DigitalOut(bl); //Construct new pin
wim 28:30fa94f7341c 3676 _bl->write(0); //Deactivate
wim 28:30fa94f7341c 3677 }
wim 28:30fa94f7341c 3678 else {
wim 28:30fa94f7341c 3679 // No Hardware Backlight pin
wim 28:30fa94f7341c 3680 _bl = NULL; //Construct dummy pin
wim 28:30fa94f7341c 3681 }
wim 28:30fa94f7341c 3682
wim 30:033048611c01 3683 //Sanity check
wim 30:033048611c01 3684 if (_ctrl & LCD_C_I2C) {
wim 36:9f5f86dfd44a 3685 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 3686 }
wim 30:033048611c01 3687 else {
wim 30:033048611c01 3688 error("Error: LCD Controller type does not support native I2C interface\n\r");
wim 30:033048611c01 3689 }
wim 28:30fa94f7341c 3690 }
wim 28:30fa94f7341c 3691
wim 28:30fa94f7341c 3692 TextLCD_I2C_N::~TextLCD_I2C_N() {
wim 28:30fa94f7341c 3693 if (_bl != NULL) {delete _bl;} // BL pin
wim 28:30fa94f7341c 3694 }
wim 28:30fa94f7341c 3695
wim 28:30fa94f7341c 3696 // Not used in this mode
wim 28:30fa94f7341c 3697 void TextLCD_I2C_N::_setEnable(bool value) {
wim 28:30fa94f7341c 3698 }
wim 28:30fa94f7341c 3699
wim 28:30fa94f7341c 3700 // Set RS pin
wim 28:30fa94f7341c 3701 // Used for mbed pins, I2C bus expander or SPI shiftregister and native I2C or SPI
wim 28:30fa94f7341c 3702 void TextLCD_I2C_N::_setRS(bool value) {
wim 30:033048611c01 3703 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3704 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3705 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3706 //
wim 30:033048611c01 3707 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3708 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3709 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3710 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3711 //
wim 30:033048611c01 3712
wim 28:30fa94f7341c 3713 if (value) {
wim 28:30fa94f7341c 3714 _controlbyte = 0x40; // Next byte is data, No more control bytes will follow
wim 28:30fa94f7341c 3715 }
wim 28:30fa94f7341c 3716 else {
wim 28:30fa94f7341c 3717 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 28:30fa94f7341c 3718 }
wim 28:30fa94f7341c 3719 }
wim 28:30fa94f7341c 3720
wim 28:30fa94f7341c 3721 // Set BL pin
wim 28:30fa94f7341c 3722 void TextLCD_I2C_N::_setBL(bool value) {
wim 28:30fa94f7341c 3723 if (_bl) {
wim 28:30fa94f7341c 3724 _bl->write(value);
wim 28:30fa94f7341c 3725 }
wim 28:30fa94f7341c 3726 }
wim 29:a3663151aa65 3727
wim 29:a3663151aa65 3728 // Not used in this mode
wim 29:a3663151aa65 3729 void TextLCD_I2C_N::_setData(int value) {
wim 29:a3663151aa65 3730 }
wim 29:a3663151aa65 3731
wim 28:30fa94f7341c 3732 // Write a byte using I2C
wim 28:30fa94f7341c 3733 void TextLCD_I2C_N::_writeByte(int value) {
wim 30:033048611c01 3734 // The controlbyte defines the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 3735 // Start Slaveaddress+RW b7 b6 b5 b4 b3 b2 b1 b0 b7...........b0 Stop
wim 30:033048611c01 3736 // Co RS RW 0 0 0 0 0 command or data
wim 30:033048611c01 3737 //
wim 30:033048611c01 3738 // C0=1 indicates that another controlbyte will follow after the next data or command byte
wim 30:033048611c01 3739 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 3740 // RW=0 means write to controller. RW=1 means that controller will be read from after the next command.
wim 30:033048611c01 3741 // Many native I2C controllers dont support this option and it is not used by this lib.
wim 30:033048611c01 3742 //
0x6d61726b 42:7f270955a6b1 3743 char data[] = {(char)_controlbyte, (char)value};
wim 28:30fa94f7341c 3744
wim 32:59c4b8f648d4 3745 #if(LCD_I2C_ACK==1)
wim 32:59c4b8f648d4 3746 //Controllers that support ACK
wim 30:033048611c01 3747 _i2c->write(_slaveAddress, data, 2);
wim 32:59c4b8f648d4 3748 #else
wim 32:59c4b8f648d4 3749 //Controllers that dont support ACK
wim 37:ce348c002929 3750 //Note: This may be issue with some mbed platforms that dont fully/correctly support I2C byte operations.
wim 32:59c4b8f648d4 3751 _i2c->start();
wim 32:59c4b8f648d4 3752 _i2c->write(_slaveAddress);
wim 32:59c4b8f648d4 3753 _i2c->write(data[0]);
wim 32:59c4b8f648d4 3754 _i2c->write(data[1]);
wim 32:59c4b8f648d4 3755 _i2c->stop();
wim 32:59c4b8f648d4 3756 #endif
wim 28:30fa94f7341c 3757 }
wim 34:e5a0dcb43ecc 3758 #endif /* Native I2C */
wim 28:30fa94f7341c 3759 //-------- End TextLCD_I2C_N ------------
wim 28:30fa94f7341c 3760
wim 28:30fa94f7341c 3761
wim 25:6162b31128c9 3762 //--------- Start TextLCD_SPI_N ---------
wim 34:e5a0dcb43ecc 3763 #if(LCD_SPI_N == 1) /* Native SPI bus */
wim 30:033048611c01 3764 /** Create a TextLCD interface using a controller with a native SPI4 interface
Sissors 24:fb3399713710 3765 *
Sissors 24:fb3399713710 3766 * @param spi SPI Bus
Sissors 24:fb3399713710 3767 * @param cs chip select pin (active low)
wim 25:6162b31128c9 3768 * @param rs Instruction/data control line
Sissors 24:fb3399713710 3769 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 25:6162b31128c9 3770 * @param bl Backlight control line (optional, default = NC)
wim 26:bd897a001012 3771 * @param ctrl LCD controller (default = ST7032_3V3)
wim 25:6162b31128c9 3772 */
wim 25:6162b31128c9 3773 TextLCD_SPI_N::TextLCD_SPI_N(SPI *spi, PinName cs, PinName rs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 25:6162b31128c9 3774 TextLCD_Base(type, ctrl),
wim 25:6162b31128c9 3775 _spi(spi),
wim 25:6162b31128c9 3776 _cs(cs),
wim 25:6162b31128c9 3777 _rs(rs) {
Sissors 24:fb3399713710 3778
wim 32:59c4b8f648d4 3779 // Init CS
wim 32:59c4b8f648d4 3780 _cs = 1;
wim 32:59c4b8f648d4 3781
wim 36:9f5f86dfd44a 3782 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3783 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3784 // _spi->format(8,3);
wim 37:ce348c002929 3785 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3786 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3787
Sissors 24:fb3399713710 3788 // Setup the spi for 8 bit data, low steady state clock,
Sissors 24:fb3399713710 3789 // rising edge capture, with a 500KHz or 1MHz clock rate
Sissors 24:fb3399713710 3790 _spi->format(8,0);
wim 36:9f5f86dfd44a 3791 // _spi->frequency(500000);
Sissors 24:fb3399713710 3792 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3793
Sissors 24:fb3399713710 3794 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
Sissors 24:fb3399713710 3795 if (bl != NC) {
Sissors 24:fb3399713710 3796 _bl = new DigitalOut(bl); //Construct new pin
Sissors 24:fb3399713710 3797 _bl->write(0); //Deactivate
Sissors 24:fb3399713710 3798 }
Sissors 24:fb3399713710 3799 else {
Sissors 24:fb3399713710 3800 // No Hardware Backlight pin
Sissors 24:fb3399713710 3801 _bl = NULL; //Construct dummy pin
Sissors 24:fb3399713710 3802 }
wim 30:033048611c01 3803
wim 30:033048611c01 3804 //Sanity check
wim 30:033048611c01 3805 if (_ctrl & LCD_C_SPI4) {
wim 36:9f5f86dfd44a 3806 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3807 // ST7070 must set datalength to 8 bits!
wim 30:033048611c01 3808 }
wim 30:033048611c01 3809 else {
wim 30:033048611c01 3810 error("Error: LCD Controller type does not support native SPI4 interface\n\r");
wim 30:033048611c01 3811 }
Sissors 24:fb3399713710 3812 }
Sissors 24:fb3399713710 3813
wim 25:6162b31128c9 3814 TextLCD_SPI_N::~TextLCD_SPI_N() {
Sissors 24:fb3399713710 3815 if (_bl != NULL) {delete _bl;} // BL pin
Sissors 24:fb3399713710 3816 }
Sissors 24:fb3399713710 3817
Sissors 24:fb3399713710 3818 // Not used in this mode
wim 25:6162b31128c9 3819 void TextLCD_SPI_N::_setEnable(bool value) {
Sissors 24:fb3399713710 3820 }
Sissors 24:fb3399713710 3821
Sissors 24:fb3399713710 3822 // Set RS pin
wim 36:9f5f86dfd44a 3823 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 25:6162b31128c9 3824 void TextLCD_SPI_N::_setRS(bool value) {
Sissors 24:fb3399713710 3825 _rs = value;
Sissors 24:fb3399713710 3826 }
Sissors 24:fb3399713710 3827
Sissors 24:fb3399713710 3828 // Set BL pin
wim 25:6162b31128c9 3829 void TextLCD_SPI_N::_setBL(bool value) {
wim 26:bd897a001012 3830 if (_bl) {
Sissors 24:fb3399713710 3831 _bl->write(value);
wim 26:bd897a001012 3832 }
Sissors 24:fb3399713710 3833 }
Sissors 24:fb3399713710 3834
wim 29:a3663151aa65 3835 // Not used in this mode
wim 29:a3663151aa65 3836 void TextLCD_SPI_N::_setData(int value) {
wim 29:a3663151aa65 3837 }
wim 29:a3663151aa65 3838
Sissors 24:fb3399713710 3839 // Write a byte using SPI
wim 25:6162b31128c9 3840 void TextLCD_SPI_N::_writeByte(int value) {
Sissors 24:fb3399713710 3841 _cs = 0;
Sissors 24:fb3399713710 3842 wait_us(1);
Sissors 24:fb3399713710 3843 _spi->write(value);
Sissors 24:fb3399713710 3844 wait_us(1);
Sissors 24:fb3399713710 3845 _cs = 1;
Sissors 24:fb3399713710 3846 }
wim 34:e5a0dcb43ecc 3847 #endif /* Native SPI bus */
wim 25:6162b31128c9 3848 //-------- End TextLCD_SPI_N ------------
wim 21:9eb628d9e164 3849
wim 21:9eb628d9e164 3850
wim 36:9f5f86dfd44a 3851 //-------- Start TextLCD_SPI_N_3_8 --------
wim 36:9f5f86dfd44a 3852 #if(LCD_SPI_N_3_8 == 1) /* Native SPI bus */
wim 36:9f5f86dfd44a 3853
wim 36:9f5f86dfd44a 3854 /** Create a TextLCD interface using a controller with a native SPI3 8 bits interface
wim 36:9f5f86dfd44a 3855 * This mode is supported by ST7070. Note that implementation in TexTLCD is not very efficient due to
wim 36:9f5f86dfd44a 3856 * structure of the TextLCD library: each databyte is written separately and requires a separate 'count command' set to 1 byte.
wim 36:9f5f86dfd44a 3857 *
wim 36:9f5f86dfd44a 3858 * @param spi SPI Bus
wim 36:9f5f86dfd44a 3859 * @param cs chip select pin (active low)
wim 36:9f5f86dfd44a 3860 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 36:9f5f86dfd44a 3861 * @param bl Backlight control line (optional, default = NC)
wim 36:9f5f86dfd44a 3862 * @param ctrl LCD controller (default = ST7070)
wim 36:9f5f86dfd44a 3863 */
wim 36:9f5f86dfd44a 3864 TextLCD_SPI_N_3_8::TextLCD_SPI_N_3_8(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 36:9f5f86dfd44a 3865 TextLCD_Base(type, ctrl),
wim 36:9f5f86dfd44a 3866 _spi(spi),
wim 36:9f5f86dfd44a 3867 _cs(cs) {
wim 36:9f5f86dfd44a 3868
wim 36:9f5f86dfd44a 3869 // Init CS
wim 36:9f5f86dfd44a 3870 _cs = 1;
wim 36:9f5f86dfd44a 3871
wim 36:9f5f86dfd44a 3872 // Setup the spi for 8 bit data, high steady state clock,
wim 36:9f5f86dfd44a 3873 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3874 // _spi->format(8,3);
wim 37:ce348c002929 3875 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3876 // _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3877
wim 36:9f5f86dfd44a 3878 // Setup the spi for 8 bit data, low steady state clock,
wim 36:9f5f86dfd44a 3879 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 36:9f5f86dfd44a 3880 _spi->format(8,0);
wim 36:9f5f86dfd44a 3881 // _spi->frequency(500000);
wim 36:9f5f86dfd44a 3882 _spi->frequency(1000000);
wim 36:9f5f86dfd44a 3883
wim 36:9f5f86dfd44a 3884
wim 36:9f5f86dfd44a 3885 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 36:9f5f86dfd44a 3886 if (bl != NC) {
wim 36:9f5f86dfd44a 3887 _bl = new DigitalOut(bl); //Construct new pin
wim 36:9f5f86dfd44a 3888 _bl->write(0); //Deactivate
wim 36:9f5f86dfd44a 3889 }
wim 36:9f5f86dfd44a 3890 else {
wim 36:9f5f86dfd44a 3891 // No Hardware Backlight pin
wim 36:9f5f86dfd44a 3892 _bl = NULL; //Construct dummy pin
wim 36:9f5f86dfd44a 3893 }
wim 36:9f5f86dfd44a 3894
wim 36:9f5f86dfd44a 3895 //Sanity check
wim 36:9f5f86dfd44a 3896 if (_ctrl & LCD_C_SPI3_8) {
wim 36:9f5f86dfd44a 3897 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 36:9f5f86dfd44a 3898 }
wim 36:9f5f86dfd44a 3899 else {
wim 36:9f5f86dfd44a 3900 error("Error: LCD Controller type does not support native SPI3 8 bits interface\n\r");
wim 36:9f5f86dfd44a 3901 }
wim 36:9f5f86dfd44a 3902 }
wim 36:9f5f86dfd44a 3903
wim 36:9f5f86dfd44a 3904 TextLCD_SPI_N_3_8::~TextLCD_SPI_N_3_8() {
wim 36:9f5f86dfd44a 3905 if (_bl != NULL) {delete _bl;} // BL pin
wim 36:9f5f86dfd44a 3906 }
wim 36:9f5f86dfd44a 3907
wim 36:9f5f86dfd44a 3908 // Not used in this mode
wim 36:9f5f86dfd44a 3909 void TextLCD_SPI_N_3_8::_setEnable(bool value) {
wim 36:9f5f86dfd44a 3910 }
wim 36:9f5f86dfd44a 3911
wim 36:9f5f86dfd44a 3912 // Used for mbed pins, I2C bus expander or SPI shiftregister, SPI_N
wim 36:9f5f86dfd44a 3913 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 36:9f5f86dfd44a 3914 void TextLCD_SPI_N_3_8::_setRS(bool value) {
wim 36:9f5f86dfd44a 3915
wim 36:9f5f86dfd44a 3916 if (value) {
wim 36:9f5f86dfd44a 3917 _controlbyte = 0x01; // Next byte is data, No more control bytes will follow
wim 36:9f5f86dfd44a 3918 }
wim 36:9f5f86dfd44a 3919 else {
wim 36:9f5f86dfd44a 3920 _controlbyte = 0x00; // Next byte is command, No more control bytes will follow
wim 36:9f5f86dfd44a 3921 }
wim 36:9f5f86dfd44a 3922 }
wim 36:9f5f86dfd44a 3923
wim 36:9f5f86dfd44a 3924 // Set BL pin
wim 36:9f5f86dfd44a 3925 void TextLCD_SPI_N_3_8::_setBL(bool value) {
wim 36:9f5f86dfd44a 3926 if (_bl) {
wim 36:9f5f86dfd44a 3927 _bl->write(value);
wim 36:9f5f86dfd44a 3928 }
wim 36:9f5f86dfd44a 3929 }
wim 36:9f5f86dfd44a 3930
wim 36:9f5f86dfd44a 3931 // Not used in this mode
wim 36:9f5f86dfd44a 3932 void TextLCD_SPI_N_3_8::_setData(int value) {
wim 36:9f5f86dfd44a 3933 }
wim 36:9f5f86dfd44a 3934
wim 36:9f5f86dfd44a 3935 // Write a byte using SPI3 8 bits mode (ST7070)
wim 36:9f5f86dfd44a 3936 void TextLCD_SPI_N_3_8::_writeByte(int value) {
wim 36:9f5f86dfd44a 3937
wim 36:9f5f86dfd44a 3938 if (_controlbyte == 0x00) { // Byte is command
wim 36:9f5f86dfd44a 3939 _cs = 0;
wim 36:9f5f86dfd44a 3940 wait_us(1);
wim 36:9f5f86dfd44a 3941 _spi->write(value);
wim 36:9f5f86dfd44a 3942 wait_us(1);
wim 36:9f5f86dfd44a 3943 _cs = 1;
wim 36:9f5f86dfd44a 3944 }
wim 36:9f5f86dfd44a 3945 else { // Byte is data
wim 36:9f5f86dfd44a 3946 // Select Extended Instr Set
wim 36:9f5f86dfd44a 3947 _cs = 0;
wim 36:9f5f86dfd44a 3948 wait_us(1);
wim 36:9f5f86dfd44a 3949 _spi->write(0x20 | _function | 0x04); // Set function, 0 0 1 DL N EXT=1 x x (Select Instr Set = 1));
wim 36:9f5f86dfd44a 3950 wait_us(1);
wim 36:9f5f86dfd44a 3951 _cs = 1;
wim 36:9f5f86dfd44a 3952
wim 36:9f5f86dfd44a 3953 wait_us(40); // Wait until command has finished...
wim 36:9f5f86dfd44a 3954
wim 36:9f5f86dfd44a 3955 // Set Count to 1 databyte
wim 36:9f5f86dfd44a 3956 _cs = 0;
wim 36:9f5f86dfd44a 3957 wait_us(1);
wim 36:9f5f86dfd44a 3958 _spi->write(0x80); // Set display data length, 1 L6 L5 L4 L3 L2 L1 L0 (Instr Set = 1)
wim 36:9f5f86dfd44a 3959 wait_us(1);
wim 36:9f5f86dfd44a 3960 _cs = 1;
wim 36:9f5f86dfd44a 3961
wim 36:9f5f86dfd44a 3962 wait_us(40);
wim 36:9f5f86dfd44a 3963
wim 36:9f5f86dfd44a 3964 // Write 1 databyte
wim 36:9f5f86dfd44a 3965 _cs = 0;
wim 36:9f5f86dfd44a 3966 wait_us(1);
wim 36:9f5f86dfd44a 3967 _spi->write(value); // Write data (Instr Set = 1)
wim 36:9f5f86dfd44a 3968 wait_us(1);
wim 36:9f5f86dfd44a 3969 _cs = 1;
wim 36:9f5f86dfd44a 3970
wim 36:9f5f86dfd44a 3971 wait_us(40);
wim 36:9f5f86dfd44a 3972
wim 36:9f5f86dfd44a 3973 // Select Standard Instr Set
wim 36:9f5f86dfd44a 3974 _cs = 0;
wim 36:9f5f86dfd44a 3975 wait_us(1);
wim 36:9f5f86dfd44a 3976 _spi->write(0x20 | _function); // Set function, 0 0 1 DL N EXT=0 x x (Select Instr Set = 0));
wim 36:9f5f86dfd44a 3977 wait_us(1);
wim 36:9f5f86dfd44a 3978 _cs = 1;
wim 36:9f5f86dfd44a 3979 }
wim 36:9f5f86dfd44a 3980 }
wim 36:9f5f86dfd44a 3981 #endif /* Native SPI bus */
wim 36:9f5f86dfd44a 3982 //------- End TextLCD_SPI_N_3_8 -----------
wim 36:9f5f86dfd44a 3983
wim 36:9f5f86dfd44a 3984
wim 30:033048611c01 3985 //-------- Start TextLCD_SPI_N_3_9 --------
wim 34:e5a0dcb43ecc 3986 #if(LCD_SPI_N_3_9 == 1) /* Native SPI bus */
wim 34:e5a0dcb43ecc 3987 //Code checked out on logic analyser. Not yet tested on hardware..
wim 30:033048611c01 3988
wim 30:033048611c01 3989 /** Create a TextLCD interface using a controller with a native SPI3 9 bits interface
wim 30:033048611c01 3990 *
wim 30:033048611c01 3991 * @param spi SPI Bus
wim 30:033048611c01 3992 * @param cs chip select pin (active low)
wim 30:033048611c01 3993 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 3994 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 3995 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 3996 */
wim 30:033048611c01 3997 TextLCD_SPI_N_3_9::TextLCD_SPI_N_3_9(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 3998 TextLCD_Base(type, ctrl),
wim 30:033048611c01 3999 _spi(spi),
wim 33:900a94bc7585 4000 _cs(cs) {
wim 32:59c4b8f648d4 4001
wim 32:59c4b8f648d4 4002 // Init CS
wim 32:59c4b8f648d4 4003 _cs = 1;
wim 32:59c4b8f648d4 4004
wim 34:e5a0dcb43ecc 4005 // Setup the spi for 9 bit data, high steady state clock,
wim 30:033048611c01 4006 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 4007 _spi->format(9,3);
wim 30:033048611c01 4008 _spi->frequency(1000000);
wim 30:033048611c01 4009
wim 30:033048611c01 4010 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 4011 if (bl != NC) {
wim 30:033048611c01 4012 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 4013 _bl->write(0); //Deactivate
wim 30:033048611c01 4014 }
wim 30:033048611c01 4015 else {
wim 30:033048611c01 4016 // No Hardware Backlight pin
wim 30:033048611c01 4017 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 4018 }
wim 30:033048611c01 4019
wim 30:033048611c01 4020 //Sanity check
wim 36:9f5f86dfd44a 4021 if (_ctrl & LCD_C_SPI3_9) {
wim 36:9f5f86dfd44a 4022 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 4023 }
wim 30:033048611c01 4024 else {
wim 30:033048611c01 4025 error("Error: LCD Controller type does not support native SPI3 9 bits interface\n\r");
wim 30:033048611c01 4026 }
wim 30:033048611c01 4027 }
wim 30:033048611c01 4028
wim 30:033048611c01 4029 TextLCD_SPI_N_3_9::~TextLCD_SPI_N_3_9() {
wim 30:033048611c01 4030 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 4031 }
wim 30:033048611c01 4032
wim 30:033048611c01 4033 // Not used in this mode
wim 30:033048611c01 4034 void TextLCD_SPI_N_3_9::_setEnable(bool value) {
wim 30:033048611c01 4035 }
wim 30:033048611c01 4036
wim 30:033048611c01 4037 // Set RS pin
wim 30:033048611c01 4038 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 4039 void TextLCD_SPI_N_3_9::_setRS(bool value) {
wim 30:033048611c01 4040 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 4041 // b8 b7...........b0
wim 30:033048611c01 4042 // RS command or data
wim 30:033048611c01 4043 //
wim 30:033048611c01 4044 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 4045 //
wim 30:033048611c01 4046
wim 30:033048611c01 4047 if (value) {
wim 30:033048611c01 4048 _controlbyte = 0x01; // Next byte is data
wim 30:033048611c01 4049 }
wim 30:033048611c01 4050 else {
wim 30:033048611c01 4051 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 4052 }
wim 30:033048611c01 4053 }
wim 30:033048611c01 4054
wim 30:033048611c01 4055 // Set BL pin
wim 30:033048611c01 4056 void TextLCD_SPI_N_3_9::_setBL(bool value) {
wim 30:033048611c01 4057 if (_bl) {
wim 30:033048611c01 4058 _bl->write(value);
wim 30:033048611c01 4059 }
wim 30:033048611c01 4060 }
wim 30:033048611c01 4061
wim 30:033048611c01 4062 // Not used in this mode
wim 30:033048611c01 4063 void TextLCD_SPI_N_3_9::_setData(int value) {
wim 30:033048611c01 4064 }
wim 30:033048611c01 4065
wim 30:033048611c01 4066 // Write a byte using SPI3 9 bits mode
wim 30:033048611c01 4067 void TextLCD_SPI_N_3_9::_writeByte(int value) {
wim 30:033048611c01 4068 _cs = 0;
wim 30:033048611c01 4069 wait_us(1);
wim 30:033048611c01 4070 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 4071 wait_us(1);
wim 30:033048611c01 4072 _cs = 1;
wim 30:033048611c01 4073 }
wim 34:e5a0dcb43ecc 4074 #endif /* Native SPI bus */
wim 30:033048611c01 4075 //------- End TextLCD_SPI_N_3_9 -----------
wim 34:e5a0dcb43ecc 4076
wim 34:e5a0dcb43ecc 4077
wim 30:033048611c01 4078 //------- Start TextLCD_SPI_N_3_10 --------
wim 34:e5a0dcb43ecc 4079 #if(LCD_SPI_N_3_10 == 1) /* Native SPI bus */
wim 30:033048611c01 4080
wim 30:033048611c01 4081 /** Create a TextLCD interface using a controller with a native SPI3 10 bits interface
wim 30:033048611c01 4082 *
wim 30:033048611c01 4083 * @param spi SPI Bus
wim 30:033048611c01 4084 * @param cs chip select pin (active low)
wim 30:033048611c01 4085 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 30:033048611c01 4086 * @param bl Backlight control line (optional, default = NC)
wim 30:033048611c01 4087 * @param ctrl LCD controller (default = AIP31068)
wim 30:033048611c01 4088 */
wim 30:033048611c01 4089 TextLCD_SPI_N_3_10::TextLCD_SPI_N_3_10(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 30:033048611c01 4090 TextLCD_Base(type, ctrl),
wim 30:033048611c01 4091 _spi(spi),
wim 30:033048611c01 4092 _cs(cs) {
wim 30:033048611c01 4093
wim 32:59c4b8f648d4 4094 // Init CS
wim 32:59c4b8f648d4 4095 _cs = 1;
wim 32:59c4b8f648d4 4096
wim 30:033048611c01 4097 // Setup the spi for 10 bit data, low steady state clock,
wim 30:033048611c01 4098 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 30:033048611c01 4099 _spi->format(10,0);
wim 30:033048611c01 4100 _spi->frequency(1000000);
wim 30:033048611c01 4101
wim 30:033048611c01 4102 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 30:033048611c01 4103 if (bl != NC) {
wim 30:033048611c01 4104 _bl = new DigitalOut(bl); //Construct new pin
wim 30:033048611c01 4105 _bl->write(0); //Deactivate
wim 30:033048611c01 4106 }
wim 30:033048611c01 4107 else {
wim 30:033048611c01 4108 // No Hardware Backlight pin
wim 30:033048611c01 4109 _bl = NULL; //Construct dummy pin
wim 30:033048611c01 4110 }
wim 30:033048611c01 4111
wim 30:033048611c01 4112 //Sanity check
wim 30:033048611c01 4113 if (_ctrl & LCD_C_SPI3_10) {
wim 36:9f5f86dfd44a 4114 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 30:033048611c01 4115 }
wim 30:033048611c01 4116 else {
wim 30:033048611c01 4117 error("Error: LCD Controller type does not support native SPI3 10 bits interface\n\r");
wim 30:033048611c01 4118 }
wim 30:033048611c01 4119 }
wim 30:033048611c01 4120
wim 30:033048611c01 4121 TextLCD_SPI_N_3_10::~TextLCD_SPI_N_3_10() {
wim 30:033048611c01 4122 if (_bl != NULL) {delete _bl;} // BL pin
wim 30:033048611c01 4123 }
wim 30:033048611c01 4124
wim 30:033048611c01 4125 // Not used in this mode
wim 30:033048611c01 4126 void TextLCD_SPI_N_3_10::_setEnable(bool value) {
wim 30:033048611c01 4127 }
wim 30:033048611c01 4128
wim 30:033048611c01 4129 // Set RS pin
wim 30:033048611c01 4130 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 30:033048611c01 4131 void TextLCD_SPI_N_3_10::_setRS(bool value) {
wim 30:033048611c01 4132 // The controlbits define the meaning of the next byte. This next byte can either be data or command.
wim 30:033048611c01 4133 // b9 b8 b7...........b0
wim 30:033048611c01 4134 // RS RW command or data
wim 30:033048611c01 4135 //
wim 30:033048611c01 4136 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 30:033048611c01 4137 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 30:033048611c01 4138 //
wim 30:033048611c01 4139
wim 30:033048611c01 4140 if (value) {
wim 30:033048611c01 4141 _controlbyte = 0x02; // Next byte is data
wim 30:033048611c01 4142 }
wim 30:033048611c01 4143 else {
wim 30:033048611c01 4144 _controlbyte = 0x00; // Next byte is command
wim 34:e5a0dcb43ecc 4145 }
wim 30:033048611c01 4146 }
wim 30:033048611c01 4147
wim 30:033048611c01 4148 // Set BL pin
wim 30:033048611c01 4149 void TextLCD_SPI_N_3_10::_setBL(bool value) {
wim 30:033048611c01 4150 if (_bl) {
wim 30:033048611c01 4151 _bl->write(value);
wim 30:033048611c01 4152 }
wim 30:033048611c01 4153 }
wim 30:033048611c01 4154
wim 30:033048611c01 4155 // Not used in this mode
wim 30:033048611c01 4156 void TextLCD_SPI_N_3_10::_setData(int value) {
wim 30:033048611c01 4157 }
wim 30:033048611c01 4158
wim 30:033048611c01 4159 // Write a byte using SPI3 10 bits mode
wim 30:033048611c01 4160 void TextLCD_SPI_N_3_10::_writeByte(int value) {
wim 30:033048611c01 4161 _cs = 0;
wim 30:033048611c01 4162 wait_us(1);
wim 30:033048611c01 4163 _spi->write( (_controlbyte << 8) | (value & 0xFF));
wim 30:033048611c01 4164 wait_us(1);
wim 30:033048611c01 4165 _cs = 1;
wim 30:033048611c01 4166 }
wim 34:e5a0dcb43ecc 4167 #endif /* Native SPI bus */
wim 30:033048611c01 4168 //------- End TextLCD_SPI_N_3_10 ----------
wim 34:e5a0dcb43ecc 4169
wim 32:59c4b8f648d4 4170
wim 32:59c4b8f648d4 4171 //------- Start TextLCD_SPI_N_3_16 --------
wim 34:e5a0dcb43ecc 4172 #if(LCD_SPI_N_3_16 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4173
wim 32:59c4b8f648d4 4174 /** Create a TextLCD interface using a controller with a native SPI3 16 bits interface
wim 32:59c4b8f648d4 4175 *
wim 32:59c4b8f648d4 4176 * @param spi SPI Bus
wim 32:59c4b8f648d4 4177 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4178 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4179 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4180 * @param ctrl LCD controller (default = PT6314)
wim 32:59c4b8f648d4 4181 */
wim 32:59c4b8f648d4 4182 TextLCD_SPI_N_3_16::TextLCD_SPI_N_3_16(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4183 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4184 _spi(spi),
wim 32:59c4b8f648d4 4185 _cs(cs) {
wim 32:59c4b8f648d4 4186
wim 32:59c4b8f648d4 4187 // Init CS
wim 32:59c4b8f648d4 4188 _cs = 1;
wim 32:59c4b8f648d4 4189
wim 32:59c4b8f648d4 4190 // Setup the spi for 8 bit data, low steady state clock,
wim 32:59c4b8f648d4 4191 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 32:59c4b8f648d4 4192 _spi->format(8,0);
wim 32:59c4b8f648d4 4193 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4194
wim 32:59c4b8f648d4 4195 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4196 if (bl != NC) {
wim 32:59c4b8f648d4 4197 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4198 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4199 }
wim 32:59c4b8f648d4 4200 else {
wim 32:59c4b8f648d4 4201 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4202 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4203 }
wim 32:59c4b8f648d4 4204
wim 32:59c4b8f648d4 4205 //Sanity check
wim 32:59c4b8f648d4 4206 if (_ctrl & LCD_C_SPI3_16) {
wim 36:9f5f86dfd44a 4207 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4208 }
wim 32:59c4b8f648d4 4209 else {
wim 32:59c4b8f648d4 4210 error("Error: LCD Controller type does not support native SPI3 16 bits interface\n\r");
wim 32:59c4b8f648d4 4211 }
wim 32:59c4b8f648d4 4212 }
wim 32:59c4b8f648d4 4213
wim 32:59c4b8f648d4 4214 TextLCD_SPI_N_3_16::~TextLCD_SPI_N_3_16() {
wim 32:59c4b8f648d4 4215 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4216 }
wim 32:59c4b8f648d4 4217
wim 32:59c4b8f648d4 4218 // Not used in this mode
wim 32:59c4b8f648d4 4219 void TextLCD_SPI_N_3_16::_setEnable(bool value) {
wim 32:59c4b8f648d4 4220 }
wim 32:59c4b8f648d4 4221
wim 32:59c4b8f648d4 4222 // Set RS pin
wim 32:59c4b8f648d4 4223 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4224 void TextLCD_SPI_N_3_16::_setRS(bool value) {
wim 32:59c4b8f648d4 4225 // The 16bit mode is split in 2 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next byte.
wim 32:59c4b8f648d4 4226 // The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4227 // b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4228 // 1 1 1 1 1 RW RS 0 d7 d6 d5 d4 d3 d2 d1 d0
wim 32:59c4b8f648d4 4229 //
wim 32:59c4b8f648d4 4230 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4231 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4232 //
wim 32:59c4b8f648d4 4233
wim 32:59c4b8f648d4 4234 if (value) {
wim 32:59c4b8f648d4 4235 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4236 }
wim 32:59c4b8f648d4 4237 else {
wim 32:59c4b8f648d4 4238 _controlbyte = 0xF8; // Next byte is command
wim 32:59c4b8f648d4 4239 }
wim 32:59c4b8f648d4 4240 }
wim 32:59c4b8f648d4 4241
wim 32:59c4b8f648d4 4242 // Set BL pin
wim 32:59c4b8f648d4 4243 void TextLCD_SPI_N_3_16::_setBL(bool value) {
wim 32:59c4b8f648d4 4244 if (_bl) {
wim 32:59c4b8f648d4 4245 _bl->write(value);
wim 32:59c4b8f648d4 4246 }
wim 32:59c4b8f648d4 4247 }
wim 32:59c4b8f648d4 4248
wim 32:59c4b8f648d4 4249 // Not used in this mode
wim 32:59c4b8f648d4 4250 void TextLCD_SPI_N_3_16::_setData(int value) {
wim 32:59c4b8f648d4 4251 }
wim 34:e5a0dcb43ecc 4252
wim 32:59c4b8f648d4 4253 // Write a byte using SPI3 16 bits mode
wim 32:59c4b8f648d4 4254 void TextLCD_SPI_N_3_16::_writeByte(int value) {
wim 32:59c4b8f648d4 4255 _cs = 0;
wim 32:59c4b8f648d4 4256 wait_us(1);
wim 32:59c4b8f648d4 4257
wim 32:59c4b8f648d4 4258 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4259
wim 32:59c4b8f648d4 4260 _spi->write(value);
wim 32:59c4b8f648d4 4261
wim 32:59c4b8f648d4 4262 wait_us(1);
wim 32:59c4b8f648d4 4263 _cs = 1;
wim 32:59c4b8f648d4 4264 }
wim 34:e5a0dcb43ecc 4265 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4266 //------- End TextLCD_SPI_N_3_16 ----------
wim 34:e5a0dcb43ecc 4267
wim 34:e5a0dcb43ecc 4268
wim 32:59c4b8f648d4 4269 //------- Start TextLCD_SPI_N_3_24 --------
wim 34:e5a0dcb43ecc 4270 #if(LCD_SPI_N_3_24 == 1) /* Native SPI bus */
wim 32:59c4b8f648d4 4271
wim 32:59c4b8f648d4 4272 /** Create a TextLCD interface using a controller with a native SPI3 24 bits interface
wim 32:59c4b8f648d4 4273 *
wim 32:59c4b8f648d4 4274 * @param spi SPI Bus
wim 32:59c4b8f648d4 4275 * @param cs chip select pin (active low)
wim 32:59c4b8f648d4 4276 * @param type Sets the panel size/addressing mode (default = LCD16x2)
wim 32:59c4b8f648d4 4277 * @param bl Backlight control line (optional, default = NC)
wim 32:59c4b8f648d4 4278 * @param ctrl LCD controller (default = SSD1803)
wim 32:59c4b8f648d4 4279 */
wim 32:59c4b8f648d4 4280 TextLCD_SPI_N_3_24::TextLCD_SPI_N_3_24(SPI *spi, PinName cs, LCDType type, PinName bl, LCDCtrl ctrl) :
wim 32:59c4b8f648d4 4281 TextLCD_Base(type, ctrl),
wim 32:59c4b8f648d4 4282 _spi(spi),
wim 32:59c4b8f648d4 4283 _cs(cs) {
wim 32:59c4b8f648d4 4284
wim 32:59c4b8f648d4 4285 // Init CS
wim 32:59c4b8f648d4 4286 _cs = 1;
wim 32:59c4b8f648d4 4287
wim 34:e5a0dcb43ecc 4288 // Setup the spi for 8 bit data, high steady state clock,
wim 32:59c4b8f648d4 4289 // rising edge capture, with a 500KHz or 1MHz clock rate
wim 34:e5a0dcb43ecc 4290 _spi->format(8,3);
wim 32:59c4b8f648d4 4291 _spi->frequency(1000000);
wim 32:59c4b8f648d4 4292
wim 32:59c4b8f648d4 4293 // The hardware Backlight pin is optional. Test and make sure whether it exists or not to prevent illegal access.
wim 32:59c4b8f648d4 4294 if (bl != NC) {
wim 32:59c4b8f648d4 4295 _bl = new DigitalOut(bl); //Construct new pin
wim 32:59c4b8f648d4 4296 _bl->write(0); //Deactivate
wim 32:59c4b8f648d4 4297 }
wim 32:59c4b8f648d4 4298 else {
wim 32:59c4b8f648d4 4299 // No Hardware Backlight pin
wim 32:59c4b8f648d4 4300 _bl = NULL; //Construct dummy pin
wim 32:59c4b8f648d4 4301 }
wim 32:59c4b8f648d4 4302
wim 32:59c4b8f648d4 4303 //Sanity check
wim 32:59c4b8f648d4 4304 if (_ctrl & LCD_C_SPI3_24) {
wim 36:9f5f86dfd44a 4305 _init(_LCD_DL_8); // Set Datalength to 8 bit for all native serial interfaces
wim 32:59c4b8f648d4 4306 }
wim 32:59c4b8f648d4 4307 else {
wim 32:59c4b8f648d4 4308 error("Error: LCD Controller type does not support native SPI3 24 bits interface\n\r");
wim 32:59c4b8f648d4 4309 }
wim 32:59c4b8f648d4 4310 }
wim 32:59c4b8f648d4 4311
wim 32:59c4b8f648d4 4312 TextLCD_SPI_N_3_24::~TextLCD_SPI_N_3_24() {
wim 32:59c4b8f648d4 4313 if (_bl != NULL) {delete _bl;} // BL pin
wim 32:59c4b8f648d4 4314 }
wim 32:59c4b8f648d4 4315
wim 32:59c4b8f648d4 4316 // Not used in this mode
wim 32:59c4b8f648d4 4317 void TextLCD_SPI_N_3_24::_setEnable(bool value) {
wim 32:59c4b8f648d4 4318 }
wim 32:59c4b8f648d4 4319
wim 32:59c4b8f648d4 4320 // Set RS pin
wim 32:59c4b8f648d4 4321 // Used for mbed pins, I2C bus expander or SPI shiftregister
wim 32:59c4b8f648d4 4322 void TextLCD_SPI_N_3_24::_setRS(bool value) {
wim 32:59c4b8f648d4 4323 // The 24bit mode is split in 3 bytes. The first byte is for synchronisation and controlbits. The controlbits define the meaning of the next two bytes.
wim 32:59c4b8f648d4 4324 // Each byte encodes 4 actual bits. The 8 actual bits represent either a data or a command byte.
wim 32:59c4b8f648d4 4325 // b23 b22 b21 b20 b19 b18 b17 b16 - b15 b14 b13 b12 b11 b10 b9 b8 - b7 b6 b5 b4 b3 b2 b1 b0
wim 32:59c4b8f648d4 4326 // 1 1 1 1 1 RW RS 0 d0 d1 d2 d3 0 0 0 0 d4 d5 d6 d7 0 0 0 0
wim 32:59c4b8f648d4 4327 //
wim 32:59c4b8f648d4 4328 // RS=1 means that next byte is data, RS=0 means that next byte is command
wim 32:59c4b8f648d4 4329 // RW=0 means that next byte is writen, RW=1 means that next byte is read (not used in this lib)
wim 32:59c4b8f648d4 4330 //
wim 32:59c4b8f648d4 4331 // Note: SPI3_24 expects LSB first. This is inconsistent with regular SPI convention (and hardware) that sends MSB first.
wim 32:59c4b8f648d4 4332
wim 32:59c4b8f648d4 4333 if (value) {
wim 32:59c4b8f648d4 4334 _controlbyte = 0xFA; // Next byte is data
wim 32:59c4b8f648d4 4335 }
wim 32:59c4b8f648d4 4336 else {
wim 32:59c4b8f648d4 4337 _controlbyte = 0xF8; // Next byte is command
wim 34:e5a0dcb43ecc 4338 }
wim 32:59c4b8f648d4 4339 }
wim 32:59c4b8f648d4 4340
wim 32:59c4b8f648d4 4341 // Set BL pin
wim 32:59c4b8f648d4 4342 void TextLCD_SPI_N_3_24::_setBL(bool value) {
wim 32:59c4b8f648d4 4343 if (_bl) {
wim 32:59c4b8f648d4 4344 _bl->write(value);
wim 32:59c4b8f648d4 4345 }
wim 32:59c4b8f648d4 4346 }
wim 32:59c4b8f648d4 4347
wim 32:59c4b8f648d4 4348 // Not used in this mode
wim 32:59c4b8f648d4 4349 void TextLCD_SPI_N_3_24::_setData(int value) {
wim 32:59c4b8f648d4 4350 }
wim 32:59c4b8f648d4 4351
wim 32:59c4b8f648d4 4352 //Mapping table to flip the bits around cause SPI3_24 expects LSB first.
wim 32:59c4b8f648d4 4353 const uint8_t map3_24[16] = {0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0};
wim 32:59c4b8f648d4 4354
wim 32:59c4b8f648d4 4355 // Write a byte using SPI3 24 bits mode
wim 32:59c4b8f648d4 4356 void TextLCD_SPI_N_3_24::_writeByte(int value) {
wim 32:59c4b8f648d4 4357 _cs = 0;
wim 32:59c4b8f648d4 4358 wait_us(1);
wim 32:59c4b8f648d4 4359 _spi->write(_controlbyte);
wim 32:59c4b8f648d4 4360
wim 32:59c4b8f648d4 4361 //Map and send the LSB nibble
wim 32:59c4b8f648d4 4362 _spi->write( map3_24[value & 0x0F]);
wim 32:59c4b8f648d4 4363
wim 32:59c4b8f648d4 4364 //Map and send the MSB nibble
wim 32:59c4b8f648d4 4365 _spi->write( map3_24[(value >> 4) & 0x0F]);
wim 32:59c4b8f648d4 4366
wim 32:59c4b8f648d4 4367 wait_us(1);
wim 32:59c4b8f648d4 4368 _cs = 1;
wim 32:59c4b8f648d4 4369 }
wim 34:e5a0dcb43ecc 4370 #endif /* Native SPI bus */
wim 32:59c4b8f648d4 4371 //------- End TextLCD_SPI_N_3_24 ----------