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Committer:
denishautot
Date:
Tue May 16 07:37:46 2017 +0000
Revision:
0:63a05302ef72
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denishautot 0:63a05302ef72 1 /**
denishautot 0:63a05302ef72 2 * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
denishautot 0:63a05302ef72 3 * Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
denishautot 0:63a05302ef72 4 * Created by Miguel Balboa (circuitito.com), Jan, 2012.
denishautot 0:63a05302ef72 5 * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
denishautot 0:63a05302ef72 6 * Ported to mbed by Martin Olejar, Dec, 2013
denishautot 0:63a05302ef72 7 *
denishautot 0:63a05302ef72 8 * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
denishautot 0:63a05302ef72 9 * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
denishautot 0:63a05302ef72 10 *
denishautot 0:63a05302ef72 11 * There are three hardware components involved:
denishautot 0:63a05302ef72 12 * 1) The micro controller: An Arduino
denishautot 0:63a05302ef72 13 * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
denishautot 0:63a05302ef72 14 * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
denishautot 0:63a05302ef72 15 *
denishautot 0:63a05302ef72 16 * The microcontroller and card reader uses SPI for communication.
denishautot 0:63a05302ef72 17 * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
denishautot 0:63a05302ef72 18 *
denishautot 0:63a05302ef72 19 * The card reader and the tags communicate using a 13.56MHz electromagnetic field.
denishautot 0:63a05302ef72 20 * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
denishautot 0:63a05302ef72 21 * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
denishautot 0:63a05302ef72 22 * Details are found in chapter 6, Type A: Initialization and anticollision.
denishautot 0:63a05302ef72 23 *
denishautot 0:63a05302ef72 24 * If only the PICC UID is wanted, the above documents has all the needed information.
denishautot 0:63a05302ef72 25 * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
denishautot 0:63a05302ef72 26 * The MIFARE Classic chips and protocol is described in the datasheets:
denishautot 0:63a05302ef72 27 * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
denishautot 0:63a05302ef72 28 * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
denishautot 0:63a05302ef72 29 * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
denishautot 0:63a05302ef72 30 * The MIFARE Ultralight chip and protocol is described in the datasheets:
denishautot 0:63a05302ef72 31 * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
denishautot 0:63a05302ef72 32 * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
denishautot 0:63a05302ef72 33 *
denishautot 0:63a05302ef72 34 * MIFARE Classic 1K (MF1S503x):
denishautot 0:63a05302ef72 35 * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
denishautot 0:63a05302ef72 36 * The blocks are numbered 0-63.
denishautot 0:63a05302ef72 37 * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
denishautot 0:63a05302ef72 38 * Bytes 0-5: Key A
denishautot 0:63a05302ef72 39 * Bytes 6-8: Access Bits
denishautot 0:63a05302ef72 40 * Bytes 9: User data
denishautot 0:63a05302ef72 41 * Bytes 10-15: Key B (or user data)
denishautot 0:63a05302ef72 42 * Block 0 is read only manufacturer data.
denishautot 0:63a05302ef72 43 * To access a block, an authentication using a key from the block's sector must be performed first.
denishautot 0:63a05302ef72 44 * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
denishautot 0:63a05302ef72 45 * All keys are set to FFFFFFFFFFFFh at chip delivery.
denishautot 0:63a05302ef72 46 * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
denishautot 0:63a05302ef72 47 * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
denishautot 0:63a05302ef72 48 * MIFARE Classic 4K (MF1S703x):
denishautot 0:63a05302ef72 49 * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
denishautot 0:63a05302ef72 50 * The blocks are numbered 0-255.
denishautot 0:63a05302ef72 51 * The last block in each sector is the Sector Trailer like above.
denishautot 0:63a05302ef72 52 * MIFARE Classic Mini (MF1 IC S20):
denishautot 0:63a05302ef72 53 * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
denishautot 0:63a05302ef72 54 * The blocks are numbered 0-19.
denishautot 0:63a05302ef72 55 * The last block in each sector is the Sector Trailer like above.
denishautot 0:63a05302ef72 56 *
denishautot 0:63a05302ef72 57 * MIFARE Ultralight (MF0ICU1):
denishautot 0:63a05302ef72 58 * Has 16 pages of 4 bytes = 64 bytes.
denishautot 0:63a05302ef72 59 * Pages 0 + 1 is used for the 7-byte UID.
denishautot 0:63a05302ef72 60 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
denishautot 0:63a05302ef72 61 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
denishautot 0:63a05302ef72 62 * Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
denishautot 0:63a05302ef72 63 * MIFARE Ultralight C (MF0ICU2):
denishautot 0:63a05302ef72 64 * Has 48 pages of 4 bytes = 64 bytes.
denishautot 0:63a05302ef72 65 * Pages 0 + 1 is used for the 7-byte UID.
denishautot 0:63a05302ef72 66 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
denishautot 0:63a05302ef72 67 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
denishautot 0:63a05302ef72 68 * Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
denishautot 0:63a05302ef72 69 * Page 40 Lock bytes
denishautot 0:63a05302ef72 70 * Page 41 16 bit one way counter
denishautot 0:63a05302ef72 71 * Pages 42-43 Authentication configuration
denishautot 0:63a05302ef72 72 * Pages 44-47 Authentication key
denishautot 0:63a05302ef72 73 */
denishautot 0:63a05302ef72 74 #ifndef MFRC522_h
denishautot 0:63a05302ef72 75 #define MFRC522_h
denishautot 0:63a05302ef72 76
denishautot 0:63a05302ef72 77 #include "mbed.h"
denishautot 0:63a05302ef72 78
denishautot 0:63a05302ef72 79 /**
denishautot 0:63a05302ef72 80 * MFRC522 example
denishautot 0:63a05302ef72 81 *
denishautot 0:63a05302ef72 82 * @code
denishautot 0:63a05302ef72 83 * #include "mbed.h"
denishautot 0:63a05302ef72 84 * #include "MFRC522.h"
denishautot 0:63a05302ef72 85 *
denishautot 0:63a05302ef72 86 * //KL25Z Pins for MFRC522 SPI interface
denishautot 0:63a05302ef72 87 * #define SPI_MOSI PTC6
denishautot 0:63a05302ef72 88 * #define SPI_MISO PTC7
denishautot 0:63a05302ef72 89 * #define SPI_SCLK PTC5
denishautot 0:63a05302ef72 90 * #define SPI_CS PTC4
denishautot 0:63a05302ef72 91 * // KL25Z Pin for MFRC522 reset
denishautot 0:63a05302ef72 92 * #define MF_RESET PTC3
denishautot 0:63a05302ef72 93 * // KL25Z Pins for Debug UART port
denishautot 0:63a05302ef72 94 * #define UART_RX PTA1
denishautot 0:63a05302ef72 95 * #define UART_TX PTA2
denishautot 0:63a05302ef72 96 *
denishautot 0:63a05302ef72 97 * DigitalOut LedRed (LED_RED);
denishautot 0:63a05302ef72 98 * DigitalOut LedGreen (LED_GREEN);
denishautot 0:63a05302ef72 99 *
denishautot 0:63a05302ef72 100 * Serial DebugUART(UART_TX, UART_RX);
denishautot 0:63a05302ef72 101 * MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET);
denishautot 0:63a05302ef72 102 *
denishautot 0:63a05302ef72 103 * int main(void) {
denishautot 0:63a05302ef72 104 * // Set debug UART speed
denishautot 0:63a05302ef72 105 * DebugUART.baud(115200);
denishautot 0:63a05302ef72 106 *
denishautot 0:63a05302ef72 107 * // Init. RC522 Chip
denishautot 0:63a05302ef72 108 * RfChip.PCD_Init();
denishautot 0:63a05302ef72 109 *
denishautot 0:63a05302ef72 110 * while (true) {
denishautot 0:63a05302ef72 111 * LedRed = 1;
denishautot 0:63a05302ef72 112 * LedGreen = 1;
denishautot 0:63a05302ef72 113 *
denishautot 0:63a05302ef72 114 * // Look for new cards
denishautot 0:63a05302ef72 115 * if ( ! RfChip.PICC_IsNewCardPresent())
denishautot 0:63a05302ef72 116 * {
denishautot 0:63a05302ef72 117 * wait_ms(500);
denishautot 0:63a05302ef72 118 * continue;
denishautot 0:63a05302ef72 119 * }
denishautot 0:63a05302ef72 120 *
denishautot 0:63a05302ef72 121 * LedRed = 0;
denishautot 0:63a05302ef72 122 *
denishautot 0:63a05302ef72 123 * // Select one of the cards
denishautot 0:63a05302ef72 124 * if ( ! RfChip.PICC_ReadCardSerial())
denishautot 0:63a05302ef72 125 * {
denishautot 0:63a05302ef72 126 * wait_ms(500);
denishautot 0:63a05302ef72 127 * continue;
denishautot 0:63a05302ef72 128 * }
denishautot 0:63a05302ef72 129 *
denishautot 0:63a05302ef72 130 * LedRed = 1;
denishautot 0:63a05302ef72 131 * LedGreen = 0;
denishautot 0:63a05302ef72 132 *
denishautot 0:63a05302ef72 133 * // Print Card UID
denishautot 0:63a05302ef72 134 * printf("Card UID: ");
denishautot 0:63a05302ef72 135 * for (uint8_t i = 0; i < RfChip.uid.size; i++)
denishautot 0:63a05302ef72 136 * {
denishautot 0:63a05302ef72 137 * printf(" %X02", RfChip.uid.uidByte[i]);
denishautot 0:63a05302ef72 138 * }
denishautot 0:63a05302ef72 139 * printf("\n\r");
denishautot 0:63a05302ef72 140 *
denishautot 0:63a05302ef72 141 * // Print Card type
denishautot 0:63a05302ef72 142 * uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak);
denishautot 0:63a05302ef72 143 * printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType));
denishautot 0:63a05302ef72 144 * wait_ms(1000);
denishautot 0:63a05302ef72 145 * }
denishautot 0:63a05302ef72 146 * }
denishautot 0:63a05302ef72 147 * @endcode
denishautot 0:63a05302ef72 148 */
denishautot 0:63a05302ef72 149
denishautot 0:63a05302ef72 150 class MFRC522 {
denishautot 0:63a05302ef72 151 public:
denishautot 0:63a05302ef72 152
denishautot 0:63a05302ef72 153 /**
denishautot 0:63a05302ef72 154 * MFRC522 registers (described in chapter 9 of the datasheet).
denishautot 0:63a05302ef72 155 * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
denishautot 0:63a05302ef72 156 */
denishautot 0:63a05302ef72 157 enum PCD_Register {
denishautot 0:63a05302ef72 158 // Page 0: Command and status
denishautot 0:63a05302ef72 159 // 0x00 // reserved for future use
denishautot 0:63a05302ef72 160 CommandReg = 0x01 << 1, // starts and stops command execution
denishautot 0:63a05302ef72 161 ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
denishautot 0:63a05302ef72 162 DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
denishautot 0:63a05302ef72 163 ComIrqReg = 0x04 << 1, // interrupt request bits
denishautot 0:63a05302ef72 164 DivIrqReg = 0x05 << 1, // interrupt request bits
denishautot 0:63a05302ef72 165 ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
denishautot 0:63a05302ef72 166 Status1Reg = 0x07 << 1, // communication status bits
denishautot 0:63a05302ef72 167 Status2Reg = 0x08 << 1, // receiver and transmitter status bits
denishautot 0:63a05302ef72 168 FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
denishautot 0:63a05302ef72 169 FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
denishautot 0:63a05302ef72 170 WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
denishautot 0:63a05302ef72 171 ControlReg = 0x0C << 1, // miscellaneous control registers
denishautot 0:63a05302ef72 172 BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
denishautot 0:63a05302ef72 173 CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
denishautot 0:63a05302ef72 174 // 0x0F // reserved for future use
denishautot 0:63a05302ef72 175
denishautot 0:63a05302ef72 176 // Page 1:Command
denishautot 0:63a05302ef72 177 // 0x10 // reserved for future use
denishautot 0:63a05302ef72 178 ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
denishautot 0:63a05302ef72 179 TxModeReg = 0x12 << 1, // defines transmission data rate and framing
denishautot 0:63a05302ef72 180 RxModeReg = 0x13 << 1, // defines reception data rate and framing
denishautot 0:63a05302ef72 181 TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
denishautot 0:63a05302ef72 182 TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
denishautot 0:63a05302ef72 183 TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
denishautot 0:63a05302ef72 184 RxSelReg = 0x17 << 1, // selects internal receiver settings
denishautot 0:63a05302ef72 185 RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
denishautot 0:63a05302ef72 186 DemodReg = 0x19 << 1, // defines demodulator settings
denishautot 0:63a05302ef72 187 // 0x1A // reserved for future use
denishautot 0:63a05302ef72 188 // 0x1B // reserved for future use
denishautot 0:63a05302ef72 189 MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
denishautot 0:63a05302ef72 190 MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
denishautot 0:63a05302ef72 191 // 0x1E // reserved for future use
denishautot 0:63a05302ef72 192 SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
denishautot 0:63a05302ef72 193
denishautot 0:63a05302ef72 194 // Page 2: Configuration
denishautot 0:63a05302ef72 195 // 0x20 // reserved for future use
denishautot 0:63a05302ef72 196 CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
denishautot 0:63a05302ef72 197 CRCResultRegL = 0x22 << 1,
denishautot 0:63a05302ef72 198 // 0x23 // reserved for future use
denishautot 0:63a05302ef72 199 ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
denishautot 0:63a05302ef72 200 // 0x25 // reserved for future use
denishautot 0:63a05302ef72 201 RFCfgReg = 0x26 << 1, // configures the receiver gain
denishautot 0:63a05302ef72 202 GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
denishautot 0:63a05302ef72 203 CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
denishautot 0:63a05302ef72 204 ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
denishautot 0:63a05302ef72 205 TModeReg = 0x2A << 1, // defines settings for the internal timer
denishautot 0:63a05302ef72 206 TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
denishautot 0:63a05302ef72 207 TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
denishautot 0:63a05302ef72 208 TReloadRegL = 0x2D << 1,
denishautot 0:63a05302ef72 209 TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
denishautot 0:63a05302ef72 210 TCntValueRegL = 0x2F << 1,
denishautot 0:63a05302ef72 211
denishautot 0:63a05302ef72 212 // Page 3:Test Registers
denishautot 0:63a05302ef72 213 // 0x30 // reserved for future use
denishautot 0:63a05302ef72 214 TestSel1Reg = 0x31 << 1, // general test signal configuration
denishautot 0:63a05302ef72 215 TestSel2Reg = 0x32 << 1, // general test signal configuration
denishautot 0:63a05302ef72 216 TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
denishautot 0:63a05302ef72 217 TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
denishautot 0:63a05302ef72 218 TestBusReg = 0x35 << 1, // shows the status of the internal test bus
denishautot 0:63a05302ef72 219 AutoTestReg = 0x36 << 1, // controls the digital self test
denishautot 0:63a05302ef72 220 VersionReg = 0x37 << 1, // shows the software version
denishautot 0:63a05302ef72 221 AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
denishautot 0:63a05302ef72 222 TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
denishautot 0:63a05302ef72 223 TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
denishautot 0:63a05302ef72 224 TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
denishautot 0:63a05302ef72 225 // 0x3C // reserved for production tests
denishautot 0:63a05302ef72 226 // 0x3D // reserved for production tests
denishautot 0:63a05302ef72 227 // 0x3E // reserved for production tests
denishautot 0:63a05302ef72 228 // 0x3F // reserved for production tests
denishautot 0:63a05302ef72 229 };
denishautot 0:63a05302ef72 230
denishautot 0:63a05302ef72 231 // MFRC522 commands Described in chapter 10 of the datasheet.
denishautot 0:63a05302ef72 232 enum PCD_Command {
denishautot 0:63a05302ef72 233 PCD_Idle = 0x00, // no action, cancels current command execution
denishautot 0:63a05302ef72 234 PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
denishautot 0:63a05302ef72 235 PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
denishautot 0:63a05302ef72 236 PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
denishautot 0:63a05302ef72 237 PCD_Transmit = 0x04, // transmits data from the FIFO buffer
denishautot 0:63a05302ef72 238 PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
denishautot 0:63a05302ef72 239 PCD_Receive = 0x08, // activates the receiver circuits
denishautot 0:63a05302ef72 240 PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
denishautot 0:63a05302ef72 241 PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
denishautot 0:63a05302ef72 242 PCD_SoftReset = 0x0F // resets the MFRC522
denishautot 0:63a05302ef72 243 };
denishautot 0:63a05302ef72 244
denishautot 0:63a05302ef72 245 // Commands sent to the PICC.
denishautot 0:63a05302ef72 246 enum PICC_Command {
denishautot 0:63a05302ef72 247 // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
denishautot 0:63a05302ef72 248 PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
denishautot 0:63a05302ef72 249 PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
denishautot 0:63a05302ef72 250 PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
denishautot 0:63a05302ef72 251 PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
denishautot 0:63a05302ef72 252 PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
denishautot 0:63a05302ef72 253 PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
denishautot 0:63a05302ef72 254 PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
denishautot 0:63a05302ef72 255
denishautot 0:63a05302ef72 256 // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
denishautot 0:63a05302ef72 257 // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
denishautot 0:63a05302ef72 258 // The read/write commands can also be used for MIFARE Ultralight.
denishautot 0:63a05302ef72 259 PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
denishautot 0:63a05302ef72 260 PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
denishautot 0:63a05302ef72 261 PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
denishautot 0:63a05302ef72 262 PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
denishautot 0:63a05302ef72 263 PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
denishautot 0:63a05302ef72 264 PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
denishautot 0:63a05302ef72 265 PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
denishautot 0:63a05302ef72 266 PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
denishautot 0:63a05302ef72 267
denishautot 0:63a05302ef72 268 // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
denishautot 0:63a05302ef72 269 // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
denishautot 0:63a05302ef72 270 PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
denishautot 0:63a05302ef72 271 };
denishautot 0:63a05302ef72 272
denishautot 0:63a05302ef72 273 // MIFARE constants that does not fit anywhere else
denishautot 0:63a05302ef72 274 enum MIFARE_Misc {
denishautot 0:63a05302ef72 275 MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
denishautot 0:63a05302ef72 276 MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
denishautot 0:63a05302ef72 277 };
denishautot 0:63a05302ef72 278
denishautot 0:63a05302ef72 279 // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
denishautot 0:63a05302ef72 280 enum PICC_Type {
denishautot 0:63a05302ef72 281 PICC_TYPE_UNKNOWN = 0,
denishautot 0:63a05302ef72 282 PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
denishautot 0:63a05302ef72 283 PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
denishautot 0:63a05302ef72 284 PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
denishautot 0:63a05302ef72 285 PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
denishautot 0:63a05302ef72 286 PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
denishautot 0:63a05302ef72 287 PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
denishautot 0:63a05302ef72 288 PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
denishautot 0:63a05302ef72 289 PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
denishautot 0:63a05302ef72 290 PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
denishautot 0:63a05302ef72 291 };
denishautot 0:63a05302ef72 292
denishautot 0:63a05302ef72 293 // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
denishautot 0:63a05302ef72 294 enum StatusCode {
denishautot 0:63a05302ef72 295 STATUS_OK = 1, // Success
denishautot 0:63a05302ef72 296 STATUS_ERROR = 2, // Error in communication
denishautot 0:63a05302ef72 297 STATUS_COLLISION = 3, // Collision detected
denishautot 0:63a05302ef72 298 STATUS_TIMEOUT = 4, // Timeout in communication.
denishautot 0:63a05302ef72 299 STATUS_NO_ROOM = 5, // A buffer is not big enough.
denishautot 0:63a05302ef72 300 STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
denishautot 0:63a05302ef72 301 STATUS_INVALID = 7, // Invalid argument.
denishautot 0:63a05302ef72 302 STATUS_CRC_WRONG = 8, // The CRC_A does not match
denishautot 0:63a05302ef72 303 STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
denishautot 0:63a05302ef72 304 };
denishautot 0:63a05302ef72 305
denishautot 0:63a05302ef72 306 // A struct used for passing the UID of a PICC.
denishautot 0:63a05302ef72 307 typedef struct {
denishautot 0:63a05302ef72 308 uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
denishautot 0:63a05302ef72 309 uint8_t uidByte[10];
denishautot 0:63a05302ef72 310 uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
denishautot 0:63a05302ef72 311 } Uid;
denishautot 0:63a05302ef72 312
denishautot 0:63a05302ef72 313 // A struct used for passing a MIFARE Crypto1 key
denishautot 0:63a05302ef72 314 typedef struct {
denishautot 0:63a05302ef72 315 uint8_t keyByte[MF_KEY_SIZE];
denishautot 0:63a05302ef72 316 } MIFARE_Key;
denishautot 0:63a05302ef72 317
denishautot 0:63a05302ef72 318 // Member variables
denishautot 0:63a05302ef72 319 Uid uid; // Used by PICC_ReadCardSerial().
denishautot 0:63a05302ef72 320
denishautot 0:63a05302ef72 321 // Size of the MFRC522 FIFO
denishautot 0:63a05302ef72 322 static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
denishautot 0:63a05302ef72 323
denishautot 0:63a05302ef72 324 /**
denishautot 0:63a05302ef72 325 * MFRC522 constructor
denishautot 0:63a05302ef72 326 *
denishautot 0:63a05302ef72 327 * @param mosi SPI MOSI pin
denishautot 0:63a05302ef72 328 * @param miso SPI MISO pin
denishautot 0:63a05302ef72 329 * @param sclk SPI SCLK pin
denishautot 0:63a05302ef72 330 * @param cs SPI CS pin
denishautot 0:63a05302ef72 331 * @param reset Reset pin
denishautot 0:63a05302ef72 332 */
denishautot 0:63a05302ef72 333 MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
denishautot 0:63a05302ef72 334
denishautot 0:63a05302ef72 335 /**
denishautot 0:63a05302ef72 336 * MFRC522 destructor
denishautot 0:63a05302ef72 337 */
denishautot 0:63a05302ef72 338 ~MFRC522();
denishautot 0:63a05302ef72 339
denishautot 0:63a05302ef72 340
denishautot 0:63a05302ef72 341 // ************************************************************************************
denishautot 0:63a05302ef72 342 //! @name Functions for manipulating the MFRC522
denishautot 0:63a05302ef72 343 // ************************************************************************************
denishautot 0:63a05302ef72 344 //@{
denishautot 0:63a05302ef72 345
denishautot 0:63a05302ef72 346 /**
denishautot 0:63a05302ef72 347 * Initializes the MFRC522 chip.
denishautot 0:63a05302ef72 348 */
denishautot 0:63a05302ef72 349 void PCD_Init (void);
denishautot 0:63a05302ef72 350
denishautot 0:63a05302ef72 351 /**
denishautot 0:63a05302ef72 352 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
denishautot 0:63a05302ef72 353 */
denishautot 0:63a05302ef72 354 void PCD_Reset (void);
denishautot 0:63a05302ef72 355
denishautot 0:63a05302ef72 356 /**
denishautot 0:63a05302ef72 357 * Turns the antenna on by enabling pins TX1 and TX2.
denishautot 0:63a05302ef72 358 * After a reset these pins disabled.
denishautot 0:63a05302ef72 359 */
denishautot 0:63a05302ef72 360 void PCD_AntennaOn (void);
denishautot 0:63a05302ef72 361
denishautot 0:63a05302ef72 362 /**
denishautot 0:63a05302ef72 363 * Writes a byte to the specified register in the MFRC522 chip.
denishautot 0:63a05302ef72 364 * The interface is described in the datasheet section 8.1.2.
denishautot 0:63a05302ef72 365 *
denishautot 0:63a05302ef72 366 * @param reg The register to write to. One of the PCD_Register enums.
denishautot 0:63a05302ef72 367 * @param value The value to write.
denishautot 0:63a05302ef72 368 */
denishautot 0:63a05302ef72 369 void PCD_WriteRegister (uint8_t reg, uint8_t value);
denishautot 0:63a05302ef72 370
denishautot 0:63a05302ef72 371 /**
denishautot 0:63a05302ef72 372 * Writes a number of bytes to the specified register in the MFRC522 chip.
denishautot 0:63a05302ef72 373 * The interface is described in the datasheet section 8.1.2.
denishautot 0:63a05302ef72 374 *
denishautot 0:63a05302ef72 375 * @param reg The register to write to. One of the PCD_Register enums.
denishautot 0:63a05302ef72 376 * @param count The number of bytes to write to the register
denishautot 0:63a05302ef72 377 * @param values The values to write. Byte array.
denishautot 0:63a05302ef72 378 */
denishautot 0:63a05302ef72 379 void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
denishautot 0:63a05302ef72 380
denishautot 0:63a05302ef72 381 /**
denishautot 0:63a05302ef72 382 * Reads a byte from the specified register in the MFRC522 chip.
denishautot 0:63a05302ef72 383 * The interface is described in the datasheet section 8.1.2.
denishautot 0:63a05302ef72 384 *
denishautot 0:63a05302ef72 385 * @param reg The register to read from. One of the PCD_Register enums.
denishautot 0:63a05302ef72 386 * @returns Register value
denishautot 0:63a05302ef72 387 */
denishautot 0:63a05302ef72 388 uint8_t PCD_ReadRegister (uint8_t reg);
denishautot 0:63a05302ef72 389
denishautot 0:63a05302ef72 390 /**
denishautot 0:63a05302ef72 391 * Reads a number of bytes from the specified register in the MFRC522 chip.
denishautot 0:63a05302ef72 392 * The interface is described in the datasheet section 8.1.2.
denishautot 0:63a05302ef72 393 *
denishautot 0:63a05302ef72 394 * @param reg The register to read from. One of the PCD_Register enums.
denishautot 0:63a05302ef72 395 * @param count The number of bytes to read.
denishautot 0:63a05302ef72 396 * @param values Byte array to store the values in.
denishautot 0:63a05302ef72 397 * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
denishautot 0:63a05302ef72 398 */
denishautot 0:63a05302ef72 399 void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
denishautot 0:63a05302ef72 400
denishautot 0:63a05302ef72 401 /**
denishautot 0:63a05302ef72 402 * Sets the bits given in mask in register reg.
denishautot 0:63a05302ef72 403 *
denishautot 0:63a05302ef72 404 * @param reg The register to update. One of the PCD_Register enums.
denishautot 0:63a05302ef72 405 * @param mask The bits to set.
denishautot 0:63a05302ef72 406 */
denishautot 0:63a05302ef72 407 void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
denishautot 0:63a05302ef72 408
denishautot 0:63a05302ef72 409 /**
denishautot 0:63a05302ef72 410 * Clears the bits given in mask from register reg.
denishautot 0:63a05302ef72 411 *
denishautot 0:63a05302ef72 412 * @param reg The register to update. One of the PCD_Register enums.
denishautot 0:63a05302ef72 413 * @param mask The bits to clear.
denishautot 0:63a05302ef72 414 */
denishautot 0:63a05302ef72 415 void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
denishautot 0:63a05302ef72 416
denishautot 0:63a05302ef72 417 /**
denishautot 0:63a05302ef72 418 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
denishautot 0:63a05302ef72 419 *
denishautot 0:63a05302ef72 420 * @param data Pointer to the data to transfer to the FIFO for CRC calculation.
denishautot 0:63a05302ef72 421 * @param length The number of bytes to transfer.
denishautot 0:63a05302ef72 422 * @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
denishautot 0:63a05302ef72 423 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 424 */
denishautot 0:63a05302ef72 425 uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
denishautot 0:63a05302ef72 426
denishautot 0:63a05302ef72 427 /**
denishautot 0:63a05302ef72 428 * Executes the Transceive command.
denishautot 0:63a05302ef72 429 * CRC validation can only be done if backData and backLen are specified.
denishautot 0:63a05302ef72 430 *
denishautot 0:63a05302ef72 431 * @param sendData Pointer to the data to transfer to the FIFO.
denishautot 0:63a05302ef72 432 * @param sendLen Number of bytes to transfer to the FIFO.
denishautot 0:63a05302ef72 433 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
denishautot 0:63a05302ef72 434 * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
denishautot 0:63a05302ef72 435 * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
denishautot 0:63a05302ef72 436 * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
denishautot 0:63a05302ef72 437 * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
denishautot 0:63a05302ef72 438 *
denishautot 0:63a05302ef72 439 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 440 */
denishautot 0:63a05302ef72 441 uint8_t PCD_TransceiveData (uint8_t *sendData,
denishautot 0:63a05302ef72 442 uint8_t sendLen,
denishautot 0:63a05302ef72 443 uint8_t *backData,
denishautot 0:63a05302ef72 444 uint8_t *backLen,
denishautot 0:63a05302ef72 445 uint8_t *validBits = NULL,
denishautot 0:63a05302ef72 446 uint8_t rxAlign = 0,
denishautot 0:63a05302ef72 447 bool checkCRC = false);
denishautot 0:63a05302ef72 448
denishautot 0:63a05302ef72 449
denishautot 0:63a05302ef72 450 /**
denishautot 0:63a05302ef72 451 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
denishautot 0:63a05302ef72 452 * CRC validation can only be done if backData and backLen are specified.
denishautot 0:63a05302ef72 453 *
denishautot 0:63a05302ef72 454 * @param command The command to execute. One of the PCD_Command enums.
denishautot 0:63a05302ef72 455 * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
denishautot 0:63a05302ef72 456 * @param sendData Pointer to the data to transfer to the FIFO.
denishautot 0:63a05302ef72 457 * @param sendLen Number of bytes to transfer to the FIFO.
denishautot 0:63a05302ef72 458 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
denishautot 0:63a05302ef72 459 * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
denishautot 0:63a05302ef72 460 * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
denishautot 0:63a05302ef72 461 * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
denishautot 0:63a05302ef72 462 * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
denishautot 0:63a05302ef72 463 *
denishautot 0:63a05302ef72 464 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 465 */
denishautot 0:63a05302ef72 466 uint8_t PCD_CommunicateWithPICC(uint8_t command,
denishautot 0:63a05302ef72 467 uint8_t waitIRq,
denishautot 0:63a05302ef72 468 uint8_t *sendData,
denishautot 0:63a05302ef72 469 uint8_t sendLen,
denishautot 0:63a05302ef72 470 uint8_t *backData = NULL,
denishautot 0:63a05302ef72 471 uint8_t *backLen = NULL,
denishautot 0:63a05302ef72 472 uint8_t *validBits = NULL,
denishautot 0:63a05302ef72 473 uint8_t rxAlign = 0,
denishautot 0:63a05302ef72 474 bool checkCRC = false);
denishautot 0:63a05302ef72 475
denishautot 0:63a05302ef72 476 /**
denishautot 0:63a05302ef72 477 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
denishautot 0:63a05302ef72 478 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
denishautot 0:63a05302ef72 479 *
denishautot 0:63a05302ef72 480 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
denishautot 0:63a05302ef72 481 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
denishautot 0:63a05302ef72 482 *
denishautot 0:63a05302ef72 483 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 484 */
denishautot 0:63a05302ef72 485 uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
denishautot 0:63a05302ef72 486
denishautot 0:63a05302ef72 487 /**
denishautot 0:63a05302ef72 488 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
denishautot 0:63a05302ef72 489 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
denishautot 0:63a05302ef72 490 *
denishautot 0:63a05302ef72 491 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
denishautot 0:63a05302ef72 492 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
denishautot 0:63a05302ef72 493 *
denishautot 0:63a05302ef72 494 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 495 */
denishautot 0:63a05302ef72 496 uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
denishautot 0:63a05302ef72 497
denishautot 0:63a05302ef72 498 /**
denishautot 0:63a05302ef72 499 * Transmits REQA or WUPA commands.
denishautot 0:63a05302ef72 500 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
denishautot 0:63a05302ef72 501 *
denishautot 0:63a05302ef72 502 * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
denishautot 0:63a05302ef72 503 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
denishautot 0:63a05302ef72 504 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
denishautot 0:63a05302ef72 505 *
denishautot 0:63a05302ef72 506 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 507 */
denishautot 0:63a05302ef72 508 uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
denishautot 0:63a05302ef72 509
denishautot 0:63a05302ef72 510 /**
denishautot 0:63a05302ef72 511 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
denishautot 0:63a05302ef72 512 * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
denishautot 0:63a05302ef72 513 * On success:
denishautot 0:63a05302ef72 514 * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
denishautot 0:63a05302ef72 515 * - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
denishautot 0:63a05302ef72 516 *
denishautot 0:63a05302ef72 517 * A PICC UID consists of 4, 7 or 10 bytes.
denishautot 0:63a05302ef72 518 * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
denishautot 0:63a05302ef72 519 *
denishautot 0:63a05302ef72 520 * UID size Number of UID bytes Cascade levels Example of PICC
denishautot 0:63a05302ef72 521 * ======== =================== ============== ===============
denishautot 0:63a05302ef72 522 * single 4 1 MIFARE Classic
denishautot 0:63a05302ef72 523 * double 7 2 MIFARE Ultralight
denishautot 0:63a05302ef72 524 * triple 10 3 Not currently in use?
denishautot 0:63a05302ef72 525 *
denishautot 0:63a05302ef72 526 *
denishautot 0:63a05302ef72 527 * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
denishautot 0:63a05302ef72 528 * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
denishautot 0:63a05302ef72 529 *
denishautot 0:63a05302ef72 530 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 531 */
denishautot 0:63a05302ef72 532 uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
denishautot 0:63a05302ef72 533
denishautot 0:63a05302ef72 534 /**
denishautot 0:63a05302ef72 535 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
denishautot 0:63a05302ef72 536 *
denishautot 0:63a05302ef72 537 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 538 */
denishautot 0:63a05302ef72 539 uint8_t PICC_HaltA (void);
denishautot 0:63a05302ef72 540
denishautot 0:63a05302ef72 541 // ************************************************************************************
denishautot 0:63a05302ef72 542 //@}
denishautot 0:63a05302ef72 543
denishautot 0:63a05302ef72 544
denishautot 0:63a05302ef72 545 // ************************************************************************************
denishautot 0:63a05302ef72 546 //! @name Functions for communicating with MIFARE PICCs
denishautot 0:63a05302ef72 547 // ************************************************************************************
denishautot 0:63a05302ef72 548 //@{
denishautot 0:63a05302ef72 549
denishautot 0:63a05302ef72 550 /**
denishautot 0:63a05302ef72 551 * Executes the MFRC522 MFAuthent command.
denishautot 0:63a05302ef72 552 * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
denishautot 0:63a05302ef72 553 * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
denishautot 0:63a05302ef72 554 * For use with MIFARE Classic PICCs.
denishautot 0:63a05302ef72 555 * The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
denishautot 0:63a05302ef72 556 * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
denishautot 0:63a05302ef72 557 *
denishautot 0:63a05302ef72 558 * All keys are set to FFFFFFFFFFFFh at chip delivery.
denishautot 0:63a05302ef72 559 *
denishautot 0:63a05302ef72 560 * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
denishautot 0:63a05302ef72 561 * @param blockAddr The block number. See numbering in the comments in the .h file.
denishautot 0:63a05302ef72 562 * @param key Pointer to the Crypteo1 key to use (6 bytes)
denishautot 0:63a05302ef72 563 * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
denishautot 0:63a05302ef72 564 *
denishautot 0:63a05302ef72 565 * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
denishautot 0:63a05302ef72 566 */
denishautot 0:63a05302ef72 567 uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
denishautot 0:63a05302ef72 568
denishautot 0:63a05302ef72 569 /**
denishautot 0:63a05302ef72 570 * Used to exit the PCD from its authenticated state.
denishautot 0:63a05302ef72 571 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
denishautot 0:63a05302ef72 572 */
denishautot 0:63a05302ef72 573 void PCD_StopCrypto1 (void);
denishautot 0:63a05302ef72 574
denishautot 0:63a05302ef72 575 /**
denishautot 0:63a05302ef72 576 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
denishautot 0:63a05302ef72 577 *
denishautot 0:63a05302ef72 578 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 579 *
denishautot 0:63a05302ef72 580 * For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
denishautot 0:63a05302ef72 581 * The MF0ICU1 returns a NAK for higher addresses.
denishautot 0:63a05302ef72 582 * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
denishautot 0:63a05302ef72 583 * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
denishautot 0:63a05302ef72 584 * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
denishautot 0:63a05302ef72 585 *
denishautot 0:63a05302ef72 586 * The buffer must be at least 18 bytes because a CRC_A is also returned.
denishautot 0:63a05302ef72 587 * Checks the CRC_A before returning STATUS_OK.
denishautot 0:63a05302ef72 588 *
denishautot 0:63a05302ef72 589 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
denishautot 0:63a05302ef72 590 * @param buffer The buffer to store the data in
denishautot 0:63a05302ef72 591 * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
denishautot 0:63a05302ef72 592 *
denishautot 0:63a05302ef72 593 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 594 */
denishautot 0:63a05302ef72 595 uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
denishautot 0:63a05302ef72 596
denishautot 0:63a05302ef72 597 /**
denishautot 0:63a05302ef72 598 * Writes 16 bytes to the active PICC.
denishautot 0:63a05302ef72 599 *
denishautot 0:63a05302ef72 600 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 601 *
denishautot 0:63a05302ef72 602 * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
denishautot 0:63a05302ef72 603 * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
denishautot 0:63a05302ef72 604 * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
denishautot 0:63a05302ef72 605 *
denishautot 0:63a05302ef72 606 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
denishautot 0:63a05302ef72 607 * @param buffer The 16 bytes to write to the PICC
denishautot 0:63a05302ef72 608 * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
denishautot 0:63a05302ef72 609 *
denishautot 0:63a05302ef72 610 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 611 */
denishautot 0:63a05302ef72 612 uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
denishautot 0:63a05302ef72 613
denishautot 0:63a05302ef72 614 /**
denishautot 0:63a05302ef72 615 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
denishautot 0:63a05302ef72 616 *
denishautot 0:63a05302ef72 617 * @param page The page (2-15) to write to.
denishautot 0:63a05302ef72 618 * @param buffer The 4 bytes to write to the PICC
denishautot 0:63a05302ef72 619 * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
denishautot 0:63a05302ef72 620 *
denishautot 0:63a05302ef72 621 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 622 */
denishautot 0:63a05302ef72 623 uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
denishautot 0:63a05302ef72 624
denishautot 0:63a05302ef72 625 /**
denishautot 0:63a05302ef72 626 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
denishautot 0:63a05302ef72 627 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 628 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
denishautot 0:63a05302ef72 629 * Use MIFARE_Transfer() to store the result in a block.
denishautot 0:63a05302ef72 630 *
denishautot 0:63a05302ef72 631 * @param blockAddr The block (0-0xff) number.
denishautot 0:63a05302ef72 632 * @param delta This number is subtracted from the value of block blockAddr.
denishautot 0:63a05302ef72 633 *
denishautot 0:63a05302ef72 634 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 635 */
denishautot 0:63a05302ef72 636 uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
denishautot 0:63a05302ef72 637
denishautot 0:63a05302ef72 638 /**
denishautot 0:63a05302ef72 639 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
denishautot 0:63a05302ef72 640 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 641 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
denishautot 0:63a05302ef72 642 * Use MIFARE_Transfer() to store the result in a block.
denishautot 0:63a05302ef72 643 *
denishautot 0:63a05302ef72 644 * @param blockAddr The block (0-0xff) number.
denishautot 0:63a05302ef72 645 * @param delta This number is added to the value of block blockAddr.
denishautot 0:63a05302ef72 646 *
denishautot 0:63a05302ef72 647 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 648 */
denishautot 0:63a05302ef72 649 uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
denishautot 0:63a05302ef72 650
denishautot 0:63a05302ef72 651 /**
denishautot 0:63a05302ef72 652 * MIFARE Restore copies the value of the addressed block into a volatile memory.
denishautot 0:63a05302ef72 653 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 654 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
denishautot 0:63a05302ef72 655 * Use MIFARE_Transfer() to store the result in a block.
denishautot 0:63a05302ef72 656 *
denishautot 0:63a05302ef72 657 * @param blockAddr The block (0-0xff) number.
denishautot 0:63a05302ef72 658 *
denishautot 0:63a05302ef72 659 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 660 */
denishautot 0:63a05302ef72 661 uint8_t MIFARE_Restore (uint8_t blockAddr);
denishautot 0:63a05302ef72 662
denishautot 0:63a05302ef72 663 /**
denishautot 0:63a05302ef72 664 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
denishautot 0:63a05302ef72 665 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
denishautot 0:63a05302ef72 666 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
denishautot 0:63a05302ef72 667 *
denishautot 0:63a05302ef72 668 * @param blockAddr The block (0-0xff) number.
denishautot 0:63a05302ef72 669 *
denishautot 0:63a05302ef72 670 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 671 */
denishautot 0:63a05302ef72 672 uint8_t MIFARE_Transfer (uint8_t blockAddr);
denishautot 0:63a05302ef72 673
denishautot 0:63a05302ef72 674 // ************************************************************************************
denishautot 0:63a05302ef72 675 //@}
denishautot 0:63a05302ef72 676
denishautot 0:63a05302ef72 677
denishautot 0:63a05302ef72 678 // ************************************************************************************
denishautot 0:63a05302ef72 679 //! @name Support functions
denishautot 0:63a05302ef72 680 // ************************************************************************************
denishautot 0:63a05302ef72 681 //@{
denishautot 0:63a05302ef72 682
denishautot 0:63a05302ef72 683 /**
denishautot 0:63a05302ef72 684 * Wrapper for MIFARE protocol communication.
denishautot 0:63a05302ef72 685 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
denishautot 0:63a05302ef72 686 *
denishautot 0:63a05302ef72 687 * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
denishautot 0:63a05302ef72 688 * @param sendLen Number of bytes in sendData.
denishautot 0:63a05302ef72 689 * @param acceptTimeout True => A timeout is also success
denishautot 0:63a05302ef72 690 *
denishautot 0:63a05302ef72 691 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 692 */
denishautot 0:63a05302ef72 693 uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
denishautot 0:63a05302ef72 694
denishautot 0:63a05302ef72 695 /**
denishautot 0:63a05302ef72 696 * Translates the SAK (Select Acknowledge) to a PICC type.
denishautot 0:63a05302ef72 697 *
denishautot 0:63a05302ef72 698 * @param sak The SAK byte returned from PICC_Select().
denishautot 0:63a05302ef72 699 *
denishautot 0:63a05302ef72 700 * @return PICC_Type
denishautot 0:63a05302ef72 701 */
denishautot 0:63a05302ef72 702 uint8_t PICC_GetType (uint8_t sak);
denishautot 0:63a05302ef72 703
denishautot 0:63a05302ef72 704 /**
denishautot 0:63a05302ef72 705 * Returns a string pointer to the PICC type name.
denishautot 0:63a05302ef72 706 *
denishautot 0:63a05302ef72 707 * @param type One of the PICC_Type enums.
denishautot 0:63a05302ef72 708 *
denishautot 0:63a05302ef72 709 * @return A string pointer to the PICC type name.
denishautot 0:63a05302ef72 710 */
denishautot 0:63a05302ef72 711 char* PICC_GetTypeName (uint8_t type);
denishautot 0:63a05302ef72 712
denishautot 0:63a05302ef72 713 /**
denishautot 0:63a05302ef72 714 * Returns a string pointer to a status code name.
denishautot 0:63a05302ef72 715 *
denishautot 0:63a05302ef72 716 * @param code One of the StatusCode enums.
denishautot 0:63a05302ef72 717 *
denishautot 0:63a05302ef72 718 * @return A string pointer to a status code name.
denishautot 0:63a05302ef72 719 */
denishautot 0:63a05302ef72 720 char* GetStatusCodeName (uint8_t code);
denishautot 0:63a05302ef72 721
denishautot 0:63a05302ef72 722 /**
denishautot 0:63a05302ef72 723 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
denishautot 0:63a05302ef72 724 *
denishautot 0:63a05302ef72 725 * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
denishautot 0:63a05302ef72 726 * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
denishautot 0:63a05302ef72 727 * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
denishautot 0:63a05302ef72 728 * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
denishautot 0:63a05302ef72 729 * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
denishautot 0:63a05302ef72 730 */
denishautot 0:63a05302ef72 731 void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
denishautot 0:63a05302ef72 732 uint8_t g0,
denishautot 0:63a05302ef72 733 uint8_t g1,
denishautot 0:63a05302ef72 734 uint8_t g2,
denishautot 0:63a05302ef72 735 uint8_t g3);
denishautot 0:63a05302ef72 736
denishautot 0:63a05302ef72 737 // ************************************************************************************
denishautot 0:63a05302ef72 738 //@}
denishautot 0:63a05302ef72 739
denishautot 0:63a05302ef72 740
denishautot 0:63a05302ef72 741 // ************************************************************************************
denishautot 0:63a05302ef72 742 //! @name Convenience functions - does not add extra functionality
denishautot 0:63a05302ef72 743 // ************************************************************************************
denishautot 0:63a05302ef72 744 //@{
denishautot 0:63a05302ef72 745
denishautot 0:63a05302ef72 746 /**
denishautot 0:63a05302ef72 747 * Returns true if a PICC responds to PICC_CMD_REQA.
denishautot 0:63a05302ef72 748 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
denishautot 0:63a05302ef72 749 *
denishautot 0:63a05302ef72 750 * @return bool
denishautot 0:63a05302ef72 751 */
denishautot 0:63a05302ef72 752 bool PICC_IsNewCardPresent(void);
denishautot 0:63a05302ef72 753
denishautot 0:63a05302ef72 754 /**
denishautot 0:63a05302ef72 755 * Simple wrapper around PICC_Select.
denishautot 0:63a05302ef72 756 * Returns true if a UID could be read.
denishautot 0:63a05302ef72 757 * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
denishautot 0:63a05302ef72 758 * The read UID is available in the class variable uid.
denishautot 0:63a05302ef72 759 *
denishautot 0:63a05302ef72 760 * @return bool
denishautot 0:63a05302ef72 761 */
denishautot 0:63a05302ef72 762 bool PICC_ReadCardSerial (void);
denishautot 0:63a05302ef72 763
denishautot 0:63a05302ef72 764 // ************************************************************************************
denishautot 0:63a05302ef72 765 //@}
denishautot 0:63a05302ef72 766
denishautot 0:63a05302ef72 767
denishautot 0:63a05302ef72 768 private:
denishautot 0:63a05302ef72 769 SPI m_SPI;
denishautot 0:63a05302ef72 770 DigitalOut m_CS;
denishautot 0:63a05302ef72 771 DigitalOut m_RESET;
denishautot 0:63a05302ef72 772
denishautot 0:63a05302ef72 773 /**
denishautot 0:63a05302ef72 774 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
denishautot 0:63a05302ef72 775 *
denishautot 0:63a05302ef72 776 * @param command The command to use
denishautot 0:63a05302ef72 777 * @param blockAddr The block (0-0xff) number.
denishautot 0:63a05302ef72 778 * @param data The data to transfer in step 2
denishautot 0:63a05302ef72 779 *
denishautot 0:63a05302ef72 780 * @return STATUS_OK on success, STATUS_??? otherwise.
denishautot 0:63a05302ef72 781 */
denishautot 0:63a05302ef72 782 uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
denishautot 0:63a05302ef72 783 };
denishautot 0:63a05302ef72 784
denishautot 0:63a05302ef72 785 #endif