virtualmech / Mbed 2 deprecated vmConfort_v6

Esta versión v6 pasa a ser el nuevo master. Funciona correctamente

Dependencies:   ADXL345 Display1602 MSCFileSystem SDFileSystem mbed FATFileSystem

MSCFileSystem/USBHostLite/usbhost_lpc17xx.cpp@0:a5367bd4e404, 2014-05-20 (annotated)

Committer:
jjmedina
Date:
Tue May 20 15:11:16 2014 +0000
Revision:
0:a5367bd4e404
Copia master que funciona. Ha habido una confusi?n entre las versiones 4 y 5 y, con ?sta, se solucoina.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
jjmedina 0:a5367bd4e404 1 /*
jjmedina 0:a5367bd4e404 2 **************************************************************************************************************
jjmedina 0:a5367bd4e404 3 * NXP USB Host Stack
jjmedina 0:a5367bd4e404 4 *
jjmedina 0:a5367bd4e404 5 * (c) Copyright 2008, NXP SemiConductors
jjmedina 0:a5367bd4e404 6 * (c) Copyright 2008, OnChip Technologies LLC
jjmedina 0:a5367bd4e404 7 * All Rights Reserved
jjmedina 0:a5367bd4e404 8 *
jjmedina 0:a5367bd4e404 9 * www.nxp.com
jjmedina 0:a5367bd4e404 10 * www.onchiptech.com
jjmedina 0:a5367bd4e404 11 *
jjmedina 0:a5367bd4e404 12 * File : usbhost_lpc17xx.c
jjmedina 0:a5367bd4e404 13 * Programmer(s) : Ravikanth.P
jjmedina 0:a5367bd4e404 14 * Version :
jjmedina 0:a5367bd4e404 15 *
jjmedina 0:a5367bd4e404 16 **************************************************************************************************************
jjmedina 0:a5367bd4e404 17 */
jjmedina 0:a5367bd4e404 18
jjmedina 0:a5367bd4e404 19 /*
jjmedina 0:a5367bd4e404 20 **************************************************************************************************************
jjmedina 0:a5367bd4e404 21 * INCLUDE HEADER FILES
jjmedina 0:a5367bd4e404 22 **************************************************************************************************************
jjmedina 0:a5367bd4e404 23 */
jjmedina 0:a5367bd4e404 24
jjmedina 0:a5367bd4e404 25 #include "usbhost_lpc17xx.h"
jjmedina 0:a5367bd4e404 26
jjmedina 0:a5367bd4e404 27 /*
jjmedina 0:a5367bd4e404 28 **************************************************************************************************************
jjmedina 0:a5367bd4e404 29 * GLOBAL VARIABLES
jjmedina 0:a5367bd4e404 30 **************************************************************************************************************
jjmedina 0:a5367bd4e404 31 */
jjmedina 0:a5367bd4e404 32 int gUSBConnected;
jjmedina 0:a5367bd4e404 33
jjmedina 0:a5367bd4e404 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
jjmedina 0:a5367bd4e404 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
jjmedina 0:a5367bd4e404 36 volatile USB_INT08U HOST_TDControlStatus = 0;
jjmedina 0:a5367bd4e404 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
jjmedina 0:a5367bd4e404 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
jjmedina 0:a5367bd4e404 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
jjmedina 0:a5367bd4e404 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
jjmedina 0:a5367bd4e404 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
jjmedina 0:a5367bd4e404 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
jjmedina 0:a5367bd4e404 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
jjmedina 0:a5367bd4e404 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
jjmedina 0:a5367bd4e404 45
jjmedina 0:a5367bd4e404 46 // USB host structures
jjmedina 0:a5367bd4e404 47 // AHB SRAM block 1
jjmedina 0:a5367bd4e404 48 #define HOSTBASEADDR 0x20080000
jjmedina 0:a5367bd4e404 49 // reserve memory for the linker
jjmedina 0:a5367bd4e404 50 static USB_INT08U HostBuf[0x200] __attribute__((section(".ARM.__at_0x20080000")));
jjmedina 0:a5367bd4e404 51 /*
jjmedina 0:a5367bd4e404 52 **************************************************************************************************************
jjmedina 0:a5367bd4e404 53 * DELAY IN MILLI SECONDS
jjmedina 0:a5367bd4e404 54 *
jjmedina 0:a5367bd4e404 55 * Description: This function provides a delay in milli seconds
jjmedina 0:a5367bd4e404 56 *
jjmedina 0:a5367bd4e404 57 * Arguments : delay The delay required
jjmedina 0:a5367bd4e404 58 *
jjmedina 0:a5367bd4e404 59 * Returns : None
jjmedina 0:a5367bd4e404 60 *
jjmedina 0:a5367bd4e404 61 **************************************************************************************************************
jjmedina 0:a5367bd4e404 62 */
jjmedina 0:a5367bd4e404 63
jjmedina 0:a5367bd4e404 64 void Host_DelayMS (USB_INT32U delay)
jjmedina 0:a5367bd4e404 65 {
jjmedina 0:a5367bd4e404 66 volatile USB_INT32U i;
jjmedina 0:a5367bd4e404 67
jjmedina 0:a5367bd4e404 68
jjmedina 0:a5367bd4e404 69 for (i = 0; i < delay; i++) {
jjmedina 0:a5367bd4e404 70 Host_DelayUS(1000);
jjmedina 0:a5367bd4e404 71 }
jjmedina 0:a5367bd4e404 72 }
jjmedina 0:a5367bd4e404 73
jjmedina 0:a5367bd4e404 74 /*
jjmedina 0:a5367bd4e404 75 **************************************************************************************************************
jjmedina 0:a5367bd4e404 76 * DELAY IN MICRO SECONDS
jjmedina 0:a5367bd4e404 77 *
jjmedina 0:a5367bd4e404 78 * Description: This function provides a delay in micro seconds
jjmedina 0:a5367bd4e404 79 *
jjmedina 0:a5367bd4e404 80 * Arguments : delay The delay required
jjmedina 0:a5367bd4e404 81 *
jjmedina 0:a5367bd4e404 82 * Returns : None
jjmedina 0:a5367bd4e404 83 *
jjmedina 0:a5367bd4e404 84 **************************************************************************************************************
jjmedina 0:a5367bd4e404 85 */
jjmedina 0:a5367bd4e404 86
jjmedina 0:a5367bd4e404 87 void Host_DelayUS (USB_INT32U delay)
jjmedina 0:a5367bd4e404 88 {
jjmedina 0:a5367bd4e404 89 volatile USB_INT32U i;
jjmedina 0:a5367bd4e404 90
jjmedina 0:a5367bd4e404 91
jjmedina 0:a5367bd4e404 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
jjmedina 0:a5367bd4e404 93 ;
jjmedina 0:a5367bd4e404 94 }
jjmedina 0:a5367bd4e404 95 }
jjmedina 0:a5367bd4e404 96
jjmedina 0:a5367bd4e404 97 // bits of the USB/OTG clock control register
jjmedina 0:a5367bd4e404 98 #define HOST_CLK_EN (1<<0)
jjmedina 0:a5367bd4e404 99 #define DEV_CLK_EN (1<<1)
jjmedina 0:a5367bd4e404 100 #define PORTSEL_CLK_EN (1<<3)
jjmedina 0:a5367bd4e404 101 #define AHB_CLK_EN (1<<4)
jjmedina 0:a5367bd4e404 102
jjmedina 0:a5367bd4e404 103 // bits of the USB/OTG clock status register
jjmedina 0:a5367bd4e404 104 #define HOST_CLK_ON (1<<0)
jjmedina 0:a5367bd4e404 105 #define DEV_CLK_ON (1<<1)
jjmedina 0:a5367bd4e404 106 #define PORTSEL_CLK_ON (1<<3)
jjmedina 0:a5367bd4e404 107 #define AHB_CLK_ON (1<<4)
jjmedina 0:a5367bd4e404 108
jjmedina 0:a5367bd4e404 109 // we need host clock, OTG/portsel clock and AHB clock
jjmedina 0:a5367bd4e404 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
jjmedina 0:a5367bd4e404 111
jjmedina 0:a5367bd4e404 112 /*
jjmedina 0:a5367bd4e404 113 **************************************************************************************************************
jjmedina 0:a5367bd4e404 114 * INITIALIZE THE HOST CONTROLLER
jjmedina 0:a5367bd4e404 115 *
jjmedina 0:a5367bd4e404 116 * Description: This function initializes lpc17xx host controller
jjmedina 0:a5367bd4e404 117 *
jjmedina 0:a5367bd4e404 118 * Arguments : None
jjmedina 0:a5367bd4e404 119 *
jjmedina 0:a5367bd4e404 120 * Returns :
jjmedina 0:a5367bd4e404 121 *
jjmedina 0:a5367bd4e404 122 **************************************************************************************************************
jjmedina 0:a5367bd4e404 123 */
jjmedina 0:a5367bd4e404 124 void Host_Init (void)
jjmedina 0:a5367bd4e404 125 {
jjmedina 0:a5367bd4e404 126 PRINT_Log("In Host_Init\n");
jjmedina 0:a5367bd4e404 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
jjmedina 0:a5367bd4e404 128
jjmedina 0:a5367bd4e404 129 // turn on power for USB
jjmedina 0:a5367bd4e404 130 LPC_SC->PCONP |= (1UL<<31);
jjmedina 0:a5367bd4e404 131 // Enable USB host clock, port selection and AHB clock
jjmedina 0:a5367bd4e404 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
jjmedina 0:a5367bd4e404 133 // Wait for clocks to become available
jjmedina 0:a5367bd4e404 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
jjmedina 0:a5367bd4e404 135 ;
jjmedina 0:a5367bd4e404 136
jjmedina 0:a5367bd4e404 137 // it seems the bits[0:1] mean the following
jjmedina 0:a5367bd4e404 138 // 0: U1=device, U2=host
jjmedina 0:a5367bd4e404 139 // 1: U1=host, U2=host
jjmedina 0:a5367bd4e404 140 // 2: reserved
jjmedina 0:a5367bd4e404 141 // 3: U1=host, U2=device
jjmedina 0:a5367bd4e404 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
jjmedina 0:a5367bd4e404 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
jjmedina 0:a5367bd4e404 144 LPC_USB->OTGStCtrl |= 1;
jjmedina 0:a5367bd4e404 145
jjmedina 0:a5367bd4e404 146 // now that we've configured the ports, we can turn off the portsel clock
jjmedina 0:a5367bd4e404 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
jjmedina 0:a5367bd4e404 148
jjmedina 0:a5367bd4e404 149 // power pins are not connected on mbed, so we can skip them
jjmedina 0:a5367bd4e404 150 /* P1[18] = USB_UP_LED, 01 */
jjmedina 0:a5367bd4e404 151 /* P1[19] = /USB_PPWR, 10 */
jjmedina 0:a5367bd4e404 152 /* P1[22] = USB_PWRD, 10 */
jjmedina 0:a5367bd4e404 153 /* P1[27] = /USB_OVRCR, 10 */
jjmedina 0:a5367bd4e404 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
jjmedina 0:a5367bd4e404 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
jjmedina 0:a5367bd4e404 156 */
jjmedina 0:a5367bd4e404 157
jjmedina 0:a5367bd4e404 158 // configure USB D+/D- pins
jjmedina 0:a5367bd4e404 159 /* P0[29] = USB_D+, 01 */
jjmedina 0:a5367bd4e404 160 /* P0[30] = USB_D-, 01 */
jjmedina 0:a5367bd4e404 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
jjmedina 0:a5367bd4e404 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
jjmedina 0:a5367bd4e404 163
jjmedina 0:a5367bd4e404 164 PRINT_Log("Initializing Host Stack\n");
jjmedina 0:a5367bd4e404 165
jjmedina 0:a5367bd4e404 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
jjmedina 0:a5367bd4e404 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
jjmedina 0:a5367bd4e404 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
jjmedina 0:a5367bd4e404 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
jjmedina 0:a5367bd4e404 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
jjmedina 0:a5367bd4e404 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
jjmedina 0:a5367bd4e404 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
jjmedina 0:a5367bd4e404 173
jjmedina 0:a5367bd4e404 174 /* Initialize all the TDs, EDs and HCCA to 0 */
jjmedina 0:a5367bd4e404 175 Host_EDInit(EDCtrl);
jjmedina 0:a5367bd4e404 176 Host_EDInit(EDBulkIn);
jjmedina 0:a5367bd4e404 177 Host_EDInit(EDBulkOut);
jjmedina 0:a5367bd4e404 178 Host_TDInit(TDHead);
jjmedina 0:a5367bd4e404 179 Host_TDInit(TDTail);
jjmedina 0:a5367bd4e404 180 Host_HCCAInit(Hcca);
jjmedina 0:a5367bd4e404 181
jjmedina 0:a5367bd4e404 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
jjmedina 0:a5367bd4e404 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
jjmedina 0:a5367bd4e404 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
jjmedina 0:a5367bd4e404 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
jjmedina 0:a5367bd4e404 186
jjmedina 0:a5367bd4e404 187 /* SOFTWARE RESET */
jjmedina 0:a5367bd4e404 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
jjmedina 0:a5367bd4e404 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
jjmedina 0:a5367bd4e404 190
jjmedina 0:a5367bd4e404 191 /* Put HC in operational state */
jjmedina 0:a5367bd4e404 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
jjmedina 0:a5367bd4e404 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
jjmedina 0:a5367bd4e404 194
jjmedina 0:a5367bd4e404 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
jjmedina 0:a5367bd4e404 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
jjmedina 0:a5367bd4e404 197
jjmedina 0:a5367bd4e404 198
jjmedina 0:a5367bd4e404 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
jjmedina 0:a5367bd4e404 200 OR_INTR_ENABLE_WDH |
jjmedina 0:a5367bd4e404 201 OR_INTR_ENABLE_RHSC;
jjmedina 0:a5367bd4e404 202
jjmedina 0:a5367bd4e404 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
jjmedina 0:a5367bd4e404 204 /* Enable the USB Interrupt */
jjmedina 0:a5367bd4e404 205 NVIC_EnableIRQ(USB_IRQn);
jjmedina 0:a5367bd4e404 206 PRINT_Log("Host Initialized\n");
jjmedina 0:a5367bd4e404 207 }
jjmedina 0:a5367bd4e404 208
jjmedina 0:a5367bd4e404 209 /*
jjmedina 0:a5367bd4e404 210 **************************************************************************************************************
jjmedina 0:a5367bd4e404 211 * INTERRUPT SERVICE ROUTINE
jjmedina 0:a5367bd4e404 212 *
jjmedina 0:a5367bd4e404 213 * Description: This function services the interrupt caused by host controller
jjmedina 0:a5367bd4e404 214 *
jjmedina 0:a5367bd4e404 215 * Arguments : None
jjmedina 0:a5367bd4e404 216 *
jjmedina 0:a5367bd4e404 217 * Returns : None
jjmedina 0:a5367bd4e404 218 *
jjmedina 0:a5367bd4e404 219 **************************************************************************************************************
jjmedina 0:a5367bd4e404 220 */
jjmedina 0:a5367bd4e404 221
jjmedina 0:a5367bd4e404 222 void USB_IRQHandler (void) __irq
jjmedina 0:a5367bd4e404 223 {
jjmedina 0:a5367bd4e404 224 USB_INT32U int_status;
jjmedina 0:a5367bd4e404 225 USB_INT32U ie_status;
jjmedina 0:a5367bd4e404 226
jjmedina 0:a5367bd4e404 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
jjmedina 0:a5367bd4e404 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
jjmedina 0:a5367bd4e404 229
jjmedina 0:a5367bd4e404 230 if (!(int_status & ie_status)) {
jjmedina 0:a5367bd4e404 231 return;
jjmedina 0:a5367bd4e404 232 } else {
jjmedina 0:a5367bd4e404 233
jjmedina 0:a5367bd4e404 234 int_status = int_status & ie_status;
jjmedina 0:a5367bd4e404 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
jjmedina 0:a5367bd4e404 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
jjmedina 0:a5367bd4e404 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
jjmedina 0:a5367bd4e404 238 /*
jjmedina 0:a5367bd4e404 239 * When DRWE is on, Connect Status Change
jjmedina 0:a5367bd4e404 240 * means a remote wakeup event.
jjmedina 0:a5367bd4e404 241 */
jjmedina 0:a5367bd4e404 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
jjmedina 0:a5367bd4e404 243 }
jjmedina 0:a5367bd4e404 244 else {
jjmedina 0:a5367bd4e404 245 /*
jjmedina 0:a5367bd4e404 246 * When DRWE is off, Connect Status Change
jjmedina 0:a5367bd4e404 247 * is NOT a remote wakeup event
jjmedina 0:a5367bd4e404 248 */
jjmedina 0:a5367bd4e404 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
jjmedina 0:a5367bd4e404 250 if (!gUSBConnected) {
jjmedina 0:a5367bd4e404 251 HOST_TDControlStatus = 0;
jjmedina 0:a5367bd4e404 252 HOST_WdhIntr = 0;
jjmedina 0:a5367bd4e404 253 HOST_RhscIntr = 1;
jjmedina 0:a5367bd4e404 254 gUSBConnected = 1;
jjmedina 0:a5367bd4e404 255 }
jjmedina 0:a5367bd4e404 256 else
jjmedina 0:a5367bd4e404 257 PRINT_Log("Spurious status change (connected)?\n");
jjmedina 0:a5367bd4e404 258 } else {
jjmedina 0:a5367bd4e404 259 if (gUSBConnected) {
jjmedina 0:a5367bd4e404 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
jjmedina 0:a5367bd4e404 261 HOST_RhscIntr = 0;
jjmedina 0:a5367bd4e404 262 gUSBConnected = 0;
jjmedina 0:a5367bd4e404 263 }
jjmedina 0:a5367bd4e404 264 else
jjmedina 0:a5367bd4e404 265 PRINT_Log("Spurious status change (disconnected)?\n");
jjmedina 0:a5367bd4e404 266 }
jjmedina 0:a5367bd4e404 267 }
jjmedina 0:a5367bd4e404 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
jjmedina 0:a5367bd4e404 269 }
jjmedina 0:a5367bd4e404 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
jjmedina 0:a5367bd4e404 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
jjmedina 0:a5367bd4e404 272 }
jjmedina 0:a5367bd4e404 273 }
jjmedina 0:a5367bd4e404 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
jjmedina 0:a5367bd4e404 275 HOST_WdhIntr = 1;
jjmedina 0:a5367bd4e404 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
jjmedina 0:a5367bd4e404 277 }
jjmedina 0:a5367bd4e404 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
jjmedina 0:a5367bd4e404 279 }
jjmedina 0:a5367bd4e404 280 return;
jjmedina 0:a5367bd4e404 281 }
jjmedina 0:a5367bd4e404 282
jjmedina 0:a5367bd4e404 283 /*
jjmedina 0:a5367bd4e404 284 **************************************************************************************************************
jjmedina 0:a5367bd4e404 285 * PROCESS TRANSFER DESCRIPTOR
jjmedina 0:a5367bd4e404 286 *
jjmedina 0:a5367bd4e404 287 * Description: This function processes the transfer descriptor
jjmedina 0:a5367bd4e404 288 *
jjmedina 0:a5367bd4e404 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
jjmedina 0:a5367bd4e404 290 * token SETUP, IN, OUT
jjmedina 0:a5367bd4e404 291 * buffer Current Buffer Pointer of the transfer descriptor
jjmedina 0:a5367bd4e404 292 * buffer_len Length of the buffer
jjmedina 0:a5367bd4e404 293 *
jjmedina 0:a5367bd4e404 294 * Returns : OK if TD submission is successful
jjmedina 0:a5367bd4e404 295 * ERROR if TD submission fails
jjmedina 0:a5367bd4e404 296 *
jjmedina 0:a5367bd4e404 297 **************************************************************************************************************
jjmedina 0:a5367bd4e404 298 */
jjmedina 0:a5367bd4e404 299
jjmedina 0:a5367bd4e404 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
jjmedina 0:a5367bd4e404 301 volatile USB_INT32U token,
jjmedina 0:a5367bd4e404 302 volatile USB_INT08U *buffer,
jjmedina 0:a5367bd4e404 303 USB_INT32U buffer_len)
jjmedina 0:a5367bd4e404 304 {
jjmedina 0:a5367bd4e404 305 volatile USB_INT32U td_toggle;
jjmedina 0:a5367bd4e404 306
jjmedina 0:a5367bd4e404 307
jjmedina 0:a5367bd4e404 308 if (ed == EDCtrl) {
jjmedina 0:a5367bd4e404 309 if (token == TD_SETUP) {
jjmedina 0:a5367bd4e404 310 td_toggle = TD_TOGGLE_0;
jjmedina 0:a5367bd4e404 311 } else {
jjmedina 0:a5367bd4e404 312 td_toggle = TD_TOGGLE_1;
jjmedina 0:a5367bd4e404 313 }
jjmedina 0:a5367bd4e404 314 } else {
jjmedina 0:a5367bd4e404 315 td_toggle = 0;
jjmedina 0:a5367bd4e404 316 }
jjmedina 0:a5367bd4e404 317 TDHead->Control = (TD_ROUNDING |
jjmedina 0:a5367bd4e404 318 token |
jjmedina 0:a5367bd4e404 319 TD_DELAY_INT(0) |
jjmedina 0:a5367bd4e404 320 td_toggle |
jjmedina 0:a5367bd4e404 321 TD_CC);
jjmedina 0:a5367bd4e404 322 TDTail->Control = 0;
jjmedina 0:a5367bd4e404 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
jjmedina 0:a5367bd4e404 324 TDTail->CurrBufPtr = 0;
jjmedina 0:a5367bd4e404 325 TDHead->Next = (USB_INT32U) TDTail;
jjmedina 0:a5367bd4e404 326 TDTail->Next = 0;
jjmedina 0:a5367bd4e404 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
jjmedina 0:a5367bd4e404 328 TDTail->BufEnd = 0;
jjmedina 0:a5367bd4e404 329
jjmedina 0:a5367bd4e404 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
jjmedina 0:a5367bd4e404 331 ed->TailTd = (USB_INT32U)TDTail;
jjmedina 0:a5367bd4e404 332 ed->Next = 0;
jjmedina 0:a5367bd4e404 333
jjmedina 0:a5367bd4e404 334 if (ed == EDCtrl) {
jjmedina 0:a5367bd4e404 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
jjmedina 0:a5367bd4e404 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
jjmedina 0:a5367bd4e404 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
jjmedina 0:a5367bd4e404 338 } else {
jjmedina 0:a5367bd4e404 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
jjmedina 0:a5367bd4e404 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
jjmedina 0:a5367bd4e404 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
jjmedina 0:a5367bd4e404 342 }
jjmedina 0:a5367bd4e404 343
jjmedina 0:a5367bd4e404 344 Host_WDHWait();
jjmedina 0:a5367bd4e404 345
jjmedina 0:a5367bd4e404 346 // if (!(TDHead->Control & 0xF0000000)) {
jjmedina 0:a5367bd4e404 347 if (!HOST_TDControlStatus) {
jjmedina 0:a5367bd4e404 348 return (OK);
jjmedina 0:a5367bd4e404 349 } else {
jjmedina 0:a5367bd4e404 350 return (ERR_TD_FAIL);
jjmedina 0:a5367bd4e404 351 }
jjmedina 0:a5367bd4e404 352 }
jjmedina 0:a5367bd4e404 353
jjmedina 0:a5367bd4e404 354 /*
jjmedina 0:a5367bd4e404 355 **************************************************************************************************************
jjmedina 0:a5367bd4e404 356 * ENUMERATE THE DEVICE
jjmedina 0:a5367bd4e404 357 *
jjmedina 0:a5367bd4e404 358 * Description: This function is used to enumerate the device connected
jjmedina 0:a5367bd4e404 359 *
jjmedina 0:a5367bd4e404 360 * Arguments : None
jjmedina 0:a5367bd4e404 361 *
jjmedina 0:a5367bd4e404 362 * Returns : None
jjmedina 0:a5367bd4e404 363 *
jjmedina 0:a5367bd4e404 364 **************************************************************************************************************
jjmedina 0:a5367bd4e404 365 */
jjmedina 0:a5367bd4e404 366
jjmedina 0:a5367bd4e404 367 USB_INT32S Host_EnumDev (void)
jjmedina 0:a5367bd4e404 368 {
jjmedina 0:a5367bd4e404 369 USB_INT32S rc;
jjmedina 0:a5367bd4e404 370
jjmedina 0:a5367bd4e404 371 PRINT_Log("Connect a Mass Storage device\n");
jjmedina 0:a5367bd4e404 372 while (!HOST_RhscIntr)
jjmedina 0:a5367bd4e404 373 __WFI();
jjmedina 0:a5367bd4e404 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
jjmedina 0:a5367bd4e404 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
jjmedina 0:a5367bd4e404 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
jjmedina 0:a5367bd4e404 377 __WFI(); // Wait for port reset to complete...
jjmedina 0:a5367bd4e404 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
jjmedina 0:a5367bd4e404 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
jjmedina 0:a5367bd4e404 380
jjmedina 0:a5367bd4e404 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
jjmedina 0:a5367bd4e404 382 /* Read first 8 bytes of device desc */
jjmedina 0:a5367bd4e404 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
jjmedina 0:a5367bd4e404 384 if (rc != OK) {
jjmedina 0:a5367bd4e404 385 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 386 return (rc);
jjmedina 0:a5367bd4e404 387 }
jjmedina 0:a5367bd4e404 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
jjmedina 0:a5367bd4e404 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
jjmedina 0:a5367bd4e404 390 if (rc != OK) {
jjmedina 0:a5367bd4e404 391 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 392 return (rc);
jjmedina 0:a5367bd4e404 393 }
jjmedina 0:a5367bd4e404 394 Host_DelayMS(2);
jjmedina 0:a5367bd4e404 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
jjmedina 0:a5367bd4e404 396 /* Get the configuration descriptor */
jjmedina 0:a5367bd4e404 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
jjmedina 0:a5367bd4e404 398 if (rc != OK) {
jjmedina 0:a5367bd4e404 399 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 400 return (rc);
jjmedina 0:a5367bd4e404 401 }
jjmedina 0:a5367bd4e404 402 /* Get the first configuration data */
jjmedina 0:a5367bd4e404 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
jjmedina 0:a5367bd4e404 404 if (rc != OK) {
jjmedina 0:a5367bd4e404 405 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 406 return (rc);
jjmedina 0:a5367bd4e404 407 }
jjmedina 0:a5367bd4e404 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
jjmedina 0:a5367bd4e404 409 if (rc != OK) {
jjmedina 0:a5367bd4e404 410 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 411 return (rc);
jjmedina 0:a5367bd4e404 412 }
jjmedina 0:a5367bd4e404 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
jjmedina 0:a5367bd4e404 414 if (rc != OK) {
jjmedina 0:a5367bd4e404 415 PRINT_Err(rc);
jjmedina 0:a5367bd4e404 416 }
jjmedina 0:a5367bd4e404 417 Host_DelayMS(100); /* Some devices may require this delay */
jjmedina 0:a5367bd4e404 418 return (rc);
jjmedina 0:a5367bd4e404 419 }
jjmedina 0:a5367bd4e404 420
jjmedina 0:a5367bd4e404 421 /*
jjmedina 0:a5367bd4e404 422 **************************************************************************************************************
jjmedina 0:a5367bd4e404 423 * RECEIVE THE CONTROL INFORMATION
jjmedina 0:a5367bd4e404 424 *
jjmedina 0:a5367bd4e404 425 * Description: This function is used to receive the control information
jjmedina 0:a5367bd4e404 426 *
jjmedina 0:a5367bd4e404 427 * Arguments : bm_request_type
jjmedina 0:a5367bd4e404 428 * b_request
jjmedina 0:a5367bd4e404 429 * w_value
jjmedina 0:a5367bd4e404 430 * w_index
jjmedina 0:a5367bd4e404 431 * w_length
jjmedina 0:a5367bd4e404 432 * buffer
jjmedina 0:a5367bd4e404 433 *
jjmedina 0:a5367bd4e404 434 * Returns : OK if Success
jjmedina 0:a5367bd4e404 435 * ERROR if Failed
jjmedina 0:a5367bd4e404 436 *
jjmedina 0:a5367bd4e404 437 **************************************************************************************************************
jjmedina 0:a5367bd4e404 438 */
jjmedina 0:a5367bd4e404 439
jjmedina 0:a5367bd4e404 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
jjmedina 0:a5367bd4e404 441 USB_INT08U b_request,
jjmedina 0:a5367bd4e404 442 USB_INT16U w_value,
jjmedina 0:a5367bd4e404 443 USB_INT16U w_index,
jjmedina 0:a5367bd4e404 444 USB_INT16U w_length,
jjmedina 0:a5367bd4e404 445 volatile USB_INT08U *buffer)
jjmedina 0:a5367bd4e404 446 {
jjmedina 0:a5367bd4e404 447 USB_INT32S rc;
jjmedina 0:a5367bd4e404 448
jjmedina 0:a5367bd4e404 449
jjmedina 0:a5367bd4e404 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
jjmedina 0:a5367bd4e404 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
jjmedina 0:a5367bd4e404 452 if (rc == OK) {
jjmedina 0:a5367bd4e404 453 if (w_length) {
jjmedina 0:a5367bd4e404 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
jjmedina 0:a5367bd4e404 455 }
jjmedina 0:a5367bd4e404 456 if (rc == OK) {
jjmedina 0:a5367bd4e404 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
jjmedina 0:a5367bd4e404 458 }
jjmedina 0:a5367bd4e404 459 }
jjmedina 0:a5367bd4e404 460 return (rc);
jjmedina 0:a5367bd4e404 461 }
jjmedina 0:a5367bd4e404 462
jjmedina 0:a5367bd4e404 463 /*
jjmedina 0:a5367bd4e404 464 **************************************************************************************************************
jjmedina 0:a5367bd4e404 465 * SEND THE CONTROL INFORMATION
jjmedina 0:a5367bd4e404 466 *
jjmedina 0:a5367bd4e404 467 * Description: This function is used to send the control information
jjmedina 0:a5367bd4e404 468 *
jjmedina 0:a5367bd4e404 469 * Arguments : None
jjmedina 0:a5367bd4e404 470 *
jjmedina 0:a5367bd4e404 471 * Returns : OK if Success
jjmedina 0:a5367bd4e404 472 * ERR_INVALID_BOOTSIG if Failed
jjmedina 0:a5367bd4e404 473 *
jjmedina 0:a5367bd4e404 474 **************************************************************************************************************
jjmedina 0:a5367bd4e404 475 */
jjmedina 0:a5367bd4e404 476
jjmedina 0:a5367bd4e404 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
jjmedina 0:a5367bd4e404 478 USB_INT08U b_request,
jjmedina 0:a5367bd4e404 479 USB_INT16U w_value,
jjmedina 0:a5367bd4e404 480 USB_INT16U w_index,
jjmedina 0:a5367bd4e404 481 USB_INT16U w_length,
jjmedina 0:a5367bd4e404 482 volatile USB_INT08U *buffer)
jjmedina 0:a5367bd4e404 483 {
jjmedina 0:a5367bd4e404 484 USB_INT32S rc;
jjmedina 0:a5367bd4e404 485
jjmedina 0:a5367bd4e404 486
jjmedina 0:a5367bd4e404 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
jjmedina 0:a5367bd4e404 488
jjmedina 0:a5367bd4e404 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
jjmedina 0:a5367bd4e404 490 if (rc == OK) {
jjmedina 0:a5367bd4e404 491 if (w_length) {
jjmedina 0:a5367bd4e404 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
jjmedina 0:a5367bd4e404 493 }
jjmedina 0:a5367bd4e404 494 if (rc == OK) {
jjmedina 0:a5367bd4e404 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
jjmedina 0:a5367bd4e404 496 }
jjmedina 0:a5367bd4e404 497 }
jjmedina 0:a5367bd4e404 498 return (rc);
jjmedina 0:a5367bd4e404 499 }
jjmedina 0:a5367bd4e404 500
jjmedina 0:a5367bd4e404 501 /*
jjmedina 0:a5367bd4e404 502 **************************************************************************************************************
jjmedina 0:a5367bd4e404 503 * FILL SETUP PACKET
jjmedina 0:a5367bd4e404 504 *
jjmedina 0:a5367bd4e404 505 * Description: This function is used to fill the setup packet
jjmedina 0:a5367bd4e404 506 *
jjmedina 0:a5367bd4e404 507 * Arguments : None
jjmedina 0:a5367bd4e404 508 *
jjmedina 0:a5367bd4e404 509 * Returns : OK if Success
jjmedina 0:a5367bd4e404 510 * ERR_INVALID_BOOTSIG if Failed
jjmedina 0:a5367bd4e404 511 *
jjmedina 0:a5367bd4e404 512 **************************************************************************************************************
jjmedina 0:a5367bd4e404 513 */
jjmedina 0:a5367bd4e404 514
jjmedina 0:a5367bd4e404 515 void Host_FillSetup (USB_INT08U bm_request_type,
jjmedina 0:a5367bd4e404 516 USB_INT08U b_request,
jjmedina 0:a5367bd4e404 517 USB_INT16U w_value,
jjmedina 0:a5367bd4e404 518 USB_INT16U w_index,
jjmedina 0:a5367bd4e404 519 USB_INT16U w_length)
jjmedina 0:a5367bd4e404 520 {
jjmedina 0:a5367bd4e404 521 int i;
jjmedina 0:a5367bd4e404 522 for (i=0;i<w_length;i++)
jjmedina 0:a5367bd4e404 523 TDBuffer[i] = 0;
jjmedina 0:a5367bd4e404 524
jjmedina 0:a5367bd4e404 525 TDBuffer[0] = bm_request_type;
jjmedina 0:a5367bd4e404 526 TDBuffer[1] = b_request;
jjmedina 0:a5367bd4e404 527 WriteLE16U(&TDBuffer[2], w_value);
jjmedina 0:a5367bd4e404 528 WriteLE16U(&TDBuffer[4], w_index);
jjmedina 0:a5367bd4e404 529 WriteLE16U(&TDBuffer[6], w_length);
jjmedina 0:a5367bd4e404 530 }
jjmedina 0:a5367bd4e404 531
jjmedina 0:a5367bd4e404 532
jjmedina 0:a5367bd4e404 533
jjmedina 0:a5367bd4e404 534 /*
jjmedina 0:a5367bd4e404 535 **************************************************************************************************************
jjmedina 0:a5367bd4e404 536 * INITIALIZE THE TRANSFER DESCRIPTOR
jjmedina 0:a5367bd4e404 537 *
jjmedina 0:a5367bd4e404 538 * Description: This function initializes transfer descriptor
jjmedina 0:a5367bd4e404 539 *
jjmedina 0:a5367bd4e404 540 * Arguments : Pointer to TD structure
jjmedina 0:a5367bd4e404 541 *
jjmedina 0:a5367bd4e404 542 * Returns : None
jjmedina 0:a5367bd4e404 543 *
jjmedina 0:a5367bd4e404 544 **************************************************************************************************************
jjmedina 0:a5367bd4e404 545 */
jjmedina 0:a5367bd4e404 546
jjmedina 0:a5367bd4e404 547 void Host_TDInit (volatile HCTD *td)
jjmedina 0:a5367bd4e404 548 {
jjmedina 0:a5367bd4e404 549
jjmedina 0:a5367bd4e404 550 td->Control = 0;
jjmedina 0:a5367bd4e404 551 td->CurrBufPtr = 0;
jjmedina 0:a5367bd4e404 552 td->Next = 0;
jjmedina 0:a5367bd4e404 553 td->BufEnd = 0;
jjmedina 0:a5367bd4e404 554 }
jjmedina 0:a5367bd4e404 555
jjmedina 0:a5367bd4e404 556 /*
jjmedina 0:a5367bd4e404 557 **************************************************************************************************************
jjmedina 0:a5367bd4e404 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
jjmedina 0:a5367bd4e404 559 *
jjmedina 0:a5367bd4e404 560 * Description: This function initializes endpoint descriptor
jjmedina 0:a5367bd4e404 561 *
jjmedina 0:a5367bd4e404 562 * Arguments : Pointer to ED strcuture
jjmedina 0:a5367bd4e404 563 *
jjmedina 0:a5367bd4e404 564 * Returns : None
jjmedina 0:a5367bd4e404 565 *
jjmedina 0:a5367bd4e404 566 **************************************************************************************************************
jjmedina 0:a5367bd4e404 567 */
jjmedina 0:a5367bd4e404 568
jjmedina 0:a5367bd4e404 569 void Host_EDInit (volatile HCED *ed)
jjmedina 0:a5367bd4e404 570 {
jjmedina 0:a5367bd4e404 571
jjmedina 0:a5367bd4e404 572 ed->Control = 0;
jjmedina 0:a5367bd4e404 573 ed->TailTd = 0;
jjmedina 0:a5367bd4e404 574 ed->HeadTd = 0;
jjmedina 0:a5367bd4e404 575 ed->Next = 0;
jjmedina 0:a5367bd4e404 576 }
jjmedina 0:a5367bd4e404 577
jjmedina 0:a5367bd4e404 578 /*
jjmedina 0:a5367bd4e404 579 **************************************************************************************************************
jjmedina 0:a5367bd4e404 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
jjmedina 0:a5367bd4e404 581 *
jjmedina 0:a5367bd4e404 582 * Description: This function initializes host controller communications area
jjmedina 0:a5367bd4e404 583 *
jjmedina 0:a5367bd4e404 584 * Arguments : Pointer to HCCA
jjmedina 0:a5367bd4e404 585 *
jjmedina 0:a5367bd4e404 586 * Returns :
jjmedina 0:a5367bd4e404 587 *
jjmedina 0:a5367bd4e404 588 **************************************************************************************************************
jjmedina 0:a5367bd4e404 589 */
jjmedina 0:a5367bd4e404 590
jjmedina 0:a5367bd4e404 591 void Host_HCCAInit (volatile HCCA *hcca)
jjmedina 0:a5367bd4e404 592 {
jjmedina 0:a5367bd4e404 593 USB_INT32U i;
jjmedina 0:a5367bd4e404 594
jjmedina 0:a5367bd4e404 595
jjmedina 0:a5367bd4e404 596 for (i = 0; i < 32; i++) {
jjmedina 0:a5367bd4e404 597
jjmedina 0:a5367bd4e404 598 hcca->IntTable[i] = 0;
jjmedina 0:a5367bd4e404 599 hcca->FrameNumber = 0;
jjmedina 0:a5367bd4e404 600 hcca->DoneHead = 0;
jjmedina 0:a5367bd4e404 601 }
jjmedina 0:a5367bd4e404 602
jjmedina 0:a5367bd4e404 603 }
jjmedina 0:a5367bd4e404 604
jjmedina 0:a5367bd4e404 605 /*
jjmedina 0:a5367bd4e404 606 **************************************************************************************************************
jjmedina 0:a5367bd4e404 607 * WAIT FOR WDH INTERRUPT
jjmedina 0:a5367bd4e404 608 *
jjmedina 0:a5367bd4e404 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
jjmedina 0:a5367bd4e404 610 *
jjmedina 0:a5367bd4e404 611 * Arguments : None
jjmedina 0:a5367bd4e404 612 *
jjmedina 0:a5367bd4e404 613 * Returns : None
jjmedina 0:a5367bd4e404 614 *
jjmedina 0:a5367bd4e404 615 **************************************************************************************************************
jjmedina 0:a5367bd4e404 616 */
jjmedina 0:a5367bd4e404 617
jjmedina 0:a5367bd4e404 618 void Host_WDHWait (void)
jjmedina 0:a5367bd4e404 619 {
jjmedina 0:a5367bd4e404 620 while (!HOST_WdhIntr) {
jjmedina 0:a5367bd4e404 621 ;
jjmedina 0:a5367bd4e404 622 }
jjmedina 0:a5367bd4e404 623 HOST_WdhIntr = 0;
jjmedina 0:a5367bd4e404 624 }
jjmedina 0:a5367bd4e404 625
jjmedina 0:a5367bd4e404 626
jjmedina 0:a5367bd4e404 627
jjmedina 0:a5367bd4e404 628
jjmedina 0:a5367bd4e404 629
jjmedina 0:a5367bd4e404 630
jjmedina 0:a5367bd4e404 631
jjmedina 0:a5367bd4e404 632
jjmedina 0:a5367bd4e404 633 /*
jjmedina 0:a5367bd4e404 634 **************************************************************************************************************
jjmedina 0:a5367bd4e404 635 * READ LE 32U
jjmedina 0:a5367bd4e404 636 *
jjmedina 0:a5367bd4e404 637 * Description: This function is used to read an unsigned integer from a character buffer in the platform
jjmedina 0:a5367bd4e404 638 * containing little endian processor
jjmedina 0:a5367bd4e404 639 *
jjmedina 0:a5367bd4e404 640 * Arguments : pmem Pointer to the character buffer
jjmedina 0:a5367bd4e404 641 *
jjmedina 0:a5367bd4e404 642 * Returns : val Unsigned integer
jjmedina 0:a5367bd4e404 643 *
jjmedina 0:a5367bd4e404 644 **************************************************************************************************************
jjmedina 0:a5367bd4e404 645 */
jjmedina 0:a5367bd4e404 646
jjmedina 0:a5367bd4e404 647 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
jjmedina 0:a5367bd4e404 648 {
jjmedina 0:a5367bd4e404 649 USB_INT32U val = *(USB_INT32U*)pmem;
jjmedina 0:a5367bd4e404 650 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 651 return __REV(val);
jjmedina 0:a5367bd4e404 652 #else
jjmedina 0:a5367bd4e404 653 return val;
jjmedina 0:a5367bd4e404 654 #endif
jjmedina 0:a5367bd4e404 655 }
jjmedina 0:a5367bd4e404 656
jjmedina 0:a5367bd4e404 657 /*
jjmedina 0:a5367bd4e404 658 **************************************************************************************************************
jjmedina 0:a5367bd4e404 659 * WRITE LE 32U
jjmedina 0:a5367bd4e404 660 *
jjmedina 0:a5367bd4e404 661 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
jjmedina 0:a5367bd4e404 662 * containing little endian processor.
jjmedina 0:a5367bd4e404 663 *
jjmedina 0:a5367bd4e404 664 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 665 * val Integer value to be placed in the charecter buffer
jjmedina 0:a5367bd4e404 666 *
jjmedina 0:a5367bd4e404 667 * Returns : None
jjmedina 0:a5367bd4e404 668 *
jjmedina 0:a5367bd4e404 669 **************************************************************************************************************
jjmedina 0:a5367bd4e404 670 */
jjmedina 0:a5367bd4e404 671
jjmedina 0:a5367bd4e404 672 void WriteLE32U (volatile USB_INT08U *pmem,
jjmedina 0:a5367bd4e404 673 USB_INT32U val)
jjmedina 0:a5367bd4e404 674 {
jjmedina 0:a5367bd4e404 675 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 676 *(USB_INT32U*)pmem = __REV(val);
jjmedina 0:a5367bd4e404 677 #else
jjmedina 0:a5367bd4e404 678 *(USB_INT32U*)pmem = val;
jjmedina 0:a5367bd4e404 679 #endif
jjmedina 0:a5367bd4e404 680 }
jjmedina 0:a5367bd4e404 681
jjmedina 0:a5367bd4e404 682 /*
jjmedina 0:a5367bd4e404 683 **************************************************************************************************************
jjmedina 0:a5367bd4e404 684 * READ LE 16U
jjmedina 0:a5367bd4e404 685 *
jjmedina 0:a5367bd4e404 686 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
jjmedina 0:a5367bd4e404 687 * containing little endian processor
jjmedina 0:a5367bd4e404 688 *
jjmedina 0:a5367bd4e404 689 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 690 *
jjmedina 0:a5367bd4e404 691 * Returns : val Unsigned short integer
jjmedina 0:a5367bd4e404 692 *
jjmedina 0:a5367bd4e404 693 **************************************************************************************************************
jjmedina 0:a5367bd4e404 694 */
jjmedina 0:a5367bd4e404 695
jjmedina 0:a5367bd4e404 696 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
jjmedina 0:a5367bd4e404 697 {
jjmedina 0:a5367bd4e404 698 USB_INT16U val = *(USB_INT16U*)pmem;
jjmedina 0:a5367bd4e404 699 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 700 return __REV16(val);
jjmedina 0:a5367bd4e404 701 #else
jjmedina 0:a5367bd4e404 702 return val;
jjmedina 0:a5367bd4e404 703 #endif
jjmedina 0:a5367bd4e404 704 }
jjmedina 0:a5367bd4e404 705
jjmedina 0:a5367bd4e404 706 /*
jjmedina 0:a5367bd4e404 707 **************************************************************************************************************
jjmedina 0:a5367bd4e404 708 * WRITE LE 16U
jjmedina 0:a5367bd4e404 709 *
jjmedina 0:a5367bd4e404 710 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
jjmedina 0:a5367bd4e404 711 * platform containing little endian processor
jjmedina 0:a5367bd4e404 712 *
jjmedina 0:a5367bd4e404 713 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 714 * val Value to be placed in the charecter buffer
jjmedina 0:a5367bd4e404 715 *
jjmedina 0:a5367bd4e404 716 * Returns : None
jjmedina 0:a5367bd4e404 717 *
jjmedina 0:a5367bd4e404 718 **************************************************************************************************************
jjmedina 0:a5367bd4e404 719 */
jjmedina 0:a5367bd4e404 720
jjmedina 0:a5367bd4e404 721 void WriteLE16U (volatile USB_INT08U *pmem,
jjmedina 0:a5367bd4e404 722 USB_INT16U val)
jjmedina 0:a5367bd4e404 723 {
jjmedina 0:a5367bd4e404 724 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 725 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
jjmedina 0:a5367bd4e404 726 #else
jjmedina 0:a5367bd4e404 727 *(USB_INT16U*)pmem = val;
jjmedina 0:a5367bd4e404 728 #endif
jjmedina 0:a5367bd4e404 729 }
jjmedina 0:a5367bd4e404 730
jjmedina 0:a5367bd4e404 731 /*
jjmedina 0:a5367bd4e404 732 **************************************************************************************************************
jjmedina 0:a5367bd4e404 733 * READ BE 32U
jjmedina 0:a5367bd4e404 734 *
jjmedina 0:a5367bd4e404 735 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
jjmedina 0:a5367bd4e404 736 * containing big endian processor
jjmedina 0:a5367bd4e404 737 *
jjmedina 0:a5367bd4e404 738 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 739 *
jjmedina 0:a5367bd4e404 740 * Returns : val Unsigned integer
jjmedina 0:a5367bd4e404 741 *
jjmedina 0:a5367bd4e404 742 **************************************************************************************************************
jjmedina 0:a5367bd4e404 743 */
jjmedina 0:a5367bd4e404 744
jjmedina 0:a5367bd4e404 745 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
jjmedina 0:a5367bd4e404 746 {
jjmedina 0:a5367bd4e404 747 USB_INT32U val = *(USB_INT32U*)pmem;
jjmedina 0:a5367bd4e404 748 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 749 return val;
jjmedina 0:a5367bd4e404 750 #else
jjmedina 0:a5367bd4e404 751 return __REV(val);
jjmedina 0:a5367bd4e404 752 #endif
jjmedina 0:a5367bd4e404 753 }
jjmedina 0:a5367bd4e404 754
jjmedina 0:a5367bd4e404 755 /*
jjmedina 0:a5367bd4e404 756 **************************************************************************************************************
jjmedina 0:a5367bd4e404 757 * WRITE BE 32U
jjmedina 0:a5367bd4e404 758 *
jjmedina 0:a5367bd4e404 759 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
jjmedina 0:a5367bd4e404 760 * containing big endian processor
jjmedina 0:a5367bd4e404 761 *
jjmedina 0:a5367bd4e404 762 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 763 * val Value to be placed in the charecter buffer
jjmedina 0:a5367bd4e404 764 *
jjmedina 0:a5367bd4e404 765 * Returns : None
jjmedina 0:a5367bd4e404 766 *
jjmedina 0:a5367bd4e404 767 **************************************************************************************************************
jjmedina 0:a5367bd4e404 768 */
jjmedina 0:a5367bd4e404 769
jjmedina 0:a5367bd4e404 770 void WriteBE32U (volatile USB_INT08U *pmem,
jjmedina 0:a5367bd4e404 771 USB_INT32U val)
jjmedina 0:a5367bd4e404 772 {
jjmedina 0:a5367bd4e404 773 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 774 *(USB_INT32U*)pmem = val;
jjmedina 0:a5367bd4e404 775 #else
jjmedina 0:a5367bd4e404 776 *(USB_INT32U*)pmem = __REV(val);
jjmedina 0:a5367bd4e404 777 #endif
jjmedina 0:a5367bd4e404 778 }
jjmedina 0:a5367bd4e404 779
jjmedina 0:a5367bd4e404 780 /*
jjmedina 0:a5367bd4e404 781 **************************************************************************************************************
jjmedina 0:a5367bd4e404 782 * READ BE 16U
jjmedina 0:a5367bd4e404 783 *
jjmedina 0:a5367bd4e404 784 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
jjmedina 0:a5367bd4e404 785 * containing big endian processor
jjmedina 0:a5367bd4e404 786 *
jjmedina 0:a5367bd4e404 787 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 788 *
jjmedina 0:a5367bd4e404 789 * Returns : val Unsigned short integer
jjmedina 0:a5367bd4e404 790 *
jjmedina 0:a5367bd4e404 791 **************************************************************************************************************
jjmedina 0:a5367bd4e404 792 */
jjmedina 0:a5367bd4e404 793
jjmedina 0:a5367bd4e404 794 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
jjmedina 0:a5367bd4e404 795 {
jjmedina 0:a5367bd4e404 796 USB_INT16U val = *(USB_INT16U*)pmem;
jjmedina 0:a5367bd4e404 797 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 798 return val;
jjmedina 0:a5367bd4e404 799 #else
jjmedina 0:a5367bd4e404 800 return __REV16(val);
jjmedina 0:a5367bd4e404 801 #endif
jjmedina 0:a5367bd4e404 802 }
jjmedina 0:a5367bd4e404 803
jjmedina 0:a5367bd4e404 804 /*
jjmedina 0:a5367bd4e404 805 **************************************************************************************************************
jjmedina 0:a5367bd4e404 806 * WRITE BE 16U
jjmedina 0:a5367bd4e404 807 *
jjmedina 0:a5367bd4e404 808 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
jjmedina 0:a5367bd4e404 809 * platform containing big endian processor
jjmedina 0:a5367bd4e404 810 *
jjmedina 0:a5367bd4e404 811 * Arguments : pmem Pointer to the charecter buffer
jjmedina 0:a5367bd4e404 812 * val Value to be placed in the charecter buffer
jjmedina 0:a5367bd4e404 813 *
jjmedina 0:a5367bd4e404 814 * Returns : None
jjmedina 0:a5367bd4e404 815 *
jjmedina 0:a5367bd4e404 816 **************************************************************************************************************
jjmedina 0:a5367bd4e404 817 */
jjmedina 0:a5367bd4e404 818
jjmedina 0:a5367bd4e404 819 void WriteBE16U (volatile USB_INT08U *pmem,
jjmedina 0:a5367bd4e404 820 USB_INT16U val)
jjmedina 0:a5367bd4e404 821 {
jjmedina 0:a5367bd4e404 822 #ifdef __BIG_ENDIAN
jjmedina 0:a5367bd4e404 823 *(USB_INT16U*)pmem = val;
jjmedina 0:a5367bd4e404 824 #else
jjmedina 0:a5367bd4e404 825 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
jjmedina 0:a5367bd4e404 826 #endif
jjmedina 0:a5367bd4e404 827 }