Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

#include <core_cm4.h>

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 336 of file core_cm4.h.

Field Documentation

__IO uint32_t IABR[8]

Offset: 0x200 (R/W) Interrupt Active bit Register

Definition at line 346 of file core_cm4.h.

__IO uint32_t ICER[8]

Offset: 0x080 (R/W) Interrupt Clear Enable Register

Definition at line 340 of file core_cm4.h.

__IO uint32_t ICPR[8]

Offset: 0x180 (R/W) Interrupt Clear Pending Register

Definition at line 344 of file core_cm4.h.

__IO uint8_t IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 348 of file core_cm4.h.

__IO uint32_t ISER[8]

Offset: 0x000 (R/W) Interrupt Set Enable Register

Definition at line 338 of file core_cm4.h.

__IO uint32_t ISPR[8]

Offset: 0x100 (R/W) Interrupt Set Pending Register

Definition at line 342 of file core_cm4.h.

__O uint32_t STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register

Definition at line 350 of file core_cm4.h.