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MD
main.cpp@0:41f2e835aa5d, 2016-09-11 (annotated)
- Committer:
- sgrsn
- Date:
- Sun Sep 11 04:32:13 2016 +0000
- Revision:
- 0:41f2e835aa5d
- Child:
- 1:770e1fc380ff
MD
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sgrsn | 0:41f2e835aa5d | 1 | #include "mbed.h" |
sgrsn | 0:41f2e835aa5d | 2 | #include "i2cslave.h" |
sgrsn | 0:41f2e835aa5d | 3 | #include "define.h" |
sgrsn | 0:41f2e835aa5d | 4 | |
sgrsn | 0:41f2e835aa5d | 5 | char Registar[128]= {}; |
sgrsn | 0:41f2e835aa5d | 6 | void check(); |
sgrsn | 0:41f2e835aa5d | 7 | |
sgrsn | 0:41f2e835aa5d | 8 | int main() |
sgrsn | 0:41f2e835aa5d | 9 | { |
sgrsn | 0:41f2e835aa5d | 10 | BusOut motor1(dp4, dp9, dp13, dp14); |
sgrsn | 0:41f2e835aa5d | 11 | BusOut motor2(dp25, dp24, dp18, dp17); |
sgrsn | 0:41f2e835aa5d | 12 | PwmOut pwm1(dp2); |
sgrsn | 0:41f2e835aa5d | 13 | PwmOut pwm2(dp1); |
sgrsn | 0:41f2e835aa5d | 14 | motor1 = 0; |
sgrsn | 0:41f2e835aa5d | 15 | motor2 = 0; |
sgrsn | 0:41f2e835aa5d | 16 | NVIC_SetPriority(TIMER_16_0_IRQn, 20); |
sgrsn | 0:41f2e835aa5d | 17 | NVIC_SetPriority(TIMER_16_1_IRQn, 20); |
sgrsn | 0:41f2e835aa5d | 18 | NVIC_SetPriority(TIMER_32_0_IRQn, 20); |
sgrsn | 0:41f2e835aa5d | 19 | NVIC_SetPriority(TIMER_32_1_IRQn, 20); |
sgrsn | 0:41f2e835aa5d | 20 | NVIC_SetPriority(I2C_IRQn, 10); |
sgrsn | 0:41f2e835aa5d | 21 | i2cslave i2c(dp5, dp27, Registar); |
sgrsn | 0:41f2e835aa5d | 22 | /*change address every micon***********/ |
sgrsn | 0:41f2e835aa5d | 23 | i2c.address(MD1_addr); |
sgrsn | 0:41f2e835aa5d | 24 | /**************************************/ |
sgrsn | 0:41f2e835aa5d | 25 | i2c.frequency(1000000); |
sgrsn | 0:41f2e835aa5d | 26 | Ticker tic; |
sgrsn | 0:41f2e835aa5d | 27 | tic.attach(check, 0.1); |
sgrsn | 0:41f2e835aa5d | 28 | while(1) |
sgrsn | 0:41f2e835aa5d | 29 | { |
sgrsn | 0:41f2e835aa5d | 30 | pwm1 = (float)(Registar[motor1_pwm]) / 255; |
sgrsn | 0:41f2e835aa5d | 31 | pwm2 = (float)(Registar[motor2_pwm]) / 255; |
sgrsn | 0:41f2e835aa5d | 32 | motor1 = Registar[motor1_state]; |
sgrsn | 0:41f2e835aa5d | 33 | motor2 = Registar[motor2_state]; |
sgrsn | 0:41f2e835aa5d | 34 | wait_ms(40); |
sgrsn | 0:41f2e835aa5d | 35 | } |
sgrsn | 0:41f2e835aa5d | 36 | } |
sgrsn | 0:41f2e835aa5d | 37 | |
sgrsn | 0:41f2e835aa5d | 38 | void check() |
sgrsn | 0:41f2e835aa5d | 39 | { |
sgrsn | 0:41f2e835aa5d | 40 | Registar[check_reg]++; |
sgrsn | 0:41f2e835aa5d | 41 | if(Registar[check_reg] > 2) |
sgrsn | 0:41f2e835aa5d | 42 | { |
sgrsn | 0:41f2e835aa5d | 43 | NVIC_SystemReset(); |
sgrsn | 0:41f2e835aa5d | 44 | } |
sgrsn | 0:41f2e835aa5d | 45 | } |