raspiezo / mbed-dev

hal_tick.h changed for the L432KC target in TARGET/../device/ in order to reassign the system ticker from TIM2 to TIM7, since TIM2 was needed as a 32bit encoder counter.

Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

Fork of mbed-dev by mbed official

targets/TARGET_NXP/TARGET_LPC15XX/serial_api.c@161:bd0311f1ad86, 2017-05-27 (annotated)

Committer:
tonnyleonard
Date:
Sat May 27 01:26:18 2017 +0000
Revision:
161:bd0311f1ad86
Parent:
149:156823d33999 
Testing ADC with shunt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2006-2013 ARM Limited
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 144:ef7eb2e8f9f7 5 * you may not use this file except in compliance with the License.
<> 144:ef7eb2e8f9f7 6 * You may obtain a copy of the License at
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Unless required by applicable law or agreed to in writing, software
<> 144:ef7eb2e8f9f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 144:ef7eb2e8f9f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 144:ef7eb2e8f9f7 13 * See the License for the specific language governing permissions and
<> 144:ef7eb2e8f9f7 14 * limitations under the License.
<> 144:ef7eb2e8f9f7 15 */
<> 144:ef7eb2e8f9f7 16 // math.h required for floating point operations for baud rate calculation
<> 144:ef7eb2e8f9f7 17 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 18 #include <math.h>
<> 144:ef7eb2e8f9f7 19 #include <string.h>
<> 144:ef7eb2e8f9f7 20
<> 144:ef7eb2e8f9f7 21 #include "serial_api.h"
<> 144:ef7eb2e8f9f7 22 #include "cmsis.h"
<> 144:ef7eb2e8f9f7 23 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 24 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 /******************************************************************************
<> 144:ef7eb2e8f9f7 27 * INITIALIZATION
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #define UART_NUM 3
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 static const SWM_Map SWM_UART_TX[] = {
<> 144:ef7eb2e8f9f7 32 {0, 0}, // Pin assign register0, 7:0bit
<> 144:ef7eb2e8f9f7 33 {1, 8}, // Pin assign register1, 15:8bit
<> 144:ef7eb2e8f9f7 34 {2, 16}, // Pin assign register2, 23:16bit
<> 144:ef7eb2e8f9f7 35 };
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 static const SWM_Map SWM_UART_RX[] = {
<> 144:ef7eb2e8f9f7 38 {0, 8},
<> 144:ef7eb2e8f9f7 39 {1, 16},
<> 144:ef7eb2e8f9f7 40 {2, 24},
<> 144:ef7eb2e8f9f7 41 };
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 static const SWM_Map SWM_UART_RTS[] = {
<> 144:ef7eb2e8f9f7 44 {0, 16},
<> 144:ef7eb2e8f9f7 45 {1, 24},
<> 144:ef7eb2e8f9f7 46 {3, 0}, // not available
<> 144:ef7eb2e8f9f7 47 };
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 static const SWM_Map SWM_UART_CTS[] = {
<> 144:ef7eb2e8f9f7 50 {0, 24},
<> 144:ef7eb2e8f9f7 51 {2, 0},
<> 144:ef7eb2e8f9f7 52 {3, 8} // not available
<> 144:ef7eb2e8f9f7 53 };
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 // bit flags for used UARTs
<> 144:ef7eb2e8f9f7 56 static unsigned char uart_used = 0;
<> 144:ef7eb2e8f9f7 57 static int get_available_uart(void) {
<> 144:ef7eb2e8f9f7 58 int i;
<> 144:ef7eb2e8f9f7 59 for (i=0; i<3; i++) {
<> 144:ef7eb2e8f9f7 60 if ((uart_used & (1 << i)) == 0)
<> 144:ef7eb2e8f9f7 61 return i;
<> 144:ef7eb2e8f9f7 62 }
<> 144:ef7eb2e8f9f7 63 return -1;
<> 144:ef7eb2e8f9f7 64 }
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 #define UART_EN (0x01<<0)
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 #define CTS_DELTA (0x01<<5)
<> 144:ef7eb2e8f9f7 69 #define RXBRK (0x01<<10)
<> 144:ef7eb2e8f9f7 70 #define DELTA_RXBRK (0x01<<11)
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 #define RXRDY (0x01<<0)
<> 144:ef7eb2e8f9f7 73 #define TXRDY (0x01<<2)
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 #define TXBRKEN (0x01<<1)
<> 144:ef7eb2e8f9f7 76 #define CTSEN (0x01<<9)
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 static uint32_t UARTSysClk;
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 static uint32_t serial_irq_ids[UART_NUM] = {0};
<> 144:ef7eb2e8f9f7 81 static uart_irq_handler irq_handler;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 int stdio_uart_inited = 0;
<> 144:ef7eb2e8f9f7 84 serial_t stdio_uart;
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 static void switch_pin(const SWM_Map *swm, PinName pn)
<> 144:ef7eb2e8f9f7 87 {
<> 144:ef7eb2e8f9f7 88 uint32_t regVal;
<> 144:ef7eb2e8f9f7 89 if (pn != NC)
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 // check if we have any function mapped to this pin already and remove it
<> 144:ef7eb2e8f9f7 92 for (uint32_t n = 0; n < sizeof(LPC_SWM->PINASSIGN)/sizeof(*LPC_SWM->PINASSIGN); n ++) {
<> 144:ef7eb2e8f9f7 93 regVal = LPC_SWM->PINASSIGN[n];
<> 144:ef7eb2e8f9f7 94 for (uint32_t j = 0; j <= 24; j += 8) {
<> 144:ef7eb2e8f9f7 95 if (((regVal >> j) & 0xFF) == (uint32_t)pn)
<> 144:ef7eb2e8f9f7 96 regVal |= (0xFF << j);
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98 LPC_SWM->PINASSIGN[n] = regVal;
<> 144:ef7eb2e8f9f7 99 }
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101 // now map it
<> 144:ef7eb2e8f9f7 102 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
<> 144:ef7eb2e8f9f7 103 LPC_SWM->PINASSIGN[swm->n] = regVal | (pn << swm->offset);
<> 144:ef7eb2e8f9f7 104 }
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 void serial_init(serial_t *obj, PinName tx, PinName rx) {
<> 144:ef7eb2e8f9f7 107 int is_stdio_uart = 0;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 int uart_n = get_available_uart();
<> 144:ef7eb2e8f9f7 110 if (uart_n == -1) {
<> 144:ef7eb2e8f9f7 111 error("No available UART");
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113 obj->index = uart_n;
<> 144:ef7eb2e8f9f7 114 switch (uart_n) {
<> 144:ef7eb2e8f9f7 115 case 0: obj->uart = (LPC_USART0_Type *)LPC_USART0_BASE; break;
<> 144:ef7eb2e8f9f7 116 case 1: obj->uart = (LPC_USART0_Type *)LPC_USART1_BASE; break;
<> 144:ef7eb2e8f9f7 117 case 2: obj->uart = (LPC_USART0_Type *)LPC_USART2_BASE; break;
<> 144:ef7eb2e8f9f7 118 }
<> 144:ef7eb2e8f9f7 119 uart_used |= (1 << uart_n);
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 switch_pin(&SWM_UART_TX[uart_n], tx);
<> 144:ef7eb2e8f9f7 122 switch_pin(&SWM_UART_RX[uart_n], rx);
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /* uart clock divided by 6 */
<> 144:ef7eb2e8f9f7 125 LPC_SYSCON->UARTCLKDIV =6;
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /* disable uart interrupts */
<> 144:ef7eb2e8f9f7 128 NVIC_DisableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /* Enable UART clock */
<> 144:ef7eb2e8f9f7 131 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (17 + uart_n));
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /* Peripheral reset control to UART, a "1" bring it out of reset. */
<> 144:ef7eb2e8f9f7 134 LPC_SYSCON->PRESETCTRL1 |= (0x1 << (17 + uart_n));
<> 144:ef7eb2e8f9f7 135 LPC_SYSCON->PRESETCTRL1 &= ~(0x1 << (17 + uart_n));
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 UARTSysClk = SystemCoreClock / LPC_SYSCON->UARTCLKDIV;
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 // set default baud rate and format
<> 144:ef7eb2e8f9f7 140 serial_baud (obj, 9600);
<> 144:ef7eb2e8f9f7 141 serial_format(obj, 8, ParityNone, 1);
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /* Clear all status bits. */
<> 144:ef7eb2e8f9f7 144 obj->uart->STAT = CTS_DELTA | DELTA_RXBRK;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /* enable uart interrupts */
<> 144:ef7eb2e8f9f7 147 NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_n));
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /* Enable UART */
<> 144:ef7eb2e8f9f7 150 obj->uart->CFG |= UART_EN;
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 is_stdio_uart = ((tx == USBTX) && (rx == USBRX));
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 if (is_stdio_uart) {
<> 144:ef7eb2e8f9f7 155 stdio_uart_inited = 1;
<> 144:ef7eb2e8f9f7 156 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 144:ef7eb2e8f9f7 157 }
<> 144:ef7eb2e8f9f7 158 }
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 void serial_free(serial_t *obj) {
<> 144:ef7eb2e8f9f7 161 uart_used &= ~(1 << obj->index);
<> 144:ef7eb2e8f9f7 162 serial_irq_ids[obj->index] = 0;
<> 144:ef7eb2e8f9f7 163 }
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 // serial_baud
<> 144:ef7eb2e8f9f7 166 // set the baud rate, taking in to account the current SystemFrequency
<> 144:ef7eb2e8f9f7 167 void serial_baud(serial_t *obj, int baudrate) {
<> 144:ef7eb2e8f9f7 168 /* Integer divider:
<> 144:ef7eb2e8f9f7 169 BRG = UARTSysClk/(Baudrate * 16) - 1
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 Frational divider:
<> 144:ef7eb2e8f9f7 172 FRG = ((UARTSysClk / (Baudrate * 16 * (BRG + 1))) - 1)
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 where
<> 144:ef7eb2e8f9f7 175 FRG = (LPC_SYSCON->UARTFRDADD + 1) / (LPC_SYSCON->UARTFRDSUB + 1)
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 (1) The easiest way is set SUB value to 256, -1 encoded, thus SUB
<> 144:ef7eb2e8f9f7 178 register is 0xFF.
<> 144:ef7eb2e8f9f7 179 (2) In ADD register value, depending on the value of UartSysClk,
<> 144:ef7eb2e8f9f7 180 baudrate, BRG register value, and SUB register value, be careful
<> 144:ef7eb2e8f9f7 181 about the order of multiplier and divider and make sure any
<> 144:ef7eb2e8f9f7 182 multiplier doesn't exceed 32-bit boundary and any divider doesn't get
<> 144:ef7eb2e8f9f7 183 down below one(integer 0).
<> 144:ef7eb2e8f9f7 184 (3) ADD should be always less than SUB.
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186 obj->uart->BRG = UARTSysClk / 16 / baudrate - 1;
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 // To use of the fractional baud rate generator, you must write 0xFF to the DIV
<> 144:ef7eb2e8f9f7 189 // value to yield a denominator value of 256. All other values are not supported.
<> 144:ef7eb2e8f9f7 190 LPC_SYSCON->FRGCTRL = 0xFF;
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 LPC_SYSCON->FRGCTRL |= ( ( ((UARTSysClk / 16) * (0xFF + 1)) /
<> 144:ef7eb2e8f9f7 193 (baudrate * (obj->uart->BRG + 1))
<> 144:ef7eb2e8f9f7 194 ) - (0xFF + 1) ) << 8;
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
<> 144:ef7eb2e8f9f7 199 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
<> 144:ef7eb2e8f9f7 200 MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits
<> 144:ef7eb2e8f9f7 201 MBED_ASSERT((parity == ParityNone) || (parity == ParityEven) || (parity == ParityOdd));
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 stop_bits -= 1;
<> 144:ef7eb2e8f9f7 204 data_bits -= 7;
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 int paritysel;
<> 144:ef7eb2e8f9f7 207 switch (parity) {
<> 144:ef7eb2e8f9f7 208 case ParityNone: paritysel = 0; break;
<> 144:ef7eb2e8f9f7 209 case ParityEven: paritysel = 2; break;
<> 144:ef7eb2e8f9f7 210 case ParityOdd : paritysel = 3; break;
<> 144:ef7eb2e8f9f7 211 default:
<> 144:ef7eb2e8f9f7 212 break;
<> 144:ef7eb2e8f9f7 213 }
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 // First disable the the usart as described in documentation and then enable while updating CFG
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 // 24.6.1 USART Configuration register
<> 144:ef7eb2e8f9f7 218 // Remark: If software needs to change configuration values, the following sequence should
<> 144:ef7eb2e8f9f7 219 // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
<> 144:ef7eb2e8f9f7 220 // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
<> 144:ef7eb2e8f9f7 221 // Write the new configuration value, with the ENABLE bit set to 1.
<> 144:ef7eb2e8f9f7 222 obj->uart->CFG &= ~(1 << 0);
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 obj->uart->CFG = (1 << 0) // this will enable the usart
<> 144:ef7eb2e8f9f7 225 | (data_bits << 2)
<> 144:ef7eb2e8f9f7 226 | (paritysel << 4)
<> 144:ef7eb2e8f9f7 227 | (stop_bits << 6);
<> 144:ef7eb2e8f9f7 228 }
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /******************************************************************************
<> 144:ef7eb2e8f9f7 231 * INTERRUPTS HANDLING
<> 144:ef7eb2e8f9f7 232 ******************************************************************************/
<> 144:ef7eb2e8f9f7 233 static inline void uart_irq(SerialIrq irq_type, uint32_t index) {
<> 144:ef7eb2e8f9f7 234 if (serial_irq_ids[index] != 0)
<> 144:ef7eb2e8f9f7 235 irq_handler(serial_irq_ids[index], irq_type);
<> 144:ef7eb2e8f9f7 236 }
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 void uart0_irq() {uart_irq((LPC_USART0->INTSTAT & 1) ? RxIrq : TxIrq, 0);}
<> 144:ef7eb2e8f9f7 239 void uart1_irq() {uart_irq((LPC_USART1->INTSTAT & 1) ? RxIrq : TxIrq, 1);}
<> 144:ef7eb2e8f9f7 240 void uart2_irq() {uart_irq((LPC_USART2->INTSTAT & 1) ? RxIrq : TxIrq, 2);}
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
<> 144:ef7eb2e8f9f7 243 irq_handler = handler;
<> 144:ef7eb2e8f9f7 244 serial_irq_ids[obj->index] = id;
<> 144:ef7eb2e8f9f7 245 }
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
<> 144:ef7eb2e8f9f7 248 IRQn_Type irq_n = (IRQn_Type)0;
<> 144:ef7eb2e8f9f7 249 uint32_t vector = 0;
<> 144:ef7eb2e8f9f7 250 switch ((int)obj->uart) {
<> 144:ef7eb2e8f9f7 251 case LPC_USART0_BASE: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
<> 144:ef7eb2e8f9f7 252 case LPC_USART1_BASE: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
<> 144:ef7eb2e8f9f7 253 case LPC_USART2_BASE: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
<> 144:ef7eb2e8f9f7 254 }
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 if (enable) {
<> 144:ef7eb2e8f9f7 257 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 258 obj->uart->INTENSET |= (1 << ((irq == RxIrq) ? 0 : 2));
<> 144:ef7eb2e8f9f7 259 NVIC_SetVector(irq_n, vector);
<> 144:ef7eb2e8f9f7 260 NVIC_EnableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 261 } else { // disable
<> 144:ef7eb2e8f9f7 262 int all_disabled = 0;
<> 144:ef7eb2e8f9f7 263 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
<> 144:ef7eb2e8f9f7 264 obj->uart->INTENCLR |= (1 << ((irq == RxIrq) ? 0 : 2)); // disable the interrupt
<> 144:ef7eb2e8f9f7 265 all_disabled = (obj->uart->INTENSET & (1 << ((other_irq == RxIrq) ? 0 : 2))) == 0;
<> 144:ef7eb2e8f9f7 266 if (all_disabled)
<> 144:ef7eb2e8f9f7 267 NVIC_DisableIRQ(irq_n);
<> 144:ef7eb2e8f9f7 268 }
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /******************************************************************************
<> 144:ef7eb2e8f9f7 272 * READ/WRITE
<> 144:ef7eb2e8f9f7 273 ******************************************************************************/
<> 144:ef7eb2e8f9f7 274 int serial_getc(serial_t *obj) {
<> 144:ef7eb2e8f9f7 275 while (!serial_readable(obj));
<> 144:ef7eb2e8f9f7 276 return obj->uart->RXDATA;
<> 144:ef7eb2e8f9f7 277 }
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 void serial_putc(serial_t *obj, int c) {
<> 144:ef7eb2e8f9f7 280 while (!serial_writable(obj));
<> 144:ef7eb2e8f9f7 281 obj->uart->TXDATA = c;
<> 144:ef7eb2e8f9f7 282 }
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 int serial_readable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 285 return obj->uart->STAT & RXRDY;
<> 144:ef7eb2e8f9f7 286 }
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 int serial_writable(serial_t *obj) {
<> 144:ef7eb2e8f9f7 289 return obj->uart->STAT & TXRDY;
<> 144:ef7eb2e8f9f7 290 }
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 void serial_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 293 // [TODO]
<> 144:ef7eb2e8f9f7 294 }
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 void serial_pinout_tx(PinName tx) {
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 }
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 void serial_break_set(serial_t *obj) {
<> 144:ef7eb2e8f9f7 301 obj->uart->CTRL |= TXBRKEN;
<> 144:ef7eb2e8f9f7 302 }
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 void serial_break_clear(serial_t *obj) {
<> 144:ef7eb2e8f9f7 305 obj->uart->CTRL &= ~TXBRKEN;
<> 144:ef7eb2e8f9f7 306 }
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
<> 144:ef7eb2e8f9f7 309 if ((FlowControlNone == type || FlowControlRTS == type)) txflow = NC;
<> 144:ef7eb2e8f9f7 310 if ((FlowControlNone == type || FlowControlCTS == type)) rxflow = NC;
<> 144:ef7eb2e8f9f7 311 switch_pin(&SWM_UART_RTS[obj->index], rxflow);
<> 144:ef7eb2e8f9f7 312 switch_pin(&SWM_UART_CTS[obj->index], txflow);
<> 144:ef7eb2e8f9f7 313 if (txflow == NC) obj->uart->CFG &= ~CTSEN;
<> 144:ef7eb2e8f9f7 314 else obj->uart->CFG |= CTSEN;
<> 144:ef7eb2e8f9f7 315 }
<> 144:ef7eb2e8f9f7 316