raspiezo / mbed-dev

hal_tick.h changed for the L432KC target in TARGET/../device/ in order to reassign the system ticker from TIM2 to TIM7, since TIM2 was needed as a 32bit encoder counter.

Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

Fork of mbed-dev by mbed official

targets/cmsis/core_cmInstr.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
19:112740acecfa
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file core_cmInstr.h
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 0:9b334a45a8ff 4 * @version V3.20
bogdanm 0:9b334a45a8ff 5 * @date 05. March 2013
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
bogdanm 0:9b334a45a8ff 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #ifndef __CORE_CMINSTR_H
bogdanm 0:9b334a45a8ff 39 #define __CORE_CMINSTR_H
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 /* ########################## Core Instruction Access ######################### */
bogdanm 0:9b334a45a8ff 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 0:9b334a45a8ff 44 Access to dedicated instructions
bogdanm 0:9b334a45a8ff 45 @{
bogdanm 0:9b334a45a8ff 46 */
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 0:9b334a45a8ff 49 /* ARM armcc specific functions */
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 #if (__ARMCC_VERSION < 400677)
bogdanm 0:9b334a45a8ff 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 0:9b334a45a8ff 53 #endif
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 /** \brief No Operation
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 0:9b334a45a8ff 59 */
bogdanm 0:9b334a45a8ff 60 #define __NOP __nop
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /** \brief Wait For Interrupt
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 0:9b334a45a8ff 66 until one of a number of events occurs.
bogdanm 0:9b334a45a8ff 67 */
bogdanm 0:9b334a45a8ff 68 #define __WFI __wfi
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 /** \brief Wait For Event
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 0:9b334a45a8ff 74 a low-power state until one of a number of events occurs.
bogdanm 0:9b334a45a8ff 75 */
bogdanm 0:9b334a45a8ff 76 #define __WFE __wfe
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /** \brief Send Event
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 0:9b334a45a8ff 82 */
bogdanm 0:9b334a45a8ff 83 #define __SEV __sev
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 /** \brief Instruction Synchronization Barrier
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 0:9b334a45a8ff 89 so that all instructions following the ISB are fetched from cache or
bogdanm 0:9b334a45a8ff 90 memory, after the instruction has been completed.
bogdanm 0:9b334a45a8ff 91 */
bogdanm 0:9b334a45a8ff 92 #define __ISB() __isb(0xF)
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 /** \brief Data Synchronization Barrier
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 0:9b334a45a8ff 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 0:9b334a45a8ff 99 */
bogdanm 0:9b334a45a8ff 100 #define __DSB() __dsb(0xF)
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 /** \brief Data Memory Barrier
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 0:9b334a45a8ff 106 and after the instruction, without ensuring their completion.
bogdanm 0:9b334a45a8ff 107 */
bogdanm 0:9b334a45a8ff 108 #define __DMB() __dmb(0xF)
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 /** \brief Reverse byte order (32 bit)
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 This function reverses the byte order in integer value.
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 116 \return Reversed value
bogdanm 0:9b334a45a8ff 117 */
bogdanm 0:9b334a45a8ff 118 #define __REV __rev
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /** \brief Reverse byte order (16 bit)
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 This function reverses the byte order in two unsigned short values.
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 126 \return Reversed value
bogdanm 0:9b334a45a8ff 127 */
bogdanm 0:9b334a45a8ff 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 0:9b334a45a8ff 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 0:9b334a45a8ff 130 {
bogdanm 0:9b334a45a8ff 131 rev16 r0, r0
bogdanm 0:9b334a45a8ff 132 bx lr
bogdanm 0:9b334a45a8ff 133 }
bogdanm 0:9b334a45a8ff 134 #endif
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 /** \brief Reverse byte order in signed short value
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 141 \return Reversed value
bogdanm 0:9b334a45a8ff 142 */
bogdanm 0:9b334a45a8ff 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 0:9b334a45a8ff 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 0:9b334a45a8ff 145 {
bogdanm 0:9b334a45a8ff 146 revsh r0, r0
bogdanm 0:9b334a45a8ff 147 bx lr
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149 #endif
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 \param [in] value Value to rotate
bogdanm 0:9b334a45a8ff 157 \param [in] value Number of Bits to rotate
bogdanm 0:9b334a45a8ff 158 \return Rotated value
bogdanm 0:9b334a45a8ff 159 */
bogdanm 0:9b334a45a8ff 160 #define __ROR __ror
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /** \brief Breakpoint
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 This function causes the processor to enter Debug state.
bogdanm 0:9b334a45a8ff 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 0:9b334a45a8ff 167
bogdanm 0:9b334a45a8ff 168 \param [in] value is ignored by the processor.
bogdanm 0:9b334a45a8ff 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 0:9b334a45a8ff 170 */
bogdanm 0:9b334a45a8ff 171 #define __BKPT(value) __breakpoint(value)
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 #if (__CORTEX_M >= 0x03)
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /** \brief Reverse bit order of value
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 This function reverses the bit order of the given value.
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 181 \return Reversed value
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183 #define __RBIT __rbit
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /** \brief LDR Exclusive (8 bit)
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 191 \return value of type uint8_t at (*ptr)
bogdanm 0:9b334a45a8ff 192 */
bogdanm 0:9b334a45a8ff 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 0:9b334a45a8ff 194
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 /** \brief LDR Exclusive (16 bit)
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 201 \return value of type uint16_t at (*ptr)
bogdanm 0:9b334a45a8ff 202 */
bogdanm 0:9b334a45a8ff 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206 /** \brief LDR Exclusive (32 bit)
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 0:9b334a45a8ff 209
bogdanm 0:9b334a45a8ff 210 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 211 \return value of type uint32_t at (*ptr)
bogdanm 0:9b334a45a8ff 212 */
bogdanm 0:9b334a45a8ff 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215
bogdanm 0:9b334a45a8ff 216 /** \brief STR Exclusive (8 bit)
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 221 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 222 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 223 \return 1 Function failed
bogdanm 0:9b334a45a8ff 224 */
bogdanm 0:9b334a45a8ff 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 /** \brief STR Exclusive (16 bit)
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 233 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 234 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 235 \return 1 Function failed
bogdanm 0:9b334a45a8ff 236 */
bogdanm 0:9b334a45a8ff 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /** \brief STR Exclusive (32 bit)
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 245 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 246 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 247 \return 1 Function failed
bogdanm 0:9b334a45a8ff 248 */
bogdanm 0:9b334a45a8ff 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 /** \brief Remove the exclusive lock
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 #define __CLREX __clrex
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /** \brief Signed Saturate
bogdanm 0:9b334a45a8ff 261
bogdanm 0:9b334a45a8ff 262 This function saturates a signed value.
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 \param [in] value Value to be saturated
bogdanm 0:9b334a45a8ff 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 0:9b334a45a8ff 266 \return Saturated value
bogdanm 0:9b334a45a8ff 267 */
bogdanm 0:9b334a45a8ff 268 #define __SSAT __ssat
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /** \brief Unsigned Saturate
bogdanm 0:9b334a45a8ff 272
bogdanm 0:9b334a45a8ff 273 This function saturates an unsigned value.
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 \param [in] value Value to be saturated
bogdanm 0:9b334a45a8ff 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 0:9b334a45a8ff 277 \return Saturated value
bogdanm 0:9b334a45a8ff 278 */
bogdanm 0:9b334a45a8ff 279 #define __USAT __usat
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 /** \brief Count leading zeros
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 This function counts the number of leading zeros of a data value.
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 \param [in] value Value to count the leading zeros
bogdanm 0:9b334a45a8ff 287 \return number of leading zeros in value
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 #define __CLZ __clz
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 0:9b334a45a8ff 296 /* IAR iccarm specific functions */
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 #include <cmsis_iar.h>
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300
bogdanm 0:9b334a45a8ff 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 0:9b334a45a8ff 302 /* TI CCS specific functions */
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 #include <cmsis_ccs.h>
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 0:9b334a45a8ff 308 /* GNU gcc specific functions */
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 0:9b334a45a8ff 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 0:9b334a45a8ff 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 0:9b334a45a8ff 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 0:9b334a45a8ff 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 0:9b334a45a8ff 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 0:9b334a45a8ff 316 #else
bogdanm 0:9b334a45a8ff 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 0:9b334a45a8ff 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 0:9b334a45a8ff 319 #endif
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /** \brief No Operation
bogdanm 0:9b334a45a8ff 322
bogdanm 0:9b334a45a8ff 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 0:9b334a45a8ff 324 */
bogdanm 0:9b334a45a8ff 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 0:9b334a45a8ff 326 {
bogdanm 0:9b334a45a8ff 327 __ASM volatile ("nop");
bogdanm 0:9b334a45a8ff 328 }
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 /** \brief Wait For Interrupt
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 0:9b334a45a8ff 334 until one of a number of events occurs.
bogdanm 0:9b334a45a8ff 335 */
bogdanm 0:9b334a45a8ff 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 0:9b334a45a8ff 337 {
bogdanm 0:9b334a45a8ff 338 __ASM volatile ("wfi");
bogdanm 0:9b334a45a8ff 339 }
bogdanm 0:9b334a45a8ff 340
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342 /** \brief Wait For Event
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 0:9b334a45a8ff 345 a low-power state until one of a number of events occurs.
bogdanm 0:9b334a45a8ff 346 */
bogdanm 0:9b334a45a8ff 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 0:9b334a45a8ff 348 {
bogdanm 0:9b334a45a8ff 349 __ASM volatile ("wfe");
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /** \brief Send Event
bogdanm 0:9b334a45a8ff 354
bogdanm 0:9b334a45a8ff 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 0:9b334a45a8ff 356 */
bogdanm 0:9b334a45a8ff 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 0:9b334a45a8ff 358 {
bogdanm 0:9b334a45a8ff 359 __ASM volatile ("sev");
bogdanm 0:9b334a45a8ff 360 }
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /** \brief Instruction Synchronization Barrier
bogdanm 0:9b334a45a8ff 364
bogdanm 0:9b334a45a8ff 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 0:9b334a45a8ff 366 so that all instructions following the ISB are fetched from cache or
bogdanm 0:9b334a45a8ff 367 memory, after the instruction has been completed.
bogdanm 0:9b334a45a8ff 368 */
bogdanm 0:9b334a45a8ff 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 0:9b334a45a8ff 370 {
bogdanm 0:9b334a45a8ff 371 __ASM volatile ("isb");
bogdanm 0:9b334a45a8ff 372 }
bogdanm 0:9b334a45a8ff 373
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /** \brief Data Synchronization Barrier
bogdanm 0:9b334a45a8ff 376
bogdanm 0:9b334a45a8ff 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 0:9b334a45a8ff 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 0:9b334a45a8ff 379 */
bogdanm 0:9b334a45a8ff 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 0:9b334a45a8ff 381 {
bogdanm 0:9b334a45a8ff 382 __ASM volatile ("dsb");
bogdanm 0:9b334a45a8ff 383 }
bogdanm 0:9b334a45a8ff 384
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 /** \brief Data Memory Barrier
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 0:9b334a45a8ff 389 and after the instruction, without ensuring their completion.
bogdanm 0:9b334a45a8ff 390 */
bogdanm 0:9b334a45a8ff 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 0:9b334a45a8ff 392 {
bogdanm 0:9b334a45a8ff 393 __ASM volatile ("dmb");
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396
bogdanm 0:9b334a45a8ff 397 /** \brief Reverse byte order (32 bit)
bogdanm 0:9b334a45a8ff 398
bogdanm 0:9b334a45a8ff 399 This function reverses the byte order in integer value.
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 402 \return Reversed value
bogdanm 0:9b334a45a8ff 403 */
bogdanm 0:9b334a45a8ff 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 0:9b334a45a8ff 405 {
bogdanm 0:9b334a45a8ff 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 0:9b334a45a8ff 407 return __builtin_bswap32(value);
bogdanm 0:9b334a45a8ff 408 #else
bogdanm 0:9b334a45a8ff 409 uint32_t result;
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 0:9b334a45a8ff 412 return(result);
bogdanm 0:9b334a45a8ff 413 #endif
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 /** \brief Reverse byte order (16 bit)
bogdanm 0:9b334a45a8ff 418
bogdanm 0:9b334a45a8ff 419 This function reverses the byte order in two unsigned short values.
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 422 \return Reversed value
bogdanm 0:9b334a45a8ff 423 */
bogdanm 0:9b334a45a8ff 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 0:9b334a45a8ff 425 {
bogdanm 0:9b334a45a8ff 426 uint32_t result;
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 0:9b334a45a8ff 429 return(result);
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /** \brief Reverse byte order in signed short value
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 438 \return Reversed value
bogdanm 0:9b334a45a8ff 439 */
bogdanm 0:9b334a45a8ff 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 0:9b334a45a8ff 441 {
bogdanm 0:9b334a45a8ff 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 0:9b334a45a8ff 443 return (short)__builtin_bswap16(value);
bogdanm 0:9b334a45a8ff 444 #else
bogdanm 0:9b334a45a8ff 445 uint32_t result;
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 0:9b334a45a8ff 448 return(result);
bogdanm 0:9b334a45a8ff 449 #endif
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 0:9b334a45a8ff 456
bogdanm 0:9b334a45a8ff 457 \param [in] value Value to rotate
bogdanm 0:9b334a45a8ff 458 \param [in] value Number of Bits to rotate
bogdanm 0:9b334a45a8ff 459 \return Rotated value
bogdanm 0:9b334a45a8ff 460 */
bogdanm 0:9b334a45a8ff 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 462 {
bogdanm 0:9b334a45a8ff 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /** \brief Breakpoint
bogdanm 0:9b334a45a8ff 468
bogdanm 0:9b334a45a8ff 469 This function causes the processor to enter Debug state.
bogdanm 0:9b334a45a8ff 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 \param [in] value is ignored by the processor.
bogdanm 0:9b334a45a8ff 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 0:9b334a45a8ff 474 */
bogdanm 0:9b334a45a8ff 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 #if (__CORTEX_M >= 0x03)
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480 /** \brief Reverse bit order of value
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 This function reverses the bit order of the given value.
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 \param [in] value Value to reverse
bogdanm 0:9b334a45a8ff 485 \return Reversed value
bogdanm 0:9b334a45a8ff 486 */
bogdanm 0:9b334a45a8ff 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 0:9b334a45a8ff 488 {
bogdanm 0:9b334a45a8ff 489 uint32_t result;
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 0:9b334a45a8ff 492 return(result);
bogdanm 0:9b334a45a8ff 493 }
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495
bogdanm 0:9b334a45a8ff 496 /** \brief LDR Exclusive (8 bit)
bogdanm 0:9b334a45a8ff 497
bogdanm 0:9b334a45a8ff 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 501 \return value of type uint8_t at (*ptr)
bogdanm 0:9b334a45a8ff 502 */
bogdanm 0:9b334a45a8ff 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 0:9b334a45a8ff 504 {
bogdanm 0:9b334a45a8ff 505 uint32_t result;
bogdanm 0:9b334a45a8ff 506
bogdanm 0:9b334a45a8ff 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 0:9b334a45a8ff 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 0:9b334a45a8ff 509 #else
bogdanm 0:9b334a45a8ff 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 0:9b334a45a8ff 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 0:9b334a45a8ff 512 */
bogdanm 0:9b334a45a8ff 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 0:9b334a45a8ff 514 #endif
bogdanm 0:9b334a45a8ff 515 return(result);
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 /** \brief LDR Exclusive (16 bit)
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 524 \return value of type uint16_t at (*ptr)
bogdanm 0:9b334a45a8ff 525 */
bogdanm 0:9b334a45a8ff 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 0:9b334a45a8ff 527 {
bogdanm 0:9b334a45a8ff 528 uint32_t result;
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 0:9b334a45a8ff 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 0:9b334a45a8ff 532 #else
bogdanm 0:9b334a45a8ff 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 0:9b334a45a8ff 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 0:9b334a45a8ff 535 */
bogdanm 0:9b334a45a8ff 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 0:9b334a45a8ff 537 #endif
bogdanm 0:9b334a45a8ff 538 return(result);
bogdanm 0:9b334a45a8ff 539 }
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 /** \brief LDR Exclusive (32 bit)
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 0:9b334a45a8ff 545
bogdanm 0:9b334a45a8ff 546 \param [in] ptr Pointer to data
bogdanm 0:9b334a45a8ff 547 \return value of type uint32_t at (*ptr)
bogdanm 0:9b334a45a8ff 548 */
bogdanm 0:9b334a45a8ff 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 0:9b334a45a8ff 550 {
bogdanm 0:9b334a45a8ff 551 uint32_t result;
bogdanm 0:9b334a45a8ff 552
bogdanm 0:9b334a45a8ff 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 0:9b334a45a8ff 554 return(result);
bogdanm 0:9b334a45a8ff 555 }
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 /** \brief STR Exclusive (8 bit)
bogdanm 0:9b334a45a8ff 559
bogdanm 0:9b334a45a8ff 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 0:9b334a45a8ff 561
bogdanm 0:9b334a45a8ff 562 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 563 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 564 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 565 \return 1 Function failed
bogdanm 0:9b334a45a8ff 566 */
bogdanm 0:9b334a45a8ff 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 0:9b334a45a8ff 568 {
bogdanm 0:9b334a45a8ff 569 uint32_t result;
bogdanm 0:9b334a45a8ff 570
bogdanm 0:9b334a45a8ff 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 0:9b334a45a8ff 572 return(result);
bogdanm 0:9b334a45a8ff 573 }
bogdanm 0:9b334a45a8ff 574
bogdanm 0:9b334a45a8ff 575
bogdanm 0:9b334a45a8ff 576 /** \brief STR Exclusive (16 bit)
bogdanm 0:9b334a45a8ff 577
bogdanm 0:9b334a45a8ff 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 581 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 582 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 583 \return 1 Function failed
bogdanm 0:9b334a45a8ff 584 */
bogdanm 0:9b334a45a8ff 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 0:9b334a45a8ff 586 {
bogdanm 0:9b334a45a8ff 587 uint32_t result;
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 0:9b334a45a8ff 590 return(result);
bogdanm 0:9b334a45a8ff 591 }
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593
bogdanm 0:9b334a45a8ff 594 /** \brief STR Exclusive (32 bit)
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 0:9b334a45a8ff 597
bogdanm 0:9b334a45a8ff 598 \param [in] value Value to store
bogdanm 0:9b334a45a8ff 599 \param [in] ptr Pointer to location
bogdanm 0:9b334a45a8ff 600 \return 0 Function succeeded
bogdanm 0:9b334a45a8ff 601 \return 1 Function failed
bogdanm 0:9b334a45a8ff 602 */
bogdanm 0:9b334a45a8ff 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 0:9b334a45a8ff 604 {
bogdanm 0:9b334a45a8ff 605 uint32_t result;
bogdanm 0:9b334a45a8ff 606
bogdanm 0:9b334a45a8ff 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 0:9b334a45a8ff 608 return(result);
bogdanm 0:9b334a45a8ff 609 }
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612 /** \brief Remove the exclusive lock
bogdanm 0:9b334a45a8ff 613
bogdanm 0:9b334a45a8ff 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 */
bogdanm 0:9b334a45a8ff 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 0:9b334a45a8ff 618 {
bogdanm 0:9b334a45a8ff 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 0:9b334a45a8ff 620 }
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 /** \brief Signed Saturate
bogdanm 0:9b334a45a8ff 624
bogdanm 0:9b334a45a8ff 625 This function saturates a signed value.
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 \param [in] value Value to be saturated
bogdanm 0:9b334a45a8ff 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 0:9b334a45a8ff 629 \return Saturated value
bogdanm 0:9b334a45a8ff 630 */
bogdanm 0:9b334a45a8ff 631 #define __SSAT(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 632 ({ \
bogdanm 0:9b334a45a8ff 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 635 __RES; \
bogdanm 0:9b334a45a8ff 636 })
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638
bogdanm 0:9b334a45a8ff 639 /** \brief Unsigned Saturate
bogdanm 0:9b334a45a8ff 640
bogdanm 0:9b334a45a8ff 641 This function saturates an unsigned value.
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 \param [in] value Value to be saturated
bogdanm 0:9b334a45a8ff 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 0:9b334a45a8ff 645 \return Saturated value
bogdanm 0:9b334a45a8ff 646 */
bogdanm 0:9b334a45a8ff 647 #define __USAT(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 648 ({ \
bogdanm 0:9b334a45a8ff 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 651 __RES; \
bogdanm 0:9b334a45a8ff 652 })
bogdanm 0:9b334a45a8ff 653
bogdanm 0:9b334a45a8ff 654
bogdanm 0:9b334a45a8ff 655 /** \brief Count leading zeros
bogdanm 0:9b334a45a8ff 656
bogdanm 0:9b334a45a8ff 657 This function counts the number of leading zeros of a data value.
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 \param [in] value Value to count the leading zeros
bogdanm 0:9b334a45a8ff 660 \return number of leading zeros in value
bogdanm 0:9b334a45a8ff 661 */
bogdanm 0:9b334a45a8ff 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 0:9b334a45a8ff 663 {
bogdanm 0:9b334a45a8ff 664 uint32_t result;
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 0:9b334a45a8ff 667 return(result);
bogdanm 0:9b334a45a8ff 668 }
bogdanm 0:9b334a45a8ff 669
bogdanm 0:9b334a45a8ff 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 0:9b334a45a8ff 671
bogdanm 0:9b334a45a8ff 672
bogdanm 0:9b334a45a8ff 673
bogdanm 0:9b334a45a8ff 674
bogdanm 0:9b334a45a8ff 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 0:9b334a45a8ff 676 /* TASKING carm specific functions */
bogdanm 0:9b334a45a8ff 677
bogdanm 0:9b334a45a8ff 678 /*
bogdanm 0:9b334a45a8ff 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 0:9b334a45a8ff 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 0:9b334a45a8ff 681 * Including the CMSIS ones.
bogdanm 0:9b334a45a8ff 682 */
bogdanm 0:9b334a45a8ff 683
bogdanm 0:9b334a45a8ff 684 #endif
bogdanm 0:9b334a45a8ff 685
bogdanm 0:9b334a45a8ff 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 0:9b334a45a8ff 687
bogdanm 0:9b334a45a8ff 688 #endif /* __CORE_CMINSTR_H */