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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32620/device/trim_regs.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #ifndef _MXC_TRIM_REGS_H_
group-onsemi 0:098463de4c5d 35 #define _MXC_TRIM_REGS_H_
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 38 extern "C" {
group-onsemi 0:098463de4c5d 39 #endif
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include <stdint.h>
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /*
group-onsemi 0:098463de4c5d 44 If types are not defined elsewhere (CMSIS) define them here
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46 #ifndef __IO
group-onsemi 0:098463de4c5d 47 #define __IO volatile
group-onsemi 0:098463de4c5d 48 #endif
group-onsemi 0:098463de4c5d 49 #ifndef __I
group-onsemi 0:098463de4c5d 50 #define __I volatile const
group-onsemi 0:098463de4c5d 51 #endif
group-onsemi 0:098463de4c5d 52 #ifndef __O
group-onsemi 0:098463de4c5d 53 #define __O volatile
group-onsemi 0:098463de4c5d 54 #endif
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /*
group-onsemi 0:098463de4c5d 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
group-onsemi 0:098463de4c5d 59 access to each register in module.
group-onsemi 0:098463de4c5d 60 */
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /* Offset Register Description
group-onsemi 0:098463de4c5d 63 ============= ============================================================================ */
group-onsemi 0:098463de4c5d 64 typedef struct {
group-onsemi 0:098463de4c5d 65 __I uint32_t rsv000[11]; /* 0x0000-0x0028 */
group-onsemi 0:098463de4c5d 66 __IO uint32_t reg11_adc_trim0; /* 0x002C Shadow Trim for ADC R0 */
group-onsemi 0:098463de4c5d 67 __IO uint32_t reg12_adc_trim1; /* 0x0030 Shadow Trim for ADC R1 */
group-onsemi 0:098463de4c5d 68 __IO uint32_t for_pwr_reg5; /* 0x0034 Shadow Trim for PWRSEQ Register REG5 */
group-onsemi 0:098463de4c5d 69 __IO uint32_t for_pwr_reg6; /* 0x0038 Shadow Trim for PWRSEQ Register REG6 */
group-onsemi 0:098463de4c5d 70 } mxc_trim_regs_t;
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 /*
group-onsemi 0:098463de4c5d 74 Register offsets for module TRIM.
group-onsemi 0:098463de4c5d 75 */
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 #define MXC_R_TRIM_OFFS_REG11_ADC_TRIM0 ((uint32_t)0x0000002CUL)
group-onsemi 0:098463de4c5d 78 #define MXC_R_TRIM_OFFS_REG12_ADC_TRIM1 ((uint32_t)0x00000030UL)
group-onsemi 0:098463de4c5d 79 #define MXC_R_TRIM_OFFS_FOR_PWR_REG5 ((uint32_t)0x00000034UL)
group-onsemi 0:098463de4c5d 80 #define MXC_R_TRIM_OFFS_FOR_PWR_REG6 ((uint32_t)0x00000038UL)
group-onsemi 0:098463de4c5d 81
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 /*
group-onsemi 0:098463de4c5d 84 Field positions and masks for module TRIM.
group-onsemi 0:098463de4c5d 85 */
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 #define MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X0R0_POS 0
group-onsemi 0:098463de4c5d 88 #define MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X0R0 ((uint32_t)(0x000003FFUL << MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X0R0_POS))
group-onsemi 0:098463de4c5d 89 #define MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X1R0_POS 16
group-onsemi 0:098463de4c5d 90 #define MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X1R0 ((uint32_t)(0x000003FFUL << MXC_F_TRIM_REG11_ADC_TRIM0_ADCTRIM_X1R0_POS))
group-onsemi 0:098463de4c5d 91
group-onsemi 0:098463de4c5d 92 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X0R1_POS 0
group-onsemi 0:098463de4c5d 93 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X0R1 ((uint32_t)(0x000003FFUL << MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X0R1_POS))
group-onsemi 0:098463de4c5d 94 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X1R1_POS 16
group-onsemi 0:098463de4c5d 95 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X1R1 ((uint32_t)(0x000003FFUL << MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_X1R1_POS))
group-onsemi 0:098463de4c5d 96 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_DC_POS 28
group-onsemi 0:098463de4c5d 97 #define MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_DC ((uint32_t)(0x0000000FUL << MXC_F_TRIM_REG12_ADC_TRIM1_ADCTRIM_DC_POS))
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100
group-onsemi 0:098463de4c5d 101 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 102 }
group-onsemi 0:098463de4c5d 103 #endif
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 #endif /* _MXC_TRIM_REGS_H_ */
group-onsemi 0:098463de4c5d 106