ON Semiconductor / mbed-os

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

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group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #ifndef _MXC_I2CS_REGS_H_
group-onsemi 0:098463de4c5d 35 #define _MXC_I2CS_REGS_H_
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 38 extern "C" {
group-onsemi 0:098463de4c5d 39 #endif
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include <stdint.h>
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /*
group-onsemi 0:098463de4c5d 44 If types are not defined elsewhere (CMSIS) define them here
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46 #ifndef __IO
group-onsemi 0:098463de4c5d 47 #define __IO volatile
group-onsemi 0:098463de4c5d 48 #endif
group-onsemi 0:098463de4c5d 49 #ifndef __I
group-onsemi 0:098463de4c5d 50 #define __I volatile const
group-onsemi 0:098463de4c5d 51 #endif
group-onsemi 0:098463de4c5d 52 #ifndef __O
group-onsemi 0:098463de4c5d 53 #define __O volatile
group-onsemi 0:098463de4c5d 54 #endif
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /*
group-onsemi 0:098463de4c5d 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
group-onsemi 0:098463de4c5d 59 access to each register in module.
group-onsemi 0:098463de4c5d 60 */
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /* Offset Register Description
group-onsemi 0:098463de4c5d 63 ============= ============================================================================ */
group-onsemi 0:098463de4c5d 64 typedef struct {
group-onsemi 0:098463de4c5d 65 __IO uint32_t clk_div; /* 0x0000 I2C Slave Clock Divisor Control */
group-onsemi 0:098463de4c5d 66 __IO uint32_t dev_id; /* 0x0004 I2C Slave Device ID Register */
group-onsemi 0:098463de4c5d 67 __IO uint32_t intfl; /* 0x0008 I2CS Interrupt Flags */
group-onsemi 0:098463de4c5d 68 __IO uint32_t inten; /* 0x000C I2CS Interrupt Enable/Disable Controls */
group-onsemi 0:098463de4c5d 69 __IO uint32_t data_byte[32]; /* 0x0010-0x008C I2CS Data Byte */
group-onsemi 0:098463de4c5d 70 } mxc_i2cs_regs_t;
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 /*
group-onsemi 0:098463de4c5d 74 Register offsets for module I2CS.
group-onsemi 0:098463de4c5d 75 */
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 #define MXC_R_I2CS_OFFS_CLK_DIV ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 78 #define MXC_R_I2CS_OFFS_DEV_ID ((uint32_t)0x00000004UL)
group-onsemi 0:098463de4c5d 79 #define MXC_R_I2CS_OFFS_INTFL ((uint32_t)0x00000008UL)
group-onsemi 0:098463de4c5d 80 #define MXC_R_I2CS_OFFS_INTEN ((uint32_t)0x0000000CUL)
group-onsemi 0:098463de4c5d 81 #define MXC_R_I2CS_OFFS_DATA_BYTE ((uint32_t)0x00000010UL)
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 /*
group-onsemi 0:098463de4c5d 85 Field positions and masks for module I2CS.
group-onsemi 0:098463de4c5d 86 */
group-onsemi 0:098463de4c5d 87
group-onsemi 0:098463de4c5d 88 #define MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS 0
group-onsemi 0:098463de4c5d 89 #define MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV ((uint32_t)(0x000000FFUL << MXC_F_I2CS_CLK_DIV_FS_FILTER_CLOCK_DIV_POS))
group-onsemi 0:098463de4c5d 90
group-onsemi 0:098463de4c5d 91 #define MXC_F_I2CS_DEV_ID_SLAVE_DEV_ID_POS 0
group-onsemi 0:098463de4c5d 92 #define MXC_F_I2CS_DEV_ID_SLAVE_DEV_ID ((uint32_t)(0x000003FFUL << MXC_F_I2CS_DEV_ID_SLAVE_DEV_ID_POS))
group-onsemi 0:098463de4c5d 93 #define MXC_F_I2CS_DEV_ID_TEN_BIT_ID_MODE_POS 12
group-onsemi 0:098463de4c5d 94 #define MXC_F_I2CS_DEV_ID_TEN_BIT_ID_MODE ((uint32_t)(0x00000001UL << MXC_F_I2CS_DEV_ID_TEN_BIT_ID_MODE_POS))
group-onsemi 0:098463de4c5d 95 #define MXC_F_I2CS_DEV_ID_SLAVE_RESET_POS 14
group-onsemi 0:098463de4c5d 96 #define MXC_F_I2CS_DEV_ID_SLAVE_RESET ((uint32_t)(0x00000001UL << MXC_F_I2CS_DEV_ID_SLAVE_RESET_POS))
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 #define MXC_F_I2CS_INTFL_BYTE0_POS 0
group-onsemi 0:098463de4c5d 99 #define MXC_F_I2CS_INTFL_BYTE0 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE0_POS))
group-onsemi 0:098463de4c5d 100 #define MXC_F_I2CS_INTFL_BYTE1_POS 1
group-onsemi 0:098463de4c5d 101 #define MXC_F_I2CS_INTFL_BYTE1 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE1_POS))
group-onsemi 0:098463de4c5d 102 #define MXC_F_I2CS_INTFL_BYTE2_POS 2
group-onsemi 0:098463de4c5d 103 #define MXC_F_I2CS_INTFL_BYTE2 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE2_POS))
group-onsemi 0:098463de4c5d 104 #define MXC_F_I2CS_INTFL_BYTE3_POS 3
group-onsemi 0:098463de4c5d 105 #define MXC_F_I2CS_INTFL_BYTE3 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE3_POS))
group-onsemi 0:098463de4c5d 106 #define MXC_F_I2CS_INTFL_BYTE4_POS 4
group-onsemi 0:098463de4c5d 107 #define MXC_F_I2CS_INTFL_BYTE4 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE4_POS))
group-onsemi 0:098463de4c5d 108 #define MXC_F_I2CS_INTFL_BYTE5_POS 5
group-onsemi 0:098463de4c5d 109 #define MXC_F_I2CS_INTFL_BYTE5 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE5_POS))
group-onsemi 0:098463de4c5d 110 #define MXC_F_I2CS_INTFL_BYTE6_POS 6
group-onsemi 0:098463de4c5d 111 #define MXC_F_I2CS_INTFL_BYTE6 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE6_POS))
group-onsemi 0:098463de4c5d 112 #define MXC_F_I2CS_INTFL_BYTE7_POS 7
group-onsemi 0:098463de4c5d 113 #define MXC_F_I2CS_INTFL_BYTE7 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE7_POS))
group-onsemi 0:098463de4c5d 114 #define MXC_F_I2CS_INTFL_BYTE8_POS 8
group-onsemi 0:098463de4c5d 115 #define MXC_F_I2CS_INTFL_BYTE8 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE8_POS))
group-onsemi 0:098463de4c5d 116 #define MXC_F_I2CS_INTFL_BYTE9_POS 9
group-onsemi 0:098463de4c5d 117 #define MXC_F_I2CS_INTFL_BYTE9 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE9_POS))
group-onsemi 0:098463de4c5d 118 #define MXC_F_I2CS_INTFL_BYTE10_POS 10
group-onsemi 0:098463de4c5d 119 #define MXC_F_I2CS_INTFL_BYTE10 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE10_POS))
group-onsemi 0:098463de4c5d 120 #define MXC_F_I2CS_INTFL_BYTE11_POS 11
group-onsemi 0:098463de4c5d 121 #define MXC_F_I2CS_INTFL_BYTE11 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE11_POS))
group-onsemi 0:098463de4c5d 122 #define MXC_F_I2CS_INTFL_BYTE12_POS 12
group-onsemi 0:098463de4c5d 123 #define MXC_F_I2CS_INTFL_BYTE12 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE12_POS))
group-onsemi 0:098463de4c5d 124 #define MXC_F_I2CS_INTFL_BYTE13_POS 13
group-onsemi 0:098463de4c5d 125 #define MXC_F_I2CS_INTFL_BYTE13 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE13_POS))
group-onsemi 0:098463de4c5d 126 #define MXC_F_I2CS_INTFL_BYTE14_POS 14
group-onsemi 0:098463de4c5d 127 #define MXC_F_I2CS_INTFL_BYTE14 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE14_POS))
group-onsemi 0:098463de4c5d 128 #define MXC_F_I2CS_INTFL_BYTE15_POS 15
group-onsemi 0:098463de4c5d 129 #define MXC_F_I2CS_INTFL_BYTE15 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE15_POS))
group-onsemi 0:098463de4c5d 130 #define MXC_F_I2CS_INTFL_BYTE16_POS 16
group-onsemi 0:098463de4c5d 131 #define MXC_F_I2CS_INTFL_BYTE16 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE16_POS))
group-onsemi 0:098463de4c5d 132 #define MXC_F_I2CS_INTFL_BYTE17_POS 17
group-onsemi 0:098463de4c5d 133 #define MXC_F_I2CS_INTFL_BYTE17 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE17_POS))
group-onsemi 0:098463de4c5d 134 #define MXC_F_I2CS_INTFL_BYTE18_POS 18
group-onsemi 0:098463de4c5d 135 #define MXC_F_I2CS_INTFL_BYTE18 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE18_POS))
group-onsemi 0:098463de4c5d 136 #define MXC_F_I2CS_INTFL_BYTE19_POS 19
group-onsemi 0:098463de4c5d 137 #define MXC_F_I2CS_INTFL_BYTE19 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE19_POS))
group-onsemi 0:098463de4c5d 138 #define MXC_F_I2CS_INTFL_BYTE20_POS 20
group-onsemi 0:098463de4c5d 139 #define MXC_F_I2CS_INTFL_BYTE20 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE20_POS))
group-onsemi 0:098463de4c5d 140 #define MXC_F_I2CS_INTFL_BYTE21_POS 21
group-onsemi 0:098463de4c5d 141 #define MXC_F_I2CS_INTFL_BYTE21 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE21_POS))
group-onsemi 0:098463de4c5d 142 #define MXC_F_I2CS_INTFL_BYTE22_POS 22
group-onsemi 0:098463de4c5d 143 #define MXC_F_I2CS_INTFL_BYTE22 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE22_POS))
group-onsemi 0:098463de4c5d 144 #define MXC_F_I2CS_INTFL_BYTE23_POS 23
group-onsemi 0:098463de4c5d 145 #define MXC_F_I2CS_INTFL_BYTE23 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE23_POS))
group-onsemi 0:098463de4c5d 146 #define MXC_F_I2CS_INTFL_BYTE24_POS 24
group-onsemi 0:098463de4c5d 147 #define MXC_F_I2CS_INTFL_BYTE24 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE24_POS))
group-onsemi 0:098463de4c5d 148 #define MXC_F_I2CS_INTFL_BYTE25_POS 25
group-onsemi 0:098463de4c5d 149 #define MXC_F_I2CS_INTFL_BYTE25 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE25_POS))
group-onsemi 0:098463de4c5d 150 #define MXC_F_I2CS_INTFL_BYTE26_POS 26
group-onsemi 0:098463de4c5d 151 #define MXC_F_I2CS_INTFL_BYTE26 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE26_POS))
group-onsemi 0:098463de4c5d 152 #define MXC_F_I2CS_INTFL_BYTE27_POS 27
group-onsemi 0:098463de4c5d 153 #define MXC_F_I2CS_INTFL_BYTE27 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE27_POS))
group-onsemi 0:098463de4c5d 154 #define MXC_F_I2CS_INTFL_BYTE28_POS 28
group-onsemi 0:098463de4c5d 155 #define MXC_F_I2CS_INTFL_BYTE28 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE28_POS))
group-onsemi 0:098463de4c5d 156 #define MXC_F_I2CS_INTFL_BYTE29_POS 29
group-onsemi 0:098463de4c5d 157 #define MXC_F_I2CS_INTFL_BYTE29 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE29_POS))
group-onsemi 0:098463de4c5d 158 #define MXC_F_I2CS_INTFL_BYTE30_POS 30
group-onsemi 0:098463de4c5d 159 #define MXC_F_I2CS_INTFL_BYTE30 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE30_POS))
group-onsemi 0:098463de4c5d 160 #define MXC_F_I2CS_INTFL_BYTE31_POS 31
group-onsemi 0:098463de4c5d 161 #define MXC_F_I2CS_INTFL_BYTE31 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTFL_BYTE31_POS))
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 #define MXC_F_I2CS_INTEN_BYTE0_POS 0
group-onsemi 0:098463de4c5d 164 #define MXC_F_I2CS_INTEN_BYTE0 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE0_POS))
group-onsemi 0:098463de4c5d 165 #define MXC_F_I2CS_INTEN_BYTE1_POS 1
group-onsemi 0:098463de4c5d 166 #define MXC_F_I2CS_INTEN_BYTE1 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE1_POS))
group-onsemi 0:098463de4c5d 167 #define MXC_F_I2CS_INTEN_BYTE2_POS 2
group-onsemi 0:098463de4c5d 168 #define MXC_F_I2CS_INTEN_BYTE2 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE2_POS))
group-onsemi 0:098463de4c5d 169 #define MXC_F_I2CS_INTEN_BYTE3_POS 3
group-onsemi 0:098463de4c5d 170 #define MXC_F_I2CS_INTEN_BYTE3 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE3_POS))
group-onsemi 0:098463de4c5d 171 #define MXC_F_I2CS_INTEN_BYTE4_POS 4
group-onsemi 0:098463de4c5d 172 #define MXC_F_I2CS_INTEN_BYTE4 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE4_POS))
group-onsemi 0:098463de4c5d 173 #define MXC_F_I2CS_INTEN_BYTE5_POS 5
group-onsemi 0:098463de4c5d 174 #define MXC_F_I2CS_INTEN_BYTE5 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE5_POS))
group-onsemi 0:098463de4c5d 175 #define MXC_F_I2CS_INTEN_BYTE6_POS 6
group-onsemi 0:098463de4c5d 176 #define MXC_F_I2CS_INTEN_BYTE6 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE6_POS))
group-onsemi 0:098463de4c5d 177 #define MXC_F_I2CS_INTEN_BYTE7_POS 7
group-onsemi 0:098463de4c5d 178 #define MXC_F_I2CS_INTEN_BYTE7 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE7_POS))
group-onsemi 0:098463de4c5d 179 #define MXC_F_I2CS_INTEN_BYTE8_POS 8
group-onsemi 0:098463de4c5d 180 #define MXC_F_I2CS_INTEN_BYTE8 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE8_POS))
group-onsemi 0:098463de4c5d 181 #define MXC_F_I2CS_INTEN_BYTE9_POS 9
group-onsemi 0:098463de4c5d 182 #define MXC_F_I2CS_INTEN_BYTE9 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE9_POS))
group-onsemi 0:098463de4c5d 183 #define MXC_F_I2CS_INTEN_BYTE10_POS 10
group-onsemi 0:098463de4c5d 184 #define MXC_F_I2CS_INTEN_BYTE10 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE10_POS))
group-onsemi 0:098463de4c5d 185 #define MXC_F_I2CS_INTEN_BYTE11_POS 11
group-onsemi 0:098463de4c5d 186 #define MXC_F_I2CS_INTEN_BYTE11 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE11_POS))
group-onsemi 0:098463de4c5d 187 #define MXC_F_I2CS_INTEN_BYTE12_POS 12
group-onsemi 0:098463de4c5d 188 #define MXC_F_I2CS_INTEN_BYTE12 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE12_POS))
group-onsemi 0:098463de4c5d 189 #define MXC_F_I2CS_INTEN_BYTE13_POS 13
group-onsemi 0:098463de4c5d 190 #define MXC_F_I2CS_INTEN_BYTE13 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE13_POS))
group-onsemi 0:098463de4c5d 191 #define MXC_F_I2CS_INTEN_BYTE14_POS 14
group-onsemi 0:098463de4c5d 192 #define MXC_F_I2CS_INTEN_BYTE14 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE14_POS))
group-onsemi 0:098463de4c5d 193 #define MXC_F_I2CS_INTEN_BYTE15_POS 15
group-onsemi 0:098463de4c5d 194 #define MXC_F_I2CS_INTEN_BYTE15 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE15_POS))
group-onsemi 0:098463de4c5d 195 #define MXC_F_I2CS_INTEN_BYTE16_POS 16
group-onsemi 0:098463de4c5d 196 #define MXC_F_I2CS_INTEN_BYTE16 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE16_POS))
group-onsemi 0:098463de4c5d 197 #define MXC_F_I2CS_INTEN_BYTE17_POS 17
group-onsemi 0:098463de4c5d 198 #define MXC_F_I2CS_INTEN_BYTE17 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE17_POS))
group-onsemi 0:098463de4c5d 199 #define MXC_F_I2CS_INTEN_BYTE18_POS 18
group-onsemi 0:098463de4c5d 200 #define MXC_F_I2CS_INTEN_BYTE18 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE18_POS))
group-onsemi 0:098463de4c5d 201 #define MXC_F_I2CS_INTEN_BYTE19_POS 19
group-onsemi 0:098463de4c5d 202 #define MXC_F_I2CS_INTEN_BYTE19 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE19_POS))
group-onsemi 0:098463de4c5d 203 #define MXC_F_I2CS_INTEN_BYTE20_POS 20
group-onsemi 0:098463de4c5d 204 #define MXC_F_I2CS_INTEN_BYTE20 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE20_POS))
group-onsemi 0:098463de4c5d 205 #define MXC_F_I2CS_INTEN_BYTE21_POS 21
group-onsemi 0:098463de4c5d 206 #define MXC_F_I2CS_INTEN_BYTE21 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE21_POS))
group-onsemi 0:098463de4c5d 207 #define MXC_F_I2CS_INTEN_BYTE22_POS 22
group-onsemi 0:098463de4c5d 208 #define MXC_F_I2CS_INTEN_BYTE22 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE22_POS))
group-onsemi 0:098463de4c5d 209 #define MXC_F_I2CS_INTEN_BYTE23_POS 23
group-onsemi 0:098463de4c5d 210 #define MXC_F_I2CS_INTEN_BYTE23 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE23_POS))
group-onsemi 0:098463de4c5d 211 #define MXC_F_I2CS_INTEN_BYTE24_POS 24
group-onsemi 0:098463de4c5d 212 #define MXC_F_I2CS_INTEN_BYTE24 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE24_POS))
group-onsemi 0:098463de4c5d 213 #define MXC_F_I2CS_INTEN_BYTE25_POS 25
group-onsemi 0:098463de4c5d 214 #define MXC_F_I2CS_INTEN_BYTE25 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE25_POS))
group-onsemi 0:098463de4c5d 215 #define MXC_F_I2CS_INTEN_BYTE26_POS 26
group-onsemi 0:098463de4c5d 216 #define MXC_F_I2CS_INTEN_BYTE26 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE26_POS))
group-onsemi 0:098463de4c5d 217 #define MXC_F_I2CS_INTEN_BYTE27_POS 27
group-onsemi 0:098463de4c5d 218 #define MXC_F_I2CS_INTEN_BYTE27 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE27_POS))
group-onsemi 0:098463de4c5d 219 #define MXC_F_I2CS_INTEN_BYTE28_POS 28
group-onsemi 0:098463de4c5d 220 #define MXC_F_I2CS_INTEN_BYTE28 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE28_POS))
group-onsemi 0:098463de4c5d 221 #define MXC_F_I2CS_INTEN_BYTE29_POS 29
group-onsemi 0:098463de4c5d 222 #define MXC_F_I2CS_INTEN_BYTE29 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE29_POS))
group-onsemi 0:098463de4c5d 223 #define MXC_F_I2CS_INTEN_BYTE30_POS 30
group-onsemi 0:098463de4c5d 224 #define MXC_F_I2CS_INTEN_BYTE30 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE30_POS))
group-onsemi 0:098463de4c5d 225 #define MXC_F_I2CS_INTEN_BYTE31_POS 31
group-onsemi 0:098463de4c5d 226 #define MXC_F_I2CS_INTEN_BYTE31 ((uint32_t)(0x00000001UL << MXC_F_I2CS_INTEN_BYTE31_POS))
group-onsemi 0:098463de4c5d 227
group-onsemi 0:098463de4c5d 228 #define MXC_F_I2CS_DATA_BYTE_DATA_FIELD_POS 0
group-onsemi 0:098463de4c5d 229 #define MXC_F_I2CS_DATA_BYTE_DATA_FIELD ((uint32_t)(0x000000FFUL << MXC_F_I2CS_DATA_BYTE_DATA_FIELD_POS))
group-onsemi 0:098463de4c5d 230 #define MXC_F_I2CS_DATA_BYTE_READ_ONLY_FL_POS 8
group-onsemi 0:098463de4c5d 231 #define MXC_F_I2CS_DATA_BYTE_READ_ONLY_FL ((uint32_t)(0x00000001UL << MXC_F_I2CS_DATA_BYTE_READ_ONLY_FL_POS))
group-onsemi 0:098463de4c5d 232 #define MXC_F_I2CS_DATA_BYTE_DATA_UPDATED_FL_POS 9
group-onsemi 0:098463de4c5d 233 #define MXC_F_I2CS_DATA_BYTE_DATA_UPDATED_FL ((uint32_t)(0x00000001UL << MXC_F_I2CS_DATA_BYTE_DATA_UPDATED_FL_POS))
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235
group-onsemi 0:098463de4c5d 236
group-onsemi 0:098463de4c5d 237 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 238 }
group-onsemi 0:098463de4c5d 239 #endif
group-onsemi 0:098463de4c5d 240
group-onsemi 0:098463de4c5d 241 #endif /* _MXC_I2CS_REGS_H_ */
group-onsemi 0:098463de4c5d 242