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targets/TARGET_Maxim/TARGET_MAX32610/device/dac_regs.h@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #ifndef _MXC_DAC_REGS_H
group-onsemi 0:098463de4c5d 35 #define _MXC_DAC_REGS_H
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 38 extern "C" {
group-onsemi 0:098463de4c5d 39 #endif
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include <stdint.h>
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**
group-onsemi 0:098463de4c5d 44 * @file dac_regs.h
group-onsemi 0:098463de4c5d 45 * @addtogroup dac DAC
group-onsemi 0:098463de4c5d 46 * @{
group-onsemi 0:098463de4c5d 47 */
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 /**
group-onsemi 0:098463de4c5d 50 * @brief Defines the DAC Operational Modes.
group-onsemi 0:098463de4c5d 51 */
group-onsemi 0:098463de4c5d 52 typedef enum {
group-onsemi 0:098463de4c5d 53 /** DAC OpMode FIFO */
group-onsemi 0:098463de4c5d 54 MXC_E_DAC_OP_MODE_FIFO = 0,
group-onsemi 0:098463de4c5d 55 /** DAC OpMode Sample Count */
group-onsemi 0:098463de4c5d 56 MXC_E_DAC_OP_MODE_DACSMPLCNT,
group-onsemi 0:098463de4c5d 57 /** DAC OpMode DAC_REG Control */
group-onsemi 0:098463de4c5d 58 MXC_E_DAC_OP_MODE_DAC_REG,
group-onsemi 0:098463de4c5d 59 /** DAC OpMode Continuous */
group-onsemi 0:098463de4c5d 60 MXC_E_DAC_OP_MODE_CONTINUOUS
group-onsemi 0:098463de4c5d 61 } mxc_dac_op_mode_t;
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 /**
group-onsemi 0:098463de4c5d 64 * @brief Defines the DAC Interpolation Options.
group-onsemi 0:098463de4c5d 65 */
group-onsemi 0:098463de4c5d 66 typedef enum {
group-onsemi 0:098463de4c5d 67 /** DAC Interpolation is Disabled */
group-onsemi 0:098463de4c5d 68 MXC_E_DAC_INTERP_MODE_DISABLED = 0,
group-onsemi 0:098463de4c5d 69 /** DAC Interpolation 2:1 */
group-onsemi 0:098463de4c5d 70 MXC_E_DAC_INTERP_MODE_2_TO_1,
group-onsemi 0:098463de4c5d 71 /** DAC Interpolation 4:1 */
group-onsemi 0:098463de4c5d 72 MXC_E_DAC_INTERP_MODE_4_TO_1,
group-onsemi 0:098463de4c5d 73 /** DAC Interpolation 8:1 */
group-onsemi 0:098463de4c5d 74 MXC_E_DAC_INTERP_MODE_8_TO_1
group-onsemi 0:098463de4c5d 75 } mxc_dac_interp_mode_t;
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 /**
group-onsemi 0:098463de4c5d 78 * @brief Defines the DAC Start Modes.
group-onsemi 0:098463de4c5d 79 */
group-onsemi 0:098463de4c5d 80 typedef enum {
group-onsemi 0:098463de4c5d 81 /** Start on FIFO Not Empty */
group-onsemi 0:098463de4c5d 82 MXC_E_DAC_START_MODE_FIFO_NOT_EMPTY = 0,
group-onsemi 0:098463de4c5d 83 /** Start on ADC generated Start Strobe */
group-onsemi 0:098463de4c5d 84 MXC_E_DAC_START_MODE_ADC_STROBE,
group-onsemi 0:098463de4c5d 85 /** Start on DAC generated Start Strobe */
group-onsemi 0:098463de4c5d 86 MXC_E_DAC_START_MODE_DAC_STROBE
group-onsemi 0:098463de4c5d 87 } mxc_dac_start_mode_t;
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 /* Offset Register Description
group-onsemi 0:098463de4c5d 90 ====== ================================================== */
group-onsemi 0:098463de4c5d 91 typedef struct {
group-onsemi 0:098463de4c5d 92 __IO uint32_t ctrl0; /* 0x0000 DAC Control Register 0 */
group-onsemi 0:098463de4c5d 93 __IO uint32_t rate; /* 0x0004 DAC Output Rate Control */
group-onsemi 0:098463de4c5d 94 __IO uint32_t ctrl1_int; /* 0x0008 DAC Control Register 1, Interrupt Flags and Enable */
group-onsemi 0:098463de4c5d 95 __IO uint32_t reg; /* 0x000C DAC Data Register */
group-onsemi 0:098463de4c5d 96 __IO uint32_t trm; /* 0x0010 DAC Trim Register */
group-onsemi 0:098463de4c5d 97 } mxc_dac_regs_t;
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 /* Offset Register Description
group-onsemi 0:098463de4c5d 100 ====== ================================================== */
group-onsemi 0:098463de4c5d 101 typedef struct {
group-onsemi 0:098463de4c5d 102 union {
group-onsemi 0:098463de4c5d 103 __IO uint8_t output_8; /* 0x0000 Write to push values to DAC output FIFO */
group-onsemi 0:098463de4c5d 104 __IO uint16_t output_16; /* 0x0000 Write to push values to DAC output FIFO */
group-onsemi 0:098463de4c5d 105 };
group-onsemi 0:098463de4c5d 106 } mxc_dac_fifo_regs_t;
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 /*
group-onsemi 0:098463de4c5d 109 Register offsets for module DAC12.
group-onsemi 0:098463de4c5d 110 */
group-onsemi 0:098463de4c5d 111 #define MXC_R_DAC_OFFS_CTRL0 ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 112 #define MXC_R_DAC_OFFS_RATE ((uint32_t)0x00000004UL)
group-onsemi 0:098463de4c5d 113 #define MXC_R_DAC_OFFS_CTRL1_INT ((uint32_t)0x00000008UL)
group-onsemi 0:098463de4c5d 114 #define MXC_R_DAC_FIFO_OFFS_OUTPUT ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 /*
group-onsemi 0:098463de4c5d 117 Field positions and masks for module DAC.
group-onsemi 0:098463de4c5d 118 */
group-onsemi 0:098463de4c5d 119 #define MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS 0
group-onsemi 0:098463de4c5d 120 #define MXC_F_DAC_CTRL0_FIFO_AE_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AE_CNT_POS))
group-onsemi 0:098463de4c5d 121 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS 5
group-onsemi 0:098463de4c5d 122 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_FULL_POS))
group-onsemi 0:098463de4c5d 123 #define MXC_F_DAC_CTRL0_FIFO_EMPTY_POS 6
group-onsemi 0:098463de4c5d 124 #define MXC_F_DAC_CTRL0_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_EMPTY_POS))
group-onsemi 0:098463de4c5d 125 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS 7
group-onsemi 0:098463de4c5d 126 #define MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_FIFO_ALMOST_EMPTY_POS))
group-onsemi 0:098463de4c5d 127 #define MXC_F_DAC_CTRL0_INTERP_MODE_POS 8
group-onsemi 0:098463de4c5d 128 #define MXC_F_DAC_CTRL0_INTERP_MODE ((uint32_t)(0x00000007UL << MXC_F_DAC_CTRL0_INTERP_MODE_POS))
group-onsemi 0:098463de4c5d 129 #define MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS 12
group-onsemi 0:098463de4c5d 130 #define MXC_F_DAC_CTRL0_FIFO_AF_CNT ((uint32_t)(0x0000000FUL << MXC_F_DAC_CTRL0_FIFO_AF_CNT_POS))
group-onsemi 0:098463de4c5d 131 #define MXC_F_DAC_CTRL0_START_MODE_POS 16
group-onsemi 0:098463de4c5d 132 #define MXC_F_DAC_CTRL0_START_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_START_MODE_POS))
group-onsemi 0:098463de4c5d 133 #define MXC_F_DAC_CTRL0_CPU_START_POS 20
group-onsemi 0:098463de4c5d 134 #define MXC_F_DAC_CTRL0_CPU_START ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CPU_START_POS))
group-onsemi 0:098463de4c5d 135 #define MXC_F_DAC_CTRL0_OP_MODE_POS 24
group-onsemi 0:098463de4c5d 136 #define MXC_F_DAC_CTRL0_OP_MODE ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_OP_MODE_POS))
group-onsemi 0:098463de4c5d 137 #define MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS 26
group-onsemi 0:098463de4c5d 138 #define MXC_F_DAC_CTRL0_POWER_MODE_1_0 ((uint32_t)(0x00000003UL << MXC_F_DAC_CTRL0_POWER_MODE_1_0_POS))
group-onsemi 0:098463de4c5d 139 #define MXC_F_DAC_CTRL0_POWER_ON_POS 28
group-onsemi 0:098463de4c5d 140 #define MXC_F_DAC_CTRL0_POWER_ON ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_ON_POS))
group-onsemi 0:098463de4c5d 141 #define MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS 29
group-onsemi 0:098463de4c5d 142 #define MXC_F_DAC_CTRL0_CLOCK_GATE_EN ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_CLOCK_GATE_EN_POS))
group-onsemi 0:098463de4c5d 143 #define MXC_F_DAC_CTRL0_POWER_MODE_2_POS 30
group-onsemi 0:098463de4c5d 144 #define MXC_F_DAC_CTRL0_POWER_MODE_2 ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_POWER_MODE_2_POS))
group-onsemi 0:098463de4c5d 145 #define MXC_F_DAC_CTRL0_RESET_POS 31
group-onsemi 0:098463de4c5d 146 #define MXC_F_DAC_CTRL0_RESET ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL0_RESET_POS))
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 #define MXC_F_DAC_RATE_RATE_CNT_POS 0
group-onsemi 0:098463de4c5d 149 #define MXC_F_DAC_RATE_RATE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_RATE_CNT_POS))
group-onsemi 0:098463de4c5d 150 #define MXC_F_DAC_RATE_SAMPLE_CNT_POS 16
group-onsemi 0:098463de4c5d 151 #define MXC_F_DAC_RATE_SAMPLE_CNT ((uint32_t)(0x0000FFFFUL << MXC_F_DAC_RATE_SAMPLE_CNT_POS))
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS 0
group-onsemi 0:098463de4c5d 154 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IF_POS))
group-onsemi 0:098463de4c5d 155 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS 1
group-onsemi 0:098463de4c5d 156 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IF_POS))
group-onsemi 0:098463de4c5d 157 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS 2
group-onsemi 0:098463de4c5d 158 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IF_POS))
group-onsemi 0:098463de4c5d 159 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS 3
group-onsemi 0:098463de4c5d 160 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_POS))
group-onsemi 0:098463de4c5d 161 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS 16
group-onsemi 0:098463de4c5d 162 #define MXC_F_DAC_CTRL1_INT_OUT_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_OUT_DONE_IE_POS))
group-onsemi 0:098463de4c5d 163 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS 17
group-onsemi 0:098463de4c5d 164 #define MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_UNDERFLOW_IE_POS))
group-onsemi 0:098463de4c5d 165 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS 18
group-onsemi 0:098463de4c5d 166 #define MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_ALMOST_EMPTY_IE_POS))
group-onsemi 0:098463de4c5d 167 #define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS 28
group-onsemi 0:098463de4c5d 168 #define MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_AHB_CG_DISABLE_POS))
group-onsemi 0:098463de4c5d 169 #define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS 29
group-onsemi 0:098463de4c5d 170 #define MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE ((uint32_t)(0x00000001UL << MXC_F_DAC_CTRL1_INT_APB_CG_DISABLE_POS))
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 173 }
group-onsemi 0:098463de4c5d 174 #endif
group-onsemi 0:098463de4c5d 175
group-onsemi 0:098463de4c5d 176 /**
group-onsemi 0:098463de4c5d 177 * @}
group-onsemi 0:098463de4c5d 178 */
group-onsemi 0:098463de4c5d 179
group-onsemi 0:098463de4c5d 180 #endif /* _DAC12_REGS_H */