USBHAL_NUC472.cpp

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2015-2016 Nuvoton
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 #if defined(TARGET_NUMAKER_PFM_NUC472)
00018 
00019 #include "USBHAL.h"
00020 #include "NUC472_442.h"
00021 #include "pinmap.h"
00022 
00023 /**
00024  * EP: mbed USBD defined endpoint, e.g. EP0OUT/IN, EP1OUT/IN, EP2OUT/IN.
00025  * EPX: BSP defined endpoint, e.g. CEP, EPA, EPB, EPC.
00026  */
00027 
00028 USBHAL * USBHAL::instance;
00029 
00030 static volatile uint32_t s_ep_compl = 0;
00031 static volatile uint32_t s_ep_buf_ind = 0;
00032 static volatile uint8_t s_usb_addr = 0;
00033 static volatile S_USBD_CMD_T s_setup;
00034 static volatile uint16_t s_ctrlin_packetsize;
00035 static uint8_t *g_usbd_CtrlInPointer = 0;
00036 static uint32_t g_usbd_CtrlMaxPktSize = 64;
00037 static uint32_t g_usbd_ShortPkt = 0;
00038 static uint32_t gEpRead = 0;
00039 static uint32_t gEpReadCnt = 0;
00040 
00041 void USBD_CtrlInput(void)
00042 {
00043     int volatile i;
00044     uint32_t volatile count;
00045 
00046     // Process remained data
00047     if (g_usbd_CtrlInSize >= g_usbd_CtrlMaxPktSize)
00048     {
00049         // Data size > MXPLD
00050         for (i=0; i<(g_usbd_CtrlMaxPktSize >> 2); i++, g_usbd_CtrlInPointer+=4)
00051             USBD->CEPDAT = *(uint32_t *)g_usbd_CtrlInPointer;
00052         USBD_START_CEP_IN(g_usbd_CtrlMaxPktSize);
00053         g_usbd_CtrlInSize -= g_usbd_CtrlMaxPktSize;
00054     }
00055     else
00056     {
00057         // Data size <= MXPLD
00058         for (i=0; i<(g_usbd_CtrlInSize >> 2); i++, g_usbd_CtrlInPointer+=4)
00059             USBD->CEPDAT = *(uint32_t *)g_usbd_CtrlInPointer;
00060 
00061         count = g_usbd_CtrlInSize % 4;
00062         for (i=0; i<count; i++)
00063             USBD->CEPDAT_BYTE = *(uint8_t *)(g_usbd_CtrlInPointer + i);
00064 
00065         USBD_START_CEP_IN(g_usbd_CtrlInSize);
00066         g_usbd_CtrlInPointer = 0;
00067         g_usbd_CtrlInSize = 0;
00068     }
00069 }
00070 
00071 USBHAL::USBHAL(void)
00072 {
00073     SYS_UnlockReg();
00074 
00075     s_ep_buf_ind = 0;
00076 
00077     memset(epCallback, 0x00, sizeof (epCallback));
00078     epCallback[0] = &USBHAL::EP1_OUT_callback;
00079     epCallback[1] = &USBHAL::EP2_IN_callback;
00080     epCallback[2] = &USBHAL::EP3_OUT_callback;
00081     epCallback[3] = &USBHAL::EP4_IN_callback;
00082     epCallback[4] = &USBHAL::EP5_OUT_callback;
00083     epCallback[5] = &USBHAL::EP6_IN_callback;
00084     epCallback[6] = &USBHAL::EP7_OUT_callback;
00085     epCallback[7] = &USBHAL::EP8_IN_callback;
00086     epCallback[8] = &USBHAL::EP9_OUT_callback;
00087     epCallback[9] = &USBHAL::EP10_IN_callback;
00088     epCallback[10] = &USBHAL::EP11_OUT_callback;
00089     epCallback[11] = &USBHAL::EP12_IN_callback;
00090 
00091     instance = this;
00092 
00093     /* Enable USBD module clock */
00094     CLK_EnableModuleClock(USBD_MODULE);
00095 
00096     /* Enable USB PHY's LDO33. Run as USB device. */
00097     SYS->USBPHY = SYS_USBPHY_USBROLE_OTG_V33_EN | SYS_USBPHY_USBROLE_STD_USBD;
00098 
00099     /* Enable USB PHY and wait for it ready */
00100     USBD_ENABLE_PHY();
00101     while (1)
00102     {
00103         USBD->EPAMPS = 0x20;
00104         if (USBD->EPAMPS == 0x20)
00105             break;
00106     }
00107 
00108     /* Force to full-speed */
00109     USBD->OPER = 0;//USBD_OPER_HISPDEN_Msk;
00110 
00111     /* Set SE0 (disconnect) */
00112     USBD_SET_SE0();
00113 
00114     NVIC_SetVector(USBD_IRQn, (uint32_t) &_usbisr);
00115     NVIC_EnableIRQ(USBD_IRQn);
00116 }
00117 
00118 USBHAL::~USBHAL(void)
00119 {
00120     NVIC_DisableIRQ(USBD_IRQn);
00121     USBD_SET_SE0();
00122     USBD_DISABLE_PHY();
00123 }
00124 
00125 void USBHAL::connect(void)
00126 {
00127     USBD_ResetDMA();
00128     USBD_SET_ADDR(0);
00129 
00130     /**
00131       * Control Transfer Packet Size Constraints
00132       * low-speed: 8
00133       * full-speed: 8, 16, 32, 64
00134       * high-speed: 64
00135       */
00136     /* Control endpoint */
00137     USBD_SetEpBufAddr(CEP, s_ep_buf_ind, MAX_PACKET_SIZE_EP0);
00138     s_ep_buf_ind = MAX_PACKET_SIZE_EP0;
00139 
00140     /* Enable USB/CEP interrupt */
00141     USBD_ENABLE_USB_INT(USBD_GINTEN_USBIE_Msk | USBD_GINTEN_CEPIE_Msk);
00142     USBD_ENABLE_CEP_INT(USBD_CEPINTEN_SETUPPKIEN_Msk|USBD_CEPINTEN_STSDONEIEN_Msk);
00143 
00144     /* Enable BUS interrupt */
00145     USBD_ENABLE_BUS_INT(
00146         USBD_BUSINTEN_DMADONEIEN_Msk |
00147         USBD_BUSINTEN_RESUMEIEN_Msk |
00148         USBD_BUSINTEN_RSTIEN_Msk |
00149         USBD_BUSINTEN_VBUSDETIEN_Msk |
00150         USBD_BUSINTEN_SOFIEN_Msk
00151     );
00152 
00153     /* Clear SE0 (connect) */
00154     USBD_CLR_SE0();
00155 }
00156 
00157 void USBHAL::disconnect(void)
00158 {
00159     /* Set SE0 (disconnect) */
00160     USBD_SET_SE0();
00161 }
00162 
00163 void USBHAL::configureDevice(void)
00164 {
00165     /**
00166      * In USBDevice.cpp > USBDevice::requestSetConfiguration, configureDevice() is called after realiseEndpoint() (in USBCallback_setConfiguration()).
00167      * So we have the following USB buffer management policy:
00168      *  1. Allocate for CEP on connect().
00169      *  2. Allocate for EPX in realiseEndpoint().
00170      *  3. Deallocate all except for CEP in unconfigureDevice().
00171      */
00172 }
00173 
00174 void USBHAL::unconfigureDevice(void)
00175 {
00176     s_ep_buf_ind = MAX_PACKET_SIZE_EP0;
00177 }
00178 
00179 void USBHAL::setAddress(uint8_t address)
00180 {
00181     // NOTE: Delay address setting; otherwise, USB controller won't ack.
00182     s_usb_addr = address;
00183 }
00184 
00185 void USBHAL::remoteWakeup(void)
00186 {
00187     USBD->OPER |= USBD_OPER_RESUMEEN_Msk;
00188 }
00189 
00190 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
00191 {
00192     uint32_t ep_type;
00193     uint32_t ep_hw_index = NU_EP2EPH(endpoint);
00194 
00195     USBD_SetEpBufAddr(ep_hw_index, s_ep_buf_ind, maxPacket);
00196     s_ep_buf_ind += maxPacket;
00197     USBD_SET_MAX_PAYLOAD(ep_hw_index, maxPacket);
00198 
00199     switch (NU_EP2EPL(endpoint))
00200     {
00201     case 1:    case 2:
00202         ep_type = USB_EP_CFG_TYPE_INT;
00203         break;
00204 
00205     case 3:    case 4:
00206         ep_type = USB_EP_CFG_TYPE_ISO;
00207         break;
00208 
00209     default:
00210         ep_type = USB_EP_CFG_TYPE_BULK;
00211     }
00212     uint32_t ep_dir = (NU_EP_DIR(endpoint) == NU_EP_DIR_IN) ? USB_EP_CFG_DIR_IN : USB_EP_CFG_DIR_OUT;
00213     USBD_ConfigEp(ep_hw_index, NU_EP2EPL(endpoint), ep_type, ep_dir);
00214 
00215     /* Enable USB/EPX interrupt */
00216     // NOTE: Require USBD_GINTEN_EPAIE_Pos, USBD_GINTEN_EPBIE_Pos, ... USBD_GINTEN_EPLIE_Pos to be consecutive.
00217     USBD_ENABLE_USB_INT(USBD->GINTEN | USBD_GINTEN_USBIE_Msk |
00218                         USBD_GINTEN_CEPIE_Msk |
00219                         1 << (ep_hw_index + USBD_GINTEN_EPAIE_Pos));  // Added USB/EPX interrupt
00220 
00221     if (ep_dir == 0)
00222         USBD_ENABLE_EP_INT(ep_hw_index, USBD_EPINTEN_RXPKIEN_Msk);
00223     else
00224         USBD_ENABLE_EP_INT(ep_hw_index, USBD_EPINTEN_TXPKIEN_Msk);
00225     return true;
00226 }
00227 
00228 void USBHAL::EP0setup(uint8_t *buffer)
00229 {
00230     uint32_t sz;
00231     endpointReadResult(EP0OUT, buffer, &sz);
00232 }
00233 
00234 void USBHAL::EP0read(void)
00235 {
00236     if (s_setup.wLength && ! (s_setup.bmRequestType & 0x80))
00237     {
00238         // Control OUT
00239         USBD_ENABLE_CEP_INT(USBD_CEPINTEN_SETUPPKIEN_Msk | USBD_CEPINTEN_RXPKIEN_Msk);
00240     }
00241     else
00242     {
00243         // Status stage
00244         USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_STSDONEIF_Msk);
00245         USBD_SET_CEP_STATE(USB_CEPCTL_NAKCLR);
00246         USBD_ENABLE_CEP_INT(USBD_CEPINTEN_STSDONEIEN_Msk);
00247     }
00248 }
00249 
00250 void USBHAL::EP0readStage(void)
00251 {
00252     // N/A
00253 }
00254 
00255 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
00256 {
00257     uint32_t i;
00258     uint32_t ceprxcnt = USBD->CEPRXCNT;
00259     for (i = 0; i < ceprxcnt; i ++)
00260         *buffer ++ = USBD->CEPDAT_BYTE;
00261     return ceprxcnt;
00262 }
00263 
00264 void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
00265 {
00266     if (buffer && size)
00267     {
00268         g_usbd_CtrlInPointer = buffer;
00269         g_usbd_CtrlInSize = size;
00270         USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_INTKIF_Msk);
00271         USBD_ENABLE_CEP_INT(USBD_CEPINTEN_INTKIEN_Msk);
00272     }
00273     else
00274     {
00275         /* Status stage */
00276         s_ctrlin_packetsize = 0;
00277         USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_STSDONEIF_Msk);
00278         USBD_SET_CEP_STATE(USB_CEPCTL_NAKCLR);
00279         USBD_ENABLE_CEP_INT(USBD_CEPINTEN_STSDONEIEN_Msk);
00280     }
00281 }
00282 
00283 void USBHAL::EP0getWriteResult(void)
00284 {
00285     // N/A
00286 }
00287 
00288 void USBHAL::EP0stall(void)
00289 {
00290     stallEndpoint(EP0OUT);
00291 }
00292 
00293 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
00294 {
00295     return EP_PENDING;
00296 }
00297 
00298 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) //spcheng
00299 {
00300     if (endpoint == EP0OUT)
00301     {
00302         if (buffer) {
00303             *((uint16_t *) (buffer + 0)) = (uint16_t) USBD->SETUP1_0;
00304             *((uint16_t *) (buffer + 2)) = (uint16_t) USBD->SETUP3_2;
00305             *((uint16_t *) (buffer + 4)) = (uint16_t) USBD->SETUP5_4;
00306             *((uint16_t *) (buffer + 6)) = (uint16_t) USBD->SETUP7_6;
00307         }
00308 
00309         s_setup.bmRequestType = (uint8_t) (USBD->SETUP1_0 & 0xff);
00310         s_setup.bRequest = (int8_t) (USBD->SETUP1_0 >> 8) & 0xff;
00311         s_setup.wValue = (uint16_t) USBD->SETUP3_2;
00312         s_setup.wIndex = (uint16_t) USBD->SETUP5_4;
00313         s_setup.wLength = (uint16_t) USBD->SETUP7_6;
00314     }
00315     else
00316     {
00317         if (!(s_ep_compl & (1 << NU_EP2EPL(endpoint))))
00318         {
00319             while (1)
00320             {
00321                 if (!(USBD->DMACTL & USBD_DMACTL_DMAEN_Msk))
00322                     break;
00323                 else
00324                     if (!USBD_IS_ATTACHED())
00325                         break;
00326             }
00327             gEpReadCnt = USBD_GET_EP_DATA_COUNT(NU_EP2EPH(endpoint));
00328             if (gEpReadCnt == 0)
00329             {
00330                 *bytesRead = 0;
00331                 return EP_COMPLETED;
00332             }
00333             s_ep_compl |= (1 << NU_EP2EPL(endpoint));
00334             USBD_SET_DMA_LEN(gEpReadCnt);
00335             USBD_SET_DMA_ADDR((uint32_t)buffer);
00336             USBD_SET_DMA_WRITE(NU_EP2EPL(endpoint));
00337             USBD_ENABLE_DMA();
00338             return EP_PENDING;;
00339 
00340         }
00341         else
00342         {
00343             if ((USBD->DMACTL & USBD_DMACTL_DMAEN_Msk))
00344                 return EP_PENDING;;
00345 
00346             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_DMADONEIF_Msk);
00347             s_ep_compl &= ~(1 << NU_EP2EPL(endpoint));
00348             *bytesRead = gEpReadCnt;
00349         }
00350     }
00351     return EP_COMPLETED;
00352 }
00353 
00354 
00355 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer)
00356 {
00357     return 0;
00358 }
00359 
00360 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
00361 {
00362     uint32_t ep_logic_index = NU_EP2EPL(endpoint);
00363     if (ep_logic_index == 0)
00364         return EP_INVALID;
00365     else
00366     {
00367         uint32_t ep_hw_index = NU_EP2EPH(endpoint);
00368         uint32_t mps = USBD_GET_EP_MAX_PAYLOAD(ep_hw_index);
00369         if (size > mps) {
00370             return EP_INVALID;
00371         }
00372         if (size < mps)
00373             g_usbd_ShortPkt = 1;
00374         if (!(s_ep_compl & (1 << NU_EP2EPL(endpoint))))
00375         {
00376             s_ep_compl |= (1 << ep_logic_index);
00377 
00378             while (1)
00379             {
00380                 if (!(USBD->DMACTL & USBD_DMACTL_DMAEN_Msk))
00381                     break;
00382                 else
00383                     if (!USBD_IS_ATTACHED())
00384                         break;
00385             }
00386             USBD_SET_DMA_LEN(size);
00387             USBD_SET_DMA_ADDR((uint32_t)data);
00388             USBD_SET_DMA_READ(ep_logic_index);
00389             USBD_ENABLE_DMA();
00390         }
00391     }
00392     return EP_PENDING;
00393 }
00394 
00395 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
00396 {
00397     if (!(s_ep_compl & (1 << NU_EP2EPL(endpoint))))
00398         return EP_COMPLETED;
00399     else
00400     {
00401         if ((USBD_GET_EP_DATA_COUNT(NU_EP2EPH(endpoint))) == 0 && !(USBD->DMACTL & USBD_DMACTL_DMAEN_Msk))
00402         {
00403             s_ep_compl &= ~(s_ep_compl & (1 << NU_EP2EPL(endpoint)));
00404             return EP_COMPLETED;
00405         }
00406     }
00407     return EP_PENDING;
00408 }
00409 
00410 void USBHAL::stallEndpoint(uint8_t endpoint)
00411 {
00412     uint32_t ep_hw_index = NU_EP2EPH(endpoint);
00413     if (ep_hw_index >= NUMBER_OF_PHYSICAL_ENDPOINTS)
00414         return;
00415     USBD_SetStall(ep_hw_index);
00416 }
00417 
00418 void USBHAL::unstallEndpoint(uint8_t endpoint)
00419 {
00420     uint32_t ep_hw_index = NU_EP2EPH(endpoint);
00421     if (ep_hw_index >= NUMBER_OF_PHYSICAL_ENDPOINTS)
00422         return;
00423     USBD_ClearStall(ep_hw_index);
00424 }
00425 
00426 bool USBHAL::getEndpointStallState(uint8_t endpoint)
00427 {
00428     uint32_t ep_hw_index = NU_EP2EPH(endpoint);
00429     if (ep_hw_index >= NUMBER_OF_PHYSICAL_ENDPOINTS)
00430         return false;
00431     return USBD_GetStall(ep_hw_index) ? 1 : 0;
00432 }
00433 
00434 void USBHAL::_usbisr(void)
00435 {
00436     MBED_ASSERT(instance);
00437     instance->usbisr();
00438 }
00439 
00440 void USBHAL::usbisr(void)
00441 {
00442     uint32_t gintsts = USBD->GINTSTS & USBD->GINTEN;
00443     if (! gintsts)
00444         return;
00445 
00446     if (gintsts & USBD_GINTSTS_USBIF_Msk)
00447     {
00448         uint32_t busintsts = USBD->BUSINTSTS & USBD->BUSINTEN;
00449 
00450         /* SOF */
00451         if (busintsts & USBD_BUSINTSTS_SOFIF_Msk)
00452         {
00453             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_SOFIF_Msk);
00454             // TODO
00455             SOF(USBD->FRAMECNT >> 3);
00456         }
00457 
00458         /* Reset */
00459         if (busintsts & USBD_BUSINTSTS_RSTIF_Msk)
00460         {
00461             connect();
00462             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_RSTIF_Msk);
00463             USBD_CLR_CEP_INT_FLAG(0x1ffc);
00464         }
00465 
00466         /* Resume */
00467         if (busintsts & USBD_BUSINTSTS_RESUMEIF_Msk)
00468         {
00469             USBD_ENABLE_BUS_INT(USBD_BUSINTEN_RSTIEN_Msk|USBD_BUSINTEN_SUSPENDIEN_Msk | USBD_BUSINTEN_SOFIEN_Msk | USBD_BUSINTEN_SOFIEN_Msk);
00470             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_RESUMEIF_Msk);
00471         }
00472 
00473         /* Suspend */
00474         if (busintsts & USBD_BUSINTSTS_SUSPENDIF_Msk)
00475         {
00476             USBD_ENABLE_BUS_INT(USBD_BUSINTEN_RSTIEN_Msk | USBD_BUSINTEN_RESUMEIEN_Msk |USBD_BUSINTEN_SOFIEN_Msk);
00477             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_SUSPENDIF_Msk);
00478         }
00479 
00480         /* High-speed */
00481         if (busintsts & USBD_BUSINTSTS_HISPDIF_Msk)
00482         {
00483             USBD_ENABLE_CEP_INT(USBD_CEPINTEN_SETUPPKIEN_Msk);
00484             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_HISPDIF_Msk);
00485         }
00486 
00487         /* DMA */
00488         if (busintsts & USBD_BUSINTSTS_DMADONEIF_Msk)
00489         {
00490             if (USBD->DMACTL & 0x10) /* IN - Read */
00491             {
00492                 if (g_usbd_ShortPkt)
00493                 {
00494                     uint32_t ep_hw_index = NU_EPL2EPH((USBD->DMACTL & 0xF));
00495                     USBD_SET_EP_SHORT_PACKET(ep_hw_index);
00496                     g_usbd_ShortPkt = 0;
00497                 }
00498             }
00499             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_DMADONEIF_Msk);
00500         }
00501 
00502         /* PHY clock available */
00503         if (busintsts & USBD_BUSINTSTS_PHYCLKVLDIF_Msk)
00504         {
00505             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_PHYCLKVLDIF_Msk);
00506         }
00507 
00508         /* VBUS plug-in */
00509         if (busintsts & USBD_BUSINTSTS_VBUSDETIF_Msk)
00510         {
00511             if (USBD_IS_ATTACHED())
00512             {
00513                 // USB plug-in
00514                 USBD_ENABLE_USB();
00515             }
00516             else
00517             {
00518                 // USB unplug-out
00519                 USBD_DISABLE_USB();
00520             }
00521             USBD_CLR_BUS_INT_FLAG(USBD_BUSINTSTS_VBUSDETIF_Msk);
00522         }
00523     }
00524 
00525     /* CEP interrupts */
00526     if (gintsts & USBD_GINTSTS_CEPIF_Msk)
00527     {
00528         uint32_t cepintsts =  USBD->CEPINTSTS & USBD->CEPINTEN;
00529 
00530         /* SETUP token packet */
00531         if (cepintsts & USBD_CEPINTSTS_SETUPTKIF_Msk)
00532         {
00533             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_SETUPTKIF_Msk);
00534             return;
00535         }
00536 
00537         /* SETUP transaction */
00538         if (cepintsts & USBD_CEPINTSTS_SETUPPKIF_Msk)
00539         {
00540             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_SETUPPKIF_Msk);
00541             EP0setupCallback();
00542             return;
00543         }
00544 
00545         /* OUT token packet */
00546         if (cepintsts & USBD_CEPINTSTS_OUTTKIF_Msk)
00547         {
00548             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_OUTTKIF_Msk);
00549             USBD_ENABLE_CEP_INT(USBD_CEPINTEN_STSDONEIEN_Msk);
00550             return;
00551         }
00552 
00553         /* IN token packet */
00554         if (cepintsts & USBD_CEPINTSTS_INTKIF_Msk)
00555         {
00556             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_INTKIF_Msk);
00557             if (!(cepintsts & USBD_CEPINTSTS_STSDONEIF_Msk))
00558             {
00559                 USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_TXPKIF_Msk);
00560                 USBD_ENABLE_CEP_INT(USBD_CEPINTEN_TXPKIEN_Msk);
00561                 USBD_CtrlInput();
00562             }
00563             else
00564             {
00565                 USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_TXPKIF_Msk);
00566                 USBD_ENABLE_CEP_INT(USBD_CEPINTEN_TXPKIEN_Msk|USBD_CEPINTEN_STSDONEIEN_Msk);
00567             }
00568             return;
00569         }
00570 
00571         /* PING packet */
00572         if (cepintsts & USBD_CEPINTSTS_PINGIF_Msk)
00573         {
00574             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_PINGIF_Msk);
00575             return;
00576         }
00577 
00578         /* IN transaction */
00579         if (cepintsts & USBD_CEPINTSTS_TXPKIF_Msk)
00580         {
00581             EP0in();
00582             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_TXPKIF_Msk);
00583             return;
00584         }
00585 
00586         /* OUT transaction */
00587         if (cepintsts & USBD_CEPINTSTS_RXPKIF_Msk)
00588         {
00589             EP0out();
00590             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_RXPKIF_Msk);
00591             return;
00592         }
00593 
00594         /* NAK handshake packet */
00595         if (cepintsts & USBD_CEPINTSTS_NAKIF_Msk)
00596         {
00597             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_NAKIF_Msk);
00598             return;
00599         }
00600 
00601         /* STALL handshake packet */
00602         if (cepintsts & USBD_CEPINTSTS_STALLIF_Msk)
00603         {
00604             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_STALLIF_Msk);
00605             return;
00606         }
00607 
00608         /* ERR special packet */
00609         if (cepintsts & USBD_CEPINTSTS_ERRIF_Msk)
00610         {
00611             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_ERRIF_Msk);
00612             return;
00613         }
00614 
00615         /* Status stage transaction */
00616         if (cepintsts & USBD_CEPINTSTS_STSDONEIF_Msk)
00617         {
00618             if (s_usb_addr)
00619             {
00620                 USBD_SET_ADDR(s_usb_addr);
00621                 s_usb_addr = 0;
00622             }
00623             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_STSDONEIF_Msk);
00624             USBD_ENABLE_CEP_INT(USBD_CEPINTEN_SETUPPKIEN_Msk);
00625             return;
00626         }
00627 
00628         /* Buffer Full */
00629         if (cepintsts & USBD_CEPINTSTS_BUFFULLIF_Msk)
00630         {
00631             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_BUFFULLIF_Msk);
00632             return;
00633         }
00634 
00635         /* Buffer Empty */
00636         if (cepintsts & USBD_CEPINTSTS_BUFEMPTYIF_Msk)
00637         {
00638             USBD_CLR_CEP_INT_FLAG(USBD_CEPINTSTS_BUFEMPTYIF_Msk);
00639             return;
00640         }
00641     }
00642     /* EPA, EPB, EPC, ... EPL interrupts */
00643     uint32_t gintsts_epx = gintsts >> 2;
00644     uint32_t ep_hw_index = 0;
00645     while (gintsts_epx) {
00646         if (gintsts_epx & 0x01)
00647         {
00648             uint32_t epxintsts = USBD_GET_EP_INT_FLAG(ep_hw_index) & USBD_GET_EP_INT_EN(ep_hw_index);
00649 
00650             USBD_CLR_EP_INT_FLAG(ep_hw_index, epxintsts);
00651 
00652             /* Buffer Full */
00653             if (epxintsts & USBD_EPINTSTS_BUFFULLIF_Msk)
00654             {
00655             }
00656 
00657             /* Buffer Empty */
00658             if (epxintsts & USBD_EPINTSTS_BUFEMPTYIF_Msk)
00659             {
00660             }
00661 
00662             /* Short Packet Transferred */
00663             if (epxintsts & USBD_EPINTSTS_SHORTTXIF_Msk)
00664             {
00665             }
00666 
00667             /* Data Packet Transmitted */
00668             if (epxintsts & USBD_EPINTSTS_TXPKIF_Msk)
00669             {
00670                 s_ep_compl &= ~(1 << (NU_EPH2EPL(ep_hw_index)));
00671                 if ((instance->*(epCallback[ep_hw_index]))())
00672                 {
00673                 }
00674             }
00675 
00676             /* Data Packet Received */
00677             if (epxintsts & USBD_EPINTSTS_RXPKIF_Msk)
00678             {
00679                 if ((instance->*(epCallback[ep_hw_index]))())
00680                 {
00681 
00682                 }
00683             }
00684 
00685             /* OUT token packet */
00686             if (epxintsts & USBD_EPINTSTS_OUTTKIF_Msk)
00687             {
00688             }
00689 
00690             /* IN token packet */
00691             if (epxintsts & USBD_EPINTSTS_INTKIF_Msk)
00692             {
00693             }
00694 
00695             /* PING packet */
00696             if (epxintsts & USBD_EPINTSTS_PINGIF_Msk)
00697             {
00698             }
00699 
00700             /* NAK handshake packet sent to Host */
00701             if (epxintsts & USBD_EPINTSTS_NAKIF_Msk)
00702             {
00703             }
00704 
00705             /* STALL handshake packet sent to Host */
00706             if (epxintsts & USBD_EPINTSTS_STALLIF_Msk)
00707             {
00708             }
00709 
00710             /* NYET handshake packet sent to Host */
00711             if (epxintsts & USBD_EPINTSTS_NYETIF_Msk)
00712             {
00713             }
00714 
00715             /* ERR packet sent to Host */
00716             if (epxintsts & USBD_EPINTSTS_ERRIF_Msk)
00717             {
00718             }
00719 
00720             /* Bulk Out Short Packet Received */
00721             if (epxintsts & USBD_EPINTSTS_SHORTRXIF_Msk)
00722             {
00723             }
00724         }
00725         gintsts_epx = gintsts_epx >> 1;
00726         ep_hw_index++;
00727     }
00728 }
00729 #endif
00730