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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_usart.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /**
group-onsemi 0:098463de4c5d 2 ******************************************************************************
group-onsemi 0:098463de4c5d 3 * @file stm32l1xx_ll_usart.h
group-onsemi 0:098463de4c5d 4 * @author MCD Application Team
group-onsemi 0:098463de4c5d 5 * @version V1.2.0
group-onsemi 0:098463de4c5d 6 * @date 01-July-2016
group-onsemi 0:098463de4c5d 7 * @brief Header file of USART LL module.
group-onsemi 0:098463de4c5d 8 ******************************************************************************
group-onsemi 0:098463de4c5d 9 * @attention
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
group-onsemi 0:098463de4c5d 12 *
group-onsemi 0:098463de4c5d 13 * Redistribution and use in source and binary forms, with or without modification,
group-onsemi 0:098463de4c5d 14 * are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 15 * 1. Redistributions of source code must retain the above copyright notice,
group-onsemi 0:098463de4c5d 16 * this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
group-onsemi 0:098463de4c5d 18 * this list of conditions and the following disclaimer in the documentation
group-onsemi 0:098463de4c5d 19 * and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
group-onsemi 0:098463de4c5d 21 * may be used to endorse or promote products derived from this software
group-onsemi 0:098463de4c5d 22 * without specific prior written permission.
group-onsemi 0:098463de4c5d 23 *
group-onsemi 0:098463de4c5d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
group-onsemi 0:098463de4c5d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
group-onsemi 0:098463de4c5d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
group-onsemi 0:098463de4c5d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
group-onsemi 0:098463de4c5d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
group-onsemi 0:098463de4c5d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
group-onsemi 0:098463de4c5d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 34 *
group-onsemi 0:098463de4c5d 35 ******************************************************************************
group-onsemi 0:098463de4c5d 36 */
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38 /* Define to prevent recursive inclusion -------------------------------------*/
group-onsemi 0:098463de4c5d 39 #ifndef __STM32L1xx_LL_USART_H
group-onsemi 0:098463de4c5d 40 #define __STM32L1xx_LL_USART_H
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 43 extern "C" {
group-onsemi 0:098463de4c5d 44 #endif
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 /* Includes ------------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 47 #include "stm32l1xx.h"
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 /** @addtogroup STM32L1xx_LL_Driver
group-onsemi 0:098463de4c5d 50 * @{
group-onsemi 0:098463de4c5d 51 */
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
group-onsemi 0:098463de4c5d 54
group-onsemi 0:098463de4c5d 55 /** @defgroup USART_LL USART
group-onsemi 0:098463de4c5d 56 * @{
group-onsemi 0:098463de4c5d 57 */
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 /* Private types -------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 60 /* Private variables ---------------------------------------------------------*/
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /* Private constants ---------------------------------------------------------*/
group-onsemi 0:098463de4c5d 63 /** @defgroup USART_LL_Private_Constants USART Private Constants
group-onsemi 0:098463de4c5d 64 * @{
group-onsemi 0:098463de4c5d 65 */
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 /* Defines used for the bit position in the register and perform offsets*/
group-onsemi 0:098463de4c5d 68 #define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos
group-onsemi 0:098463de4c5d 69 /**
group-onsemi 0:098463de4c5d 70 * @}
group-onsemi 0:098463de4c5d 71 */
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 /* Private macros ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 74 #if defined(USE_FULL_LL_DRIVER)
group-onsemi 0:098463de4c5d 75 /** @defgroup USART_LL_Private_Macros USART Private Macros
group-onsemi 0:098463de4c5d 76 * @{
group-onsemi 0:098463de4c5d 77 */
group-onsemi 0:098463de4c5d 78 /**
group-onsemi 0:098463de4c5d 79 * @}
group-onsemi 0:098463de4c5d 80 */
group-onsemi 0:098463de4c5d 81 #endif /*USE_FULL_LL_DRIVER*/
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 /* Exported types ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 84 #if defined(USE_FULL_LL_DRIVER)
group-onsemi 0:098463de4c5d 85 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
group-onsemi 0:098463de4c5d 86 * @{
group-onsemi 0:098463de4c5d 87 */
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 /**
group-onsemi 0:098463de4c5d 90 * @brief LL USART Init Structure definition
group-onsemi 0:098463de4c5d 91 */
group-onsemi 0:098463de4c5d 92 typedef struct
group-onsemi 0:098463de4c5d 93 {
group-onsemi 0:098463de4c5d 94 uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
group-onsemi 0:098463de4c5d 99 This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
group-onsemi 0:098463de4c5d 100
group-onsemi 0:098463de4c5d 101 This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
group-onsemi 0:098463de4c5d 104 This parameter can be a value of @ref USART_LL_EC_STOPBITS.
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 uint32_t Parity; /*!< Specifies the parity mode.
group-onsemi 0:098463de4c5d 109 This parameter can be a value of @ref USART_LL_EC_PARITY.
group-onsemi 0:098463de4c5d 110
group-onsemi 0:098463de4c5d 111 This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
group-onsemi 0:098463de4c5d 112
group-onsemi 0:098463de4c5d 113 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
group-onsemi 0:098463de4c5d 114 This parameter can be a value of @ref USART_LL_EC_DIRECTION.
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
group-onsemi 0:098463de4c5d 117
group-onsemi 0:098463de4c5d 118 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
group-onsemi 0:098463de4c5d 119 This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
group-onsemi 0:098463de4c5d 122
group-onsemi 0:098463de4c5d 123 uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
group-onsemi 0:098463de4c5d 124 This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126 This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 } LL_USART_InitTypeDef;
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 /**
group-onsemi 0:098463de4c5d 131 * @brief LL USART Clock Init Structure definition
group-onsemi 0:098463de4c5d 132 */
group-onsemi 0:098463de4c5d 133 typedef struct
group-onsemi 0:098463de4c5d 134 {
group-onsemi 0:098463de4c5d 135 uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
group-onsemi 0:098463de4c5d 136 This parameter can be a value of @ref USART_LL_EC_CLOCK.
group-onsemi 0:098463de4c5d 137
group-onsemi 0:098463de4c5d 138 USART HW configuration can be modified afterwards using unitary functions
group-onsemi 0:098463de4c5d 139 @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
group-onsemi 0:098463de4c5d 140 For more details, refer to description of this function. */
group-onsemi 0:098463de4c5d 141
group-onsemi 0:098463de4c5d 142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
group-onsemi 0:098463de4c5d 143 This parameter can be a value of @ref USART_LL_EC_POLARITY.
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
group-onsemi 0:098463de4c5d 146 For more details, refer to description of this function. */
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
group-onsemi 0:098463de4c5d 149 This parameter can be a value of @ref USART_LL_EC_PHASE.
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
group-onsemi 0:098463de4c5d 152 For more details, refer to description of this function. */
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
group-onsemi 0:098463de4c5d 155 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
group-onsemi 0:098463de4c5d 156 This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
group-onsemi 0:098463de4c5d 157
group-onsemi 0:098463de4c5d 158 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
group-onsemi 0:098463de4c5d 159 For more details, refer to description of this function. */
group-onsemi 0:098463de4c5d 160
group-onsemi 0:098463de4c5d 161 } LL_USART_ClockInitTypeDef;
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 /**
group-onsemi 0:098463de4c5d 164 * @}
group-onsemi 0:098463de4c5d 165 */
group-onsemi 0:098463de4c5d 166 #endif /* USE_FULL_LL_DRIVER */
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 /* Exported constants --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 169 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
group-onsemi 0:098463de4c5d 170 * @{
group-onsemi 0:098463de4c5d 171 */
group-onsemi 0:098463de4c5d 172
group-onsemi 0:098463de4c5d 173 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
group-onsemi 0:098463de4c5d 174 * @brief Flags defines which can be used with LL_USART_ReadReg function
group-onsemi 0:098463de4c5d 175 * @{
group-onsemi 0:098463de4c5d 176 */
group-onsemi 0:098463de4c5d 177 #define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
group-onsemi 0:098463de4c5d 178 #define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
group-onsemi 0:098463de4c5d 179 #define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
group-onsemi 0:098463de4c5d 180 #define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
group-onsemi 0:098463de4c5d 181 #define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
group-onsemi 0:098463de4c5d 182 #define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
group-onsemi 0:098463de4c5d 183 #define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
group-onsemi 0:098463de4c5d 184 #define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
group-onsemi 0:098463de4c5d 185 #define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
group-onsemi 0:098463de4c5d 186 #define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
group-onsemi 0:098463de4c5d 187 /**
group-onsemi 0:098463de4c5d 188 * @}
group-onsemi 0:098463de4c5d 189 */
group-onsemi 0:098463de4c5d 190
group-onsemi 0:098463de4c5d 191 /** @defgroup USART_LL_EC_IT IT Defines
group-onsemi 0:098463de4c5d 192 * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
group-onsemi 0:098463de4c5d 193 * @{
group-onsemi 0:098463de4c5d 194 */
group-onsemi 0:098463de4c5d 195 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
group-onsemi 0:098463de4c5d 196 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
group-onsemi 0:098463de4c5d 197 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
group-onsemi 0:098463de4c5d 198 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
group-onsemi 0:098463de4c5d 199 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
group-onsemi 0:098463de4c5d 200 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
group-onsemi 0:098463de4c5d 201 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
group-onsemi 0:098463de4c5d 202 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
group-onsemi 0:098463de4c5d 203 /**
group-onsemi 0:098463de4c5d 204 * @}
group-onsemi 0:098463de4c5d 205 */
group-onsemi 0:098463de4c5d 206
group-onsemi 0:098463de4c5d 207 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
group-onsemi 0:098463de4c5d 208 * @{
group-onsemi 0:098463de4c5d 209 */
group-onsemi 0:098463de4c5d 210 #define LL_USART_DIRECTION_NONE (uint32_t)0x00000000U /*!< Transmitter and Receiver are disabled */
group-onsemi 0:098463de4c5d 211 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
group-onsemi 0:098463de4c5d 212 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
group-onsemi 0:098463de4c5d 213 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
group-onsemi 0:098463de4c5d 214 /**
group-onsemi 0:098463de4c5d 215 * @}
group-onsemi 0:098463de4c5d 216 */
group-onsemi 0:098463de4c5d 217
group-onsemi 0:098463de4c5d 218 /** @defgroup USART_LL_EC_PARITY Parity Control
group-onsemi 0:098463de4c5d 219 * @{
group-onsemi 0:098463de4c5d 220 */
group-onsemi 0:098463de4c5d 221 #define LL_USART_PARITY_NONE (uint32_t)0x00000000U /*!< Parity control disabled */
group-onsemi 0:098463de4c5d 222 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
group-onsemi 0:098463de4c5d 223 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
group-onsemi 0:098463de4c5d 224 /**
group-onsemi 0:098463de4c5d 225 * @}
group-onsemi 0:098463de4c5d 226 */
group-onsemi 0:098463de4c5d 227
group-onsemi 0:098463de4c5d 228 /** @defgroup USART_LL_EC_WAKEUP Wakeup
group-onsemi 0:098463de4c5d 229 * @{
group-onsemi 0:098463de4c5d 230 */
group-onsemi 0:098463de4c5d 231 #define LL_USART_WAKEUP_IDLELINE (uint32_t)0x00000000U /*!< USART wake up from Mute mode on Idle Line */
group-onsemi 0:098463de4c5d 232 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
group-onsemi 0:098463de4c5d 233 /**
group-onsemi 0:098463de4c5d 234 * @}
group-onsemi 0:098463de4c5d 235 */
group-onsemi 0:098463de4c5d 236
group-onsemi 0:098463de4c5d 237 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
group-onsemi 0:098463de4c5d 238 * @{
group-onsemi 0:098463de4c5d 239 */
group-onsemi 0:098463de4c5d 240 #define LL_USART_DATAWIDTH_8B (uint32_t)0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
group-onsemi 0:098463de4c5d 241 #define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
group-onsemi 0:098463de4c5d 242 /**
group-onsemi 0:098463de4c5d 243 * @}
group-onsemi 0:098463de4c5d 244 */
group-onsemi 0:098463de4c5d 245
group-onsemi 0:098463de4c5d 246 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
group-onsemi 0:098463de4c5d 247 * @{
group-onsemi 0:098463de4c5d 248 */
group-onsemi 0:098463de4c5d 249 #define LL_USART_OVERSAMPLING_16 (uint32_t)0x00000000U /*!< Oversampling by 16 */
group-onsemi 0:098463de4c5d 250 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
group-onsemi 0:098463de4c5d 251 /**
group-onsemi 0:098463de4c5d 252 * @}
group-onsemi 0:098463de4c5d 253 */
group-onsemi 0:098463de4c5d 254
group-onsemi 0:098463de4c5d 255 #if defined(USE_FULL_LL_DRIVER)
group-onsemi 0:098463de4c5d 256 /** @defgroup USART_LL_EC_CLOCK Clock Signal
group-onsemi 0:098463de4c5d 257 * @{
group-onsemi 0:098463de4c5d 258 */
group-onsemi 0:098463de4c5d 259
group-onsemi 0:098463de4c5d 260 #define LL_USART_CLOCK_DISABLE (uint32_t)0x00000000U /*!< Clock signal not provided */
group-onsemi 0:098463de4c5d 261 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
group-onsemi 0:098463de4c5d 262 /**
group-onsemi 0:098463de4c5d 263 * @}
group-onsemi 0:098463de4c5d 264 */
group-onsemi 0:098463de4c5d 265 #endif /*USE_FULL_LL_DRIVER*/
group-onsemi 0:098463de4c5d 266
group-onsemi 0:098463de4c5d 267 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
group-onsemi 0:098463de4c5d 268 * @{
group-onsemi 0:098463de4c5d 269 */
group-onsemi 0:098463de4c5d 270 #define LL_USART_LASTCLKPULSE_NO_OUTPUT (uint32_t)0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
group-onsemi 0:098463de4c5d 271 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
group-onsemi 0:098463de4c5d 272 /**
group-onsemi 0:098463de4c5d 273 * @}
group-onsemi 0:098463de4c5d 274 */
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276 /** @defgroup USART_LL_EC_PHASE Clock Phase
group-onsemi 0:098463de4c5d 277 * @{
group-onsemi 0:098463de4c5d 278 */
group-onsemi 0:098463de4c5d 279 #define LL_USART_PHASE_1EDGE (uint32_t)0x00000000U /*!< The first clock transition is the first data capture edge */
group-onsemi 0:098463de4c5d 280 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
group-onsemi 0:098463de4c5d 281 /**
group-onsemi 0:098463de4c5d 282 * @}
group-onsemi 0:098463de4c5d 283 */
group-onsemi 0:098463de4c5d 284
group-onsemi 0:098463de4c5d 285 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
group-onsemi 0:098463de4c5d 286 * @{
group-onsemi 0:098463de4c5d 287 */
group-onsemi 0:098463de4c5d 288 #define LL_USART_POLARITY_LOW (uint32_t)0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
group-onsemi 0:098463de4c5d 289 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
group-onsemi 0:098463de4c5d 290 /**
group-onsemi 0:098463de4c5d 291 * @}
group-onsemi 0:098463de4c5d 292 */
group-onsemi 0:098463de4c5d 293
group-onsemi 0:098463de4c5d 294 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
group-onsemi 0:098463de4c5d 295 * @{
group-onsemi 0:098463de4c5d 296 */
group-onsemi 0:098463de4c5d 297 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
group-onsemi 0:098463de4c5d 298 #define LL_USART_STOPBITS_1 (uint32_t)0x00000000U /*!< 1 stop bit */
group-onsemi 0:098463de4c5d 299 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
group-onsemi 0:098463de4c5d 300 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
group-onsemi 0:098463de4c5d 301 /**
group-onsemi 0:098463de4c5d 302 * @}
group-onsemi 0:098463de4c5d 303 */
group-onsemi 0:098463de4c5d 304
group-onsemi 0:098463de4c5d 305 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
group-onsemi 0:098463de4c5d 306 * @{
group-onsemi 0:098463de4c5d 307 */
group-onsemi 0:098463de4c5d 308 #define LL_USART_HWCONTROL_NONE (uint32_t)0x00000000U /*!< CTS and RTS hardware flow control disabled */
group-onsemi 0:098463de4c5d 309 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
group-onsemi 0:098463de4c5d 310 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
group-onsemi 0:098463de4c5d 311 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
group-onsemi 0:098463de4c5d 312 /**
group-onsemi 0:098463de4c5d 313 * @}
group-onsemi 0:098463de4c5d 314 */
group-onsemi 0:098463de4c5d 315
group-onsemi 0:098463de4c5d 316 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
group-onsemi 0:098463de4c5d 317 * @{
group-onsemi 0:098463de4c5d 318 */
group-onsemi 0:098463de4c5d 319 #define LL_USART_IRDA_POWER_NORMAL (uint32_t)0x00000000U /*!< IrDA normal power mode */
group-onsemi 0:098463de4c5d 320 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
group-onsemi 0:098463de4c5d 321 /**
group-onsemi 0:098463de4c5d 322 * @}
group-onsemi 0:098463de4c5d 323 */
group-onsemi 0:098463de4c5d 324
group-onsemi 0:098463de4c5d 325 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
group-onsemi 0:098463de4c5d 326 * @{
group-onsemi 0:098463de4c5d 327 */
group-onsemi 0:098463de4c5d 328 #define LL_USART_LINBREAK_DETECT_10B (uint32_t)0x00000000U /*!< 10-bit break detection method selected */
group-onsemi 0:098463de4c5d 329 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
group-onsemi 0:098463de4c5d 330 /**
group-onsemi 0:098463de4c5d 331 * @}
group-onsemi 0:098463de4c5d 332 */
group-onsemi 0:098463de4c5d 333
group-onsemi 0:098463de4c5d 334 /**
group-onsemi 0:098463de4c5d 335 * @}
group-onsemi 0:098463de4c5d 336 */
group-onsemi 0:098463de4c5d 337
group-onsemi 0:098463de4c5d 338 /* Exported macro ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 339 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
group-onsemi 0:098463de4c5d 340 * @{
group-onsemi 0:098463de4c5d 341 */
group-onsemi 0:098463de4c5d 342
group-onsemi 0:098463de4c5d 343 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
group-onsemi 0:098463de4c5d 344 * @{
group-onsemi 0:098463de4c5d 345 */
group-onsemi 0:098463de4c5d 346
group-onsemi 0:098463de4c5d 347 /**
group-onsemi 0:098463de4c5d 348 * @brief Write a value in USART register
group-onsemi 0:098463de4c5d 349 * @param __INSTANCE__ USART Instance
group-onsemi 0:098463de4c5d 350 * @param __REG__ Register to be written
group-onsemi 0:098463de4c5d 351 * @param __VALUE__ Value to be written in the register
group-onsemi 0:098463de4c5d 352 * @retval None
group-onsemi 0:098463de4c5d 353 */
group-onsemi 0:098463de4c5d 354 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
group-onsemi 0:098463de4c5d 355
group-onsemi 0:098463de4c5d 356 /**
group-onsemi 0:098463de4c5d 357 * @brief Read a value in USART register
group-onsemi 0:098463de4c5d 358 * @param __INSTANCE__ USART Instance
group-onsemi 0:098463de4c5d 359 * @param __REG__ Register to be read
group-onsemi 0:098463de4c5d 360 * @retval Register value
group-onsemi 0:098463de4c5d 361 */
group-onsemi 0:098463de4c5d 362 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
group-onsemi 0:098463de4c5d 363 /**
group-onsemi 0:098463de4c5d 364 * @}
group-onsemi 0:098463de4c5d 365 */
group-onsemi 0:098463de4c5d 366
group-onsemi 0:098463de4c5d 367 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
group-onsemi 0:098463de4c5d 368 * @{
group-onsemi 0:098463de4c5d 369 */
group-onsemi 0:098463de4c5d 370
group-onsemi 0:098463de4c5d 371 /**
group-onsemi 0:098463de4c5d 372 * @brief Compute USARTDIV value according to Peripheral Clock and
group-onsemi 0:098463de4c5d 373 * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
group-onsemi 0:098463de4c5d 374 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
group-onsemi 0:098463de4c5d 375 * @param __BAUDRATE__ Baud rate value to achieve
group-onsemi 0:098463de4c5d 376 * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
group-onsemi 0:098463de4c5d 377 */
group-onsemi 0:098463de4c5d 378 #define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
group-onsemi 0:098463de4c5d 379 #define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
group-onsemi 0:098463de4c5d 380 #define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
group-onsemi 0:098463de4c5d 381 /* UART BRR = mantissa + overflow + fraction
group-onsemi 0:098463de4c5d 382 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
group-onsemi 0:098463de4c5d 383 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
group-onsemi 0:098463de4c5d 384 ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
group-onsemi 0:098463de4c5d 385 (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
group-onsemi 0:098463de4c5d 386
group-onsemi 0:098463de4c5d 387 /**
group-onsemi 0:098463de4c5d 388 * @brief Compute USARTDIV value according to Peripheral Clock and
group-onsemi 0:098463de4c5d 389 * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
group-onsemi 0:098463de4c5d 390 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
group-onsemi 0:098463de4c5d 391 * @param __BAUDRATE__ Baud rate value to achieve
group-onsemi 0:098463de4c5d 392 * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
group-onsemi 0:098463de4c5d 393 */
group-onsemi 0:098463de4c5d 394 #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
group-onsemi 0:098463de4c5d 395 #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
group-onsemi 0:098463de4c5d 396 #define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)
group-onsemi 0:098463de4c5d 397 /* USART BRR = mantissa + overflow + fraction
group-onsemi 0:098463de4c5d 398 = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
group-onsemi 0:098463de4c5d 399 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
group-onsemi 0:098463de4c5d 400 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
group-onsemi 0:098463de4c5d 401 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
group-onsemi 0:098463de4c5d 402
group-onsemi 0:098463de4c5d 403 /**
group-onsemi 0:098463de4c5d 404 * @}
group-onsemi 0:098463de4c5d 405 */
group-onsemi 0:098463de4c5d 406
group-onsemi 0:098463de4c5d 407 /**
group-onsemi 0:098463de4c5d 408 * @}
group-onsemi 0:098463de4c5d 409 */
group-onsemi 0:098463de4c5d 410
group-onsemi 0:098463de4c5d 411 /* Exported functions --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 412
group-onsemi 0:098463de4c5d 413 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
group-onsemi 0:098463de4c5d 414 * @{
group-onsemi 0:098463de4c5d 415 */
group-onsemi 0:098463de4c5d 416
group-onsemi 0:098463de4c5d 417 /** @defgroup USART_LL_EF_Configuration Configuration functions
group-onsemi 0:098463de4c5d 418 * @{
group-onsemi 0:098463de4c5d 419 */
group-onsemi 0:098463de4c5d 420
group-onsemi 0:098463de4c5d 421 /**
group-onsemi 0:098463de4c5d 422 * @brief USART Enable
group-onsemi 0:098463de4c5d 423 * @rmtoll CR1 UE LL_USART_Enable
group-onsemi 0:098463de4c5d 424 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 425 * @retval None
group-onsemi 0:098463de4c5d 426 */
group-onsemi 0:098463de4c5d 427 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 428 {
group-onsemi 0:098463de4c5d 429 SET_BIT(USARTx->CR1, USART_CR1_UE);
group-onsemi 0:098463de4c5d 430 }
group-onsemi 0:098463de4c5d 431
group-onsemi 0:098463de4c5d 432 /**
group-onsemi 0:098463de4c5d 433 * @brief USART Disable (all USART prescalers and outputs are disabled)
group-onsemi 0:098463de4c5d 434 * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
group-onsemi 0:098463de4c5d 435 * and current operations are discarded. The configuration of the USART is kept, but all the status
group-onsemi 0:098463de4c5d 436 * flags, in the USARTx_SR are set to their default values.
group-onsemi 0:098463de4c5d 437 * @rmtoll CR1 UE LL_USART_Disable
group-onsemi 0:098463de4c5d 438 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 439 * @retval None
group-onsemi 0:098463de4c5d 440 */
group-onsemi 0:098463de4c5d 441 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 442 {
group-onsemi 0:098463de4c5d 443 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
group-onsemi 0:098463de4c5d 444 }
group-onsemi 0:098463de4c5d 445
group-onsemi 0:098463de4c5d 446 /**
group-onsemi 0:098463de4c5d 447 * @brief Indicate if USART is enabled
group-onsemi 0:098463de4c5d 448 * @rmtoll CR1 UE LL_USART_IsEnabled
group-onsemi 0:098463de4c5d 449 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 450 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 451 */
group-onsemi 0:098463de4c5d 452 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 453 {
group-onsemi 0:098463de4c5d 454 return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
group-onsemi 0:098463de4c5d 455 }
group-onsemi 0:098463de4c5d 456
group-onsemi 0:098463de4c5d 457 /**
group-onsemi 0:098463de4c5d 458 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
group-onsemi 0:098463de4c5d 459 * @rmtoll CR1 RE LL_USART_EnableDirectionRx
group-onsemi 0:098463de4c5d 460 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 461 * @retval None
group-onsemi 0:098463de4c5d 462 */
group-onsemi 0:098463de4c5d 463 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 464 {
group-onsemi 0:098463de4c5d 465 SET_BIT(USARTx->CR1, USART_CR1_RE);
group-onsemi 0:098463de4c5d 466 }
group-onsemi 0:098463de4c5d 467
group-onsemi 0:098463de4c5d 468 /**
group-onsemi 0:098463de4c5d 469 * @brief Receiver Disable
group-onsemi 0:098463de4c5d 470 * @rmtoll CR1 RE LL_USART_DisableDirectionRx
group-onsemi 0:098463de4c5d 471 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 472 * @retval None
group-onsemi 0:098463de4c5d 473 */
group-onsemi 0:098463de4c5d 474 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 475 {
group-onsemi 0:098463de4c5d 476 CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
group-onsemi 0:098463de4c5d 477 }
group-onsemi 0:098463de4c5d 478
group-onsemi 0:098463de4c5d 479 /**
group-onsemi 0:098463de4c5d 480 * @brief Transmitter Enable
group-onsemi 0:098463de4c5d 481 * @rmtoll CR1 TE LL_USART_EnableDirectionTx
group-onsemi 0:098463de4c5d 482 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 483 * @retval None
group-onsemi 0:098463de4c5d 484 */
group-onsemi 0:098463de4c5d 485 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 486 {
group-onsemi 0:098463de4c5d 487 SET_BIT(USARTx->CR1, USART_CR1_TE);
group-onsemi 0:098463de4c5d 488 }
group-onsemi 0:098463de4c5d 489
group-onsemi 0:098463de4c5d 490 /**
group-onsemi 0:098463de4c5d 491 * @brief Transmitter Disable
group-onsemi 0:098463de4c5d 492 * @rmtoll CR1 TE LL_USART_DisableDirectionTx
group-onsemi 0:098463de4c5d 493 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 494 * @retval None
group-onsemi 0:098463de4c5d 495 */
group-onsemi 0:098463de4c5d 496 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 497 {
group-onsemi 0:098463de4c5d 498 CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
group-onsemi 0:098463de4c5d 499 }
group-onsemi 0:098463de4c5d 500
group-onsemi 0:098463de4c5d 501 /**
group-onsemi 0:098463de4c5d 502 * @brief Configure simultaneously enabled/disabled states
group-onsemi 0:098463de4c5d 503 * of Transmitter and Receiver
group-onsemi 0:098463de4c5d 504 * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
group-onsemi 0:098463de4c5d 505 * CR1 TE LL_USART_SetTransferDirection
group-onsemi 0:098463de4c5d 506 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 507 * @param TransferDirection This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 508 * @arg @ref LL_USART_DIRECTION_NONE
group-onsemi 0:098463de4c5d 509 * @arg @ref LL_USART_DIRECTION_RX
group-onsemi 0:098463de4c5d 510 * @arg @ref LL_USART_DIRECTION_TX
group-onsemi 0:098463de4c5d 511 * @arg @ref LL_USART_DIRECTION_TX_RX
group-onsemi 0:098463de4c5d 512 * @retval None
group-onsemi 0:098463de4c5d 513 */
group-onsemi 0:098463de4c5d 514 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
group-onsemi 0:098463de4c5d 515 {
group-onsemi 0:098463de4c5d 516 MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
group-onsemi 0:098463de4c5d 517 }
group-onsemi 0:098463de4c5d 518
group-onsemi 0:098463de4c5d 519 /**
group-onsemi 0:098463de4c5d 520 * @brief Return enabled/disabled states of Transmitter and Receiver
group-onsemi 0:098463de4c5d 521 * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
group-onsemi 0:098463de4c5d 522 * CR1 TE LL_USART_GetTransferDirection
group-onsemi 0:098463de4c5d 523 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 524 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 525 * @arg @ref LL_USART_DIRECTION_NONE
group-onsemi 0:098463de4c5d 526 * @arg @ref LL_USART_DIRECTION_RX
group-onsemi 0:098463de4c5d 527 * @arg @ref LL_USART_DIRECTION_TX
group-onsemi 0:098463de4c5d 528 * @arg @ref LL_USART_DIRECTION_TX_RX
group-onsemi 0:098463de4c5d 529 */
group-onsemi 0:098463de4c5d 530 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 531 {
group-onsemi 0:098463de4c5d 532 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
group-onsemi 0:098463de4c5d 533 }
group-onsemi 0:098463de4c5d 534
group-onsemi 0:098463de4c5d 535 /**
group-onsemi 0:098463de4c5d 536 * @brief Configure Parity (enabled/disabled and parity mode if enabled).
group-onsemi 0:098463de4c5d 537 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
group-onsemi 0:098463de4c5d 538 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
group-onsemi 0:098463de4c5d 539 * (9th or 8th bit depending on data width) and parity is checked on the received data.
group-onsemi 0:098463de4c5d 540 * @rmtoll CR1 PS LL_USART_SetParity\n
group-onsemi 0:098463de4c5d 541 * CR1 PCE LL_USART_SetParity
group-onsemi 0:098463de4c5d 542 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 543 * @param Parity This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 544 * @arg @ref LL_USART_PARITY_NONE
group-onsemi 0:098463de4c5d 545 * @arg @ref LL_USART_PARITY_EVEN
group-onsemi 0:098463de4c5d 546 * @arg @ref LL_USART_PARITY_ODD
group-onsemi 0:098463de4c5d 547 * @retval None
group-onsemi 0:098463de4c5d 548 */
group-onsemi 0:098463de4c5d 549 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
group-onsemi 0:098463de4c5d 550 {
group-onsemi 0:098463de4c5d 551 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
group-onsemi 0:098463de4c5d 552 }
group-onsemi 0:098463de4c5d 553
group-onsemi 0:098463de4c5d 554 /**
group-onsemi 0:098463de4c5d 555 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
group-onsemi 0:098463de4c5d 556 * @rmtoll CR1 PS LL_USART_GetParity\n
group-onsemi 0:098463de4c5d 557 * CR1 PCE LL_USART_GetParity
group-onsemi 0:098463de4c5d 558 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 559 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 560 * @arg @ref LL_USART_PARITY_NONE
group-onsemi 0:098463de4c5d 561 * @arg @ref LL_USART_PARITY_EVEN
group-onsemi 0:098463de4c5d 562 * @arg @ref LL_USART_PARITY_ODD
group-onsemi 0:098463de4c5d 563 */
group-onsemi 0:098463de4c5d 564 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 565 {
group-onsemi 0:098463de4c5d 566 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
group-onsemi 0:098463de4c5d 567 }
group-onsemi 0:098463de4c5d 568
group-onsemi 0:098463de4c5d 569 /**
group-onsemi 0:098463de4c5d 570 * @brief Set Receiver Wake Up method from Mute mode.
group-onsemi 0:098463de4c5d 571 * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
group-onsemi 0:098463de4c5d 572 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 573 * @param Method This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 574 * @arg @ref LL_USART_WAKEUP_IDLELINE
group-onsemi 0:098463de4c5d 575 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
group-onsemi 0:098463de4c5d 576 * @retval None
group-onsemi 0:098463de4c5d 577 */
group-onsemi 0:098463de4c5d 578 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
group-onsemi 0:098463de4c5d 579 {
group-onsemi 0:098463de4c5d 580 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
group-onsemi 0:098463de4c5d 581 }
group-onsemi 0:098463de4c5d 582
group-onsemi 0:098463de4c5d 583 /**
group-onsemi 0:098463de4c5d 584 * @brief Return Receiver Wake Up method from Mute mode
group-onsemi 0:098463de4c5d 585 * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
group-onsemi 0:098463de4c5d 586 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 587 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 588 * @arg @ref LL_USART_WAKEUP_IDLELINE
group-onsemi 0:098463de4c5d 589 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
group-onsemi 0:098463de4c5d 590 */
group-onsemi 0:098463de4c5d 591 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 592 {
group-onsemi 0:098463de4c5d 593 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
group-onsemi 0:098463de4c5d 594 }
group-onsemi 0:098463de4c5d 595
group-onsemi 0:098463de4c5d 596 /**
group-onsemi 0:098463de4c5d 597 * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
group-onsemi 0:098463de4c5d 598 * @rmtoll CR1 M LL_USART_SetDataWidth
group-onsemi 0:098463de4c5d 599 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 600 * @param DataWidth This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 601 * @arg @ref LL_USART_DATAWIDTH_8B
group-onsemi 0:098463de4c5d 602 * @arg @ref LL_USART_DATAWIDTH_9B
group-onsemi 0:098463de4c5d 603 * @retval None
group-onsemi 0:098463de4c5d 604 */
group-onsemi 0:098463de4c5d 605 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
group-onsemi 0:098463de4c5d 606 {
group-onsemi 0:098463de4c5d 607 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
group-onsemi 0:098463de4c5d 608 }
group-onsemi 0:098463de4c5d 609
group-onsemi 0:098463de4c5d 610 /**
group-onsemi 0:098463de4c5d 611 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
group-onsemi 0:098463de4c5d 612 * @rmtoll CR1 M LL_USART_GetDataWidth
group-onsemi 0:098463de4c5d 613 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 614 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 615 * @arg @ref LL_USART_DATAWIDTH_8B
group-onsemi 0:098463de4c5d 616 * @arg @ref LL_USART_DATAWIDTH_9B
group-onsemi 0:098463de4c5d 617 */
group-onsemi 0:098463de4c5d 618 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 619 {
group-onsemi 0:098463de4c5d 620 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
group-onsemi 0:098463de4c5d 621 }
group-onsemi 0:098463de4c5d 622
group-onsemi 0:098463de4c5d 623 /**
group-onsemi 0:098463de4c5d 624 * @brief Set Oversampling to 8-bit or 16-bit mode
group-onsemi 0:098463de4c5d 625 * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
group-onsemi 0:098463de4c5d 626 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 627 * @param OverSampling This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 628 * @arg @ref LL_USART_OVERSAMPLING_16
group-onsemi 0:098463de4c5d 629 * @arg @ref LL_USART_OVERSAMPLING_8
group-onsemi 0:098463de4c5d 630 * @retval None
group-onsemi 0:098463de4c5d 631 */
group-onsemi 0:098463de4c5d 632 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
group-onsemi 0:098463de4c5d 633 {
group-onsemi 0:098463de4c5d 634 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
group-onsemi 0:098463de4c5d 635 }
group-onsemi 0:098463de4c5d 636
group-onsemi 0:098463de4c5d 637 /**
group-onsemi 0:098463de4c5d 638 * @brief Return Oversampling mode
group-onsemi 0:098463de4c5d 639 * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
group-onsemi 0:098463de4c5d 640 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 641 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 642 * @arg @ref LL_USART_OVERSAMPLING_16
group-onsemi 0:098463de4c5d 643 * @arg @ref LL_USART_OVERSAMPLING_8
group-onsemi 0:098463de4c5d 644 */
group-onsemi 0:098463de4c5d 645 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 646 {
group-onsemi 0:098463de4c5d 647 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
group-onsemi 0:098463de4c5d 648 }
group-onsemi 0:098463de4c5d 649
group-onsemi 0:098463de4c5d 650 /**
group-onsemi 0:098463de4c5d 651 * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
group-onsemi 0:098463de4c5d 652 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 653 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 654 * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
group-onsemi 0:098463de4c5d 655 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 656 * @param LastBitClockPulse This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 657 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
group-onsemi 0:098463de4c5d 658 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
group-onsemi 0:098463de4c5d 659 * @retval None
group-onsemi 0:098463de4c5d 660 */
group-onsemi 0:098463de4c5d 661 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
group-onsemi 0:098463de4c5d 662 {
group-onsemi 0:098463de4c5d 663 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
group-onsemi 0:098463de4c5d 664 }
group-onsemi 0:098463de4c5d 665
group-onsemi 0:098463de4c5d 666 /**
group-onsemi 0:098463de4c5d 667 * @brief Retrieve Clock pulse of the last data bit output configuration
group-onsemi 0:098463de4c5d 668 * (Last bit Clock pulse output to the SCLK pin or not)
group-onsemi 0:098463de4c5d 669 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 670 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 671 * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
group-onsemi 0:098463de4c5d 672 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 673 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 674 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
group-onsemi 0:098463de4c5d 675 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
group-onsemi 0:098463de4c5d 676 */
group-onsemi 0:098463de4c5d 677 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 678 {
group-onsemi 0:098463de4c5d 679 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
group-onsemi 0:098463de4c5d 680 }
group-onsemi 0:098463de4c5d 681
group-onsemi 0:098463de4c5d 682 /**
group-onsemi 0:098463de4c5d 683 * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
group-onsemi 0:098463de4c5d 684 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 685 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 686 * @rmtoll CR2 CPHA LL_USART_SetClockPhase
group-onsemi 0:098463de4c5d 687 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 688 * @param ClockPhase This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 689 * @arg @ref LL_USART_PHASE_1EDGE
group-onsemi 0:098463de4c5d 690 * @arg @ref LL_USART_PHASE_2EDGE
group-onsemi 0:098463de4c5d 691 * @retval None
group-onsemi 0:098463de4c5d 692 */
group-onsemi 0:098463de4c5d 693 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
group-onsemi 0:098463de4c5d 694 {
group-onsemi 0:098463de4c5d 695 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
group-onsemi 0:098463de4c5d 696 }
group-onsemi 0:098463de4c5d 697
group-onsemi 0:098463de4c5d 698 /**
group-onsemi 0:098463de4c5d 699 * @brief Return phase of the clock output on the SCLK pin in synchronous mode
group-onsemi 0:098463de4c5d 700 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 701 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 702 * @rmtoll CR2 CPHA LL_USART_GetClockPhase
group-onsemi 0:098463de4c5d 703 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 704 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 705 * @arg @ref LL_USART_PHASE_1EDGE
group-onsemi 0:098463de4c5d 706 * @arg @ref LL_USART_PHASE_2EDGE
group-onsemi 0:098463de4c5d 707 */
group-onsemi 0:098463de4c5d 708 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 709 {
group-onsemi 0:098463de4c5d 710 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
group-onsemi 0:098463de4c5d 711 }
group-onsemi 0:098463de4c5d 712
group-onsemi 0:098463de4c5d 713 /**
group-onsemi 0:098463de4c5d 714 * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
group-onsemi 0:098463de4c5d 715 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 716 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 717 * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
group-onsemi 0:098463de4c5d 718 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 719 * @param ClockPolarity This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 720 * @arg @ref LL_USART_POLARITY_LOW
group-onsemi 0:098463de4c5d 721 * @arg @ref LL_USART_POLARITY_HIGH
group-onsemi 0:098463de4c5d 722 * @retval None
group-onsemi 0:098463de4c5d 723 */
group-onsemi 0:098463de4c5d 724 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
group-onsemi 0:098463de4c5d 725 {
group-onsemi 0:098463de4c5d 726 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
group-onsemi 0:098463de4c5d 727 }
group-onsemi 0:098463de4c5d 728
group-onsemi 0:098463de4c5d 729 /**
group-onsemi 0:098463de4c5d 730 * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
group-onsemi 0:098463de4c5d 731 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 732 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 733 * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
group-onsemi 0:098463de4c5d 734 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 735 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 736 * @arg @ref LL_USART_POLARITY_LOW
group-onsemi 0:098463de4c5d 737 * @arg @ref LL_USART_POLARITY_HIGH
group-onsemi 0:098463de4c5d 738 */
group-onsemi 0:098463de4c5d 739 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 740 {
group-onsemi 0:098463de4c5d 741 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
group-onsemi 0:098463de4c5d 742 }
group-onsemi 0:098463de4c5d 743
group-onsemi 0:098463de4c5d 744 /**
group-onsemi 0:098463de4c5d 745 * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
group-onsemi 0:098463de4c5d 746 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 747 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 748 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 749 * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
group-onsemi 0:098463de4c5d 750 * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
group-onsemi 0:098463de4c5d 751 * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
group-onsemi 0:098463de4c5d 752 * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
group-onsemi 0:098463de4c5d 753 * CR2 CPOL LL_USART_ConfigClock\n
group-onsemi 0:098463de4c5d 754 * CR2 LBCL LL_USART_ConfigClock
group-onsemi 0:098463de4c5d 755 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 756 * @param Phase This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 757 * @arg @ref LL_USART_PHASE_1EDGE
group-onsemi 0:098463de4c5d 758 * @arg @ref LL_USART_PHASE_2EDGE
group-onsemi 0:098463de4c5d 759 * @param Polarity This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 760 * @arg @ref LL_USART_POLARITY_LOW
group-onsemi 0:098463de4c5d 761 * @arg @ref LL_USART_POLARITY_HIGH
group-onsemi 0:098463de4c5d 762 * @param LBCPOutput This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 763 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
group-onsemi 0:098463de4c5d 764 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
group-onsemi 0:098463de4c5d 765 * @retval None
group-onsemi 0:098463de4c5d 766 */
group-onsemi 0:098463de4c5d 767 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
group-onsemi 0:098463de4c5d 768 {
group-onsemi 0:098463de4c5d 769 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
group-onsemi 0:098463de4c5d 770 }
group-onsemi 0:098463de4c5d 771
group-onsemi 0:098463de4c5d 772 /**
group-onsemi 0:098463de4c5d 773 * @brief Enable Clock output on SCLK pin
group-onsemi 0:098463de4c5d 774 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 775 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 776 * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
group-onsemi 0:098463de4c5d 777 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 778 * @retval None
group-onsemi 0:098463de4c5d 779 */
group-onsemi 0:098463de4c5d 780 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 781 {
group-onsemi 0:098463de4c5d 782 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
group-onsemi 0:098463de4c5d 783 }
group-onsemi 0:098463de4c5d 784
group-onsemi 0:098463de4c5d 785 /**
group-onsemi 0:098463de4c5d 786 * @brief Disable Clock output on SCLK pin
group-onsemi 0:098463de4c5d 787 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 788 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 789 * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
group-onsemi 0:098463de4c5d 790 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 791 * @retval None
group-onsemi 0:098463de4c5d 792 */
group-onsemi 0:098463de4c5d 793 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 794 {
group-onsemi 0:098463de4c5d 795 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
group-onsemi 0:098463de4c5d 796 }
group-onsemi 0:098463de4c5d 797
group-onsemi 0:098463de4c5d 798 /**
group-onsemi 0:098463de4c5d 799 * @brief Indicate if Clock output on SCLK pin is enabled
group-onsemi 0:098463de4c5d 800 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 801 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 802 * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
group-onsemi 0:098463de4c5d 803 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 804 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 805 */
group-onsemi 0:098463de4c5d 806 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 807 {
group-onsemi 0:098463de4c5d 808 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
group-onsemi 0:098463de4c5d 809 }
group-onsemi 0:098463de4c5d 810
group-onsemi 0:098463de4c5d 811 /**
group-onsemi 0:098463de4c5d 812 * @brief Set the length of the stop bits
group-onsemi 0:098463de4c5d 813 * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
group-onsemi 0:098463de4c5d 814 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 815 * @param StopBits This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 816 * @arg @ref LL_USART_STOPBITS_0_5
group-onsemi 0:098463de4c5d 817 * @arg @ref LL_USART_STOPBITS_1
group-onsemi 0:098463de4c5d 818 * @arg @ref LL_USART_STOPBITS_1_5
group-onsemi 0:098463de4c5d 819 * @arg @ref LL_USART_STOPBITS_2
group-onsemi 0:098463de4c5d 820 * @retval None
group-onsemi 0:098463de4c5d 821 */
group-onsemi 0:098463de4c5d 822 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
group-onsemi 0:098463de4c5d 823 {
group-onsemi 0:098463de4c5d 824 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
group-onsemi 0:098463de4c5d 825 }
group-onsemi 0:098463de4c5d 826
group-onsemi 0:098463de4c5d 827 /**
group-onsemi 0:098463de4c5d 828 * @brief Retrieve the length of the stop bits
group-onsemi 0:098463de4c5d 829 * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
group-onsemi 0:098463de4c5d 830 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 831 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 832 * @arg @ref LL_USART_STOPBITS_0_5
group-onsemi 0:098463de4c5d 833 * @arg @ref LL_USART_STOPBITS_1
group-onsemi 0:098463de4c5d 834 * @arg @ref LL_USART_STOPBITS_1_5
group-onsemi 0:098463de4c5d 835 * @arg @ref LL_USART_STOPBITS_2
group-onsemi 0:098463de4c5d 836 */
group-onsemi 0:098463de4c5d 837 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 838 {
group-onsemi 0:098463de4c5d 839 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
group-onsemi 0:098463de4c5d 840 }
group-onsemi 0:098463de4c5d 841
group-onsemi 0:098463de4c5d 842 /**
group-onsemi 0:098463de4c5d 843 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
group-onsemi 0:098463de4c5d 844 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 845 * - Data Width configuration using @ref LL_USART_SetDataWidth() function
group-onsemi 0:098463de4c5d 846 * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
group-onsemi 0:098463de4c5d 847 * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
group-onsemi 0:098463de4c5d 848 * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
group-onsemi 0:098463de4c5d 849 * CR1 PCE LL_USART_ConfigCharacter\n
group-onsemi 0:098463de4c5d 850 * CR1 M LL_USART_ConfigCharacter\n
group-onsemi 0:098463de4c5d 851 * CR2 STOP LL_USART_ConfigCharacter
group-onsemi 0:098463de4c5d 852 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 853 * @param DataWidth This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 854 * @arg @ref LL_USART_DATAWIDTH_8B
group-onsemi 0:098463de4c5d 855 * @arg @ref LL_USART_DATAWIDTH_9B
group-onsemi 0:098463de4c5d 856 * @param Parity This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 857 * @arg @ref LL_USART_PARITY_NONE
group-onsemi 0:098463de4c5d 858 * @arg @ref LL_USART_PARITY_EVEN
group-onsemi 0:098463de4c5d 859 * @arg @ref LL_USART_PARITY_ODD
group-onsemi 0:098463de4c5d 860 * @param StopBits This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 861 * @arg @ref LL_USART_STOPBITS_0_5
group-onsemi 0:098463de4c5d 862 * @arg @ref LL_USART_STOPBITS_1
group-onsemi 0:098463de4c5d 863 * @arg @ref LL_USART_STOPBITS_1_5
group-onsemi 0:098463de4c5d 864 * @arg @ref LL_USART_STOPBITS_2
group-onsemi 0:098463de4c5d 865 * @retval None
group-onsemi 0:098463de4c5d 866 */
group-onsemi 0:098463de4c5d 867 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
group-onsemi 0:098463de4c5d 868 uint32_t StopBits)
group-onsemi 0:098463de4c5d 869 {
group-onsemi 0:098463de4c5d 870 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
group-onsemi 0:098463de4c5d 871 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
group-onsemi 0:098463de4c5d 872 }
group-onsemi 0:098463de4c5d 873
group-onsemi 0:098463de4c5d 874 /**
group-onsemi 0:098463de4c5d 875 * @brief Set Address of the USART node.
group-onsemi 0:098463de4c5d 876 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
group-onsemi 0:098463de4c5d 877 * for wake up with address mark detection.
group-onsemi 0:098463de4c5d 878 * @rmtoll CR2 ADD LL_USART_SetNodeAddress
group-onsemi 0:098463de4c5d 879 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 880 * @param NodeAddress 4 bit Address of the USART node.
group-onsemi 0:098463de4c5d 881 * @retval None
group-onsemi 0:098463de4c5d 882 */
group-onsemi 0:098463de4c5d 883 __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
group-onsemi 0:098463de4c5d 884 {
group-onsemi 0:098463de4c5d 885 MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
group-onsemi 0:098463de4c5d 886 }
group-onsemi 0:098463de4c5d 887
group-onsemi 0:098463de4c5d 888 /**
group-onsemi 0:098463de4c5d 889 * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
group-onsemi 0:098463de4c5d 890 * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
group-onsemi 0:098463de4c5d 891 * @rmtoll CR2 ADD LL_USART_GetNodeAddress
group-onsemi 0:098463de4c5d 892 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 893 * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
group-onsemi 0:098463de4c5d 894 */
group-onsemi 0:098463de4c5d 895 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 896 {
group-onsemi 0:098463de4c5d 897 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
group-onsemi 0:098463de4c5d 898 }
group-onsemi 0:098463de4c5d 899
group-onsemi 0:098463de4c5d 900 /**
group-onsemi 0:098463de4c5d 901 * @brief Enable RTS HW Flow Control
group-onsemi 0:098463de4c5d 902 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 903 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 904 * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
group-onsemi 0:098463de4c5d 905 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 906 * @retval None
group-onsemi 0:098463de4c5d 907 */
group-onsemi 0:098463de4c5d 908 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 909 {
group-onsemi 0:098463de4c5d 910 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
group-onsemi 0:098463de4c5d 911 }
group-onsemi 0:098463de4c5d 912
group-onsemi 0:098463de4c5d 913 /**
group-onsemi 0:098463de4c5d 914 * @brief Disable RTS HW Flow Control
group-onsemi 0:098463de4c5d 915 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 916 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 917 * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
group-onsemi 0:098463de4c5d 918 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 919 * @retval None
group-onsemi 0:098463de4c5d 920 */
group-onsemi 0:098463de4c5d 921 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 922 {
group-onsemi 0:098463de4c5d 923 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
group-onsemi 0:098463de4c5d 924 }
group-onsemi 0:098463de4c5d 925
group-onsemi 0:098463de4c5d 926 /**
group-onsemi 0:098463de4c5d 927 * @brief Enable CTS HW Flow Control
group-onsemi 0:098463de4c5d 928 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 929 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 930 * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
group-onsemi 0:098463de4c5d 931 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 932 * @retval None
group-onsemi 0:098463de4c5d 933 */
group-onsemi 0:098463de4c5d 934 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 935 {
group-onsemi 0:098463de4c5d 936 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
group-onsemi 0:098463de4c5d 937 }
group-onsemi 0:098463de4c5d 938
group-onsemi 0:098463de4c5d 939 /**
group-onsemi 0:098463de4c5d 940 * @brief Disable CTS HW Flow Control
group-onsemi 0:098463de4c5d 941 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 942 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 943 * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
group-onsemi 0:098463de4c5d 944 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 945 * @retval None
group-onsemi 0:098463de4c5d 946 */
group-onsemi 0:098463de4c5d 947 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 948 {
group-onsemi 0:098463de4c5d 949 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
group-onsemi 0:098463de4c5d 950 }
group-onsemi 0:098463de4c5d 951
group-onsemi 0:098463de4c5d 952 /**
group-onsemi 0:098463de4c5d 953 * @brief Configure HW Flow Control mode (both CTS and RTS)
group-onsemi 0:098463de4c5d 954 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 955 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 956 * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
group-onsemi 0:098463de4c5d 957 * CR3 CTSE LL_USART_SetHWFlowCtrl
group-onsemi 0:098463de4c5d 958 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 959 * @param HardwareFlowControl This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 960 * @arg @ref LL_USART_HWCONTROL_NONE
group-onsemi 0:098463de4c5d 961 * @arg @ref LL_USART_HWCONTROL_RTS
group-onsemi 0:098463de4c5d 962 * @arg @ref LL_USART_HWCONTROL_CTS
group-onsemi 0:098463de4c5d 963 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
group-onsemi 0:098463de4c5d 964 * @retval None
group-onsemi 0:098463de4c5d 965 */
group-onsemi 0:098463de4c5d 966 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
group-onsemi 0:098463de4c5d 967 {
group-onsemi 0:098463de4c5d 968 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
group-onsemi 0:098463de4c5d 969 }
group-onsemi 0:098463de4c5d 970
group-onsemi 0:098463de4c5d 971 /**
group-onsemi 0:098463de4c5d 972 * @brief Return HW Flow Control configuration (both CTS and RTS)
group-onsemi 0:098463de4c5d 973 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 974 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 975 * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
group-onsemi 0:098463de4c5d 976 * CR3 CTSE LL_USART_GetHWFlowCtrl
group-onsemi 0:098463de4c5d 977 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 978 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 979 * @arg @ref LL_USART_HWCONTROL_NONE
group-onsemi 0:098463de4c5d 980 * @arg @ref LL_USART_HWCONTROL_RTS
group-onsemi 0:098463de4c5d 981 * @arg @ref LL_USART_HWCONTROL_CTS
group-onsemi 0:098463de4c5d 982 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
group-onsemi 0:098463de4c5d 983 */
group-onsemi 0:098463de4c5d 984 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 985 {
group-onsemi 0:098463de4c5d 986 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
group-onsemi 0:098463de4c5d 987 }
group-onsemi 0:098463de4c5d 988
group-onsemi 0:098463de4c5d 989 /**
group-onsemi 0:098463de4c5d 990 * @brief Enable One bit sampling method
group-onsemi 0:098463de4c5d 991 * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
group-onsemi 0:098463de4c5d 992 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 993 * @retval None
group-onsemi 0:098463de4c5d 994 */
group-onsemi 0:098463de4c5d 995 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 996 {
group-onsemi 0:098463de4c5d 997 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
group-onsemi 0:098463de4c5d 998 }
group-onsemi 0:098463de4c5d 999
group-onsemi 0:098463de4c5d 1000 /**
group-onsemi 0:098463de4c5d 1001 * @brief Disable One bit sampling method
group-onsemi 0:098463de4c5d 1002 * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
group-onsemi 0:098463de4c5d 1003 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1004 * @retval None
group-onsemi 0:098463de4c5d 1005 */
group-onsemi 0:098463de4c5d 1006 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1007 {
group-onsemi 0:098463de4c5d 1008 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
group-onsemi 0:098463de4c5d 1009 }
group-onsemi 0:098463de4c5d 1010
group-onsemi 0:098463de4c5d 1011 /**
group-onsemi 0:098463de4c5d 1012 * @brief Indicate if One bit sampling method is enabled
group-onsemi 0:098463de4c5d 1013 * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
group-onsemi 0:098463de4c5d 1014 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1015 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1016 */
group-onsemi 0:098463de4c5d 1017 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1018 {
group-onsemi 0:098463de4c5d 1019 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
group-onsemi 0:098463de4c5d 1020 }
group-onsemi 0:098463de4c5d 1021
group-onsemi 0:098463de4c5d 1022 /**
group-onsemi 0:098463de4c5d 1023 * @brief Configure USART BRR register for achieving expected Baud Rate value.
group-onsemi 0:098463de4c5d 1024 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
group-onsemi 0:098463de4c5d 1025 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
group-onsemi 0:098463de4c5d 1026 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
group-onsemi 0:098463de4c5d 1027 * (Baud rate value != 0)
group-onsemi 0:098463de4c5d 1028 * @rmtoll BRR BRR LL_USART_SetBaudRate
group-onsemi 0:098463de4c5d 1029 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1030 * @param PeriphClk Peripheral Clock
group-onsemi 0:098463de4c5d 1031 * @param OverSampling This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 1032 * @arg @ref LL_USART_OVERSAMPLING_16
group-onsemi 0:098463de4c5d 1033 * @arg @ref LL_USART_OVERSAMPLING_8
group-onsemi 0:098463de4c5d 1034 * @param BaudRate Baud Rate
group-onsemi 0:098463de4c5d 1035 * @retval None
group-onsemi 0:098463de4c5d 1036 */
group-onsemi 0:098463de4c5d 1037 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
group-onsemi 0:098463de4c5d 1038 uint32_t BaudRate)
group-onsemi 0:098463de4c5d 1039 {
group-onsemi 0:098463de4c5d 1040 if (OverSampling == LL_USART_OVERSAMPLING_8)
group-onsemi 0:098463de4c5d 1041 {
group-onsemi 0:098463de4c5d 1042 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
group-onsemi 0:098463de4c5d 1043 }
group-onsemi 0:098463de4c5d 1044 else
group-onsemi 0:098463de4c5d 1045 {
group-onsemi 0:098463de4c5d 1046 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
group-onsemi 0:098463de4c5d 1047 }
group-onsemi 0:098463de4c5d 1048 }
group-onsemi 0:098463de4c5d 1049
group-onsemi 0:098463de4c5d 1050 /**
group-onsemi 0:098463de4c5d 1051 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
group-onsemi 0:098463de4c5d 1052 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
group-onsemi 0:098463de4c5d 1053 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
group-onsemi 0:098463de4c5d 1054 * @rmtoll BRR BRR LL_USART_GetBaudRate
group-onsemi 0:098463de4c5d 1055 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1056 * @param PeriphClk Peripheral Clock
group-onsemi 0:098463de4c5d 1057 * @param OverSampling This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 1058 * @arg @ref LL_USART_OVERSAMPLING_16
group-onsemi 0:098463de4c5d 1059 * @arg @ref LL_USART_OVERSAMPLING_8
group-onsemi 0:098463de4c5d 1060 * @retval Baud Rate
group-onsemi 0:098463de4c5d 1061 */
group-onsemi 0:098463de4c5d 1062 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
group-onsemi 0:098463de4c5d 1063 {
group-onsemi 0:098463de4c5d 1064 register uint32_t usartdiv = 0x0U;
group-onsemi 0:098463de4c5d 1065 register uint32_t brrresult = 0x0U;
group-onsemi 0:098463de4c5d 1066
group-onsemi 0:098463de4c5d 1067 usartdiv = USARTx->BRR;
group-onsemi 0:098463de4c5d 1068
group-onsemi 0:098463de4c5d 1069 if (OverSampling == LL_USART_OVERSAMPLING_8)
group-onsemi 0:098463de4c5d 1070 {
group-onsemi 0:098463de4c5d 1071 if ((usartdiv & 0xFFF7U) != 0U)
group-onsemi 0:098463de4c5d 1072 {
group-onsemi 0:098463de4c5d 1073 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
group-onsemi 0:098463de4c5d 1074 brrresult = (PeriphClk * 2U) / usartdiv;
group-onsemi 0:098463de4c5d 1075 }
group-onsemi 0:098463de4c5d 1076 }
group-onsemi 0:098463de4c5d 1077 else
group-onsemi 0:098463de4c5d 1078 {
group-onsemi 0:098463de4c5d 1079 if ((usartdiv & 0xFFFFU) != 0U)
group-onsemi 0:098463de4c5d 1080 {
group-onsemi 0:098463de4c5d 1081 brrresult = PeriphClk / usartdiv;
group-onsemi 0:098463de4c5d 1082 }
group-onsemi 0:098463de4c5d 1083 }
group-onsemi 0:098463de4c5d 1084 return (brrresult);
group-onsemi 0:098463de4c5d 1085 }
group-onsemi 0:098463de4c5d 1086
group-onsemi 0:098463de4c5d 1087 /**
group-onsemi 0:098463de4c5d 1088 * @}
group-onsemi 0:098463de4c5d 1089 */
group-onsemi 0:098463de4c5d 1090
group-onsemi 0:098463de4c5d 1091 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
group-onsemi 0:098463de4c5d 1092 * @{
group-onsemi 0:098463de4c5d 1093 */
group-onsemi 0:098463de4c5d 1094
group-onsemi 0:098463de4c5d 1095 /**
group-onsemi 0:098463de4c5d 1096 * @brief Enable IrDA mode
group-onsemi 0:098463de4c5d 1097 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1098 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1099 * @rmtoll CR3 IREN LL_USART_EnableIrda
group-onsemi 0:098463de4c5d 1100 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1101 * @retval None
group-onsemi 0:098463de4c5d 1102 */
group-onsemi 0:098463de4c5d 1103 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1104 {
group-onsemi 0:098463de4c5d 1105 SET_BIT(USARTx->CR3, USART_CR3_IREN);
group-onsemi 0:098463de4c5d 1106 }
group-onsemi 0:098463de4c5d 1107
group-onsemi 0:098463de4c5d 1108 /**
group-onsemi 0:098463de4c5d 1109 * @brief Disable IrDA mode
group-onsemi 0:098463de4c5d 1110 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1111 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1112 * @rmtoll CR3 IREN LL_USART_DisableIrda
group-onsemi 0:098463de4c5d 1113 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1114 * @retval None
group-onsemi 0:098463de4c5d 1115 */
group-onsemi 0:098463de4c5d 1116 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1117 {
group-onsemi 0:098463de4c5d 1118 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
group-onsemi 0:098463de4c5d 1119 }
group-onsemi 0:098463de4c5d 1120
group-onsemi 0:098463de4c5d 1121 /**
group-onsemi 0:098463de4c5d 1122 * @brief Indicate if IrDA mode is enabled
group-onsemi 0:098463de4c5d 1123 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1124 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1125 * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
group-onsemi 0:098463de4c5d 1126 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1127 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1128 */
group-onsemi 0:098463de4c5d 1129 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1130 {
group-onsemi 0:098463de4c5d 1131 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
group-onsemi 0:098463de4c5d 1132 }
group-onsemi 0:098463de4c5d 1133
group-onsemi 0:098463de4c5d 1134 /**
group-onsemi 0:098463de4c5d 1135 * @brief Configure IrDA Power Mode (Normal or Low Power)
group-onsemi 0:098463de4c5d 1136 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1137 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1138 * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
group-onsemi 0:098463de4c5d 1139 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1140 * @param PowerMode This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 1141 * @arg @ref LL_USART_IRDA_POWER_NORMAL
group-onsemi 0:098463de4c5d 1142 * @arg @ref LL_USART_IRDA_POWER_LOW
group-onsemi 0:098463de4c5d 1143 * @retval None
group-onsemi 0:098463de4c5d 1144 */
group-onsemi 0:098463de4c5d 1145 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
group-onsemi 0:098463de4c5d 1146 {
group-onsemi 0:098463de4c5d 1147 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
group-onsemi 0:098463de4c5d 1148 }
group-onsemi 0:098463de4c5d 1149
group-onsemi 0:098463de4c5d 1150 /**
group-onsemi 0:098463de4c5d 1151 * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
group-onsemi 0:098463de4c5d 1152 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1153 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1154 * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
group-onsemi 0:098463de4c5d 1155 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1156 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 1157 * @arg @ref LL_USART_IRDA_POWER_NORMAL
group-onsemi 0:098463de4c5d 1158 * @arg @ref LL_USART_PHASE_2EDGE
group-onsemi 0:098463de4c5d 1159 */
group-onsemi 0:098463de4c5d 1160 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1161 {
group-onsemi 0:098463de4c5d 1162 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
group-onsemi 0:098463de4c5d 1163 }
group-onsemi 0:098463de4c5d 1164
group-onsemi 0:098463de4c5d 1165 /**
group-onsemi 0:098463de4c5d 1166 * @brief Set Irda prescaler value, used for dividing the USART clock source
group-onsemi 0:098463de4c5d 1167 * to achieve the Irda Low Power frequency (8 bits value)
group-onsemi 0:098463de4c5d 1168 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1169 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1170 * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
group-onsemi 0:098463de4c5d 1171 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1172 * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
group-onsemi 0:098463de4c5d 1173 * @retval None
group-onsemi 0:098463de4c5d 1174 */
group-onsemi 0:098463de4c5d 1175 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
group-onsemi 0:098463de4c5d 1176 {
group-onsemi 0:098463de4c5d 1177 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
group-onsemi 0:098463de4c5d 1178 }
group-onsemi 0:098463de4c5d 1179
group-onsemi 0:098463de4c5d 1180 /**
group-onsemi 0:098463de4c5d 1181 * @brief Return Irda prescaler value, used for dividing the USART clock source
group-onsemi 0:098463de4c5d 1182 * to achieve the Irda Low Power frequency (8 bits value)
group-onsemi 0:098463de4c5d 1183 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1184 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1185 * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
group-onsemi 0:098463de4c5d 1186 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1187 * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
group-onsemi 0:098463de4c5d 1188 */
group-onsemi 0:098463de4c5d 1189 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1190 {
group-onsemi 0:098463de4c5d 1191 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
group-onsemi 0:098463de4c5d 1192 }
group-onsemi 0:098463de4c5d 1193
group-onsemi 0:098463de4c5d 1194 /**
group-onsemi 0:098463de4c5d 1195 * @}
group-onsemi 0:098463de4c5d 1196 */
group-onsemi 0:098463de4c5d 1197
group-onsemi 0:098463de4c5d 1198 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
group-onsemi 0:098463de4c5d 1199 * @{
group-onsemi 0:098463de4c5d 1200 */
group-onsemi 0:098463de4c5d 1201
group-onsemi 0:098463de4c5d 1202 /**
group-onsemi 0:098463de4c5d 1203 * @brief Enable Smartcard NACK transmission
group-onsemi 0:098463de4c5d 1204 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1205 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1206 * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
group-onsemi 0:098463de4c5d 1207 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1208 * @retval None
group-onsemi 0:098463de4c5d 1209 */
group-onsemi 0:098463de4c5d 1210 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1211 {
group-onsemi 0:098463de4c5d 1212 SET_BIT(USARTx->CR3, USART_CR3_NACK);
group-onsemi 0:098463de4c5d 1213 }
group-onsemi 0:098463de4c5d 1214
group-onsemi 0:098463de4c5d 1215 /**
group-onsemi 0:098463de4c5d 1216 * @brief Disable Smartcard NACK transmission
group-onsemi 0:098463de4c5d 1217 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1218 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1219 * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
group-onsemi 0:098463de4c5d 1220 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1221 * @retval None
group-onsemi 0:098463de4c5d 1222 */
group-onsemi 0:098463de4c5d 1223 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1224 {
group-onsemi 0:098463de4c5d 1225 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
group-onsemi 0:098463de4c5d 1226 }
group-onsemi 0:098463de4c5d 1227
group-onsemi 0:098463de4c5d 1228 /**
group-onsemi 0:098463de4c5d 1229 * @brief Indicate if Smartcard NACK transmission is enabled
group-onsemi 0:098463de4c5d 1230 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1231 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1232 * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
group-onsemi 0:098463de4c5d 1233 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1234 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1235 */
group-onsemi 0:098463de4c5d 1236 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1237 {
group-onsemi 0:098463de4c5d 1238 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
group-onsemi 0:098463de4c5d 1239 }
group-onsemi 0:098463de4c5d 1240
group-onsemi 0:098463de4c5d 1241 /**
group-onsemi 0:098463de4c5d 1242 * @brief Enable Smartcard mode
group-onsemi 0:098463de4c5d 1243 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1244 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1245 * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
group-onsemi 0:098463de4c5d 1246 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1247 * @retval None
group-onsemi 0:098463de4c5d 1248 */
group-onsemi 0:098463de4c5d 1249 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1250 {
group-onsemi 0:098463de4c5d 1251 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
group-onsemi 0:098463de4c5d 1252 }
group-onsemi 0:098463de4c5d 1253
group-onsemi 0:098463de4c5d 1254 /**
group-onsemi 0:098463de4c5d 1255 * @brief Disable Smartcard mode
group-onsemi 0:098463de4c5d 1256 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1257 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1258 * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
group-onsemi 0:098463de4c5d 1259 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1260 * @retval None
group-onsemi 0:098463de4c5d 1261 */
group-onsemi 0:098463de4c5d 1262 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1263 {
group-onsemi 0:098463de4c5d 1264 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
group-onsemi 0:098463de4c5d 1265 }
group-onsemi 0:098463de4c5d 1266
group-onsemi 0:098463de4c5d 1267 /**
group-onsemi 0:098463de4c5d 1268 * @brief Indicate if Smartcard mode is enabled
group-onsemi 0:098463de4c5d 1269 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1270 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1271 * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
group-onsemi 0:098463de4c5d 1272 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1273 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1274 */
group-onsemi 0:098463de4c5d 1275 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1276 {
group-onsemi 0:098463de4c5d 1277 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
group-onsemi 0:098463de4c5d 1278 }
group-onsemi 0:098463de4c5d 1279
group-onsemi 0:098463de4c5d 1280 /**
group-onsemi 0:098463de4c5d 1281 * @brief Set Smartcard prescaler value, used for dividing the USART clock
group-onsemi 0:098463de4c5d 1282 * source to provide the SMARTCARD Clock (5 bits value)
group-onsemi 0:098463de4c5d 1283 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1284 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1285 * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
group-onsemi 0:098463de4c5d 1286 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1287 * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
group-onsemi 0:098463de4c5d 1288 * @retval None
group-onsemi 0:098463de4c5d 1289 */
group-onsemi 0:098463de4c5d 1290 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
group-onsemi 0:098463de4c5d 1291 {
group-onsemi 0:098463de4c5d 1292 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
group-onsemi 0:098463de4c5d 1293 }
group-onsemi 0:098463de4c5d 1294
group-onsemi 0:098463de4c5d 1295 /**
group-onsemi 0:098463de4c5d 1296 * @brief Return Smartcard prescaler value, used for dividing the USART clock
group-onsemi 0:098463de4c5d 1297 * source to provide the SMARTCARD Clock (5 bits value)
group-onsemi 0:098463de4c5d 1298 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1299 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1300 * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
group-onsemi 0:098463de4c5d 1301 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1302 * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
group-onsemi 0:098463de4c5d 1303 */
group-onsemi 0:098463de4c5d 1304 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1305 {
group-onsemi 0:098463de4c5d 1306 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
group-onsemi 0:098463de4c5d 1307 }
group-onsemi 0:098463de4c5d 1308
group-onsemi 0:098463de4c5d 1309 /**
group-onsemi 0:098463de4c5d 1310 * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
group-onsemi 0:098463de4c5d 1311 * (GT[7:0] bits : Guard time value)
group-onsemi 0:098463de4c5d 1312 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1313 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1314 * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
group-onsemi 0:098463de4c5d 1315 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1316 * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
group-onsemi 0:098463de4c5d 1317 * @retval None
group-onsemi 0:098463de4c5d 1318 */
group-onsemi 0:098463de4c5d 1319 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
group-onsemi 0:098463de4c5d 1320 {
group-onsemi 0:098463de4c5d 1321 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
group-onsemi 0:098463de4c5d 1322 }
group-onsemi 0:098463de4c5d 1323
group-onsemi 0:098463de4c5d 1324 /**
group-onsemi 0:098463de4c5d 1325 * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
group-onsemi 0:098463de4c5d 1326 * (GT[7:0] bits : Guard time value)
group-onsemi 0:098463de4c5d 1327 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1328 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1329 * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
group-onsemi 0:098463de4c5d 1330 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1331 * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
group-onsemi 0:098463de4c5d 1332 */
group-onsemi 0:098463de4c5d 1333 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1334 {
group-onsemi 0:098463de4c5d 1335 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
group-onsemi 0:098463de4c5d 1336 }
group-onsemi 0:098463de4c5d 1337
group-onsemi 0:098463de4c5d 1338 /**
group-onsemi 0:098463de4c5d 1339 * @}
group-onsemi 0:098463de4c5d 1340 */
group-onsemi 0:098463de4c5d 1341
group-onsemi 0:098463de4c5d 1342 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
group-onsemi 0:098463de4c5d 1343 * @{
group-onsemi 0:098463de4c5d 1344 */
group-onsemi 0:098463de4c5d 1345
group-onsemi 0:098463de4c5d 1346 /**
group-onsemi 0:098463de4c5d 1347 * @brief Enable Single Wire Half-Duplex mode
group-onsemi 0:098463de4c5d 1348 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1349 * Half-Duplex mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1350 * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
group-onsemi 0:098463de4c5d 1351 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1352 * @retval None
group-onsemi 0:098463de4c5d 1353 */
group-onsemi 0:098463de4c5d 1354 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1355 {
group-onsemi 0:098463de4c5d 1356 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
group-onsemi 0:098463de4c5d 1357 }
group-onsemi 0:098463de4c5d 1358
group-onsemi 0:098463de4c5d 1359 /**
group-onsemi 0:098463de4c5d 1360 * @brief Disable Single Wire Half-Duplex mode
group-onsemi 0:098463de4c5d 1361 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1362 * Half-Duplex mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1363 * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
group-onsemi 0:098463de4c5d 1364 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1365 * @retval None
group-onsemi 0:098463de4c5d 1366 */
group-onsemi 0:098463de4c5d 1367 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1368 {
group-onsemi 0:098463de4c5d 1369 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
group-onsemi 0:098463de4c5d 1370 }
group-onsemi 0:098463de4c5d 1371
group-onsemi 0:098463de4c5d 1372 /**
group-onsemi 0:098463de4c5d 1373 * @brief Indicate if Single Wire Half-Duplex mode is enabled
group-onsemi 0:098463de4c5d 1374 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1375 * Half-Duplex mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1376 * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
group-onsemi 0:098463de4c5d 1377 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1378 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1379 */
group-onsemi 0:098463de4c5d 1380 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1381 {
group-onsemi 0:098463de4c5d 1382 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1383 }
group-onsemi 0:098463de4c5d 1384
group-onsemi 0:098463de4c5d 1385 /**
group-onsemi 0:098463de4c5d 1386 * @}
group-onsemi 0:098463de4c5d 1387 */
group-onsemi 0:098463de4c5d 1388
group-onsemi 0:098463de4c5d 1389 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
group-onsemi 0:098463de4c5d 1390 * @{
group-onsemi 0:098463de4c5d 1391 */
group-onsemi 0:098463de4c5d 1392
group-onsemi 0:098463de4c5d 1393 /**
group-onsemi 0:098463de4c5d 1394 * @brief Set LIN Break Detection Length
group-onsemi 0:098463de4c5d 1395 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1396 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1397 * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
group-onsemi 0:098463de4c5d 1398 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1399 * @param LINBDLength This parameter can be one of the following values:
group-onsemi 0:098463de4c5d 1400 * @arg @ref LL_USART_LINBREAK_DETECT_10B
group-onsemi 0:098463de4c5d 1401 * @arg @ref LL_USART_LINBREAK_DETECT_11B
group-onsemi 0:098463de4c5d 1402 * @retval None
group-onsemi 0:098463de4c5d 1403 */
group-onsemi 0:098463de4c5d 1404 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
group-onsemi 0:098463de4c5d 1405 {
group-onsemi 0:098463de4c5d 1406 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
group-onsemi 0:098463de4c5d 1407 }
group-onsemi 0:098463de4c5d 1408
group-onsemi 0:098463de4c5d 1409 /**
group-onsemi 0:098463de4c5d 1410 * @brief Return LIN Break Detection Length
group-onsemi 0:098463de4c5d 1411 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1412 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1413 * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
group-onsemi 0:098463de4c5d 1414 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1415 * @retval Returned value can be one of the following values:
group-onsemi 0:098463de4c5d 1416 * @arg @ref LL_USART_LINBREAK_DETECT_10B
group-onsemi 0:098463de4c5d 1417 * @arg @ref LL_USART_LINBREAK_DETECT_11B
group-onsemi 0:098463de4c5d 1418 */
group-onsemi 0:098463de4c5d 1419 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1420 {
group-onsemi 0:098463de4c5d 1421 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
group-onsemi 0:098463de4c5d 1422 }
group-onsemi 0:098463de4c5d 1423
group-onsemi 0:098463de4c5d 1424 /**
group-onsemi 0:098463de4c5d 1425 * @brief Enable LIN mode
group-onsemi 0:098463de4c5d 1426 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1427 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1428 * @rmtoll CR2 LINEN LL_USART_EnableLIN
group-onsemi 0:098463de4c5d 1429 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1430 * @retval None
group-onsemi 0:098463de4c5d 1431 */
group-onsemi 0:098463de4c5d 1432 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1433 {
group-onsemi 0:098463de4c5d 1434 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
group-onsemi 0:098463de4c5d 1435 }
group-onsemi 0:098463de4c5d 1436
group-onsemi 0:098463de4c5d 1437 /**
group-onsemi 0:098463de4c5d 1438 * @brief Disable LIN mode
group-onsemi 0:098463de4c5d 1439 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1440 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1441 * @rmtoll CR2 LINEN LL_USART_DisableLIN
group-onsemi 0:098463de4c5d 1442 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1443 * @retval None
group-onsemi 0:098463de4c5d 1444 */
group-onsemi 0:098463de4c5d 1445 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1446 {
group-onsemi 0:098463de4c5d 1447 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
group-onsemi 0:098463de4c5d 1448 }
group-onsemi 0:098463de4c5d 1449
group-onsemi 0:098463de4c5d 1450 /**
group-onsemi 0:098463de4c5d 1451 * @brief Indicate if LIN mode is enabled
group-onsemi 0:098463de4c5d 1452 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1453 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1454 * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
group-onsemi 0:098463de4c5d 1455 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1456 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1457 */
group-onsemi 0:098463de4c5d 1458 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1459 {
group-onsemi 0:098463de4c5d 1460 return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
group-onsemi 0:098463de4c5d 1461 }
group-onsemi 0:098463de4c5d 1462
group-onsemi 0:098463de4c5d 1463 /**
group-onsemi 0:098463de4c5d 1464 * @}
group-onsemi 0:098463de4c5d 1465 */
group-onsemi 0:098463de4c5d 1466
group-onsemi 0:098463de4c5d 1467 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
group-onsemi 0:098463de4c5d 1468 * @{
group-onsemi 0:098463de4c5d 1469 */
group-onsemi 0:098463de4c5d 1470
group-onsemi 0:098463de4c5d 1471 /**
group-onsemi 0:098463de4c5d 1472 * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
group-onsemi 0:098463de4c5d 1473 * @note In UART mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1474 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1475 * - CLKEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1476 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1477 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1478 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1479 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1480 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1481 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
group-onsemi 0:098463de4c5d 1482 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1483 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1484 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1485 * @note Other remaining configurations items related to Asynchronous Mode
group-onsemi 0:098463de4c5d 1486 * (as Baud Rate, Word length, Parity, ...) should be set using
group-onsemi 0:098463de4c5d 1487 * dedicated functions
group-onsemi 0:098463de4c5d 1488 * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
group-onsemi 0:098463de4c5d 1489 * CR2 CLKEN LL_USART_ConfigAsyncMode\n
group-onsemi 0:098463de4c5d 1490 * CR3 SCEN LL_USART_ConfigAsyncMode\n
group-onsemi 0:098463de4c5d 1491 * CR3 IREN LL_USART_ConfigAsyncMode\n
group-onsemi 0:098463de4c5d 1492 * CR3 HDSEL LL_USART_ConfigAsyncMode
group-onsemi 0:098463de4c5d 1493 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1494 * @retval None
group-onsemi 0:098463de4c5d 1495 */
group-onsemi 0:098463de4c5d 1496 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1497 {
group-onsemi 0:098463de4c5d 1498 /* In Asynchronous mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1499 - LINEN, CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1500 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1501 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
group-onsemi 0:098463de4c5d 1502 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1503 }
group-onsemi 0:098463de4c5d 1504
group-onsemi 0:098463de4c5d 1505 /**
group-onsemi 0:098463de4c5d 1506 * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
group-onsemi 0:098463de4c5d 1507 * @note In Synchronous mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1508 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1509 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1510 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1511 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1512 * This function also sets the USART in Synchronous mode.
group-onsemi 0:098463de4c5d 1513 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1514 * Synchronous mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1515 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1516 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1517 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1518 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1519 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1520 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
group-onsemi 0:098463de4c5d 1521 * @note Other remaining configurations items related to Synchronous Mode
group-onsemi 0:098463de4c5d 1522 * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
group-onsemi 0:098463de4c5d 1523 * dedicated functions
group-onsemi 0:098463de4c5d 1524 * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
group-onsemi 0:098463de4c5d 1525 * CR2 CLKEN LL_USART_ConfigSyncMode\n
group-onsemi 0:098463de4c5d 1526 * CR3 SCEN LL_USART_ConfigSyncMode\n
group-onsemi 0:098463de4c5d 1527 * CR3 IREN LL_USART_ConfigSyncMode\n
group-onsemi 0:098463de4c5d 1528 * CR3 HDSEL LL_USART_ConfigSyncMode
group-onsemi 0:098463de4c5d 1529 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1530 * @retval None
group-onsemi 0:098463de4c5d 1531 */
group-onsemi 0:098463de4c5d 1532 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1533 {
group-onsemi 0:098463de4c5d 1534 /* In Synchronous mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1535 - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1536 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1537 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
group-onsemi 0:098463de4c5d 1538 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1539 /* set the UART/USART in Synchronous mode */
group-onsemi 0:098463de4c5d 1540 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
group-onsemi 0:098463de4c5d 1541 }
group-onsemi 0:098463de4c5d 1542
group-onsemi 0:098463de4c5d 1543 /**
group-onsemi 0:098463de4c5d 1544 * @brief Perform basic configuration of USART for enabling use in LIN Mode
group-onsemi 0:098463de4c5d 1545 * @note In LIN mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1546 * - STOP and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1547 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1548 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1549 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1550 * This function also set the UART/USART in LIN mode.
group-onsemi 0:098463de4c5d 1551 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1552 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1553 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1554 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
group-onsemi 0:098463de4c5d 1555 * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
group-onsemi 0:098463de4c5d 1556 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1557 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1558 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1559 * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
group-onsemi 0:098463de4c5d 1560 * @note Other remaining configurations items related to LIN Mode
group-onsemi 0:098463de4c5d 1561 * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
group-onsemi 0:098463de4c5d 1562 * dedicated functions
group-onsemi 0:098463de4c5d 1563 * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
group-onsemi 0:098463de4c5d 1564 * CR2 STOP LL_USART_ConfigLINMode\n
group-onsemi 0:098463de4c5d 1565 * CR2 LINEN LL_USART_ConfigLINMode\n
group-onsemi 0:098463de4c5d 1566 * CR3 IREN LL_USART_ConfigLINMode\n
group-onsemi 0:098463de4c5d 1567 * CR3 SCEN LL_USART_ConfigLINMode\n
group-onsemi 0:098463de4c5d 1568 * CR3 HDSEL LL_USART_ConfigLINMode
group-onsemi 0:098463de4c5d 1569 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1570 * @retval None
group-onsemi 0:098463de4c5d 1571 */
group-onsemi 0:098463de4c5d 1572 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1573 {
group-onsemi 0:098463de4c5d 1574 /* In LIN mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1575 - STOP and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1576 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1577 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
group-onsemi 0:098463de4c5d 1578 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1579 /* Set the UART/USART in LIN mode */
group-onsemi 0:098463de4c5d 1580 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
group-onsemi 0:098463de4c5d 1581 }
group-onsemi 0:098463de4c5d 1582
group-onsemi 0:098463de4c5d 1583 /**
group-onsemi 0:098463de4c5d 1584 * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
group-onsemi 0:098463de4c5d 1585 * @note In Half Duplex mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1586 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1587 * - CLKEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1588 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1589 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1590 * This function also sets the UART/USART in Half Duplex mode.
group-onsemi 0:098463de4c5d 1591 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1592 * Half-Duplex mode is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1593 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1594 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1595 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
group-onsemi 0:098463de4c5d 1596 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1597 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1598 * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
group-onsemi 0:098463de4c5d 1599 * @note Other remaining configurations items related to Half Duplex Mode
group-onsemi 0:098463de4c5d 1600 * (as Baud Rate, Word length, Parity, ...) should be set using
group-onsemi 0:098463de4c5d 1601 * dedicated functions
group-onsemi 0:098463de4c5d 1602 * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
group-onsemi 0:098463de4c5d 1603 * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
group-onsemi 0:098463de4c5d 1604 * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
group-onsemi 0:098463de4c5d 1605 * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
group-onsemi 0:098463de4c5d 1606 * CR3 IREN LL_USART_ConfigHalfDuplexMode
group-onsemi 0:098463de4c5d 1607 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1608 * @retval None
group-onsemi 0:098463de4c5d 1609 */
group-onsemi 0:098463de4c5d 1610 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1611 {
group-onsemi 0:098463de4c5d 1612 /* In Half Duplex mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1613 - LINEN and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1614 - SCEN and IREN bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1615 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
group-onsemi 0:098463de4c5d 1616 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
group-onsemi 0:098463de4c5d 1617 /* set the UART/USART in Half Duplex mode */
group-onsemi 0:098463de4c5d 1618 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
group-onsemi 0:098463de4c5d 1619 }
group-onsemi 0:098463de4c5d 1620
group-onsemi 0:098463de4c5d 1621 /**
group-onsemi 0:098463de4c5d 1622 * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
group-onsemi 0:098463de4c5d 1623 * @note In Smartcard mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1624 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1625 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1626 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1627 * This function also configures Stop bits to 1.5 bits and
group-onsemi 0:098463de4c5d 1628 * sets the USART in Smartcard mode (SCEN bit).
group-onsemi 0:098463de4c5d 1629 * Clock Output is also enabled (CLKEN).
group-onsemi 0:098463de4c5d 1630 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1631 * Smartcard feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1632 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1633 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1634 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1635 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1636 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
group-onsemi 0:098463de4c5d 1637 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
group-onsemi 0:098463de4c5d 1638 * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
group-onsemi 0:098463de4c5d 1639 * @note Other remaining configurations items related to Smartcard Mode
group-onsemi 0:098463de4c5d 1640 * (as Baud Rate, Word length, Parity, ...) should be set using
group-onsemi 0:098463de4c5d 1641 * dedicated functions
group-onsemi 0:098463de4c5d 1642 * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
group-onsemi 0:098463de4c5d 1643 * CR2 STOP LL_USART_ConfigSmartcardMode\n
group-onsemi 0:098463de4c5d 1644 * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
group-onsemi 0:098463de4c5d 1645 * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
group-onsemi 0:098463de4c5d 1646 * CR3 SCEN LL_USART_ConfigSmartcardMode
group-onsemi 0:098463de4c5d 1647 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1648 * @retval None
group-onsemi 0:098463de4c5d 1649 */
group-onsemi 0:098463de4c5d 1650 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1651 {
group-onsemi 0:098463de4c5d 1652 /* In Smartcard mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1653 - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1654 - IREN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1655 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
group-onsemi 0:098463de4c5d 1656 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1657 /* Configure Stop bits to 1.5 bits */
group-onsemi 0:098463de4c5d 1658 /* Synchronous mode is activated by default */
group-onsemi 0:098463de4c5d 1659 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
group-onsemi 0:098463de4c5d 1660 /* set the UART/USART in Smartcard mode */
group-onsemi 0:098463de4c5d 1661 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
group-onsemi 0:098463de4c5d 1662 }
group-onsemi 0:098463de4c5d 1663
group-onsemi 0:098463de4c5d 1664 /**
group-onsemi 0:098463de4c5d 1665 * @brief Perform basic configuration of USART for enabling use in Irda Mode
group-onsemi 0:098463de4c5d 1666 * @note In IRDA mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1667 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1668 * - STOP and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1669 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1670 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1671 * This function also sets the UART/USART in IRDA mode (IREN bit).
group-onsemi 0:098463de4c5d 1672 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1673 * IrDA feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1674 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1675 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1676 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
group-onsemi 0:098463de4c5d 1677 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1678 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1679 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
group-onsemi 0:098463de4c5d 1680 * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
group-onsemi 0:098463de4c5d 1681 * @note Other remaining configurations items related to Irda Mode
group-onsemi 0:098463de4c5d 1682 * (as Baud Rate, Word length, Power mode, ...) should be set using
group-onsemi 0:098463de4c5d 1683 * dedicated functions
group-onsemi 0:098463de4c5d 1684 * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
group-onsemi 0:098463de4c5d 1685 * CR2 CLKEN LL_USART_ConfigIrdaMode\n
group-onsemi 0:098463de4c5d 1686 * CR2 STOP LL_USART_ConfigIrdaMode\n
group-onsemi 0:098463de4c5d 1687 * CR3 SCEN LL_USART_ConfigIrdaMode\n
group-onsemi 0:098463de4c5d 1688 * CR3 HDSEL LL_USART_ConfigIrdaMode\n
group-onsemi 0:098463de4c5d 1689 * CR3 IREN LL_USART_ConfigIrdaMode
group-onsemi 0:098463de4c5d 1690 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1691 * @retval None
group-onsemi 0:098463de4c5d 1692 */
group-onsemi 0:098463de4c5d 1693 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1694 {
group-onsemi 0:098463de4c5d 1695 /* In IRDA mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1696 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1697 - SCEN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1698 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
group-onsemi 0:098463de4c5d 1699 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
group-onsemi 0:098463de4c5d 1700 /* set the UART/USART in IRDA mode */
group-onsemi 0:098463de4c5d 1701 SET_BIT(USARTx->CR3, USART_CR3_IREN);
group-onsemi 0:098463de4c5d 1702 }
group-onsemi 0:098463de4c5d 1703
group-onsemi 0:098463de4c5d 1704 /**
group-onsemi 0:098463de4c5d 1705 * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
group-onsemi 0:098463de4c5d 1706 * (several USARTs connected in a network, one of the USARTs can be the master,
group-onsemi 0:098463de4c5d 1707 * its TX output connected to the RX inputs of the other slaves USARTs).
group-onsemi 0:098463de4c5d 1708 * @note In MultiProcessor mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1709 * - LINEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1710 * - CLKEN bit in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1711 * - SCEN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1712 * - IREN bit in the USART_CR3 register,
group-onsemi 0:098463de4c5d 1713 * - HDSEL bit in the USART_CR3 register.
group-onsemi 0:098463de4c5d 1714 * @note Call of this function is equivalent to following function call sequence :
group-onsemi 0:098463de4c5d 1715 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
group-onsemi 0:098463de4c5d 1716 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
group-onsemi 0:098463de4c5d 1717 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
group-onsemi 0:098463de4c5d 1718 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
group-onsemi 0:098463de4c5d 1719 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
group-onsemi 0:098463de4c5d 1720 * @note Other remaining configurations items related to Multi processor Mode
group-onsemi 0:098463de4c5d 1721 * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
group-onsemi 0:098463de4c5d 1722 * dedicated functions
group-onsemi 0:098463de4c5d 1723 * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
group-onsemi 0:098463de4c5d 1724 * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
group-onsemi 0:098463de4c5d 1725 * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
group-onsemi 0:098463de4c5d 1726 * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
group-onsemi 0:098463de4c5d 1727 * CR3 IREN LL_USART_ConfigMultiProcessMode
group-onsemi 0:098463de4c5d 1728 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1729 * @retval None
group-onsemi 0:098463de4c5d 1730 */
group-onsemi 0:098463de4c5d 1731 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1732 {
group-onsemi 0:098463de4c5d 1733 /* In Multi Processor mode, the following bits must be kept cleared:
group-onsemi 0:098463de4c5d 1734 - LINEN and CLKEN bits in the USART_CR2 register,
group-onsemi 0:098463de4c5d 1735 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
group-onsemi 0:098463de4c5d 1736 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
group-onsemi 0:098463de4c5d 1737 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
group-onsemi 0:098463de4c5d 1738 }
group-onsemi 0:098463de4c5d 1739
group-onsemi 0:098463de4c5d 1740 /**
group-onsemi 0:098463de4c5d 1741 * @}
group-onsemi 0:098463de4c5d 1742 */
group-onsemi 0:098463de4c5d 1743
group-onsemi 0:098463de4c5d 1744 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
group-onsemi 0:098463de4c5d 1745 * @{
group-onsemi 0:098463de4c5d 1746 */
group-onsemi 0:098463de4c5d 1747
group-onsemi 0:098463de4c5d 1748 /**
group-onsemi 0:098463de4c5d 1749 * @brief Check if the USART Parity Error Flag is set or not
group-onsemi 0:098463de4c5d 1750 * @rmtoll SR PE LL_USART_IsActiveFlag_PE
group-onsemi 0:098463de4c5d 1751 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1752 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1753 */
group-onsemi 0:098463de4c5d 1754 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1755 {
group-onsemi 0:098463de4c5d 1756 return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
group-onsemi 0:098463de4c5d 1757 }
group-onsemi 0:098463de4c5d 1758
group-onsemi 0:098463de4c5d 1759 /**
group-onsemi 0:098463de4c5d 1760 * @brief Check if the USART Framing Error Flag is set or not
group-onsemi 0:098463de4c5d 1761 * @rmtoll SR FE LL_USART_IsActiveFlag_FE
group-onsemi 0:098463de4c5d 1762 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1763 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1764 */
group-onsemi 0:098463de4c5d 1765 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1766 {
group-onsemi 0:098463de4c5d 1767 return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
group-onsemi 0:098463de4c5d 1768 }
group-onsemi 0:098463de4c5d 1769
group-onsemi 0:098463de4c5d 1770 /**
group-onsemi 0:098463de4c5d 1771 * @brief Check if the USART Noise error detected Flag is set or not
group-onsemi 0:098463de4c5d 1772 * @rmtoll SR NF LL_USART_IsActiveFlag_NE
group-onsemi 0:098463de4c5d 1773 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1774 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1775 */
group-onsemi 0:098463de4c5d 1776 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1777 {
group-onsemi 0:098463de4c5d 1778 return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
group-onsemi 0:098463de4c5d 1779 }
group-onsemi 0:098463de4c5d 1780
group-onsemi 0:098463de4c5d 1781 /**
group-onsemi 0:098463de4c5d 1782 * @brief Check if the USART OverRun Error Flag is set or not
group-onsemi 0:098463de4c5d 1783 * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
group-onsemi 0:098463de4c5d 1784 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1785 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1786 */
group-onsemi 0:098463de4c5d 1787 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1788 {
group-onsemi 0:098463de4c5d 1789 return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
group-onsemi 0:098463de4c5d 1790 }
group-onsemi 0:098463de4c5d 1791
group-onsemi 0:098463de4c5d 1792 /**
group-onsemi 0:098463de4c5d 1793 * @brief Check if the USART IDLE line detected Flag is set or not
group-onsemi 0:098463de4c5d 1794 * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
group-onsemi 0:098463de4c5d 1795 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1796 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1797 */
group-onsemi 0:098463de4c5d 1798 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1799 {
group-onsemi 0:098463de4c5d 1800 return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
group-onsemi 0:098463de4c5d 1801 }
group-onsemi 0:098463de4c5d 1802
group-onsemi 0:098463de4c5d 1803 /**
group-onsemi 0:098463de4c5d 1804 * @brief Check if the USART Read Data Register Not Empty Flag is set or not
group-onsemi 0:098463de4c5d 1805 * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
group-onsemi 0:098463de4c5d 1806 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1807 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1808 */
group-onsemi 0:098463de4c5d 1809 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1810 {
group-onsemi 0:098463de4c5d 1811 return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
group-onsemi 0:098463de4c5d 1812 }
group-onsemi 0:098463de4c5d 1813
group-onsemi 0:098463de4c5d 1814 /**
group-onsemi 0:098463de4c5d 1815 * @brief Check if the USART Transmission Complete Flag is set or not
group-onsemi 0:098463de4c5d 1816 * @rmtoll SR TC LL_USART_IsActiveFlag_TC
group-onsemi 0:098463de4c5d 1817 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1818 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1819 */
group-onsemi 0:098463de4c5d 1820 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1821 {
group-onsemi 0:098463de4c5d 1822 return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
group-onsemi 0:098463de4c5d 1823 }
group-onsemi 0:098463de4c5d 1824
group-onsemi 0:098463de4c5d 1825 /**
group-onsemi 0:098463de4c5d 1826 * @brief Check if the USART Transmit Data Register Empty Flag is set or not
group-onsemi 0:098463de4c5d 1827 * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
group-onsemi 0:098463de4c5d 1828 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1829 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1830 */
group-onsemi 0:098463de4c5d 1831 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1832 {
group-onsemi 0:098463de4c5d 1833 return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
group-onsemi 0:098463de4c5d 1834 }
group-onsemi 0:098463de4c5d 1835
group-onsemi 0:098463de4c5d 1836 /**
group-onsemi 0:098463de4c5d 1837 * @brief Check if the USART LIN Break Detection Flag is set or not
group-onsemi 0:098463de4c5d 1838 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1839 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1840 * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
group-onsemi 0:098463de4c5d 1841 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1842 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1843 */
group-onsemi 0:098463de4c5d 1844 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1845 {
group-onsemi 0:098463de4c5d 1846 return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
group-onsemi 0:098463de4c5d 1847 }
group-onsemi 0:098463de4c5d 1848
group-onsemi 0:098463de4c5d 1849 /**
group-onsemi 0:098463de4c5d 1850 * @brief Check if the USART CTS Flag is set or not
group-onsemi 0:098463de4c5d 1851 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 1852 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 1853 * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
group-onsemi 0:098463de4c5d 1854 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1855 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1856 */
group-onsemi 0:098463de4c5d 1857 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1858 {
group-onsemi 0:098463de4c5d 1859 return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
group-onsemi 0:098463de4c5d 1860 }
group-onsemi 0:098463de4c5d 1861
group-onsemi 0:098463de4c5d 1862 /**
group-onsemi 0:098463de4c5d 1863 * @brief Check if the USART Send Break Flag is set or not
group-onsemi 0:098463de4c5d 1864 * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
group-onsemi 0:098463de4c5d 1865 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1866 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1867 */
group-onsemi 0:098463de4c5d 1868 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1869 {
group-onsemi 0:098463de4c5d 1870 return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
group-onsemi 0:098463de4c5d 1871 }
group-onsemi 0:098463de4c5d 1872
group-onsemi 0:098463de4c5d 1873 /**
group-onsemi 0:098463de4c5d 1874 * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
group-onsemi 0:098463de4c5d 1875 * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
group-onsemi 0:098463de4c5d 1876 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1877 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 1878 */
group-onsemi 0:098463de4c5d 1879 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1880 {
group-onsemi 0:098463de4c5d 1881 return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
group-onsemi 0:098463de4c5d 1882 }
group-onsemi 0:098463de4c5d 1883
group-onsemi 0:098463de4c5d 1884 /**
group-onsemi 0:098463de4c5d 1885 * @brief Clear Parity Error Flag
group-onsemi 0:098463de4c5d 1886 * @note Clearing this flag is done by a read access to the USARTx_SR
group-onsemi 0:098463de4c5d 1887 * register followed by a read access to the USARTx_DR register.
group-onsemi 0:098463de4c5d 1888 * @note Please also consider that when clearing this flag, other flags as
group-onsemi 0:098463de4c5d 1889 * NE, FE, ORE, IDLE would also be cleared.
group-onsemi 0:098463de4c5d 1890 * @rmtoll SR PE LL_USART_ClearFlag_PE
group-onsemi 0:098463de4c5d 1891 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1892 * @retval None
group-onsemi 0:098463de4c5d 1893 */
group-onsemi 0:098463de4c5d 1894 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1895 {
group-onsemi 0:098463de4c5d 1896 __IO uint32_t tmpreg;
group-onsemi 0:098463de4c5d 1897 tmpreg = USARTx->SR;
group-onsemi 0:098463de4c5d 1898 (void) tmpreg;
group-onsemi 0:098463de4c5d 1899 tmpreg = USARTx->DR;
group-onsemi 0:098463de4c5d 1900 (void) tmpreg;
group-onsemi 0:098463de4c5d 1901 }
group-onsemi 0:098463de4c5d 1902
group-onsemi 0:098463de4c5d 1903 /**
group-onsemi 0:098463de4c5d 1904 * @brief Clear Framing Error Flag
group-onsemi 0:098463de4c5d 1905 * @note Clearing this flag is done by a read access to the USARTx_SR
group-onsemi 0:098463de4c5d 1906 * register followed by a read access to the USARTx_DR register.
group-onsemi 0:098463de4c5d 1907 * @note Please also consider that when clearing this flag, other flags as
group-onsemi 0:098463de4c5d 1908 * PE, NE, ORE, IDLE would also be cleared.
group-onsemi 0:098463de4c5d 1909 * @rmtoll SR FE LL_USART_ClearFlag_FE
group-onsemi 0:098463de4c5d 1910 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1911 * @retval None
group-onsemi 0:098463de4c5d 1912 */
group-onsemi 0:098463de4c5d 1913 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1914 {
group-onsemi 0:098463de4c5d 1915 __IO uint32_t tmpreg;
group-onsemi 0:098463de4c5d 1916 tmpreg = USARTx->SR;
group-onsemi 0:098463de4c5d 1917 (void) tmpreg;
group-onsemi 0:098463de4c5d 1918 tmpreg = USARTx->DR;
group-onsemi 0:098463de4c5d 1919 (void) tmpreg;
group-onsemi 0:098463de4c5d 1920 }
group-onsemi 0:098463de4c5d 1921
group-onsemi 0:098463de4c5d 1922 /**
group-onsemi 0:098463de4c5d 1923 * @brief Clear Noise detected Flag
group-onsemi 0:098463de4c5d 1924 * @note Clearing this flag is done by a read access to the USARTx_SR
group-onsemi 0:098463de4c5d 1925 * register followed by a read access to the USARTx_DR register.
group-onsemi 0:098463de4c5d 1926 * @note Please also consider that when clearing this flag, other flags as
group-onsemi 0:098463de4c5d 1927 * PE, FE, ORE, IDLE would also be cleared.
group-onsemi 0:098463de4c5d 1928 * @rmtoll SR NF LL_USART_ClearFlag_NE
group-onsemi 0:098463de4c5d 1929 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1930 * @retval None
group-onsemi 0:098463de4c5d 1931 */
group-onsemi 0:098463de4c5d 1932 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1933 {
group-onsemi 0:098463de4c5d 1934 __IO uint32_t tmpreg;
group-onsemi 0:098463de4c5d 1935 tmpreg = USARTx->SR;
group-onsemi 0:098463de4c5d 1936 (void) tmpreg;
group-onsemi 0:098463de4c5d 1937 tmpreg = USARTx->DR;
group-onsemi 0:098463de4c5d 1938 (void) tmpreg;
group-onsemi 0:098463de4c5d 1939 }
group-onsemi 0:098463de4c5d 1940
group-onsemi 0:098463de4c5d 1941 /**
group-onsemi 0:098463de4c5d 1942 * @brief Clear OverRun Error Flag
group-onsemi 0:098463de4c5d 1943 * @note Clearing this flag is done by a read access to the USARTx_SR
group-onsemi 0:098463de4c5d 1944 * register followed by a read access to the USARTx_DR register.
group-onsemi 0:098463de4c5d 1945 * @note Please also consider that when clearing this flag, other flags as
group-onsemi 0:098463de4c5d 1946 * PE, NE, FE, IDLE would also be cleared.
group-onsemi 0:098463de4c5d 1947 * @rmtoll SR ORE LL_USART_ClearFlag_ORE
group-onsemi 0:098463de4c5d 1948 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1949 * @retval None
group-onsemi 0:098463de4c5d 1950 */
group-onsemi 0:098463de4c5d 1951 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1952 {
group-onsemi 0:098463de4c5d 1953 __IO uint32_t tmpreg;
group-onsemi 0:098463de4c5d 1954 tmpreg = USARTx->SR;
group-onsemi 0:098463de4c5d 1955 (void) tmpreg;
group-onsemi 0:098463de4c5d 1956 tmpreg = USARTx->DR;
group-onsemi 0:098463de4c5d 1957 (void) tmpreg;
group-onsemi 0:098463de4c5d 1958 }
group-onsemi 0:098463de4c5d 1959
group-onsemi 0:098463de4c5d 1960 /**
group-onsemi 0:098463de4c5d 1961 * @brief Clear IDLE line detected Flag
group-onsemi 0:098463de4c5d 1962 * @note Clearing this flag is done by a read access to the USARTx_SR
group-onsemi 0:098463de4c5d 1963 * register followed by a read access to the USARTx_DR register.
group-onsemi 0:098463de4c5d 1964 * @note Please also consider that when clearing this flag, other flags as
group-onsemi 0:098463de4c5d 1965 * PE, NE, FE, ORE would also be cleared.
group-onsemi 0:098463de4c5d 1966 * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
group-onsemi 0:098463de4c5d 1967 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1968 * @retval None
group-onsemi 0:098463de4c5d 1969 */
group-onsemi 0:098463de4c5d 1970 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1971 {
group-onsemi 0:098463de4c5d 1972 __IO uint32_t tmpreg;
group-onsemi 0:098463de4c5d 1973 tmpreg = USARTx->SR;
group-onsemi 0:098463de4c5d 1974 (void) tmpreg;
group-onsemi 0:098463de4c5d 1975 tmpreg = USARTx->DR;
group-onsemi 0:098463de4c5d 1976 (void) tmpreg;
group-onsemi 0:098463de4c5d 1977 }
group-onsemi 0:098463de4c5d 1978
group-onsemi 0:098463de4c5d 1979 /**
group-onsemi 0:098463de4c5d 1980 * @brief Clear Transmission Complete Flag
group-onsemi 0:098463de4c5d 1981 * @rmtoll SR TC LL_USART_ClearFlag_TC
group-onsemi 0:098463de4c5d 1982 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1983 * @retval None
group-onsemi 0:098463de4c5d 1984 */
group-onsemi 0:098463de4c5d 1985 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1986 {
group-onsemi 0:098463de4c5d 1987 WRITE_REG(USARTx->SR , ~(USART_SR_TC));
group-onsemi 0:098463de4c5d 1988 }
group-onsemi 0:098463de4c5d 1989
group-onsemi 0:098463de4c5d 1990 /**
group-onsemi 0:098463de4c5d 1991 * @brief Clear RX Not Empty Flag
group-onsemi 0:098463de4c5d 1992 * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
group-onsemi 0:098463de4c5d 1993 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 1994 * @retval None
group-onsemi 0:098463de4c5d 1995 */
group-onsemi 0:098463de4c5d 1996 __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 1997 {
group-onsemi 0:098463de4c5d 1998 WRITE_REG(USARTx->SR , ~(USART_SR_RXNE));
group-onsemi 0:098463de4c5d 1999 }
group-onsemi 0:098463de4c5d 2000
group-onsemi 0:098463de4c5d 2001 /**
group-onsemi 0:098463de4c5d 2002 * @brief Clear LIN Break Detection Flag
group-onsemi 0:098463de4c5d 2003 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2004 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2005 * @rmtoll SR LBD LL_USART_ClearFlag_LBD
group-onsemi 0:098463de4c5d 2006 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2007 * @retval None
group-onsemi 0:098463de4c5d 2008 */
group-onsemi 0:098463de4c5d 2009 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2010 {
group-onsemi 0:098463de4c5d 2011 WRITE_REG(USARTx->SR , ~(USART_SR_LBD));
group-onsemi 0:098463de4c5d 2012 }
group-onsemi 0:098463de4c5d 2013
group-onsemi 0:098463de4c5d 2014 /**
group-onsemi 0:098463de4c5d 2015 * @brief Clear CTS Interrupt Flag
group-onsemi 0:098463de4c5d 2016 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2017 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2018 * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
group-onsemi 0:098463de4c5d 2019 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2020 * @retval None
group-onsemi 0:098463de4c5d 2021 */
group-onsemi 0:098463de4c5d 2022 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2023 {
group-onsemi 0:098463de4c5d 2024 WRITE_REG(USARTx->SR , ~(USART_SR_CTS));
group-onsemi 0:098463de4c5d 2025 }
group-onsemi 0:098463de4c5d 2026
group-onsemi 0:098463de4c5d 2027 /**
group-onsemi 0:098463de4c5d 2028 * @}
group-onsemi 0:098463de4c5d 2029 */
group-onsemi 0:098463de4c5d 2030
group-onsemi 0:098463de4c5d 2031 /** @defgroup USART_LL_EF_IT_Management IT_Management
group-onsemi 0:098463de4c5d 2032 * @{
group-onsemi 0:098463de4c5d 2033 */
group-onsemi 0:098463de4c5d 2034
group-onsemi 0:098463de4c5d 2035 /**
group-onsemi 0:098463de4c5d 2036 * @brief Enable IDLE Interrupt
group-onsemi 0:098463de4c5d 2037 * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
group-onsemi 0:098463de4c5d 2038 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2039 * @retval None
group-onsemi 0:098463de4c5d 2040 */
group-onsemi 0:098463de4c5d 2041 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2042 {
group-onsemi 0:098463de4c5d 2043 SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
group-onsemi 0:098463de4c5d 2044 }
group-onsemi 0:098463de4c5d 2045
group-onsemi 0:098463de4c5d 2046 /**
group-onsemi 0:098463de4c5d 2047 * @brief Enable RX Not Empty Interrupt
group-onsemi 0:098463de4c5d 2048 * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
group-onsemi 0:098463de4c5d 2049 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2050 * @retval None
group-onsemi 0:098463de4c5d 2051 */
group-onsemi 0:098463de4c5d 2052 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2053 {
group-onsemi 0:098463de4c5d 2054 SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
group-onsemi 0:098463de4c5d 2055 }
group-onsemi 0:098463de4c5d 2056
group-onsemi 0:098463de4c5d 2057 /**
group-onsemi 0:098463de4c5d 2058 * @brief Enable Transmission Complete Interrupt
group-onsemi 0:098463de4c5d 2059 * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
group-onsemi 0:098463de4c5d 2060 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2061 * @retval None
group-onsemi 0:098463de4c5d 2062 */
group-onsemi 0:098463de4c5d 2063 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2064 {
group-onsemi 0:098463de4c5d 2065 SET_BIT(USARTx->CR1, USART_CR1_TCIE);
group-onsemi 0:098463de4c5d 2066 }
group-onsemi 0:098463de4c5d 2067
group-onsemi 0:098463de4c5d 2068 /**
group-onsemi 0:098463de4c5d 2069 * @brief Enable TX Empty Interrupt
group-onsemi 0:098463de4c5d 2070 * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
group-onsemi 0:098463de4c5d 2071 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2072 * @retval None
group-onsemi 0:098463de4c5d 2073 */
group-onsemi 0:098463de4c5d 2074 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2075 {
group-onsemi 0:098463de4c5d 2076 SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
group-onsemi 0:098463de4c5d 2077 }
group-onsemi 0:098463de4c5d 2078
group-onsemi 0:098463de4c5d 2079 /**
group-onsemi 0:098463de4c5d 2080 * @brief Enable Parity Error Interrupt
group-onsemi 0:098463de4c5d 2081 * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
group-onsemi 0:098463de4c5d 2082 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2083 * @retval None
group-onsemi 0:098463de4c5d 2084 */
group-onsemi 0:098463de4c5d 2085 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2086 {
group-onsemi 0:098463de4c5d 2087 SET_BIT(USARTx->CR1, USART_CR1_PEIE);
group-onsemi 0:098463de4c5d 2088 }
group-onsemi 0:098463de4c5d 2089
group-onsemi 0:098463de4c5d 2090 /**
group-onsemi 0:098463de4c5d 2091 * @brief Enable LIN Break Detection Interrupt
group-onsemi 0:098463de4c5d 2092 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2093 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2094 * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
group-onsemi 0:098463de4c5d 2095 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2096 * @retval None
group-onsemi 0:098463de4c5d 2097 */
group-onsemi 0:098463de4c5d 2098 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2099 {
group-onsemi 0:098463de4c5d 2100 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
group-onsemi 0:098463de4c5d 2101 }
group-onsemi 0:098463de4c5d 2102
group-onsemi 0:098463de4c5d 2103 /**
group-onsemi 0:098463de4c5d 2104 * @brief Enable Error Interrupt
group-onsemi 0:098463de4c5d 2105 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
group-onsemi 0:098463de4c5d 2106 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
group-onsemi 0:098463de4c5d 2107 * 0: Interrupt is inhibited
group-onsemi 0:098463de4c5d 2108 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
group-onsemi 0:098463de4c5d 2109 * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
group-onsemi 0:098463de4c5d 2110 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2111 * @retval None
group-onsemi 0:098463de4c5d 2112 */
group-onsemi 0:098463de4c5d 2113 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2114 {
group-onsemi 0:098463de4c5d 2115 SET_BIT(USARTx->CR3, USART_CR3_EIE);
group-onsemi 0:098463de4c5d 2116 }
group-onsemi 0:098463de4c5d 2117
group-onsemi 0:098463de4c5d 2118 /**
group-onsemi 0:098463de4c5d 2119 * @brief Enable CTS Interrupt
group-onsemi 0:098463de4c5d 2120 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2121 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2122 * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
group-onsemi 0:098463de4c5d 2123 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2124 * @retval None
group-onsemi 0:098463de4c5d 2125 */
group-onsemi 0:098463de4c5d 2126 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2127 {
group-onsemi 0:098463de4c5d 2128 SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
group-onsemi 0:098463de4c5d 2129 }
group-onsemi 0:098463de4c5d 2130
group-onsemi 0:098463de4c5d 2131 /**
group-onsemi 0:098463de4c5d 2132 * @brief Disable IDLE Interrupt
group-onsemi 0:098463de4c5d 2133 * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
group-onsemi 0:098463de4c5d 2134 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2135 * @retval None
group-onsemi 0:098463de4c5d 2136 */
group-onsemi 0:098463de4c5d 2137 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2138 {
group-onsemi 0:098463de4c5d 2139 CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
group-onsemi 0:098463de4c5d 2140 }
group-onsemi 0:098463de4c5d 2141
group-onsemi 0:098463de4c5d 2142 /**
group-onsemi 0:098463de4c5d 2143 * @brief Disable RX Not Empty Interrupt
group-onsemi 0:098463de4c5d 2144 * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
group-onsemi 0:098463de4c5d 2145 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2146 * @retval None
group-onsemi 0:098463de4c5d 2147 */
group-onsemi 0:098463de4c5d 2148 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2149 {
group-onsemi 0:098463de4c5d 2150 CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
group-onsemi 0:098463de4c5d 2151 }
group-onsemi 0:098463de4c5d 2152
group-onsemi 0:098463de4c5d 2153 /**
group-onsemi 0:098463de4c5d 2154 * @brief Disable Transmission Complete Interrupt
group-onsemi 0:098463de4c5d 2155 * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
group-onsemi 0:098463de4c5d 2156 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2157 * @retval None
group-onsemi 0:098463de4c5d 2158 */
group-onsemi 0:098463de4c5d 2159 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2160 {
group-onsemi 0:098463de4c5d 2161 CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
group-onsemi 0:098463de4c5d 2162 }
group-onsemi 0:098463de4c5d 2163
group-onsemi 0:098463de4c5d 2164 /**
group-onsemi 0:098463de4c5d 2165 * @brief Disable TX Empty Interrupt
group-onsemi 0:098463de4c5d 2166 * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
group-onsemi 0:098463de4c5d 2167 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2168 * @retval None
group-onsemi 0:098463de4c5d 2169 */
group-onsemi 0:098463de4c5d 2170 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2171 {
group-onsemi 0:098463de4c5d 2172 CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
group-onsemi 0:098463de4c5d 2173 }
group-onsemi 0:098463de4c5d 2174
group-onsemi 0:098463de4c5d 2175 /**
group-onsemi 0:098463de4c5d 2176 * @brief Disable Parity Error Interrupt
group-onsemi 0:098463de4c5d 2177 * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
group-onsemi 0:098463de4c5d 2178 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2179 * @retval None
group-onsemi 0:098463de4c5d 2180 */
group-onsemi 0:098463de4c5d 2181 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2182 {
group-onsemi 0:098463de4c5d 2183 CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
group-onsemi 0:098463de4c5d 2184 }
group-onsemi 0:098463de4c5d 2185
group-onsemi 0:098463de4c5d 2186 /**
group-onsemi 0:098463de4c5d 2187 * @brief Disable LIN Break Detection Interrupt
group-onsemi 0:098463de4c5d 2188 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2189 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2190 * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
group-onsemi 0:098463de4c5d 2191 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2192 * @retval None
group-onsemi 0:098463de4c5d 2193 */
group-onsemi 0:098463de4c5d 2194 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2195 {
group-onsemi 0:098463de4c5d 2196 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
group-onsemi 0:098463de4c5d 2197 }
group-onsemi 0:098463de4c5d 2198
group-onsemi 0:098463de4c5d 2199 /**
group-onsemi 0:098463de4c5d 2200 * @brief Disable Error Interrupt
group-onsemi 0:098463de4c5d 2201 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
group-onsemi 0:098463de4c5d 2202 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
group-onsemi 0:098463de4c5d 2203 * 0: Interrupt is inhibited
group-onsemi 0:098463de4c5d 2204 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
group-onsemi 0:098463de4c5d 2205 * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
group-onsemi 0:098463de4c5d 2206 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2207 * @retval None
group-onsemi 0:098463de4c5d 2208 */
group-onsemi 0:098463de4c5d 2209 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2210 {
group-onsemi 0:098463de4c5d 2211 CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
group-onsemi 0:098463de4c5d 2212 }
group-onsemi 0:098463de4c5d 2213
group-onsemi 0:098463de4c5d 2214 /**
group-onsemi 0:098463de4c5d 2215 * @brief Disable CTS Interrupt
group-onsemi 0:098463de4c5d 2216 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2217 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2218 * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
group-onsemi 0:098463de4c5d 2219 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2220 * @retval None
group-onsemi 0:098463de4c5d 2221 */
group-onsemi 0:098463de4c5d 2222 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2223 {
group-onsemi 0:098463de4c5d 2224 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
group-onsemi 0:098463de4c5d 2225 }
group-onsemi 0:098463de4c5d 2226
group-onsemi 0:098463de4c5d 2227 /**
group-onsemi 0:098463de4c5d 2228 * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
group-onsemi 0:098463de4c5d 2229 * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
group-onsemi 0:098463de4c5d 2230 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2231 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2232 */
group-onsemi 0:098463de4c5d 2233 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2234 {
group-onsemi 0:098463de4c5d 2235 return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
group-onsemi 0:098463de4c5d 2236 }
group-onsemi 0:098463de4c5d 2237
group-onsemi 0:098463de4c5d 2238 /**
group-onsemi 0:098463de4c5d 2239 * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2240 * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
group-onsemi 0:098463de4c5d 2241 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2242 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2243 */
group-onsemi 0:098463de4c5d 2244 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2245 {
group-onsemi 0:098463de4c5d 2246 return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
group-onsemi 0:098463de4c5d 2247 }
group-onsemi 0:098463de4c5d 2248
group-onsemi 0:098463de4c5d 2249 /**
group-onsemi 0:098463de4c5d 2250 * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2251 * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
group-onsemi 0:098463de4c5d 2252 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2253 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2254 */
group-onsemi 0:098463de4c5d 2255 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2256 {
group-onsemi 0:098463de4c5d 2257 return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
group-onsemi 0:098463de4c5d 2258 }
group-onsemi 0:098463de4c5d 2259
group-onsemi 0:098463de4c5d 2260 /**
group-onsemi 0:098463de4c5d 2261 * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2262 * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
group-onsemi 0:098463de4c5d 2263 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2264 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2265 */
group-onsemi 0:098463de4c5d 2266 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2267 {
group-onsemi 0:098463de4c5d 2268 return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
group-onsemi 0:098463de4c5d 2269 }
group-onsemi 0:098463de4c5d 2270
group-onsemi 0:098463de4c5d 2271 /**
group-onsemi 0:098463de4c5d 2272 * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2273 * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
group-onsemi 0:098463de4c5d 2274 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2275 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2276 */
group-onsemi 0:098463de4c5d 2277 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2278 {
group-onsemi 0:098463de4c5d 2279 return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
group-onsemi 0:098463de4c5d 2280 }
group-onsemi 0:098463de4c5d 2281
group-onsemi 0:098463de4c5d 2282 /**
group-onsemi 0:098463de4c5d 2283 * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2284 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2285 * LIN feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2286 * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
group-onsemi 0:098463de4c5d 2287 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2288 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2289 */
group-onsemi 0:098463de4c5d 2290 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2291 {
group-onsemi 0:098463de4c5d 2292 return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
group-onsemi 0:098463de4c5d 2293 }
group-onsemi 0:098463de4c5d 2294
group-onsemi 0:098463de4c5d 2295 /**
group-onsemi 0:098463de4c5d 2296 * @brief Check if the USART Error Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2297 * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
group-onsemi 0:098463de4c5d 2298 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2299 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2300 */
group-onsemi 0:098463de4c5d 2301 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2302 {
group-onsemi 0:098463de4c5d 2303 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
group-onsemi 0:098463de4c5d 2304 }
group-onsemi 0:098463de4c5d 2305
group-onsemi 0:098463de4c5d 2306 /**
group-onsemi 0:098463de4c5d 2307 * @brief Check if the USART CTS Interrupt is enabled or disabled.
group-onsemi 0:098463de4c5d 2308 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
group-onsemi 0:098463de4c5d 2309 * Hardware Flow control feature is supported by the USARTx instance.
group-onsemi 0:098463de4c5d 2310 * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
group-onsemi 0:098463de4c5d 2311 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2312 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2313 */
group-onsemi 0:098463de4c5d 2314 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2315 {
group-onsemi 0:098463de4c5d 2316 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
group-onsemi 0:098463de4c5d 2317 }
group-onsemi 0:098463de4c5d 2318
group-onsemi 0:098463de4c5d 2319 /**
group-onsemi 0:098463de4c5d 2320 * @}
group-onsemi 0:098463de4c5d 2321 */
group-onsemi 0:098463de4c5d 2322
group-onsemi 0:098463de4c5d 2323 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
group-onsemi 0:098463de4c5d 2324 * @{
group-onsemi 0:098463de4c5d 2325 */
group-onsemi 0:098463de4c5d 2326
group-onsemi 0:098463de4c5d 2327 /**
group-onsemi 0:098463de4c5d 2328 * @brief Enable DMA Mode for reception
group-onsemi 0:098463de4c5d 2329 * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
group-onsemi 0:098463de4c5d 2330 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2331 * @retval None
group-onsemi 0:098463de4c5d 2332 */
group-onsemi 0:098463de4c5d 2333 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2334 {
group-onsemi 0:098463de4c5d 2335 SET_BIT(USARTx->CR3, USART_CR3_DMAR);
group-onsemi 0:098463de4c5d 2336 }
group-onsemi 0:098463de4c5d 2337
group-onsemi 0:098463de4c5d 2338 /**
group-onsemi 0:098463de4c5d 2339 * @brief Disable DMA Mode for reception
group-onsemi 0:098463de4c5d 2340 * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
group-onsemi 0:098463de4c5d 2341 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2342 * @retval None
group-onsemi 0:098463de4c5d 2343 */
group-onsemi 0:098463de4c5d 2344 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2345 {
group-onsemi 0:098463de4c5d 2346 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
group-onsemi 0:098463de4c5d 2347 }
group-onsemi 0:098463de4c5d 2348
group-onsemi 0:098463de4c5d 2349 /**
group-onsemi 0:098463de4c5d 2350 * @brief Check if DMA Mode is enabled for reception
group-onsemi 0:098463de4c5d 2351 * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
group-onsemi 0:098463de4c5d 2352 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2353 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2354 */
group-onsemi 0:098463de4c5d 2355 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2356 {
group-onsemi 0:098463de4c5d 2357 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
group-onsemi 0:098463de4c5d 2358 }
group-onsemi 0:098463de4c5d 2359
group-onsemi 0:098463de4c5d 2360 /**
group-onsemi 0:098463de4c5d 2361 * @brief Enable DMA Mode for transmission
group-onsemi 0:098463de4c5d 2362 * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
group-onsemi 0:098463de4c5d 2363 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2364 * @retval None
group-onsemi 0:098463de4c5d 2365 */
group-onsemi 0:098463de4c5d 2366 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2367 {
group-onsemi 0:098463de4c5d 2368 SET_BIT(USARTx->CR3, USART_CR3_DMAT);
group-onsemi 0:098463de4c5d 2369 }
group-onsemi 0:098463de4c5d 2370
group-onsemi 0:098463de4c5d 2371 /**
group-onsemi 0:098463de4c5d 2372 * @brief Disable DMA Mode for transmission
group-onsemi 0:098463de4c5d 2373 * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
group-onsemi 0:098463de4c5d 2374 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2375 * @retval None
group-onsemi 0:098463de4c5d 2376 */
group-onsemi 0:098463de4c5d 2377 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2378 {
group-onsemi 0:098463de4c5d 2379 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
group-onsemi 0:098463de4c5d 2380 }
group-onsemi 0:098463de4c5d 2381
group-onsemi 0:098463de4c5d 2382 /**
group-onsemi 0:098463de4c5d 2383 * @brief Check if DMA Mode is enabled for transmission
group-onsemi 0:098463de4c5d 2384 * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
group-onsemi 0:098463de4c5d 2385 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2386 * @retval State of bit (1 or 0).
group-onsemi 0:098463de4c5d 2387 */
group-onsemi 0:098463de4c5d 2388 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2389 {
group-onsemi 0:098463de4c5d 2390 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
group-onsemi 0:098463de4c5d 2391 }
group-onsemi 0:098463de4c5d 2392
group-onsemi 0:098463de4c5d 2393 /**
group-onsemi 0:098463de4c5d 2394 * @brief Get the data register address used for DMA transfer
group-onsemi 0:098463de4c5d 2395 * @rmtoll DR DR LL_USART_DMA_GetRegAddr
group-onsemi 0:098463de4c5d 2396 * @note Address of Data Register is valid for both Transmit and Receive transfers.
group-onsemi 0:098463de4c5d 2397 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2398 * @retval Address of data register
group-onsemi 0:098463de4c5d 2399 */
group-onsemi 0:098463de4c5d 2400 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2401 {
group-onsemi 0:098463de4c5d 2402 /* return address of DR register */
group-onsemi 0:098463de4c5d 2403 return ((uint32_t) &(USARTx->DR));
group-onsemi 0:098463de4c5d 2404 }
group-onsemi 0:098463de4c5d 2405
group-onsemi 0:098463de4c5d 2406 /**
group-onsemi 0:098463de4c5d 2407 * @}
group-onsemi 0:098463de4c5d 2408 */
group-onsemi 0:098463de4c5d 2409
group-onsemi 0:098463de4c5d 2410 /** @defgroup USART_LL_EF_Data_Management Data_Management
group-onsemi 0:098463de4c5d 2411 * @{
group-onsemi 0:098463de4c5d 2412 */
group-onsemi 0:098463de4c5d 2413
group-onsemi 0:098463de4c5d 2414 /**
group-onsemi 0:098463de4c5d 2415 * @brief Read Receiver Data register (Receive Data value, 8 bits)
group-onsemi 0:098463de4c5d 2416 * @rmtoll DR DR LL_USART_ReceiveData8
group-onsemi 0:098463de4c5d 2417 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2418 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
group-onsemi 0:098463de4c5d 2419 */
group-onsemi 0:098463de4c5d 2420 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2421 {
group-onsemi 0:098463de4c5d 2422 return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
group-onsemi 0:098463de4c5d 2423 }
group-onsemi 0:098463de4c5d 2424
group-onsemi 0:098463de4c5d 2425 /**
group-onsemi 0:098463de4c5d 2426 * @brief Read Receiver Data register (Receive Data value, 9 bits)
group-onsemi 0:098463de4c5d 2427 * @rmtoll DR DR LL_USART_ReceiveData9
group-onsemi 0:098463de4c5d 2428 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2429 * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
group-onsemi 0:098463de4c5d 2430 */
group-onsemi 0:098463de4c5d 2431 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2432 {
group-onsemi 0:098463de4c5d 2433 return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
group-onsemi 0:098463de4c5d 2434 }
group-onsemi 0:098463de4c5d 2435
group-onsemi 0:098463de4c5d 2436 /**
group-onsemi 0:098463de4c5d 2437 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
group-onsemi 0:098463de4c5d 2438 * @rmtoll DR DR LL_USART_TransmitData8
group-onsemi 0:098463de4c5d 2439 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2440 * @param Value between Min_Data=0x00 and Max_Data=0xFF
group-onsemi 0:098463de4c5d 2441 * @retval None
group-onsemi 0:098463de4c5d 2442 */
group-onsemi 0:098463de4c5d 2443 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
group-onsemi 0:098463de4c5d 2444 {
group-onsemi 0:098463de4c5d 2445 USARTx->DR = Value;
group-onsemi 0:098463de4c5d 2446 }
group-onsemi 0:098463de4c5d 2447
group-onsemi 0:098463de4c5d 2448 /**
group-onsemi 0:098463de4c5d 2449 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
group-onsemi 0:098463de4c5d 2450 * @rmtoll DR DR LL_USART_TransmitData9
group-onsemi 0:098463de4c5d 2451 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2452 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
group-onsemi 0:098463de4c5d 2453 * @retval None
group-onsemi 0:098463de4c5d 2454 */
group-onsemi 0:098463de4c5d 2455 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
group-onsemi 0:098463de4c5d 2456 {
group-onsemi 0:098463de4c5d 2457 USARTx->DR = Value & 0x1FFU;
group-onsemi 0:098463de4c5d 2458 }
group-onsemi 0:098463de4c5d 2459
group-onsemi 0:098463de4c5d 2460 /**
group-onsemi 0:098463de4c5d 2461 * @}
group-onsemi 0:098463de4c5d 2462 */
group-onsemi 0:098463de4c5d 2463
group-onsemi 0:098463de4c5d 2464 /** @defgroup USART_LL_EF_Execution Execution
group-onsemi 0:098463de4c5d 2465 * @{
group-onsemi 0:098463de4c5d 2466 */
group-onsemi 0:098463de4c5d 2467
group-onsemi 0:098463de4c5d 2468 /**
group-onsemi 0:098463de4c5d 2469 * @brief Request Break sending
group-onsemi 0:098463de4c5d 2470 * @rmtoll CR1 SBK LL_USART_RequestBreakSending
group-onsemi 0:098463de4c5d 2471 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2472 * @retval None
group-onsemi 0:098463de4c5d 2473 */
group-onsemi 0:098463de4c5d 2474 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2475 {
group-onsemi 0:098463de4c5d 2476 SET_BIT(USARTx->CR1, USART_CR1_SBK);
group-onsemi 0:098463de4c5d 2477 }
group-onsemi 0:098463de4c5d 2478
group-onsemi 0:098463de4c5d 2479 /**
group-onsemi 0:098463de4c5d 2480 * @brief Put USART in Mute mode
group-onsemi 0:098463de4c5d 2481 * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
group-onsemi 0:098463de4c5d 2482 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2483 * @retval None
group-onsemi 0:098463de4c5d 2484 */
group-onsemi 0:098463de4c5d 2485 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2486 {
group-onsemi 0:098463de4c5d 2487 SET_BIT(USARTx->CR1, USART_CR1_RWU);
group-onsemi 0:098463de4c5d 2488 }
group-onsemi 0:098463de4c5d 2489
group-onsemi 0:098463de4c5d 2490 /**
group-onsemi 0:098463de4c5d 2491 * @brief Put USART in Active mode
group-onsemi 0:098463de4c5d 2492 * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
group-onsemi 0:098463de4c5d 2493 * @param USARTx USART Instance
group-onsemi 0:098463de4c5d 2494 * @retval None
group-onsemi 0:098463de4c5d 2495 */
group-onsemi 0:098463de4c5d 2496 __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
group-onsemi 0:098463de4c5d 2497 {
group-onsemi 0:098463de4c5d 2498 CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
group-onsemi 0:098463de4c5d 2499 }
group-onsemi 0:098463de4c5d 2500
group-onsemi 0:098463de4c5d 2501 /**
group-onsemi 0:098463de4c5d 2502 * @}
group-onsemi 0:098463de4c5d 2503 */
group-onsemi 0:098463de4c5d 2504
group-onsemi 0:098463de4c5d 2505 #if defined(USE_FULL_LL_DRIVER)
group-onsemi 0:098463de4c5d 2506 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
group-onsemi 0:098463de4c5d 2507 * @{
group-onsemi 0:098463de4c5d 2508 */
group-onsemi 0:098463de4c5d 2509 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
group-onsemi 0:098463de4c5d 2510 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
group-onsemi 0:098463de4c5d 2511 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
group-onsemi 0:098463de4c5d 2512 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
group-onsemi 0:098463de4c5d 2513 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
group-onsemi 0:098463de4c5d 2514 /**
group-onsemi 0:098463de4c5d 2515 * @}
group-onsemi 0:098463de4c5d 2516 */
group-onsemi 0:098463de4c5d 2517 #endif /* USE_FULL_LL_DRIVER */
group-onsemi 0:098463de4c5d 2518
group-onsemi 0:098463de4c5d 2519 /**
group-onsemi 0:098463de4c5d 2520 * @}
group-onsemi 0:098463de4c5d 2521 */
group-onsemi 0:098463de4c5d 2522
group-onsemi 0:098463de4c5d 2523 /**
group-onsemi 0:098463de4c5d 2524 * @}
group-onsemi 0:098463de4c5d 2525 */
group-onsemi 0:098463de4c5d 2526
group-onsemi 0:098463de4c5d 2527 #endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
group-onsemi 0:098463de4c5d 2528
group-onsemi 0:098463de4c5d 2529 /**
group-onsemi 0:098463de4c5d 2530 * @}
group-onsemi 0:098463de4c5d 2531 */
group-onsemi 0:098463de4c5d 2532
group-onsemi 0:098463de4c5d 2533 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 2534 }
group-onsemi 0:098463de4c5d 2535 #endif
group-onsemi 0:098463de4c5d 2536
group-onsemi 0:098463de4c5d 2537 #endif /* __STM32L1xx_LL_USART_H */
group-onsemi 0:098463de4c5d 2538
group-onsemi 0:098463de4c5d 2539 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/