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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_sram.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /**
group-onsemi 0:098463de4c5d 2 ******************************************************************************
group-onsemi 0:098463de4c5d 3 * @file stm32f3xx_hal_sram.c
group-onsemi 0:098463de4c5d 4 * @author MCD Application Team
group-onsemi 0:098463de4c5d 5 * @version V1.3.0
group-onsemi 0:098463de4c5d 6 * @date 01-July-2016
group-onsemi 0:098463de4c5d 7 * @brief SRAM HAL module driver.
group-onsemi 0:098463de4c5d 8 * This file provides a generic firmware to drive SRAM memories
group-onsemi 0:098463de4c5d 9 * mounted as external device.
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 @verbatim
group-onsemi 0:098463de4c5d 12 ==============================================================================
group-onsemi 0:098463de4c5d 13 ##### How to use this driver #####
group-onsemi 0:098463de4c5d 14 ==============================================================================
group-onsemi 0:098463de4c5d 15 [..]
group-onsemi 0:098463de4c5d 16 This driver is a generic layered driver which contains a set of APIs used to
group-onsemi 0:098463de4c5d 17 control SRAM memories. It uses the FMC layer functions to interface
group-onsemi 0:098463de4c5d 18 with SRAM devices.
group-onsemi 0:098463de4c5d 19 The following sequence should be followed to configure the FMC to interface
group-onsemi 0:098463de4c5d 20 with SRAM/PSRAM memories:
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
group-onsemi 0:098463de4c5d 23 SRAM_HandleTypeDef hsram; and:
group-onsemi 0:098463de4c5d 24
group-onsemi 0:098463de4c5d 25 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
group-onsemi 0:098463de4c5d 26 values of the structure member.
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
group-onsemi 0:098463de4c5d 29 base register instance for NOR or SRAM device
group-onsemi 0:098463de4c5d 30
group-onsemi 0:098463de4c5d 31 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
group-onsemi 0:098463de4c5d 32 base register instance for NOR or SRAM extended mode
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
group-onsemi 0:098463de4c5d 35 mode timings; for example:
group-onsemi 0:098463de4c5d 36 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
group-onsemi 0:098463de4c5d 37 and fill its fields with the allowed values of the structure member.
group-onsemi 0:098463de4c5d 38
group-onsemi 0:098463de4c5d 39 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
group-onsemi 0:098463de4c5d 40 performs the following sequence:
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
group-onsemi 0:098463de4c5d 43 (##) Control register configuration using the FMC NORSRAM interface function
group-onsemi 0:098463de4c5d 44 FMC_NORSRAM_Init()
group-onsemi 0:098463de4c5d 45 (##) Timing register configuration using the FMC NORSRAM interface function
group-onsemi 0:098463de4c5d 46 FMC_NORSRAM_Timing_Init()
group-onsemi 0:098463de4c5d 47 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
group-onsemi 0:098463de4c5d 48 FMC_NORSRAM_Extended_Timing_Init()
group-onsemi 0:098463de4c5d 49 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
group-onsemi 0:098463de4c5d 50
group-onsemi 0:098463de4c5d 51 (#) At this stage you can perform read/write accesses from/to the memory connected
group-onsemi 0:098463de4c5d 52 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
group-onsemi 0:098463de4c5d 53 following APIs:
group-onsemi 0:098463de4c5d 54 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
group-onsemi 0:098463de4c5d 55 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
group-onsemi 0:098463de4c5d 58 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
group-onsemi 0:098463de4c5d 59
group-onsemi 0:098463de4c5d 60 (#) You can continuously monitor the SRAM device HAL state by calling the function
group-onsemi 0:098463de4c5d 61 HAL_SRAM_GetState()
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 @endverbatim
group-onsemi 0:098463de4c5d 64 ******************************************************************************
group-onsemi 0:098463de4c5d 65 * @attention
group-onsemi 0:098463de4c5d 66 *
group-onsemi 0:098463de4c5d 67 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
group-onsemi 0:098463de4c5d 68 *
group-onsemi 0:098463de4c5d 69 * Redistribution and use in source and binary forms, with or without modification,
group-onsemi 0:098463de4c5d 70 * are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 71 * 1. Redistributions of source code must retain the above copyright notice,
group-onsemi 0:098463de4c5d 72 * this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 73 * 2. Redistributions in binary form must reproduce the above copyright notice,
group-onsemi 0:098463de4c5d 74 * this list of conditions and the following disclaimer in the documentation
group-onsemi 0:098463de4c5d 75 * and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 76 * 3. Neither the name of STMicroelectronics nor the names of its contributors
group-onsemi 0:098463de4c5d 77 * may be used to endorse or promote products derived from this software
group-onsemi 0:098463de4c5d 78 * without specific prior written permission.
group-onsemi 0:098463de4c5d 79 *
group-onsemi 0:098463de4c5d 80 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 81 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 82 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
group-onsemi 0:098463de4c5d 83 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
group-onsemi 0:098463de4c5d 84 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
group-onsemi 0:098463de4c5d 85 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
group-onsemi 0:098463de4c5d 86 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 87 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
group-onsemi 0:098463de4c5d 88 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
group-onsemi 0:098463de4c5d 89 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 90 *
group-onsemi 0:098463de4c5d 91 ******************************************************************************
group-onsemi 0:098463de4c5d 92 */
group-onsemi 0:098463de4c5d 93
group-onsemi 0:098463de4c5d 94 /* Includes ------------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 95 #include "stm32f3xx_hal.h"
group-onsemi 0:098463de4c5d 96
group-onsemi 0:098463de4c5d 97 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx)
group-onsemi 0:098463de4c5d 98
group-onsemi 0:098463de4c5d 99 /** @addtogroup STM32F3xx_HAL_Driver
group-onsemi 0:098463de4c5d 100 * @{
group-onsemi 0:098463de4c5d 101 */
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 #ifdef HAL_SRAM_MODULE_ENABLED
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 /** @defgroup SRAM SRAM
group-onsemi 0:098463de4c5d 106 * @brief SRAM HAL module driver
group-onsemi 0:098463de4c5d 107 * @{
group-onsemi 0:098463de4c5d 108 */
group-onsemi 0:098463de4c5d 109 /* Private typedef -----------------------------------------------------------*/
group-onsemi 0:098463de4c5d 110 /* Private define ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 111 /* Private macro -------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 112 /* Private variables ---------------------------------------------------------*/
group-onsemi 0:098463de4c5d 113 /* Private function prototypes -----------------------------------------------*/
group-onsemi 0:098463de4c5d 114 /* Exported functions --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 /** @defgroup SRAM_Exported_Functions SRAM Exported Functions
group-onsemi 0:098463de4c5d 117 * @{
group-onsemi 0:098463de4c5d 118 */
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
group-onsemi 0:098463de4c5d 121 * @brief Initialization and Configuration functions.
group-onsemi 0:098463de4c5d 122 *
group-onsemi 0:098463de4c5d 123 @verbatim
group-onsemi 0:098463de4c5d 124 ==============================================================================
group-onsemi 0:098463de4c5d 125 ##### SRAM Initialization and de_initialization functions #####
group-onsemi 0:098463de4c5d 126 ==============================================================================
group-onsemi 0:098463de4c5d 127 [..] This section provides functions allowing to initialize/de-initialize
group-onsemi 0:098463de4c5d 128 the SRAM memory
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 @endverbatim
group-onsemi 0:098463de4c5d 131 * @{
group-onsemi 0:098463de4c5d 132 */
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 /**
group-onsemi 0:098463de4c5d 135 * @brief Performs the SRAM device initialization sequence
group-onsemi 0:098463de4c5d 136 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 137 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 138 * @param Timing: Pointer to SRAM control timing structure
group-onsemi 0:098463de4c5d 139 * @param ExtTiming: Pointer to SRAM extended mode timing structure
group-onsemi 0:098463de4c5d 140 * @retval HAL status
group-onsemi 0:098463de4c5d 141 */
group-onsemi 0:098463de4c5d 142 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
group-onsemi 0:098463de4c5d 143 {
group-onsemi 0:098463de4c5d 144 /* Check the SRAM handle parameter */
group-onsemi 0:098463de4c5d 145 if(hsram == NULL)
group-onsemi 0:098463de4c5d 146 {
group-onsemi 0:098463de4c5d 147 return HAL_ERROR;
group-onsemi 0:098463de4c5d 148 }
group-onsemi 0:098463de4c5d 149
group-onsemi 0:098463de4c5d 150 if(hsram->State == HAL_SRAM_STATE_RESET)
group-onsemi 0:098463de4c5d 151 {
group-onsemi 0:098463de4c5d 152 /* Allocate lock resource and initialize it */
group-onsemi 0:098463de4c5d 153 hsram->Lock = HAL_UNLOCKED;
group-onsemi 0:098463de4c5d 154
group-onsemi 0:098463de4c5d 155 /* Initialize the low level hardware (MSP) */
group-onsemi 0:098463de4c5d 156 HAL_SRAM_MspInit(hsram);
group-onsemi 0:098463de4c5d 157 }
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 /* Initialize SRAM control Interface */
group-onsemi 0:098463de4c5d 160 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
group-onsemi 0:098463de4c5d 161
group-onsemi 0:098463de4c5d 162 /* Initialize SRAM timing Interface */
group-onsemi 0:098463de4c5d 163 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
group-onsemi 0:098463de4c5d 164
group-onsemi 0:098463de4c5d 165 /* Initialize SRAM extended mode timing Interface */
group-onsemi 0:098463de4c5d 166 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
group-onsemi 0:098463de4c5d 167
group-onsemi 0:098463de4c5d 168 /* Enable the NORSRAM device */
group-onsemi 0:098463de4c5d 169 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
group-onsemi 0:098463de4c5d 170
group-onsemi 0:098463de4c5d 171 return HAL_OK;
group-onsemi 0:098463de4c5d 172 }
group-onsemi 0:098463de4c5d 173
group-onsemi 0:098463de4c5d 174 /**
group-onsemi 0:098463de4c5d 175 * @brief Performs the SRAM device De-initialization sequence.
group-onsemi 0:098463de4c5d 176 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 177 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 178 * @retval HAL status
group-onsemi 0:098463de4c5d 179 */
group-onsemi 0:098463de4c5d 180 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 181 {
group-onsemi 0:098463de4c5d 182 /* De-Initialize the low level hardware (MSP) */
group-onsemi 0:098463de4c5d 183 HAL_SRAM_MspDeInit(hsram);
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185 /* Configure the SRAM registers with their reset values */
group-onsemi 0:098463de4c5d 186 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
group-onsemi 0:098463de4c5d 187
group-onsemi 0:098463de4c5d 188 hsram->State = HAL_SRAM_STATE_RESET;
group-onsemi 0:098463de4c5d 189
group-onsemi 0:098463de4c5d 190 /* Release Lock */
group-onsemi 0:098463de4c5d 191 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 192
group-onsemi 0:098463de4c5d 193 return HAL_OK;
group-onsemi 0:098463de4c5d 194 }
group-onsemi 0:098463de4c5d 195
group-onsemi 0:098463de4c5d 196 /**
group-onsemi 0:098463de4c5d 197 * @brief SRAM MSP Init.
group-onsemi 0:098463de4c5d 198 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 199 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 200 * @retval None
group-onsemi 0:098463de4c5d 201 */
group-onsemi 0:098463de4c5d 202 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 203 {
group-onsemi 0:098463de4c5d 204 /* Prevent unused argument(s) compilation warning */
group-onsemi 0:098463de4c5d 205 UNUSED(hsram);
group-onsemi 0:098463de4c5d 206
group-onsemi 0:098463de4c5d 207 /* NOTE : This function Should not be modified, when the callback is needed,
group-onsemi 0:098463de4c5d 208 the HAL_SRAM_MspInit could be implemented in the user file
group-onsemi 0:098463de4c5d 209 */
group-onsemi 0:098463de4c5d 210 }
group-onsemi 0:098463de4c5d 211
group-onsemi 0:098463de4c5d 212 /**
group-onsemi 0:098463de4c5d 213 * @brief SRAM MSP DeInit.
group-onsemi 0:098463de4c5d 214 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 215 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 216 * @retval None
group-onsemi 0:098463de4c5d 217 */
group-onsemi 0:098463de4c5d 218 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 219 {
group-onsemi 0:098463de4c5d 220 /* Prevent unused argument(s) compilation warning */
group-onsemi 0:098463de4c5d 221 UNUSED(hsram);
group-onsemi 0:098463de4c5d 222
group-onsemi 0:098463de4c5d 223 /* NOTE : This function Should not be modified, when the callback is needed,
group-onsemi 0:098463de4c5d 224 the HAL_SRAM_MspDeInit could be implemented in the user file
group-onsemi 0:098463de4c5d 225 */
group-onsemi 0:098463de4c5d 226 }
group-onsemi 0:098463de4c5d 227
group-onsemi 0:098463de4c5d 228 /**
group-onsemi 0:098463de4c5d 229 * @brief DMA transfer complete callback.
group-onsemi 0:098463de4c5d 230 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 231 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 232 * @retval None
group-onsemi 0:098463de4c5d 233 */
group-onsemi 0:098463de4c5d 234 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
group-onsemi 0:098463de4c5d 235 {
group-onsemi 0:098463de4c5d 236 /* Prevent unused argument(s) compilation warning */
group-onsemi 0:098463de4c5d 237 UNUSED(hdma);
group-onsemi 0:098463de4c5d 238
group-onsemi 0:098463de4c5d 239 /* NOTE : This function Should not be modified, when the callback is needed,
group-onsemi 0:098463de4c5d 240 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
group-onsemi 0:098463de4c5d 241 */
group-onsemi 0:098463de4c5d 242 }
group-onsemi 0:098463de4c5d 243
group-onsemi 0:098463de4c5d 244 /**
group-onsemi 0:098463de4c5d 245 * @brief DMA transfer complete error callback.
group-onsemi 0:098463de4c5d 246 * @param hdma: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 247 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 248 * @retval None
group-onsemi 0:098463de4c5d 249 */
group-onsemi 0:098463de4c5d 250 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
group-onsemi 0:098463de4c5d 251 {
group-onsemi 0:098463de4c5d 252 /* Prevent unused argument(s) compilation warning */
group-onsemi 0:098463de4c5d 253 UNUSED(hdma);
group-onsemi 0:098463de4c5d 254
group-onsemi 0:098463de4c5d 255 /* NOTE : This function Should not be modified, when the callback is needed,
group-onsemi 0:098463de4c5d 256 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
group-onsemi 0:098463de4c5d 257 */
group-onsemi 0:098463de4c5d 258 }
group-onsemi 0:098463de4c5d 259
group-onsemi 0:098463de4c5d 260 /**
group-onsemi 0:098463de4c5d 261 * @}
group-onsemi 0:098463de4c5d 262 */
group-onsemi 0:098463de4c5d 263
group-onsemi 0:098463de4c5d 264 /** @defgroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
group-onsemi 0:098463de4c5d 265 * @brief Input Output and memory control functions
group-onsemi 0:098463de4c5d 266 *
group-onsemi 0:098463de4c5d 267 @verbatim
group-onsemi 0:098463de4c5d 268 ==============================================================================
group-onsemi 0:098463de4c5d 269 ##### SRAM Input and Output functions #####
group-onsemi 0:098463de4c5d 270 ==============================================================================
group-onsemi 0:098463de4c5d 271 [..]
group-onsemi 0:098463de4c5d 272 This section provides functions allowing to use and control the SRAM memory
group-onsemi 0:098463de4c5d 273
group-onsemi 0:098463de4c5d 274 @endverbatim
group-onsemi 0:098463de4c5d 275 * @{
group-onsemi 0:098463de4c5d 276 */
group-onsemi 0:098463de4c5d 277
group-onsemi 0:098463de4c5d 278 /**
group-onsemi 0:098463de4c5d 279 * @brief Reads 8-bit buffer from SRAM memory.
group-onsemi 0:098463de4c5d 280 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 281 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 282 * @param pAddress: Pointer to read start address
group-onsemi 0:098463de4c5d 283 * @param pDstBuffer: Pointer to destination buffer
group-onsemi 0:098463de4c5d 284 * @param BufferSize: Size of the buffer to read from memory
group-onsemi 0:098463de4c5d 285 * @retval HAL status
group-onsemi 0:098463de4c5d 286 */
group-onsemi 0:098463de4c5d 287 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 288 {
group-onsemi 0:098463de4c5d 289 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
group-onsemi 0:098463de4c5d 290
group-onsemi 0:098463de4c5d 291 /* Process Locked */
group-onsemi 0:098463de4c5d 292 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 293
group-onsemi 0:098463de4c5d 294 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 295 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 296
group-onsemi 0:098463de4c5d 297 /* Read data from memory */
group-onsemi 0:098463de4c5d 298 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 299 {
group-onsemi 0:098463de4c5d 300 *pDstBuffer = *(__IO uint8_t *)psramaddress;
group-onsemi 0:098463de4c5d 301 pDstBuffer++;
group-onsemi 0:098463de4c5d 302 psramaddress++;
group-onsemi 0:098463de4c5d 303 }
group-onsemi 0:098463de4c5d 304
group-onsemi 0:098463de4c5d 305 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 306 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 307
group-onsemi 0:098463de4c5d 308 /* Process unlocked */
group-onsemi 0:098463de4c5d 309 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 310
group-onsemi 0:098463de4c5d 311 return HAL_OK;
group-onsemi 0:098463de4c5d 312 }
group-onsemi 0:098463de4c5d 313
group-onsemi 0:098463de4c5d 314 /**
group-onsemi 0:098463de4c5d 315 * @brief Writes 8-bit buffer to SRAM memory.
group-onsemi 0:098463de4c5d 316 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 317 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 318 * @param pAddress: Pointer to write start address
group-onsemi 0:098463de4c5d 319 * @param pSrcBuffer: Pointer to source buffer to write
group-onsemi 0:098463de4c5d 320 * @param BufferSize: Size of the buffer to write to memory
group-onsemi 0:098463de4c5d 321 * @retval HAL status
group-onsemi 0:098463de4c5d 322 */
group-onsemi 0:098463de4c5d 323 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 324 {
group-onsemi 0:098463de4c5d 325 __IO uint8_t * psramaddress = (uint8_t *)pAddress;
group-onsemi 0:098463de4c5d 326
group-onsemi 0:098463de4c5d 327 /* Check the SRAM controller state */
group-onsemi 0:098463de4c5d 328 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
group-onsemi 0:098463de4c5d 329 {
group-onsemi 0:098463de4c5d 330 return HAL_ERROR;
group-onsemi 0:098463de4c5d 331 }
group-onsemi 0:098463de4c5d 332
group-onsemi 0:098463de4c5d 333 /* Process Locked */
group-onsemi 0:098463de4c5d 334 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 335
group-onsemi 0:098463de4c5d 336 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 337 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 338
group-onsemi 0:098463de4c5d 339 /* Write data to memory */
group-onsemi 0:098463de4c5d 340 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 341 {
group-onsemi 0:098463de4c5d 342 *(__IO uint8_t *)psramaddress = *pSrcBuffer;
group-onsemi 0:098463de4c5d 343 pSrcBuffer++;
group-onsemi 0:098463de4c5d 344 psramaddress++;
group-onsemi 0:098463de4c5d 345 }
group-onsemi 0:098463de4c5d 346
group-onsemi 0:098463de4c5d 347 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 348 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 349
group-onsemi 0:098463de4c5d 350 /* Process unlocked */
group-onsemi 0:098463de4c5d 351 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 352
group-onsemi 0:098463de4c5d 353 return HAL_OK;
group-onsemi 0:098463de4c5d 354 }
group-onsemi 0:098463de4c5d 355
group-onsemi 0:098463de4c5d 356 /**
group-onsemi 0:098463de4c5d 357 * @brief Reads 16-bit buffer from SRAM memory.
group-onsemi 0:098463de4c5d 358 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 359 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 360 * @param pAddress: Pointer to read start address
group-onsemi 0:098463de4c5d 361 * @param pDstBuffer: Pointer to destination buffer
group-onsemi 0:098463de4c5d 362 * @param BufferSize: Size of the buffer to read from memory
group-onsemi 0:098463de4c5d 363 * @retval HAL status
group-onsemi 0:098463de4c5d 364 */
group-onsemi 0:098463de4c5d 365 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 366 {
group-onsemi 0:098463de4c5d 367 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
group-onsemi 0:098463de4c5d 368
group-onsemi 0:098463de4c5d 369 /* Process Locked */
group-onsemi 0:098463de4c5d 370 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 371
group-onsemi 0:098463de4c5d 372 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 373 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 374
group-onsemi 0:098463de4c5d 375 /* Read data from memory */
group-onsemi 0:098463de4c5d 376 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 377 {
group-onsemi 0:098463de4c5d 378 *pDstBuffer = *(__IO uint16_t *)psramaddress;
group-onsemi 0:098463de4c5d 379 pDstBuffer++;
group-onsemi 0:098463de4c5d 380 psramaddress++;
group-onsemi 0:098463de4c5d 381 }
group-onsemi 0:098463de4c5d 382
group-onsemi 0:098463de4c5d 383 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 384 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 385
group-onsemi 0:098463de4c5d 386 /* Process unlocked */
group-onsemi 0:098463de4c5d 387 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 388
group-onsemi 0:098463de4c5d 389 return HAL_OK;
group-onsemi 0:098463de4c5d 390 }
group-onsemi 0:098463de4c5d 391
group-onsemi 0:098463de4c5d 392 /**
group-onsemi 0:098463de4c5d 393 * @brief Writes 16-bit buffer to SRAM memory.
group-onsemi 0:098463de4c5d 394 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 395 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 396 * @param pAddress: Pointer to write start address
group-onsemi 0:098463de4c5d 397 * @param pSrcBuffer: Pointer to source buffer to write
group-onsemi 0:098463de4c5d 398 * @param BufferSize: Size of the buffer to write to memory
group-onsemi 0:098463de4c5d 399 * @retval HAL status
group-onsemi 0:098463de4c5d 400 */
group-onsemi 0:098463de4c5d 401 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 402 {
group-onsemi 0:098463de4c5d 403 __IO uint16_t * psramaddress = (uint16_t *)pAddress;
group-onsemi 0:098463de4c5d 404
group-onsemi 0:098463de4c5d 405 /* Check the SRAM controller state */
group-onsemi 0:098463de4c5d 406 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
group-onsemi 0:098463de4c5d 407 {
group-onsemi 0:098463de4c5d 408 return HAL_ERROR;
group-onsemi 0:098463de4c5d 409 }
group-onsemi 0:098463de4c5d 410
group-onsemi 0:098463de4c5d 411 /* Process Locked */
group-onsemi 0:098463de4c5d 412 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 413
group-onsemi 0:098463de4c5d 414 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 415 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 416
group-onsemi 0:098463de4c5d 417 /* Write data to memory */
group-onsemi 0:098463de4c5d 418 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 419 {
group-onsemi 0:098463de4c5d 420 *(__IO uint16_t *)psramaddress = *pSrcBuffer;
group-onsemi 0:098463de4c5d 421 pSrcBuffer++;
group-onsemi 0:098463de4c5d 422 psramaddress++;
group-onsemi 0:098463de4c5d 423 }
group-onsemi 0:098463de4c5d 424
group-onsemi 0:098463de4c5d 425 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 426 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 427
group-onsemi 0:098463de4c5d 428 /* Process unlocked */
group-onsemi 0:098463de4c5d 429 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 430
group-onsemi 0:098463de4c5d 431 return HAL_OK;
group-onsemi 0:098463de4c5d 432 }
group-onsemi 0:098463de4c5d 433
group-onsemi 0:098463de4c5d 434 /**
group-onsemi 0:098463de4c5d 435 * @brief Reads 32-bit buffer from SRAM memory.
group-onsemi 0:098463de4c5d 436 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 437 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 438 * @param pAddress: Pointer to read start address
group-onsemi 0:098463de4c5d 439 * @param pDstBuffer: Pointer to destination buffer
group-onsemi 0:098463de4c5d 440 * @param BufferSize: Size of the buffer to read from memory
group-onsemi 0:098463de4c5d 441 * @retval HAL status
group-onsemi 0:098463de4c5d 442 */
group-onsemi 0:098463de4c5d 443 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 444 {
group-onsemi 0:098463de4c5d 445 /* Process Locked */
group-onsemi 0:098463de4c5d 446 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 447
group-onsemi 0:098463de4c5d 448 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 449 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 450
group-onsemi 0:098463de4c5d 451 /* Read data from memory */
group-onsemi 0:098463de4c5d 452 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 453 {
group-onsemi 0:098463de4c5d 454 *pDstBuffer = *(__IO uint32_t *)pAddress;
group-onsemi 0:098463de4c5d 455 pDstBuffer++;
group-onsemi 0:098463de4c5d 456 pAddress++;
group-onsemi 0:098463de4c5d 457 }
group-onsemi 0:098463de4c5d 458
group-onsemi 0:098463de4c5d 459 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 460 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 461
group-onsemi 0:098463de4c5d 462 /* Process unlocked */
group-onsemi 0:098463de4c5d 463 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 464
group-onsemi 0:098463de4c5d 465 return HAL_OK;
group-onsemi 0:098463de4c5d 466 }
group-onsemi 0:098463de4c5d 467
group-onsemi 0:098463de4c5d 468 /**
group-onsemi 0:098463de4c5d 469 * @brief Writes 32-bit buffer to SRAM memory.
group-onsemi 0:098463de4c5d 470 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 471 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 472 * @param pAddress: Pointer to write start address
group-onsemi 0:098463de4c5d 473 * @param pSrcBuffer: Pointer to source buffer to write
group-onsemi 0:098463de4c5d 474 * @param BufferSize: Size of the buffer to write to memory
group-onsemi 0:098463de4c5d 475 * @retval HAL status
group-onsemi 0:098463de4c5d 476 */
group-onsemi 0:098463de4c5d 477 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 478 {
group-onsemi 0:098463de4c5d 479 /* Check the SRAM controller state */
group-onsemi 0:098463de4c5d 480 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
group-onsemi 0:098463de4c5d 481 {
group-onsemi 0:098463de4c5d 482 return HAL_ERROR;
group-onsemi 0:098463de4c5d 483 }
group-onsemi 0:098463de4c5d 484
group-onsemi 0:098463de4c5d 485 /* Process Locked */
group-onsemi 0:098463de4c5d 486 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 487
group-onsemi 0:098463de4c5d 488 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 489 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 490
group-onsemi 0:098463de4c5d 491 /* Write data to memory */
group-onsemi 0:098463de4c5d 492 for(; BufferSize != 0; BufferSize--)
group-onsemi 0:098463de4c5d 493 {
group-onsemi 0:098463de4c5d 494 *(__IO uint32_t *)pAddress = *pSrcBuffer;
group-onsemi 0:098463de4c5d 495 pSrcBuffer++;
group-onsemi 0:098463de4c5d 496 pAddress++;
group-onsemi 0:098463de4c5d 497 }
group-onsemi 0:098463de4c5d 498
group-onsemi 0:098463de4c5d 499 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 500 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 501
group-onsemi 0:098463de4c5d 502 /* Process unlocked */
group-onsemi 0:098463de4c5d 503 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 504
group-onsemi 0:098463de4c5d 505 return HAL_OK;
group-onsemi 0:098463de4c5d 506 }
group-onsemi 0:098463de4c5d 507
group-onsemi 0:098463de4c5d 508 /**
group-onsemi 0:098463de4c5d 509 * @brief Reads a Words data from the SRAM memory using DMA transfer.
group-onsemi 0:098463de4c5d 510 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 511 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 512 * @param pAddress: Pointer to read start address
group-onsemi 0:098463de4c5d 513 * @param pDstBuffer: Pointer to destination buffer
group-onsemi 0:098463de4c5d 514 * @param BufferSize: Size of the buffer to read from memory
group-onsemi 0:098463de4c5d 515 * @retval HAL status
group-onsemi 0:098463de4c5d 516 */
group-onsemi 0:098463de4c5d 517 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 518 {
group-onsemi 0:098463de4c5d 519 /* Process Locked */
group-onsemi 0:098463de4c5d 520 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 521
group-onsemi 0:098463de4c5d 522 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 523 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 524
group-onsemi 0:098463de4c5d 525 /* Configure DMA user callbacks */
group-onsemi 0:098463de4c5d 526 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
group-onsemi 0:098463de4c5d 527 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
group-onsemi 0:098463de4c5d 528
group-onsemi 0:098463de4c5d 529 /* Enable the DMA Channel */
group-onsemi 0:098463de4c5d 530 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
group-onsemi 0:098463de4c5d 531
group-onsemi 0:098463de4c5d 532 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 533 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 534
group-onsemi 0:098463de4c5d 535 /* Process unlocked */
group-onsemi 0:098463de4c5d 536 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 537
group-onsemi 0:098463de4c5d 538 return HAL_OK;
group-onsemi 0:098463de4c5d 539 }
group-onsemi 0:098463de4c5d 540
group-onsemi 0:098463de4c5d 541 /**
group-onsemi 0:098463de4c5d 542 * @brief Writes a Words data buffer to SRAM memory using DMA transfer.
group-onsemi 0:098463de4c5d 543 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 544 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 545 * @param pAddress: Pointer to write start address
group-onsemi 0:098463de4c5d 546 * @param pSrcBuffer: Pointer to source buffer to write
group-onsemi 0:098463de4c5d 547 * @param BufferSize: Size of the buffer to write to memory
group-onsemi 0:098463de4c5d 548 * @retval HAL status
group-onsemi 0:098463de4c5d 549 */
group-onsemi 0:098463de4c5d 550 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
group-onsemi 0:098463de4c5d 551 {
group-onsemi 0:098463de4c5d 552 /* Check the SRAM controller state */
group-onsemi 0:098463de4c5d 553 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
group-onsemi 0:098463de4c5d 554 {
group-onsemi 0:098463de4c5d 555 return HAL_ERROR;
group-onsemi 0:098463de4c5d 556 }
group-onsemi 0:098463de4c5d 557
group-onsemi 0:098463de4c5d 558 /* Process Locked */
group-onsemi 0:098463de4c5d 559 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 560
group-onsemi 0:098463de4c5d 561 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 562 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 563
group-onsemi 0:098463de4c5d 564 /* Configure DMA user callbacks */
group-onsemi 0:098463de4c5d 565 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
group-onsemi 0:098463de4c5d 566 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
group-onsemi 0:098463de4c5d 567
group-onsemi 0:098463de4c5d 568 /* Enable the DMA Channel */
group-onsemi 0:098463de4c5d 569 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
group-onsemi 0:098463de4c5d 570
group-onsemi 0:098463de4c5d 571 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 572 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 573
group-onsemi 0:098463de4c5d 574 /* Process unlocked */
group-onsemi 0:098463de4c5d 575 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 576
group-onsemi 0:098463de4c5d 577 return HAL_OK;
group-onsemi 0:098463de4c5d 578 }
group-onsemi 0:098463de4c5d 579
group-onsemi 0:098463de4c5d 580 /**
group-onsemi 0:098463de4c5d 581 * @}
group-onsemi 0:098463de4c5d 582 */
group-onsemi 0:098463de4c5d 583
group-onsemi 0:098463de4c5d 584 /** @defgroup SRAM_Exported_Functions_Group3 Control functions
group-onsemi 0:098463de4c5d 585 * @brief Control functions
group-onsemi 0:098463de4c5d 586 *
group-onsemi 0:098463de4c5d 587 @verbatim
group-onsemi 0:098463de4c5d 588 ==============================================================================
group-onsemi 0:098463de4c5d 589 ##### SRAM Control functions #####
group-onsemi 0:098463de4c5d 590 ==============================================================================
group-onsemi 0:098463de4c5d 591 [..]
group-onsemi 0:098463de4c5d 592 This subsection provides a set of functions allowing to control dynamically
group-onsemi 0:098463de4c5d 593 the SRAM interface.
group-onsemi 0:098463de4c5d 594
group-onsemi 0:098463de4c5d 595 @endverbatim
group-onsemi 0:098463de4c5d 596 * @{
group-onsemi 0:098463de4c5d 597 */
group-onsemi 0:098463de4c5d 598
group-onsemi 0:098463de4c5d 599 /**
group-onsemi 0:098463de4c5d 600 * @brief Enables dynamically SRAM write operation.
group-onsemi 0:098463de4c5d 601 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 602 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 603 * @retval HAL status
group-onsemi 0:098463de4c5d 604 */
group-onsemi 0:098463de4c5d 605 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 606 {
group-onsemi 0:098463de4c5d 607 /* Process Locked */
group-onsemi 0:098463de4c5d 608 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 609
group-onsemi 0:098463de4c5d 610 /* Enable write operation */
group-onsemi 0:098463de4c5d 611 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
group-onsemi 0:098463de4c5d 612
group-onsemi 0:098463de4c5d 613 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 614 hsram->State = HAL_SRAM_STATE_READY;
group-onsemi 0:098463de4c5d 615
group-onsemi 0:098463de4c5d 616 /* Process unlocked */
group-onsemi 0:098463de4c5d 617 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 618
group-onsemi 0:098463de4c5d 619 return HAL_OK;
group-onsemi 0:098463de4c5d 620 }
group-onsemi 0:098463de4c5d 621
group-onsemi 0:098463de4c5d 622 /**
group-onsemi 0:098463de4c5d 623 * @brief Disables dynamically SRAM write operation.
group-onsemi 0:098463de4c5d 624 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 625 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 626 * @retval HAL status
group-onsemi 0:098463de4c5d 627 */
group-onsemi 0:098463de4c5d 628 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 629 {
group-onsemi 0:098463de4c5d 630 /* Process Locked */
group-onsemi 0:098463de4c5d 631 __HAL_LOCK(hsram);
group-onsemi 0:098463de4c5d 632
group-onsemi 0:098463de4c5d 633 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 634 hsram->State = HAL_SRAM_STATE_BUSY;
group-onsemi 0:098463de4c5d 635
group-onsemi 0:098463de4c5d 636 /* Disable write operation */
group-onsemi 0:098463de4c5d 637 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
group-onsemi 0:098463de4c5d 638
group-onsemi 0:098463de4c5d 639 /* Update the SRAM controller state */
group-onsemi 0:098463de4c5d 640 hsram->State = HAL_SRAM_STATE_PROTECTED;
group-onsemi 0:098463de4c5d 641
group-onsemi 0:098463de4c5d 642 /* Process unlocked */
group-onsemi 0:098463de4c5d 643 __HAL_UNLOCK(hsram);
group-onsemi 0:098463de4c5d 644
group-onsemi 0:098463de4c5d 645 return HAL_OK;
group-onsemi 0:098463de4c5d 646 }
group-onsemi 0:098463de4c5d 647
group-onsemi 0:098463de4c5d 648 /**
group-onsemi 0:098463de4c5d 649 * @}
group-onsemi 0:098463de4c5d 650 */
group-onsemi 0:098463de4c5d 651
group-onsemi 0:098463de4c5d 652 /** @defgroup SRAM_Exported_Functions_Group4 Peripheral State functions
group-onsemi 0:098463de4c5d 653 * @brief Peripheral State functions
group-onsemi 0:098463de4c5d 654 *
group-onsemi 0:098463de4c5d 655 @verbatim
group-onsemi 0:098463de4c5d 656 ==============================================================================
group-onsemi 0:098463de4c5d 657 ##### SRAM State functions #####
group-onsemi 0:098463de4c5d 658 ==============================================================================
group-onsemi 0:098463de4c5d 659 [..]
group-onsemi 0:098463de4c5d 660 This subsection permits to get in run-time the status of the SRAM controller
group-onsemi 0:098463de4c5d 661 and the data flow.
group-onsemi 0:098463de4c5d 662
group-onsemi 0:098463de4c5d 663 @endverbatim
group-onsemi 0:098463de4c5d 664 * @{
group-onsemi 0:098463de4c5d 665 */
group-onsemi 0:098463de4c5d 666
group-onsemi 0:098463de4c5d 667 /**
group-onsemi 0:098463de4c5d 668 * @brief Returns the SRAM controller state
group-onsemi 0:098463de4c5d 669 * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains
group-onsemi 0:098463de4c5d 670 * the configuration information for SRAM module.
group-onsemi 0:098463de4c5d 671 * @retval HAL state
group-onsemi 0:098463de4c5d 672 */
group-onsemi 0:098463de4c5d 673 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
group-onsemi 0:098463de4c5d 674 {
group-onsemi 0:098463de4c5d 675 return hsram->State;
group-onsemi 0:098463de4c5d 676 }
group-onsemi 0:098463de4c5d 677
group-onsemi 0:098463de4c5d 678 /**
group-onsemi 0:098463de4c5d 679 * @}
group-onsemi 0:098463de4c5d 680 */
group-onsemi 0:098463de4c5d 681
group-onsemi 0:098463de4c5d 682 /**
group-onsemi 0:098463de4c5d 683 * @}
group-onsemi 0:098463de4c5d 684 */
group-onsemi 0:098463de4c5d 685 /**
group-onsemi 0:098463de4c5d 686 * @}
group-onsemi 0:098463de4c5d 687 */
group-onsemi 0:098463de4c5d 688 #endif /* HAL_SRAM_MODULE_ENABLED */
group-onsemi 0:098463de4c5d 689
group-onsemi 0:098463de4c5d 690 /**
group-onsemi 0:098463de4c5d 691 * @}
group-onsemi 0:098463de4c5d 692 */
group-onsemi 0:098463de4c5d 693 #endif /* STM32F302xE || STM32F303xE || STM32F398xx */
group-onsemi 0:098463de4c5d 694
group-onsemi 0:098463de4c5d 695 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/