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Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_STM/TARGET_STM32F1/serial_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)
- Committer:
- jacobjohnson
- Date:
- Mon Feb 27 17:45:05 2017 +0000
- Revision:
- 1:f30bdcd2b33b
- Parent:
- 0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c. This will need to be changed later, and accessed from the main level, but for now this allows the adc to read a value from 0 to 3.7V, instead of just up to 1V.;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| group-onsemi | 0:098463de4c5d | 1 | /* mbed Microcontroller Library |
| group-onsemi | 0:098463de4c5d | 2 | ******************************************************************************* |
| group-onsemi | 0:098463de4c5d | 3 | * Copyright (c) 2014, STMicroelectronics |
| group-onsemi | 0:098463de4c5d | 4 | * All rights reserved. |
| group-onsemi | 0:098463de4c5d | 5 | * |
| group-onsemi | 0:098463de4c5d | 6 | * Redistribution and use in source and binary forms, with or without |
| group-onsemi | 0:098463de4c5d | 7 | * modification, are permitted provided that the following conditions are met: |
| group-onsemi | 0:098463de4c5d | 8 | * |
| group-onsemi | 0:098463de4c5d | 9 | * 1. Redistributions of source code must retain the above copyright notice, |
| group-onsemi | 0:098463de4c5d | 10 | * this list of conditions and the following disclaimer. |
| group-onsemi | 0:098463de4c5d | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| group-onsemi | 0:098463de4c5d | 12 | * this list of conditions and the following disclaimer in the documentation |
| group-onsemi | 0:098463de4c5d | 13 | * and/or other materials provided with the distribution. |
| group-onsemi | 0:098463de4c5d | 14 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| group-onsemi | 0:098463de4c5d | 15 | * may be used to endorse or promote products derived from this software |
| group-onsemi | 0:098463de4c5d | 16 | * without specific prior written permission. |
| group-onsemi | 0:098463de4c5d | 17 | * |
| group-onsemi | 0:098463de4c5d | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| group-onsemi | 0:098463de4c5d | 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| group-onsemi | 0:098463de4c5d | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| group-onsemi | 0:098463de4c5d | 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| group-onsemi | 0:098463de4c5d | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| group-onsemi | 0:098463de4c5d | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| group-onsemi | 0:098463de4c5d | 24 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| group-onsemi | 0:098463de4c5d | 25 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| group-onsemi | 0:098463de4c5d | 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| group-onsemi | 0:098463de4c5d | 27 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| group-onsemi | 0:098463de4c5d | 28 | ******************************************************************************* |
| group-onsemi | 0:098463de4c5d | 29 | */ |
| group-onsemi | 0:098463de4c5d | 30 | #include "mbed_assert.h" |
| group-onsemi | 0:098463de4c5d | 31 | #include "serial_api.h" |
| group-onsemi | 0:098463de4c5d | 32 | |
| group-onsemi | 0:098463de4c5d | 33 | #if DEVICE_SERIAL |
| group-onsemi | 0:098463de4c5d | 34 | |
| group-onsemi | 0:098463de4c5d | 35 | #include "cmsis.h" |
| group-onsemi | 0:098463de4c5d | 36 | #include "pinmap.h" |
| group-onsemi | 0:098463de4c5d | 37 | #include "mbed_error.h" |
| group-onsemi | 0:098463de4c5d | 38 | #include <string.h> |
| group-onsemi | 0:098463de4c5d | 39 | #include "PeripheralPins.h" |
| group-onsemi | 0:098463de4c5d | 40 | |
| group-onsemi | 0:098463de4c5d | 41 | #define UART_NUM (3) |
| group-onsemi | 0:098463de4c5d | 42 | |
| group-onsemi | 0:098463de4c5d | 43 | static uint32_t serial_irq_ids[UART_NUM] = {0}; |
| group-onsemi | 0:098463de4c5d | 44 | static UART_HandleTypeDef uart_handlers[UART_NUM]; |
| group-onsemi | 0:098463de4c5d | 45 | |
| group-onsemi | 0:098463de4c5d | 46 | static uart_irq_handler irq_handler; |
| group-onsemi | 0:098463de4c5d | 47 | |
| group-onsemi | 0:098463de4c5d | 48 | int stdio_uart_inited = 0; |
| group-onsemi | 0:098463de4c5d | 49 | serial_t stdio_uart; |
| group-onsemi | 0:098463de4c5d | 50 | |
| group-onsemi | 0:098463de4c5d | 51 | #if DEVICE_SERIAL_ASYNCH |
| group-onsemi | 0:098463de4c5d | 52 | #define SERIAL_S(obj) (&((obj)->serial)) |
| group-onsemi | 0:098463de4c5d | 53 | #else |
| group-onsemi | 0:098463de4c5d | 54 | #define SERIAL_S(obj) (obj) |
| group-onsemi | 0:098463de4c5d | 55 | #endif |
| group-onsemi | 0:098463de4c5d | 56 | |
| group-onsemi | 0:098463de4c5d | 57 | static void init_uart(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 58 | { |
| group-onsemi | 0:098463de4c5d | 59 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 60 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 61 | huart->Instance = (USART_TypeDef *)(obj_s->uart); |
| group-onsemi | 0:098463de4c5d | 62 | |
| group-onsemi | 0:098463de4c5d | 63 | huart->Init.BaudRate = obj_s->baudrate; |
| group-onsemi | 0:098463de4c5d | 64 | huart->Init.WordLength = obj_s->databits; |
| group-onsemi | 0:098463de4c5d | 65 | huart->Init.StopBits = obj_s->stopbits; |
| group-onsemi | 0:098463de4c5d | 66 | huart->Init.Parity = obj_s->parity; |
| group-onsemi | 0:098463de4c5d | 67 | #if DEVICE_SERIAL_FC |
| group-onsemi | 0:098463de4c5d | 68 | huart->Init.HwFlowCtl = obj_s->hw_flow_ctl; |
| group-onsemi | 0:098463de4c5d | 69 | #else |
| group-onsemi | 0:098463de4c5d | 70 | huart->Init.HwFlowCtl = UART_HWCONTROL_NONE; |
| group-onsemi | 0:098463de4c5d | 71 | #endif |
| group-onsemi | 0:098463de4c5d | 72 | huart->TxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 73 | huart->TxXferSize = 0; |
| group-onsemi | 0:098463de4c5d | 74 | huart->RxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 75 | huart->RxXferSize = 0; |
| group-onsemi | 0:098463de4c5d | 76 | |
| group-onsemi | 0:098463de4c5d | 77 | if (obj_s->pin_rx == NC) { |
| group-onsemi | 0:098463de4c5d | 78 | huart->Init.Mode = UART_MODE_TX; |
| group-onsemi | 0:098463de4c5d | 79 | } else if (obj_s->pin_tx == NC) { |
| group-onsemi | 0:098463de4c5d | 80 | huart->Init.Mode = UART_MODE_RX; |
| group-onsemi | 0:098463de4c5d | 81 | } else { |
| group-onsemi | 0:098463de4c5d | 82 | huart->Init.Mode = UART_MODE_TX_RX; |
| group-onsemi | 0:098463de4c5d | 83 | } |
| group-onsemi | 0:098463de4c5d | 84 | |
| group-onsemi | 0:098463de4c5d | 85 | if (HAL_UART_Init(huart) != HAL_OK) { |
| group-onsemi | 0:098463de4c5d | 86 | error("Cannot initialize UART\n"); |
| group-onsemi | 0:098463de4c5d | 87 | } |
| group-onsemi | 0:098463de4c5d | 88 | } |
| group-onsemi | 0:098463de4c5d | 89 | |
| group-onsemi | 0:098463de4c5d | 90 | void serial_init(serial_t *obj, PinName tx, PinName rx) |
| group-onsemi | 0:098463de4c5d | 91 | { |
| group-onsemi | 0:098463de4c5d | 92 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 93 | |
| group-onsemi | 0:098463de4c5d | 94 | // Determine the UART to use (UART_1, UART_2, ...) |
| group-onsemi | 0:098463de4c5d | 95 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
| group-onsemi | 0:098463de4c5d | 96 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
| group-onsemi | 0:098463de4c5d | 97 | |
| group-onsemi | 0:098463de4c5d | 98 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
| group-onsemi | 0:098463de4c5d | 99 | obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx); |
| group-onsemi | 0:098463de4c5d | 100 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 101 | |
| group-onsemi | 0:098463de4c5d | 102 | // Enable USART clock |
| group-onsemi | 0:098463de4c5d | 103 | if (obj_s->uart == UART_1) { |
| group-onsemi | 0:098463de4c5d | 104 | __HAL_RCC_USART1_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 105 | __HAL_RCC_USART1_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 106 | __HAL_RCC_USART1_CLK_ENABLE(); |
| group-onsemi | 0:098463de4c5d | 107 | obj_s->index = 0; |
| group-onsemi | 0:098463de4c5d | 108 | } |
| group-onsemi | 0:098463de4c5d | 109 | if (obj_s->uart == UART_2) { |
| group-onsemi | 0:098463de4c5d | 110 | __HAL_RCC_USART2_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 111 | __HAL_RCC_USART2_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 112 | __HAL_RCC_USART2_CLK_ENABLE(); |
| group-onsemi | 0:098463de4c5d | 113 | obj_s->index = 1; |
| group-onsemi | 0:098463de4c5d | 114 | } |
| group-onsemi | 0:098463de4c5d | 115 | if (obj_s->uart == UART_3) { |
| group-onsemi | 0:098463de4c5d | 116 | __HAL_RCC_USART3_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 117 | __HAL_RCC_USART3_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 118 | __HAL_RCC_USART3_CLK_ENABLE(); |
| group-onsemi | 0:098463de4c5d | 119 | obj_s->index = 2; |
| group-onsemi | 0:098463de4c5d | 120 | } |
| group-onsemi | 0:098463de4c5d | 121 | |
| group-onsemi | 0:098463de4c5d | 122 | // Configure UART pins |
| group-onsemi | 0:098463de4c5d | 123 | pinmap_pinout(tx, PinMap_UART_TX); |
| group-onsemi | 0:098463de4c5d | 124 | pinmap_pinout(rx, PinMap_UART_RX); |
| group-onsemi | 0:098463de4c5d | 125 | |
| group-onsemi | 0:098463de4c5d | 126 | if (tx != NC) { |
| group-onsemi | 0:098463de4c5d | 127 | pin_mode(tx, PullUp); |
| group-onsemi | 0:098463de4c5d | 128 | } |
| group-onsemi | 0:098463de4c5d | 129 | if (rx != NC) { |
| group-onsemi | 0:098463de4c5d | 130 | pin_mode(rx, PullUp); |
| group-onsemi | 0:098463de4c5d | 131 | } |
| group-onsemi | 0:098463de4c5d | 132 | |
| group-onsemi | 0:098463de4c5d | 133 | // Configure UART |
| group-onsemi | 0:098463de4c5d | 134 | obj_s->baudrate = 9600; |
| group-onsemi | 0:098463de4c5d | 135 | obj_s->databits = UART_WORDLENGTH_8B; |
| group-onsemi | 0:098463de4c5d | 136 | obj_s->stopbits = UART_STOPBITS_1; |
| group-onsemi | 0:098463de4c5d | 137 | obj_s->parity = UART_PARITY_NONE; |
| group-onsemi | 0:098463de4c5d | 138 | |
| group-onsemi | 0:098463de4c5d | 139 | #if DEVICE_SERIAL_FC |
| group-onsemi | 0:098463de4c5d | 140 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
| group-onsemi | 0:098463de4c5d | 141 | #endif |
| group-onsemi | 0:098463de4c5d | 142 | |
| group-onsemi | 0:098463de4c5d | 143 | obj_s->pin_tx = tx; |
| group-onsemi | 0:098463de4c5d | 144 | obj_s->pin_rx = rx; |
| group-onsemi | 0:098463de4c5d | 145 | |
| group-onsemi | 0:098463de4c5d | 146 | init_uart(obj); |
| group-onsemi | 0:098463de4c5d | 147 | |
| group-onsemi | 0:098463de4c5d | 148 | // For stdio management |
| group-onsemi | 0:098463de4c5d | 149 | if (obj_s->uart == STDIO_UART) { |
| group-onsemi | 0:098463de4c5d | 150 | stdio_uart_inited = 1; |
| group-onsemi | 0:098463de4c5d | 151 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
| group-onsemi | 0:098463de4c5d | 152 | } |
| group-onsemi | 0:098463de4c5d | 153 | } |
| group-onsemi | 0:098463de4c5d | 154 | |
| group-onsemi | 0:098463de4c5d | 155 | void serial_free(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 156 | { |
| group-onsemi | 0:098463de4c5d | 157 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 158 | |
| group-onsemi | 0:098463de4c5d | 159 | // Reset UART and disable clock |
| group-onsemi | 0:098463de4c5d | 160 | if (obj_s->uart == UART_1) { |
| group-onsemi | 0:098463de4c5d | 161 | __USART1_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 162 | __USART1_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 163 | __USART1_CLK_DISABLE(); |
| group-onsemi | 0:098463de4c5d | 164 | } |
| group-onsemi | 0:098463de4c5d | 165 | if (obj_s->uart == UART_2) { |
| group-onsemi | 0:098463de4c5d | 166 | __USART2_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 167 | __USART2_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 168 | __USART2_CLK_DISABLE(); |
| group-onsemi | 0:098463de4c5d | 169 | } |
| group-onsemi | 0:098463de4c5d | 170 | if (obj_s->uart == UART_3) { |
| group-onsemi | 0:098463de4c5d | 171 | __USART3_FORCE_RESET(); |
| group-onsemi | 0:098463de4c5d | 172 | __USART3_RELEASE_RESET(); |
| group-onsemi | 0:098463de4c5d | 173 | __USART3_CLK_DISABLE(); |
| group-onsemi | 0:098463de4c5d | 174 | } |
| group-onsemi | 0:098463de4c5d | 175 | |
| group-onsemi | 0:098463de4c5d | 176 | // Configure GPIOs |
| group-onsemi | 0:098463de4c5d | 177 | pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
| group-onsemi | 0:098463de4c5d | 178 | pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); |
| group-onsemi | 0:098463de4c5d | 179 | |
| group-onsemi | 0:098463de4c5d | 180 | serial_irq_ids[obj_s->index] = 0; |
| group-onsemi | 0:098463de4c5d | 181 | } |
| group-onsemi | 0:098463de4c5d | 182 | |
| group-onsemi | 0:098463de4c5d | 183 | void serial_baud(serial_t *obj, int baudrate) |
| group-onsemi | 0:098463de4c5d | 184 | { |
| group-onsemi | 0:098463de4c5d | 185 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 186 | |
| group-onsemi | 0:098463de4c5d | 187 | obj_s->baudrate = baudrate; |
| group-onsemi | 0:098463de4c5d | 188 | init_uart(obj); |
| group-onsemi | 0:098463de4c5d | 189 | } |
| group-onsemi | 0:098463de4c5d | 190 | |
| group-onsemi | 0:098463de4c5d | 191 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) |
| group-onsemi | 0:098463de4c5d | 192 | { |
| group-onsemi | 0:098463de4c5d | 193 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 194 | |
| group-onsemi | 0:098463de4c5d | 195 | if (data_bits == 9) { |
| group-onsemi | 0:098463de4c5d | 196 | obj_s->databits = UART_WORDLENGTH_9B; |
| group-onsemi | 0:098463de4c5d | 197 | } else { |
| group-onsemi | 0:098463de4c5d | 198 | obj_s->databits = UART_WORDLENGTH_8B; |
| group-onsemi | 0:098463de4c5d | 199 | } |
| group-onsemi | 0:098463de4c5d | 200 | |
| group-onsemi | 0:098463de4c5d | 201 | switch (parity) { |
| group-onsemi | 0:098463de4c5d | 202 | case ParityOdd: |
| group-onsemi | 0:098463de4c5d | 203 | obj_s->parity = UART_PARITY_ODD; |
| group-onsemi | 0:098463de4c5d | 204 | break; |
| group-onsemi | 0:098463de4c5d | 205 | case ParityEven: |
| group-onsemi | 0:098463de4c5d | 206 | obj_s->parity = UART_PARITY_EVEN; |
| group-onsemi | 0:098463de4c5d | 207 | break; |
| group-onsemi | 0:098463de4c5d | 208 | default: // ParityNone |
| group-onsemi | 0:098463de4c5d | 209 | case ParityForced0: // unsupported! |
| group-onsemi | 0:098463de4c5d | 210 | case ParityForced1: // unsupported! |
| group-onsemi | 0:098463de4c5d | 211 | obj_s->parity = UART_PARITY_NONE; |
| group-onsemi | 0:098463de4c5d | 212 | break; |
| group-onsemi | 0:098463de4c5d | 213 | } |
| group-onsemi | 0:098463de4c5d | 214 | |
| group-onsemi | 0:098463de4c5d | 215 | if (stop_bits == 2) { |
| group-onsemi | 0:098463de4c5d | 216 | obj_s->stopbits = UART_STOPBITS_2; |
| group-onsemi | 0:098463de4c5d | 217 | } else { |
| group-onsemi | 0:098463de4c5d | 218 | obj_s->stopbits = UART_STOPBITS_1; |
| group-onsemi | 0:098463de4c5d | 219 | } |
| group-onsemi | 0:098463de4c5d | 220 | |
| group-onsemi | 0:098463de4c5d | 221 | init_uart(obj); |
| group-onsemi | 0:098463de4c5d | 222 | } |
| group-onsemi | 0:098463de4c5d | 223 | |
| group-onsemi | 0:098463de4c5d | 224 | /****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 225 | * INTERRUPTS HANDLING |
| group-onsemi | 0:098463de4c5d | 226 | ******************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 227 | |
| group-onsemi | 0:098463de4c5d | 228 | static void uart_irq(int id) |
| group-onsemi | 0:098463de4c5d | 229 | { |
| group-onsemi | 0:098463de4c5d | 230 | UART_HandleTypeDef * huart = &uart_handlers[id]; |
| group-onsemi | 0:098463de4c5d | 231 | |
| group-onsemi | 0:098463de4c5d | 232 | if (serial_irq_ids[id] != 0) { |
| group-onsemi | 0:098463de4c5d | 233 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
| group-onsemi | 0:098463de4c5d | 234 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
| group-onsemi | 0:098463de4c5d | 235 | irq_handler(serial_irq_ids[id], TxIrq); |
| group-onsemi | 0:098463de4c5d | 236 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); |
| group-onsemi | 0:098463de4c5d | 237 | } |
| group-onsemi | 0:098463de4c5d | 238 | } |
| group-onsemi | 0:098463de4c5d | 239 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 240 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 241 | irq_handler(serial_irq_ids[id], RxIrq); |
| group-onsemi | 0:098463de4c5d | 242 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE); |
| group-onsemi | 0:098463de4c5d | 243 | } |
| group-onsemi | 0:098463de4c5d | 244 | } |
| group-onsemi | 0:098463de4c5d | 245 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 246 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET) { |
| group-onsemi | 0:098463de4c5d | 247 | volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag |
| group-onsemi | 0:098463de4c5d | 248 | } |
| group-onsemi | 0:098463de4c5d | 249 | } |
| group-onsemi | 0:098463de4c5d | 250 | } |
| group-onsemi | 0:098463de4c5d | 251 | } |
| group-onsemi | 0:098463de4c5d | 252 | |
| group-onsemi | 0:098463de4c5d | 253 | static void uart1_irq(void) |
| group-onsemi | 0:098463de4c5d | 254 | { |
| group-onsemi | 0:098463de4c5d | 255 | uart_irq(0); |
| group-onsemi | 0:098463de4c5d | 256 | } |
| group-onsemi | 0:098463de4c5d | 257 | |
| group-onsemi | 0:098463de4c5d | 258 | static void uart2_irq(void) |
| group-onsemi | 0:098463de4c5d | 259 | { |
| group-onsemi | 0:098463de4c5d | 260 | uart_irq(1); |
| group-onsemi | 0:098463de4c5d | 261 | } |
| group-onsemi | 0:098463de4c5d | 262 | |
| group-onsemi | 0:098463de4c5d | 263 | static void uart3_irq(void) |
| group-onsemi | 0:098463de4c5d | 264 | { |
| group-onsemi | 0:098463de4c5d | 265 | uart_irq(2); |
| group-onsemi | 0:098463de4c5d | 266 | } |
| group-onsemi | 0:098463de4c5d | 267 | |
| group-onsemi | 0:098463de4c5d | 268 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
| group-onsemi | 0:098463de4c5d | 269 | { |
| group-onsemi | 0:098463de4c5d | 270 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 271 | |
| group-onsemi | 0:098463de4c5d | 272 | irq_handler = handler; |
| group-onsemi | 0:098463de4c5d | 273 | serial_irq_ids[obj_s->index] = id; |
| group-onsemi | 0:098463de4c5d | 274 | } |
| group-onsemi | 0:098463de4c5d | 275 | |
| group-onsemi | 0:098463de4c5d | 276 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
| group-onsemi | 0:098463de4c5d | 277 | { |
| group-onsemi | 0:098463de4c5d | 278 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 279 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 280 | IRQn_Type irq_n = (IRQn_Type)0; |
| group-onsemi | 0:098463de4c5d | 281 | uint32_t vector = 0; |
| group-onsemi | 0:098463de4c5d | 282 | |
| group-onsemi | 0:098463de4c5d | 283 | if (obj_s->uart == UART_1) { |
| group-onsemi | 0:098463de4c5d | 284 | irq_n = USART1_IRQn; |
| group-onsemi | 0:098463de4c5d | 285 | vector = (uint32_t)&uart1_irq; |
| group-onsemi | 0:098463de4c5d | 286 | } |
| group-onsemi | 0:098463de4c5d | 287 | |
| group-onsemi | 0:098463de4c5d | 288 | if (obj_s->uart == UART_2) { |
| group-onsemi | 0:098463de4c5d | 289 | irq_n = USART2_IRQn; |
| group-onsemi | 0:098463de4c5d | 290 | vector = (uint32_t)&uart2_irq; |
| group-onsemi | 0:098463de4c5d | 291 | } |
| group-onsemi | 0:098463de4c5d | 292 | |
| group-onsemi | 0:098463de4c5d | 293 | if (obj_s->uart == UART_3) { |
| group-onsemi | 0:098463de4c5d | 294 | irq_n = USART3_IRQn; |
| group-onsemi | 0:098463de4c5d | 295 | vector = (uint32_t)&uart3_irq; |
| group-onsemi | 0:098463de4c5d | 296 | } |
| group-onsemi | 0:098463de4c5d | 297 | |
| group-onsemi | 0:098463de4c5d | 298 | if (enable) { |
| group-onsemi | 0:098463de4c5d | 299 | if (irq == RxIrq) { |
| group-onsemi | 0:098463de4c5d | 300 | __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE); |
| group-onsemi | 0:098463de4c5d | 301 | } else { // TxIrq |
| group-onsemi | 0:098463de4c5d | 302 | __HAL_UART_ENABLE_IT(huart, UART_IT_TC); |
| group-onsemi | 0:098463de4c5d | 303 | } |
| group-onsemi | 0:098463de4c5d | 304 | NVIC_SetVector(irq_n, vector); |
| group-onsemi | 0:098463de4c5d | 305 | NVIC_EnableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 306 | |
| group-onsemi | 0:098463de4c5d | 307 | } else { // disable |
| group-onsemi | 0:098463de4c5d | 308 | int all_disabled = 0; |
| group-onsemi | 0:098463de4c5d | 309 | if (irq == RxIrq) { |
| group-onsemi | 0:098463de4c5d | 310 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
| group-onsemi | 0:098463de4c5d | 311 | // Check if TxIrq is disabled too |
| group-onsemi | 0:098463de4c5d | 312 | if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) { |
| group-onsemi | 0:098463de4c5d | 313 | all_disabled = 1; |
| group-onsemi | 0:098463de4c5d | 314 | } |
| group-onsemi | 0:098463de4c5d | 315 | } else { // TxIrq |
| group-onsemi | 0:098463de4c5d | 316 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
| group-onsemi | 0:098463de4c5d | 317 | // Check if RxIrq is disabled too |
| group-onsemi | 0:098463de4c5d | 318 | if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) { |
| group-onsemi | 0:098463de4c5d | 319 | all_disabled = 1; |
| group-onsemi | 0:098463de4c5d | 320 | } |
| group-onsemi | 0:098463de4c5d | 321 | } |
| group-onsemi | 0:098463de4c5d | 322 | |
| group-onsemi | 0:098463de4c5d | 323 | if (all_disabled) { |
| group-onsemi | 0:098463de4c5d | 324 | NVIC_DisableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 325 | } |
| group-onsemi | 0:098463de4c5d | 326 | } |
| group-onsemi | 0:098463de4c5d | 327 | } |
| group-onsemi | 0:098463de4c5d | 328 | |
| group-onsemi | 0:098463de4c5d | 329 | /****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 330 | * READ/WRITE |
| group-onsemi | 0:098463de4c5d | 331 | ******************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 332 | |
| group-onsemi | 0:098463de4c5d | 333 | int serial_getc(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 334 | { |
| group-onsemi | 0:098463de4c5d | 335 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 336 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 337 | |
| group-onsemi | 0:098463de4c5d | 338 | while (!serial_readable(obj)); |
| group-onsemi | 0:098463de4c5d | 339 | if (obj_s->databits == UART_WORDLENGTH_8B) { |
| group-onsemi | 0:098463de4c5d | 340 | return (int)(huart->Instance->DR & (uint8_t)0xFF); |
| group-onsemi | 0:098463de4c5d | 341 | } else { |
| group-onsemi | 0:098463de4c5d | 342 | return (int)(huart->Instance->DR & (uint16_t)0x1FF); |
| group-onsemi | 0:098463de4c5d | 343 | } |
| group-onsemi | 0:098463de4c5d | 344 | } |
| group-onsemi | 0:098463de4c5d | 345 | |
| group-onsemi | 0:098463de4c5d | 346 | void serial_putc(serial_t *obj, int c) |
| group-onsemi | 0:098463de4c5d | 347 | { |
| group-onsemi | 0:098463de4c5d | 348 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 349 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 350 | |
| group-onsemi | 0:098463de4c5d | 351 | while (!serial_writable(obj)); |
| group-onsemi | 0:098463de4c5d | 352 | if (obj_s->databits == UART_WORDLENGTH_8B) { |
| group-onsemi | 0:098463de4c5d | 353 | huart->Instance->DR = (uint8_t)(c & (uint8_t)0xFF); |
| group-onsemi | 0:098463de4c5d | 354 | } else { |
| group-onsemi | 0:098463de4c5d | 355 | huart->Instance->DR = (uint16_t)(c & (uint16_t)0x1FF); |
| group-onsemi | 0:098463de4c5d | 356 | } |
| group-onsemi | 0:098463de4c5d | 357 | } |
| group-onsemi | 0:098463de4c5d | 358 | |
| group-onsemi | 0:098463de4c5d | 359 | int serial_readable(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 360 | { |
| group-onsemi | 0:098463de4c5d | 361 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 362 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 363 | |
| group-onsemi | 0:098463de4c5d | 364 | // Check if data is received |
| group-onsemi | 0:098463de4c5d | 365 | return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0; |
| group-onsemi | 0:098463de4c5d | 366 | } |
| group-onsemi | 0:098463de4c5d | 367 | |
| group-onsemi | 0:098463de4c5d | 368 | int serial_writable(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 369 | { |
| group-onsemi | 0:098463de4c5d | 370 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 371 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 372 | |
| group-onsemi | 0:098463de4c5d | 373 | // Check if data is transmitted |
| group-onsemi | 0:098463de4c5d | 374 | return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0; |
| group-onsemi | 0:098463de4c5d | 375 | } |
| group-onsemi | 0:098463de4c5d | 376 | |
| group-onsemi | 0:098463de4c5d | 377 | void serial_clear(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 378 | { |
| group-onsemi | 0:098463de4c5d | 379 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 380 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 381 | |
| group-onsemi | 0:098463de4c5d | 382 | huart->TxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 383 | huart->RxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 384 | } |
| group-onsemi | 0:098463de4c5d | 385 | |
| group-onsemi | 0:098463de4c5d | 386 | void serial_pinout_tx(PinName tx) |
| group-onsemi | 0:098463de4c5d | 387 | { |
| group-onsemi | 0:098463de4c5d | 388 | pinmap_pinout(tx, PinMap_UART_TX); |
| group-onsemi | 0:098463de4c5d | 389 | } |
| group-onsemi | 0:098463de4c5d | 390 | |
| group-onsemi | 0:098463de4c5d | 391 | void serial_break_set(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 392 | { |
| group-onsemi | 0:098463de4c5d | 393 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 394 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 395 | |
| group-onsemi | 0:098463de4c5d | 396 | HAL_LIN_SendBreak(huart); |
| group-onsemi | 0:098463de4c5d | 397 | } |
| group-onsemi | 0:098463de4c5d | 398 | |
| group-onsemi | 0:098463de4c5d | 399 | void serial_break_clear(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 400 | { |
| group-onsemi | 0:098463de4c5d | 401 | (void)obj; |
| group-onsemi | 0:098463de4c5d | 402 | } |
| group-onsemi | 0:098463de4c5d | 403 | |
| group-onsemi | 0:098463de4c5d | 404 | #if DEVICE_SERIAL_ASYNCH |
| group-onsemi | 0:098463de4c5d | 405 | |
| group-onsemi | 0:098463de4c5d | 406 | /****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 407 | * LOCAL HELPER FUNCTIONS |
| group-onsemi | 0:098463de4c5d | 408 | ******************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 409 | |
| group-onsemi | 0:098463de4c5d | 410 | /** |
| group-onsemi | 0:098463de4c5d | 411 | * Configure the TX buffer for an asynchronous write serial transaction |
| group-onsemi | 0:098463de4c5d | 412 | * |
| group-onsemi | 0:098463de4c5d | 413 | * @param obj The serial object. |
| group-onsemi | 0:098463de4c5d | 414 | * @param tx The buffer for sending. |
| group-onsemi | 0:098463de4c5d | 415 | * @param tx_length The number of words to transmit. |
| group-onsemi | 0:098463de4c5d | 416 | */ |
| group-onsemi | 0:098463de4c5d | 417 | static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) |
| group-onsemi | 0:098463de4c5d | 418 | { |
| group-onsemi | 0:098463de4c5d | 419 | (void)width; |
| group-onsemi | 0:098463de4c5d | 420 | |
| group-onsemi | 0:098463de4c5d | 421 | // Exit if a transmit is already on-going |
| group-onsemi | 0:098463de4c5d | 422 | if (serial_tx_active(obj)) { |
| group-onsemi | 0:098463de4c5d | 423 | return; |
| group-onsemi | 0:098463de4c5d | 424 | } |
| group-onsemi | 0:098463de4c5d | 425 | |
| group-onsemi | 0:098463de4c5d | 426 | obj->tx_buff.buffer = tx; |
| group-onsemi | 0:098463de4c5d | 427 | obj->tx_buff.length = tx_length; |
| group-onsemi | 0:098463de4c5d | 428 | obj->tx_buff.pos = 0; |
| group-onsemi | 0:098463de4c5d | 429 | } |
| group-onsemi | 0:098463de4c5d | 430 | |
| group-onsemi | 0:098463de4c5d | 431 | /** |
| group-onsemi | 0:098463de4c5d | 432 | * Configure the RX buffer for an asynchronous write serial transaction |
| group-onsemi | 0:098463de4c5d | 433 | * |
| group-onsemi | 0:098463de4c5d | 434 | * @param obj The serial object. |
| group-onsemi | 0:098463de4c5d | 435 | * @param tx The buffer for sending. |
| group-onsemi | 0:098463de4c5d | 436 | * @param tx_length The number of words to transmit. |
| group-onsemi | 0:098463de4c5d | 437 | */ |
| group-onsemi | 0:098463de4c5d | 438 | static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width) |
| group-onsemi | 0:098463de4c5d | 439 | { |
| group-onsemi | 0:098463de4c5d | 440 | (void)width; |
| group-onsemi | 0:098463de4c5d | 441 | |
| group-onsemi | 0:098463de4c5d | 442 | // Exit if a reception is already on-going |
| group-onsemi | 0:098463de4c5d | 443 | if (serial_rx_active(obj)) { |
| group-onsemi | 0:098463de4c5d | 444 | return; |
| group-onsemi | 0:098463de4c5d | 445 | } |
| group-onsemi | 0:098463de4c5d | 446 | |
| group-onsemi | 0:098463de4c5d | 447 | obj->rx_buff.buffer = rx; |
| group-onsemi | 0:098463de4c5d | 448 | obj->rx_buff.length = rx_length; |
| group-onsemi | 0:098463de4c5d | 449 | obj->rx_buff.pos = 0; |
| group-onsemi | 0:098463de4c5d | 450 | } |
| group-onsemi | 0:098463de4c5d | 451 | |
| group-onsemi | 0:098463de4c5d | 452 | /** |
| group-onsemi | 0:098463de4c5d | 453 | * Configure events |
| group-onsemi | 0:098463de4c5d | 454 | * |
| group-onsemi | 0:098463de4c5d | 455 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 456 | * @param event The logical OR of the events to configure |
| group-onsemi | 0:098463de4c5d | 457 | * @param enable Set to non-zero to enable events, or zero to disable them |
| group-onsemi | 0:098463de4c5d | 458 | */ |
| group-onsemi | 0:098463de4c5d | 459 | static void serial_enable_event(serial_t *obj, int event, uint8_t enable) |
| group-onsemi | 0:098463de4c5d | 460 | { |
| group-onsemi | 0:098463de4c5d | 461 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 462 | |
| group-onsemi | 0:098463de4c5d | 463 | // Shouldn't have to enable interrupt here, just need to keep track of the requested events. |
| group-onsemi | 0:098463de4c5d | 464 | if (enable) { |
| group-onsemi | 0:098463de4c5d | 465 | obj_s->events |= event; |
| group-onsemi | 0:098463de4c5d | 466 | } else { |
| group-onsemi | 0:098463de4c5d | 467 | obj_s->events &= ~event; |
| group-onsemi | 0:098463de4c5d | 468 | } |
| group-onsemi | 0:098463de4c5d | 469 | } |
| group-onsemi | 0:098463de4c5d | 470 | |
| group-onsemi | 0:098463de4c5d | 471 | |
| group-onsemi | 0:098463de4c5d | 472 | /** |
| group-onsemi | 0:098463de4c5d | 473 | * Get index of serial object TX IRQ, relating it to the physical peripheral. |
| group-onsemi | 0:098463de4c5d | 474 | * |
| group-onsemi | 0:098463de4c5d | 475 | * @param obj pointer to serial object |
| group-onsemi | 0:098463de4c5d | 476 | * @return internal NVIC TX IRQ index of U(S)ART peripheral |
| group-onsemi | 0:098463de4c5d | 477 | */ |
| group-onsemi | 0:098463de4c5d | 478 | static IRQn_Type serial_get_irq_n(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 479 | { |
| group-onsemi | 0:098463de4c5d | 480 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 481 | IRQn_Type irq_n; |
| group-onsemi | 0:098463de4c5d | 482 | |
| group-onsemi | 0:098463de4c5d | 483 | switch (obj_s->index) { |
| group-onsemi | 0:098463de4c5d | 484 | case 0: |
| group-onsemi | 0:098463de4c5d | 485 | irq_n = USART1_IRQn; |
| group-onsemi | 0:098463de4c5d | 486 | break; |
| group-onsemi | 0:098463de4c5d | 487 | |
| group-onsemi | 0:098463de4c5d | 488 | case 1: |
| group-onsemi | 0:098463de4c5d | 489 | irq_n = USART2_IRQn; |
| group-onsemi | 0:098463de4c5d | 490 | break; |
| group-onsemi | 0:098463de4c5d | 491 | |
| group-onsemi | 0:098463de4c5d | 492 | case 2: |
| group-onsemi | 0:098463de4c5d | 493 | irq_n = USART3_IRQn; |
| group-onsemi | 0:098463de4c5d | 494 | break; |
| group-onsemi | 0:098463de4c5d | 495 | |
| group-onsemi | 0:098463de4c5d | 496 | default: |
| group-onsemi | 0:098463de4c5d | 497 | irq_n = (IRQn_Type)0; |
| group-onsemi | 0:098463de4c5d | 498 | } |
| group-onsemi | 0:098463de4c5d | 499 | |
| group-onsemi | 0:098463de4c5d | 500 | return irq_n; |
| group-onsemi | 0:098463de4c5d | 501 | } |
| group-onsemi | 0:098463de4c5d | 502 | |
| group-onsemi | 0:098463de4c5d | 503 | /****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 504 | * MBED API FUNCTIONS |
| group-onsemi | 0:098463de4c5d | 505 | ******************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 506 | |
| group-onsemi | 0:098463de4c5d | 507 | /** |
| group-onsemi | 0:098463de4c5d | 508 | * Begin asynchronous TX transfer. The used buffer is specified in the serial |
| group-onsemi | 0:098463de4c5d | 509 | * object, tx_buff |
| group-onsemi | 0:098463de4c5d | 510 | * |
| group-onsemi | 0:098463de4c5d | 511 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 512 | * @param tx The buffer for sending |
| group-onsemi | 0:098463de4c5d | 513 | * @param tx_length The number of words to transmit |
| group-onsemi | 0:098463de4c5d | 514 | * @param tx_width The bit width of buffer word |
| group-onsemi | 0:098463de4c5d | 515 | * @param handler The serial handler |
| group-onsemi | 0:098463de4c5d | 516 | * @param event The logical OR of events to be registered |
| group-onsemi | 0:098463de4c5d | 517 | * @param hint A suggestion for how to use DMA with this transfer |
| group-onsemi | 0:098463de4c5d | 518 | * @return Returns number of data transfered, or 0 otherwise |
| group-onsemi | 0:098463de4c5d | 519 | */ |
| group-onsemi | 0:098463de4c5d | 520 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
| group-onsemi | 0:098463de4c5d | 521 | { |
| group-onsemi | 0:098463de4c5d | 522 | // TODO: DMA usage is currently ignored |
| group-onsemi | 0:098463de4c5d | 523 | (void) hint; |
| group-onsemi | 0:098463de4c5d | 524 | |
| group-onsemi | 0:098463de4c5d | 525 | // Check buffer is ok |
| group-onsemi | 0:098463de4c5d | 526 | MBED_ASSERT(tx != (void*)0); |
| group-onsemi | 0:098463de4c5d | 527 | MBED_ASSERT(tx_width == 8); // support only 8b width |
| group-onsemi | 0:098463de4c5d | 528 | |
| group-onsemi | 0:098463de4c5d | 529 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 530 | UART_HandleTypeDef * huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 531 | |
| group-onsemi | 0:098463de4c5d | 532 | if (tx_length == 0) { |
| group-onsemi | 0:098463de4c5d | 533 | return 0; |
| group-onsemi | 0:098463de4c5d | 534 | } |
| group-onsemi | 0:098463de4c5d | 535 | |
| group-onsemi | 0:098463de4c5d | 536 | // Set up buffer |
| group-onsemi | 0:098463de4c5d | 537 | serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width); |
| group-onsemi | 0:098463de4c5d | 538 | |
| group-onsemi | 0:098463de4c5d | 539 | // Set up events |
| group-onsemi | 0:098463de4c5d | 540 | serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events |
| group-onsemi | 0:098463de4c5d | 541 | serial_enable_event(obj, event, 1); // Set only the wanted events |
| group-onsemi | 0:098463de4c5d | 542 | |
| group-onsemi | 0:098463de4c5d | 543 | // Enable interrupt |
| group-onsemi | 0:098463de4c5d | 544 | IRQn_Type irq_n = serial_get_irq_n(obj); |
| group-onsemi | 0:098463de4c5d | 545 | NVIC_ClearPendingIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 546 | NVIC_DisableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 547 | NVIC_SetPriority(irq_n, 1); |
| group-onsemi | 0:098463de4c5d | 548 | NVIC_SetVector(irq_n, (uint32_t)handler); |
| group-onsemi | 0:098463de4c5d | 549 | NVIC_EnableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 550 | |
| group-onsemi | 0:098463de4c5d | 551 | // the following function will enable UART_IT_TXE and error interrupts |
| group-onsemi | 0:098463de4c5d | 552 | if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) { |
| group-onsemi | 0:098463de4c5d | 553 | return 0; |
| group-onsemi | 0:098463de4c5d | 554 | } |
| group-onsemi | 0:098463de4c5d | 555 | |
| group-onsemi | 0:098463de4c5d | 556 | return tx_length; |
| group-onsemi | 0:098463de4c5d | 557 | } |
| group-onsemi | 0:098463de4c5d | 558 | |
| group-onsemi | 0:098463de4c5d | 559 | /** |
| group-onsemi | 0:098463de4c5d | 560 | * Begin asynchronous RX transfer (enable interrupt for data collecting) |
| group-onsemi | 0:098463de4c5d | 561 | * The used buffer is specified in the serial object, rx_buff |
| group-onsemi | 0:098463de4c5d | 562 | * |
| group-onsemi | 0:098463de4c5d | 563 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 564 | * @param rx The buffer for sending |
| group-onsemi | 0:098463de4c5d | 565 | * @param rx_length The number of words to transmit |
| group-onsemi | 0:098463de4c5d | 566 | * @param rx_width The bit width of buffer word |
| group-onsemi | 0:098463de4c5d | 567 | * @param handler The serial handler |
| group-onsemi | 0:098463de4c5d | 568 | * @param event The logical OR of events to be registered |
| group-onsemi | 0:098463de4c5d | 569 | * @param handler The serial handler |
| group-onsemi | 0:098463de4c5d | 570 | * @param char_match A character in range 0-254 to be matched |
| group-onsemi | 0:098463de4c5d | 571 | * @param hint A suggestion for how to use DMA with this transfer |
| group-onsemi | 0:098463de4c5d | 572 | */ |
| group-onsemi | 0:098463de4c5d | 573 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
| group-onsemi | 0:098463de4c5d | 574 | { |
| group-onsemi | 0:098463de4c5d | 575 | // TODO: DMA usage is currently ignored |
| group-onsemi | 0:098463de4c5d | 576 | (void) hint; |
| group-onsemi | 0:098463de4c5d | 577 | |
| group-onsemi | 0:098463de4c5d | 578 | /* Sanity check arguments */ |
| group-onsemi | 0:098463de4c5d | 579 | MBED_ASSERT(obj); |
| group-onsemi | 0:098463de4c5d | 580 | MBED_ASSERT(rx != (void*)0); |
| group-onsemi | 0:098463de4c5d | 581 | MBED_ASSERT(rx_width == 8); // support only 8b width |
| group-onsemi | 0:098463de4c5d | 582 | |
| group-onsemi | 0:098463de4c5d | 583 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 584 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 585 | |
| group-onsemi | 0:098463de4c5d | 586 | serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0); |
| group-onsemi | 0:098463de4c5d | 587 | serial_enable_event(obj, event, 1); |
| group-onsemi | 0:098463de4c5d | 588 | |
| group-onsemi | 0:098463de4c5d | 589 | // set CharMatch |
| group-onsemi | 0:098463de4c5d | 590 | obj->char_match = char_match; |
| group-onsemi | 0:098463de4c5d | 591 | |
| group-onsemi | 0:098463de4c5d | 592 | serial_rx_buffer_set(obj, rx, rx_length, rx_width); |
| group-onsemi | 0:098463de4c5d | 593 | |
| group-onsemi | 0:098463de4c5d | 594 | IRQn_Type irq_n = serial_get_irq_n(obj); |
| group-onsemi | 0:098463de4c5d | 595 | NVIC_ClearPendingIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 596 | NVIC_DisableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 597 | NVIC_SetPriority(irq_n, 0); |
| group-onsemi | 0:098463de4c5d | 598 | NVIC_SetVector(irq_n, (uint32_t)handler); |
| group-onsemi | 0:098463de4c5d | 599 | NVIC_EnableIRQ(irq_n); |
| group-onsemi | 0:098463de4c5d | 600 | |
| group-onsemi | 0:098463de4c5d | 601 | // following HAL function will enable the RXNE interrupt + error interrupts |
| group-onsemi | 0:098463de4c5d | 602 | HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length); |
| group-onsemi | 0:098463de4c5d | 603 | } |
| group-onsemi | 0:098463de4c5d | 604 | |
| group-onsemi | 0:098463de4c5d | 605 | /** |
| group-onsemi | 0:098463de4c5d | 606 | * Attempts to determine if the serial peripheral is already in use for TX |
| group-onsemi | 0:098463de4c5d | 607 | * |
| group-onsemi | 0:098463de4c5d | 608 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 609 | * @return Non-zero if the TX transaction is ongoing, 0 otherwise |
| group-onsemi | 0:098463de4c5d | 610 | */ |
| group-onsemi | 0:098463de4c5d | 611 | uint8_t serial_tx_active(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 612 | { |
| group-onsemi | 0:098463de4c5d | 613 | MBED_ASSERT(obj); |
| group-onsemi | 0:098463de4c5d | 614 | |
| group-onsemi | 0:098463de4c5d | 615 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 616 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 617 | |
| group-onsemi | 0:098463de4c5d | 618 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0); |
| group-onsemi | 0:098463de4c5d | 619 | } |
| group-onsemi | 0:098463de4c5d | 620 | |
| group-onsemi | 0:098463de4c5d | 621 | /** |
| group-onsemi | 0:098463de4c5d | 622 | * Attempts to determine if the serial peripheral is already in use for RX |
| group-onsemi | 0:098463de4c5d | 623 | * |
| group-onsemi | 0:098463de4c5d | 624 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 625 | * @return Non-zero if the RX transaction is ongoing, 0 otherwise |
| group-onsemi | 0:098463de4c5d | 626 | */ |
| group-onsemi | 0:098463de4c5d | 627 | uint8_t serial_rx_active(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 628 | { |
| group-onsemi | 0:098463de4c5d | 629 | MBED_ASSERT(obj); |
| group-onsemi | 0:098463de4c5d | 630 | |
| group-onsemi | 0:098463de4c5d | 631 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 632 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 633 | |
| group-onsemi | 0:098463de4c5d | 634 | return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0); |
| group-onsemi | 0:098463de4c5d | 635 | } |
| group-onsemi | 0:098463de4c5d | 636 | |
| group-onsemi | 0:098463de4c5d | 637 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { |
| group-onsemi | 0:098463de4c5d | 638 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
| group-onsemi | 0:098463de4c5d | 639 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); |
| group-onsemi | 0:098463de4c5d | 640 | } |
| group-onsemi | 0:098463de4c5d | 641 | } |
| group-onsemi | 0:098463de4c5d | 642 | |
| group-onsemi | 0:098463de4c5d | 643 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { |
| group-onsemi | 0:098463de4c5d | 644 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 645 | volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag |
| group-onsemi | 0:098463de4c5d | 646 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 647 | volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag |
| group-onsemi | 0:098463de4c5d | 648 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 649 | volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag |
| group-onsemi | 0:098463de4c5d | 650 | } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 651 | volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag |
| group-onsemi | 0:098463de4c5d | 652 | } |
| group-onsemi | 0:098463de4c5d | 653 | } |
| group-onsemi | 0:098463de4c5d | 654 | |
| group-onsemi | 0:098463de4c5d | 655 | /** |
| group-onsemi | 0:098463de4c5d | 656 | * The asynchronous TX and RX handler. |
| group-onsemi | 0:098463de4c5d | 657 | * |
| group-onsemi | 0:098463de4c5d | 658 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 659 | * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise |
| group-onsemi | 0:098463de4c5d | 660 | */ |
| group-onsemi | 0:098463de4c5d | 661 | int serial_irq_handler_asynch(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 662 | { |
| group-onsemi | 0:098463de4c5d | 663 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 664 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 665 | |
| group-onsemi | 0:098463de4c5d | 666 | volatile int return_event = 0; |
| group-onsemi | 0:098463de4c5d | 667 | uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer); |
| group-onsemi | 0:098463de4c5d | 668 | uint8_t i = 0; |
| group-onsemi | 0:098463de4c5d | 669 | |
| group-onsemi | 0:098463de4c5d | 670 | // TX PART: |
| group-onsemi | 0:098463de4c5d | 671 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { |
| group-onsemi | 0:098463de4c5d | 672 | if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { |
| group-onsemi | 0:098463de4c5d | 673 | // Return event SERIAL_EVENT_TX_COMPLETE if requested |
| group-onsemi | 0:098463de4c5d | 674 | if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) { |
| group-onsemi | 0:098463de4c5d | 675 | return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 676 | } |
| group-onsemi | 0:098463de4c5d | 677 | } |
| group-onsemi | 0:098463de4c5d | 678 | } |
| group-onsemi | 0:098463de4c5d | 679 | |
| group-onsemi | 0:098463de4c5d | 680 | // Handle error events |
| group-onsemi | 0:098463de4c5d | 681 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 682 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
| group-onsemi | 0:098463de4c5d | 683 | return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 684 | } |
| group-onsemi | 0:098463de4c5d | 685 | } |
| group-onsemi | 0:098463de4c5d | 686 | |
| group-onsemi | 0:098463de4c5d | 687 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 688 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
| group-onsemi | 0:098463de4c5d | 689 | return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 690 | } |
| group-onsemi | 0:098463de4c5d | 691 | } |
| group-onsemi | 0:098463de4c5d | 692 | |
| group-onsemi | 0:098463de4c5d | 693 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) { |
| group-onsemi | 0:098463de4c5d | 694 | if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) { |
| group-onsemi | 0:098463de4c5d | 695 | return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 696 | } |
| group-onsemi | 0:098463de4c5d | 697 | } |
| group-onsemi | 0:098463de4c5d | 698 | |
| group-onsemi | 0:098463de4c5d | 699 | HAL_UART_IRQHandler(huart); |
| group-onsemi | 0:098463de4c5d | 700 | |
| group-onsemi | 0:098463de4c5d | 701 | // Abort if an error occurs |
| group-onsemi | 0:098463de4c5d | 702 | if (return_event & SERIAL_EVENT_RX_PARITY_ERROR || |
| group-onsemi | 0:098463de4c5d | 703 | return_event & SERIAL_EVENT_RX_FRAMING_ERROR || |
| group-onsemi | 0:098463de4c5d | 704 | return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) { |
| group-onsemi | 0:098463de4c5d | 705 | return return_event; |
| group-onsemi | 0:098463de4c5d | 706 | } |
| group-onsemi | 0:098463de4c5d | 707 | |
| group-onsemi | 0:098463de4c5d | 708 | //RX PART |
| group-onsemi | 0:098463de4c5d | 709 | if (huart->RxXferSize != 0) { |
| group-onsemi | 0:098463de4c5d | 710 | obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount; |
| group-onsemi | 0:098463de4c5d | 711 | } |
| group-onsemi | 0:098463de4c5d | 712 | if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) { |
| group-onsemi | 0:098463de4c5d | 713 | return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 714 | } |
| group-onsemi | 0:098463de4c5d | 715 | |
| group-onsemi | 0:098463de4c5d | 716 | // Check if char_match is present |
| group-onsemi | 0:098463de4c5d | 717 | if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) { |
| group-onsemi | 0:098463de4c5d | 718 | if (buf != NULL) { |
| group-onsemi | 0:098463de4c5d | 719 | for (i = 0; i < obj->rx_buff.pos; i++) { |
| group-onsemi | 0:098463de4c5d | 720 | if (buf[i] == obj->char_match) { |
| group-onsemi | 0:098463de4c5d | 721 | obj->rx_buff.pos = i; |
| group-onsemi | 0:098463de4c5d | 722 | return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events); |
| group-onsemi | 0:098463de4c5d | 723 | serial_rx_abort_asynch(obj); |
| group-onsemi | 0:098463de4c5d | 724 | break; |
| group-onsemi | 0:098463de4c5d | 725 | } |
| group-onsemi | 0:098463de4c5d | 726 | } |
| group-onsemi | 0:098463de4c5d | 727 | } |
| group-onsemi | 0:098463de4c5d | 728 | } |
| group-onsemi | 0:098463de4c5d | 729 | |
| group-onsemi | 0:098463de4c5d | 730 | return return_event; |
| group-onsemi | 0:098463de4c5d | 731 | } |
| group-onsemi | 0:098463de4c5d | 732 | |
| group-onsemi | 0:098463de4c5d | 733 | /** |
| group-onsemi | 0:098463de4c5d | 734 | * Abort the ongoing TX transaction. It disables the enabled interupt for TX and |
| group-onsemi | 0:098463de4c5d | 735 | * flush TX hardware buffer if TX FIFO is used |
| group-onsemi | 0:098463de4c5d | 736 | * |
| group-onsemi | 0:098463de4c5d | 737 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 738 | */ |
| group-onsemi | 0:098463de4c5d | 739 | void serial_tx_abort_asynch(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 740 | { |
| group-onsemi | 0:098463de4c5d | 741 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 742 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 743 | |
| group-onsemi | 0:098463de4c5d | 744 | __HAL_UART_DISABLE_IT(huart, UART_IT_TC); |
| group-onsemi | 0:098463de4c5d | 745 | __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); |
| group-onsemi | 0:098463de4c5d | 746 | |
| group-onsemi | 0:098463de4c5d | 747 | // clear flags |
| group-onsemi | 0:098463de4c5d | 748 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); |
| group-onsemi | 0:098463de4c5d | 749 | |
| group-onsemi | 0:098463de4c5d | 750 | // reset states |
| group-onsemi | 0:098463de4c5d | 751 | huart->TxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 752 | // update handle state |
| group-onsemi | 0:098463de4c5d | 753 | if(huart->State == HAL_UART_STATE_BUSY_TX_RX) { |
| group-onsemi | 0:098463de4c5d | 754 | huart->State = HAL_UART_STATE_BUSY_RX; |
| group-onsemi | 0:098463de4c5d | 755 | } else { |
| group-onsemi | 0:098463de4c5d | 756 | huart->State = HAL_UART_STATE_READY; |
| group-onsemi | 0:098463de4c5d | 757 | } |
| group-onsemi | 0:098463de4c5d | 758 | } |
| group-onsemi | 0:098463de4c5d | 759 | |
| group-onsemi | 0:098463de4c5d | 760 | /** |
| group-onsemi | 0:098463de4c5d | 761 | * Abort the ongoing RX transaction It disables the enabled interrupt for RX and |
| group-onsemi | 0:098463de4c5d | 762 | * flush RX hardware buffer if RX FIFO is used |
| group-onsemi | 0:098463de4c5d | 763 | * |
| group-onsemi | 0:098463de4c5d | 764 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 765 | */ |
| group-onsemi | 0:098463de4c5d | 766 | void serial_rx_abort_asynch(serial_t *obj) |
| group-onsemi | 0:098463de4c5d | 767 | { |
| group-onsemi | 0:098463de4c5d | 768 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 769 | UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; |
| group-onsemi | 0:098463de4c5d | 770 | |
| group-onsemi | 0:098463de4c5d | 771 | // disable interrupts |
| group-onsemi | 0:098463de4c5d | 772 | __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); |
| group-onsemi | 0:098463de4c5d | 773 | __HAL_UART_DISABLE_IT(huart, UART_IT_PE); |
| group-onsemi | 0:098463de4c5d | 774 | __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); |
| group-onsemi | 0:098463de4c5d | 775 | |
| group-onsemi | 0:098463de4c5d | 776 | // clear flags |
| group-onsemi | 0:098463de4c5d | 777 | __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE); |
| group-onsemi | 0:098463de4c5d | 778 | volatile uint32_t tmpval = huart->Instance->DR; // Clear errors flag |
| group-onsemi | 0:098463de4c5d | 779 | |
| group-onsemi | 0:098463de4c5d | 780 | // reset states |
| group-onsemi | 0:098463de4c5d | 781 | huart->RxXferCount = 0; |
| group-onsemi | 0:098463de4c5d | 782 | // update handle state |
| group-onsemi | 0:098463de4c5d | 783 | if(huart->State == HAL_UART_STATE_BUSY_TX_RX) { |
| group-onsemi | 0:098463de4c5d | 784 | huart->State = HAL_UART_STATE_BUSY_TX; |
| group-onsemi | 0:098463de4c5d | 785 | } else { |
| group-onsemi | 0:098463de4c5d | 786 | huart->State = HAL_UART_STATE_READY; |
| group-onsemi | 0:098463de4c5d | 787 | } |
| group-onsemi | 0:098463de4c5d | 788 | } |
| group-onsemi | 0:098463de4c5d | 789 | |
| group-onsemi | 0:098463de4c5d | 790 | #endif |
| group-onsemi | 0:098463de4c5d | 791 | |
| group-onsemi | 0:098463de4c5d | 792 | #if DEVICE_SERIAL_FC |
| group-onsemi | 0:098463de4c5d | 793 | |
| group-onsemi | 0:098463de4c5d | 794 | /** |
| group-onsemi | 0:098463de4c5d | 795 | * Set HW Control Flow |
| group-onsemi | 0:098463de4c5d | 796 | * @param obj The serial object |
| group-onsemi | 0:098463de4c5d | 797 | * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS) |
| group-onsemi | 0:098463de4c5d | 798 | * @param rxflow Pin for the rxflow |
| group-onsemi | 0:098463de4c5d | 799 | * @param txflow Pin for the txflow |
| group-onsemi | 0:098463de4c5d | 800 | */ |
| group-onsemi | 0:098463de4c5d | 801 | void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) |
| group-onsemi | 0:098463de4c5d | 802 | { |
| group-onsemi | 0:098463de4c5d | 803 | struct serial_s *obj_s = SERIAL_S(obj); |
| group-onsemi | 0:098463de4c5d | 804 | |
| group-onsemi | 0:098463de4c5d | 805 | // Determine the UART to use (UART_1, UART_2, ...) |
| group-onsemi | 0:098463de4c5d | 806 | UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS); |
| group-onsemi | 0:098463de4c5d | 807 | UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS); |
| group-onsemi | 0:098463de4c5d | 808 | |
| group-onsemi | 0:098463de4c5d | 809 | // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object |
| group-onsemi | 0:098463de4c5d | 810 | obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts); |
| group-onsemi | 0:098463de4c5d | 811 | MBED_ASSERT(obj_s->uart != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 812 | |
| group-onsemi | 0:098463de4c5d | 813 | if(type == FlowControlNone) { |
| group-onsemi | 0:098463de4c5d | 814 | // Disable hardware flow control |
| group-onsemi | 0:098463de4c5d | 815 | obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; |
| group-onsemi | 0:098463de4c5d | 816 | } |
| group-onsemi | 0:098463de4c5d | 817 | if (type == FlowControlRTS) { |
| group-onsemi | 0:098463de4c5d | 818 | // Enable RTS |
| group-onsemi | 0:098463de4c5d | 819 | MBED_ASSERT(uart_rts != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 820 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS; |
| group-onsemi | 0:098463de4c5d | 821 | obj_s->pin_rts = rxflow; |
| group-onsemi | 0:098463de4c5d | 822 | // Enable the pin for RTS function |
| group-onsemi | 0:098463de4c5d | 823 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
| group-onsemi | 0:098463de4c5d | 824 | } |
| group-onsemi | 0:098463de4c5d | 825 | if (type == FlowControlCTS) { |
| group-onsemi | 0:098463de4c5d | 826 | // Enable CTS |
| group-onsemi | 0:098463de4c5d | 827 | MBED_ASSERT(uart_cts != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 828 | obj_s->hw_flow_ctl = UART_HWCONTROL_CTS; |
| group-onsemi | 0:098463de4c5d | 829 | obj_s->pin_cts = txflow; |
| group-onsemi | 0:098463de4c5d | 830 | // Enable the pin for CTS function |
| group-onsemi | 0:098463de4c5d | 831 | pinmap_pinout(txflow, PinMap_UART_CTS); |
| group-onsemi | 0:098463de4c5d | 832 | } |
| group-onsemi | 0:098463de4c5d | 833 | if (type == FlowControlRTSCTS) { |
| group-onsemi | 0:098463de4c5d | 834 | // Enable CTS & RTS |
| group-onsemi | 0:098463de4c5d | 835 | MBED_ASSERT(uart_rts != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 836 | MBED_ASSERT(uart_cts != (UARTName)NC); |
| group-onsemi | 0:098463de4c5d | 837 | obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS; |
| group-onsemi | 0:098463de4c5d | 838 | obj_s->pin_rts = rxflow; |
| group-onsemi | 0:098463de4c5d | 839 | obj_s->pin_cts = txflow; |
| group-onsemi | 0:098463de4c5d | 840 | // Enable the pin for CTS function |
| group-onsemi | 0:098463de4c5d | 841 | pinmap_pinout(txflow, PinMap_UART_CTS); |
| group-onsemi | 0:098463de4c5d | 842 | // Enable the pin for RTS function |
| group-onsemi | 0:098463de4c5d | 843 | pinmap_pinout(rxflow, PinMap_UART_RTS); |
| group-onsemi | 0:098463de4c5d | 844 | } |
| group-onsemi | 0:098463de4c5d | 845 | |
| group-onsemi | 0:098463de4c5d | 846 | init_uart(obj); |
| group-onsemi | 0:098463de4c5d | 847 | } |
| group-onsemi | 0:098463de4c5d | 848 | |
| group-onsemi | 0:098463de4c5d | 849 | #endif |
| group-onsemi | 0:098463de4c5d | 850 | |
| group-onsemi | 0:098463de4c5d | 851 | #endif |