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targets/TARGET_NXP/TARGET_LPC13XX/device/system_LPC13Uxx.h@1:f30bdcd2b33b, 2017-02-27 (annotated)
- Committer:
- jacobjohnson
- Date:
- Mon Feb 27 17:45:05 2017 +0000
- Revision:
- 1:f30bdcd2b33b
- Parent:
- 0:098463de4c5d
changed the inputscale from 1 to 7 in analogin_api.c. This will need to be changed later, and accessed from the main level, but for now this allows the adc to read a value from 0 to 3.7V, instead of just up to 1V.;
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| group-onsemi | 0:098463de4c5d | 1 | /**************************************************************************//** |
| group-onsemi | 0:098463de4c5d | 2 | * @file system_LPC13Uxx.h |
| group-onsemi | 0:098463de4c5d | 3 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File |
| group-onsemi | 0:098463de4c5d | 4 | * for the NXP LPC13Uxx Device Series |
| group-onsemi | 0:098463de4c5d | 5 | * @version V1.10 |
| group-onsemi | 0:098463de4c5d | 6 | * @date 24. November 2010 |
| group-onsemi | 0:098463de4c5d | 7 | * |
| group-onsemi | 0:098463de4c5d | 8 | * @note |
| group-onsemi | 0:098463de4c5d | 9 | * Copyright (C) 2009-2010 ARM Limited. All rights reserved. |
| group-onsemi | 0:098463de4c5d | 10 | * |
| group-onsemi | 0:098463de4c5d | 11 | * @par |
| group-onsemi | 0:098463de4c5d | 12 | * ARM Limited (ARM) is supplying this software for use with Cortex-M |
| group-onsemi | 0:098463de4c5d | 13 | * processor based microcontrollers. This file can be freely distributed |
| group-onsemi | 0:098463de4c5d | 14 | * within development tools that are supporting such ARM based processors. |
| group-onsemi | 0:098463de4c5d | 15 | * |
| group-onsemi | 0:098463de4c5d | 16 | * @par |
| group-onsemi | 0:098463de4c5d | 17 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| group-onsemi | 0:098463de4c5d | 18 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| group-onsemi | 0:098463de4c5d | 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| group-onsemi | 0:098463de4c5d | 20 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
| group-onsemi | 0:098463de4c5d | 21 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| group-onsemi | 0:098463de4c5d | 22 | * |
| group-onsemi | 0:098463de4c5d | 23 | ******************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 24 | |
| group-onsemi | 0:098463de4c5d | 25 | |
| group-onsemi | 0:098463de4c5d | 26 | #ifndef __SYSTEM_LPC13Uxx_H |
| group-onsemi | 0:098463de4c5d | 27 | #define __SYSTEM_LPC13Uxx_H |
| group-onsemi | 0:098463de4c5d | 28 | |
| group-onsemi | 0:098463de4c5d | 29 | #ifdef __cplusplus |
| group-onsemi | 0:098463de4c5d | 30 | extern "C" { |
| group-onsemi | 0:098463de4c5d | 31 | #endif |
| group-onsemi | 0:098463de4c5d | 32 | |
| group-onsemi | 0:098463de4c5d | 33 | #include <stdint.h> |
| group-onsemi | 0:098463de4c5d | 34 | |
| group-onsemi | 0:098463de4c5d | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ |
| group-onsemi | 0:098463de4c5d | 36 | |
| group-onsemi | 0:098463de4c5d | 37 | |
| group-onsemi | 0:098463de4c5d | 38 | /** |
| group-onsemi | 0:098463de4c5d | 39 | * Initialize the system |
| group-onsemi | 0:098463de4c5d | 40 | * |
| group-onsemi | 0:098463de4c5d | 41 | * @param none |
| group-onsemi | 0:098463de4c5d | 42 | * @return none |
| group-onsemi | 0:098463de4c5d | 43 | * |
| group-onsemi | 0:098463de4c5d | 44 | * @brief Setup the microcontroller system. |
| group-onsemi | 0:098463de4c5d | 45 | * Initialize the System and update the SystemCoreClock variable. |
| group-onsemi | 0:098463de4c5d | 46 | */ |
| group-onsemi | 0:098463de4c5d | 47 | extern void SystemInit (void); |
| group-onsemi | 0:098463de4c5d | 48 | |
| group-onsemi | 0:098463de4c5d | 49 | /** |
| group-onsemi | 0:098463de4c5d | 50 | * Update SystemCoreClock variable |
| group-onsemi | 0:098463de4c5d | 51 | * |
| group-onsemi | 0:098463de4c5d | 52 | * @param none |
| group-onsemi | 0:098463de4c5d | 53 | * @return none |
| group-onsemi | 0:098463de4c5d | 54 | * |
| group-onsemi | 0:098463de4c5d | 55 | * @brief Updates the SystemCoreClock with current core Clock |
| group-onsemi | 0:098463de4c5d | 56 | * retrieved from cpu registers. |
| group-onsemi | 0:098463de4c5d | 57 | */ |
| group-onsemi | 0:098463de4c5d | 58 | extern void SystemCoreClockUpdate (void); |
| group-onsemi | 0:098463de4c5d | 59 | |
| group-onsemi | 0:098463de4c5d | 60 | #ifdef __cplusplus |
| group-onsemi | 0:098463de4c5d | 61 | } |
| group-onsemi | 0:098463de4c5d | 62 | #endif |
| group-onsemi | 0:098463de4c5d | 63 | |
| group-onsemi | 0:098463de4c5d | 64 | #endif /* __SYSTEM_LPC13Uxx_H */ |