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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32625/serial_api.c@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #include <string.h>
group-onsemi 0:098463de4c5d 35 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 36 #include "cmsis.h"
group-onsemi 0:098463de4c5d 37 #include "serial_api.h"
group-onsemi 0:098463de4c5d 38 #include "gpio_api.h"
group-onsemi 0:098463de4c5d 39 #include "uart.h"
group-onsemi 0:098463de4c5d 40 #include "uart_regs.h"
group-onsemi 0:098463de4c5d 41 #include "ioman_regs.h"
group-onsemi 0:098463de4c5d 42 #include "PeripheralPins.h"
group-onsemi 0:098463de4c5d 43
group-onsemi 0:098463de4c5d 44 #define DEFAULT_BAUD 9600
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAMING_ERR | \
group-onsemi 0:098463de4c5d 47 MXC_F_UART_INTFL_RX_PARITY_ERR | \
group-onsemi 0:098463de4c5d 48 MXC_F_UART_INTFL_RX_FIFO_OVERFLOW)
group-onsemi 0:098463de4c5d 49
group-onsemi 0:098463de4c5d 50 // Variables for managing the stdio UART
group-onsemi 0:098463de4c5d 51 int stdio_uart_inited;
group-onsemi 0:098463de4c5d 52 serial_t stdio_uart;
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 // Variables for interrupt driven
group-onsemi 0:098463de4c5d 55 static uart_irq_handler irq_handler;
group-onsemi 0:098463de4c5d 56 static serial_t *objs[MXC_CFG_UART_INSTANCES];
group-onsemi 0:098463de4c5d 57
group-onsemi 0:098463de4c5d 58 static void usurp_pin(PinName, int);
group-onsemi 0:098463de4c5d 59
group-onsemi 0:098463de4c5d 60 //******************************************************************************
group-onsemi 0:098463de4c5d 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
group-onsemi 0:098463de4c5d 62 {
group-onsemi 0:098463de4c5d 63 // Determine which uart is associated with each pin
group-onsemi 0:098463de4c5d 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
group-onsemi 0:098463de4c5d 67
group-onsemi 0:098463de4c5d 68 // Make sure that both pins are pointing to the same uart
group-onsemi 0:098463de4c5d 69 MBED_ASSERT(uart != (UARTName)NC);
group-onsemi 0:098463de4c5d 70
group-onsemi 0:098463de4c5d 71 // Set the obj pointer to the proper uart
group-onsemi 0:098463de4c5d 72 obj->uart = (mxc_uart_regs_t*)uart;
group-onsemi 0:098463de4c5d 73
group-onsemi 0:098463de4c5d 74 // Set the uart index
group-onsemi 0:098463de4c5d 75 obj->index = MXC_UART_GET_IDX(obj->uart);
group-onsemi 0:098463de4c5d 76 obj->fifo = (mxc_uart_fifo_regs_t*)MXC_UART_GET_BASE_FIFO(obj->index);
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 // Manage stdio UART
group-onsemi 0:098463de4c5d 79 if (uart == STDIO_UART) {
group-onsemi 0:098463de4c5d 80 stdio_uart_inited = 1;
group-onsemi 0:098463de4c5d 81 memcpy(&stdio_uart, obj, sizeof(serial_t));
group-onsemi 0:098463de4c5d 82 }
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 // Record the pins requested
group-onsemi 0:098463de4c5d 85 obj->tx = tx;
group-onsemi 0:098463de4c5d 86 obj->rx = rx;
group-onsemi 0:098463de4c5d 87
group-onsemi 0:098463de4c5d 88 // Merge pin function requests for use with CMSIS init func
group-onsemi 0:098463de4c5d 89 ioman_req_t io_req = {0};
group-onsemi 0:098463de4c5d 90 pin_function_t *pin_func = NULL;
group-onsemi 0:098463de4c5d 91 if (tx != NC) {
group-onsemi 0:098463de4c5d 92 pin_func = (pin_function_t *)pinmap_find_function(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 93 io_req.value = pin_func->req_val;
group-onsemi 0:098463de4c5d 94 }
group-onsemi 0:098463de4c5d 95 if (rx != NC) {
group-onsemi 0:098463de4c5d 96 pin_func = (pin_function_t *)pinmap_find_function(rx, PinMap_UART_RX);
group-onsemi 0:098463de4c5d 97 io_req.value |= pin_func->req_val;
group-onsemi 0:098463de4c5d 98 }
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 // Using req and ack pointers of last pin function lookup
group-onsemi 0:098463de4c5d 101 obj->sys_cfg.io_cfg.req_reg = pin_func->reg_req;
group-onsemi 0:098463de4c5d 102 obj->sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
group-onsemi 0:098463de4c5d 103 obj->sys_cfg.io_cfg.req_val = io_req;
group-onsemi 0:098463de4c5d 104 obj->sys_cfg.clk_scale = CLKMAN_SCALE_DIV_8;
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 // Configure the UART with default parameters
group-onsemi 0:098463de4c5d 107 obj->cfg.extra_stop = 0;
group-onsemi 0:098463de4c5d 108 obj->cfg.cts = 0;
group-onsemi 0:098463de4c5d 109 obj->cfg.rts = 0;
group-onsemi 0:098463de4c5d 110 obj->cfg.baud = DEFAULT_BAUD;
group-onsemi 0:098463de4c5d 111 obj->cfg.size = UART_DATA_SIZE_8_BITS;
group-onsemi 0:098463de4c5d 112 obj->cfg.parity = UART_PARITY_DISABLE;
group-onsemi 0:098463de4c5d 113
group-onsemi 0:098463de4c5d 114 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
group-onsemi 0:098463de4c5d 115 MBED_ASSERT(retval == E_NO_ERROR);
group-onsemi 0:098463de4c5d 116 }
group-onsemi 0:098463de4c5d 117
group-onsemi 0:098463de4c5d 118 //******************************************************************************
group-onsemi 0:098463de4c5d 119 void serial_baud(serial_t *obj, int baudrate)
group-onsemi 0:098463de4c5d 120 {
group-onsemi 0:098463de4c5d 121 obj->cfg.baud = baudrate;
group-onsemi 0:098463de4c5d 122 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
group-onsemi 0:098463de4c5d 123 MBED_ASSERT(retval == E_NO_ERROR);
group-onsemi 0:098463de4c5d 124 }
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126 //******************************************************************************
group-onsemi 0:098463de4c5d 127 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
group-onsemi 0:098463de4c5d 128 {
group-onsemi 0:098463de4c5d 129 switch (data_bits) {
group-onsemi 0:098463de4c5d 130 case 5:
group-onsemi 0:098463de4c5d 131 obj->cfg.size = UART_DATA_SIZE_5_BITS;
group-onsemi 0:098463de4c5d 132 break;
group-onsemi 0:098463de4c5d 133 case 6:
group-onsemi 0:098463de4c5d 134 obj->cfg.size = UART_DATA_SIZE_6_BITS;
group-onsemi 0:098463de4c5d 135 break;
group-onsemi 0:098463de4c5d 136 case 7:
group-onsemi 0:098463de4c5d 137 obj->cfg.size = UART_DATA_SIZE_7_BITS;
group-onsemi 0:098463de4c5d 138 break;
group-onsemi 0:098463de4c5d 139 case 8:
group-onsemi 0:098463de4c5d 140 obj->cfg.size = UART_DATA_SIZE_8_BITS;
group-onsemi 0:098463de4c5d 141 break;
group-onsemi 0:098463de4c5d 142 default:
group-onsemi 0:098463de4c5d 143 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 144 break;
group-onsemi 0:098463de4c5d 145 }
group-onsemi 0:098463de4c5d 146
group-onsemi 0:098463de4c5d 147 switch (parity) {
group-onsemi 0:098463de4c5d 148 case ParityNone:
group-onsemi 0:098463de4c5d 149 obj->cfg.parity = UART_PARITY_DISABLE;
group-onsemi 0:098463de4c5d 150 break;
group-onsemi 0:098463de4c5d 151 case ParityOdd :
group-onsemi 0:098463de4c5d 152 obj->cfg.parity = UART_PARITY_ODD;
group-onsemi 0:098463de4c5d 153 break;
group-onsemi 0:098463de4c5d 154 case ParityEven:
group-onsemi 0:098463de4c5d 155 obj->cfg.parity = UART_PARITY_EVEN;
group-onsemi 0:098463de4c5d 156 break;
group-onsemi 0:098463de4c5d 157 case ParityForced1:
group-onsemi 0:098463de4c5d 158 case ParityForced0:
group-onsemi 0:098463de4c5d 159 default:
group-onsemi 0:098463de4c5d 160 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 161 break;
group-onsemi 0:098463de4c5d 162 }
group-onsemi 0:098463de4c5d 163
group-onsemi 0:098463de4c5d 164 switch (stop_bits) {
group-onsemi 0:098463de4c5d 165 case 1:
group-onsemi 0:098463de4c5d 166 obj->cfg.extra_stop = 0;
group-onsemi 0:098463de4c5d 167 break;
group-onsemi 0:098463de4c5d 168 case 2:
group-onsemi 0:098463de4c5d 169 obj->cfg.extra_stop = 1;
group-onsemi 0:098463de4c5d 170 break;
group-onsemi 0:098463de4c5d 171 default:
group-onsemi 0:098463de4c5d 172 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 173 break;
group-onsemi 0:098463de4c5d 174 }
group-onsemi 0:098463de4c5d 175
group-onsemi 0:098463de4c5d 176 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
group-onsemi 0:098463de4c5d 177 MBED_ASSERT(retval == E_NO_ERROR);
group-onsemi 0:098463de4c5d 178 }
group-onsemi 0:098463de4c5d 179
group-onsemi 0:098463de4c5d 180 //******************************************************************************
group-onsemi 0:098463de4c5d 181 void uart_handler(serial_t *obj)
group-onsemi 0:098463de4c5d 182 {
group-onsemi 0:098463de4c5d 183 if (obj && obj->id) {
group-onsemi 0:098463de4c5d 184 irq_handler(obj->id, RxIrq);
group-onsemi 0:098463de4c5d 185 }
group-onsemi 0:098463de4c5d 186 }
group-onsemi 0:098463de4c5d 187
group-onsemi 0:098463de4c5d 188 void uart0_handler(void) { uart_handler(objs[0]); }
group-onsemi 0:098463de4c5d 189 void uart1_handler(void) { uart_handler(objs[1]); }
group-onsemi 0:098463de4c5d 190 void uart2_handler(void) { uart_handler(objs[2]); }
group-onsemi 0:098463de4c5d 191
group-onsemi 0:098463de4c5d 192 //******************************************************************************
group-onsemi 0:098463de4c5d 193 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
group-onsemi 0:098463de4c5d 194 {
group-onsemi 0:098463de4c5d 195 irq_handler = handler;
group-onsemi 0:098463de4c5d 196 obj->id = id;
group-onsemi 0:098463de4c5d 197 }
group-onsemi 0:098463de4c5d 198
group-onsemi 0:098463de4c5d 199 //******************************************************************************
group-onsemi 0:098463de4c5d 200 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
group-onsemi 0:098463de4c5d 201 {
group-onsemi 0:098463de4c5d 202 switch (obj->index) {
group-onsemi 0:098463de4c5d 203 case 0:
group-onsemi 0:098463de4c5d 204 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
group-onsemi 0:098463de4c5d 205 NVIC_EnableIRQ(UART0_IRQn);
group-onsemi 0:098463de4c5d 206 break;
group-onsemi 0:098463de4c5d 207 case 1:
group-onsemi 0:098463de4c5d 208 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
group-onsemi 0:098463de4c5d 209 NVIC_EnableIRQ(UART1_IRQn);
group-onsemi 0:098463de4c5d 210 break;
group-onsemi 0:098463de4c5d 211 case 2:
group-onsemi 0:098463de4c5d 212 NVIC_SetVector(UART2_IRQn, (uint32_t)uart2_handler);
group-onsemi 0:098463de4c5d 213 NVIC_EnableIRQ(UART2_IRQn);
group-onsemi 0:098463de4c5d 214 break;
group-onsemi 0:098463de4c5d 215 default:
group-onsemi 0:098463de4c5d 216 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 217 }
group-onsemi 0:098463de4c5d 218
group-onsemi 0:098463de4c5d 219 if (irq == RxIrq) {
group-onsemi 0:098463de4c5d 220 // Enable RX FIFO Threshold Interrupt
group-onsemi 0:098463de4c5d 221 if (enable) {
group-onsemi 0:098463de4c5d 222 // Clear pending interrupts
group-onsemi 0:098463de4c5d 223 obj->uart->intfl = obj->uart->intfl;
group-onsemi 0:098463de4c5d 224 obj->uart->inten |= (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
group-onsemi 0:098463de4c5d 225 } else {
group-onsemi 0:098463de4c5d 226 // Clear pending interrupts
group-onsemi 0:098463de4c5d 227 obj->uart->intfl = obj->uart->intfl;
group-onsemi 0:098463de4c5d 228 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
group-onsemi 0:098463de4c5d 229 }
group-onsemi 0:098463de4c5d 230 } else if (irq == TxIrq) {
group-onsemi 0:098463de4c5d 231 // Set TX Almost Empty level to interrupt when empty
group-onsemi 0:098463de4c5d 232 MXC_SET_FIELD(&obj->uart->tx_fifo_ctrl, MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL,
group-onsemi 0:098463de4c5d 233 (MXC_UART_FIFO_DEPTH - 1) << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS);
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235 // Enable TX Almost Empty Interrupt
group-onsemi 0:098463de4c5d 236 if (enable) {
group-onsemi 0:098463de4c5d 237 // Clear pending interrupts
group-onsemi 0:098463de4c5d 238 obj->uart->intfl = obj->uart->intfl;
group-onsemi 0:098463de4c5d 239 obj->uart->inten |= MXC_F_UART_INTFL_TX_FIFO_AE;
group-onsemi 0:098463de4c5d 240 } else {
group-onsemi 0:098463de4c5d 241 // Clear pending interrupts
group-onsemi 0:098463de4c5d 242 obj->uart->intfl = obj->uart->intfl;
group-onsemi 0:098463de4c5d 243 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_FIFO_AE;
group-onsemi 0:098463de4c5d 244 }
group-onsemi 0:098463de4c5d 245 } else {
group-onsemi 0:098463de4c5d 246 MBED_ASSERT(0);
group-onsemi 0:098463de4c5d 247 }
group-onsemi 0:098463de4c5d 248 }
group-onsemi 0:098463de4c5d 249
group-onsemi 0:098463de4c5d 250 //******************************************************************************
group-onsemi 0:098463de4c5d 251 int serial_getc(serial_t *obj)
group-onsemi 0:098463de4c5d 252 {
group-onsemi 0:098463de4c5d 253 int c = 0;
group-onsemi 0:098463de4c5d 254
group-onsemi 0:098463de4c5d 255 if (obj->rx != NC) {
group-onsemi 0:098463de4c5d 256 // Wait for data to be available
group-onsemi 0:098463de4c5d 257 while ((obj->uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY) == 0);
group-onsemi 0:098463de4c5d 258
group-onsemi 0:098463de4c5d 259 c = obj->fifo->rx;
group-onsemi 0:098463de4c5d 260 }
group-onsemi 0:098463de4c5d 261
group-onsemi 0:098463de4c5d 262 return c;
group-onsemi 0:098463de4c5d 263 }
group-onsemi 0:098463de4c5d 264
group-onsemi 0:098463de4c5d 265 //******************************************************************************
group-onsemi 0:098463de4c5d 266 void serial_putc(serial_t *obj, int c)
group-onsemi 0:098463de4c5d 267 {
group-onsemi 0:098463de4c5d 268 if (obj->tx != NC) {
group-onsemi 0:098463de4c5d 269 // Wait for room in the FIFO without blocking interrupts.
group-onsemi 0:098463de4c5d 270 while (UART_NumWriteAvail(obj->uart) == 0);
group-onsemi 0:098463de4c5d 271
group-onsemi 0:098463de4c5d 272 // Must clear before every write to the buffer to know that the FIFO
group-onsemi 0:098463de4c5d 273 // is empty when the TX DONE bit is set
group-onsemi 0:098463de4c5d 274 obj->uart->intfl = MXC_F_UART_INTFL_TX_DONE;
group-onsemi 0:098463de4c5d 275 obj->fifo->tx = (uint8_t)c;
group-onsemi 0:098463de4c5d 276 }
group-onsemi 0:098463de4c5d 277 }
group-onsemi 0:098463de4c5d 278
group-onsemi 0:098463de4c5d 279 //******************************************************************************
group-onsemi 0:098463de4c5d 280 int serial_readable(serial_t *obj)
group-onsemi 0:098463de4c5d 281 {
group-onsemi 0:098463de4c5d 282 return UART_NumReadAvail(obj->uart);
group-onsemi 0:098463de4c5d 283 }
group-onsemi 0:098463de4c5d 284
group-onsemi 0:098463de4c5d 285 //******************************************************************************
group-onsemi 0:098463de4c5d 286 int serial_writable(serial_t *obj)
group-onsemi 0:098463de4c5d 287 {
group-onsemi 0:098463de4c5d 288 return UART_NumWriteAvail(obj->uart);
group-onsemi 0:098463de4c5d 289 }
group-onsemi 0:098463de4c5d 290
group-onsemi 0:098463de4c5d 291 //******************************************************************************
group-onsemi 0:098463de4c5d 292 void serial_clear(serial_t *obj)
group-onsemi 0:098463de4c5d 293 {
group-onsemi 0:098463de4c5d 294 // Clear the RX and TX FIFOs
group-onsemi 0:098463de4c5d 295 UART_DrainRX(obj->uart);
group-onsemi 0:098463de4c5d 296 UART_DrainTX(obj->uart);
group-onsemi 0:098463de4c5d 297 }
group-onsemi 0:098463de4c5d 298
group-onsemi 0:098463de4c5d 299 //******************************************************************************
group-onsemi 0:098463de4c5d 300 void serial_break_set(serial_t *obj)
group-onsemi 0:098463de4c5d 301 {
group-onsemi 0:098463de4c5d 302 // Make sure that nothing is being sent
group-onsemi 0:098463de4c5d 303 while (((obj->uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)
group-onsemi 0:098463de4c5d 304 >> MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS) > 0);
group-onsemi 0:098463de4c5d 305 while (!(obj->uart->intfl & MXC_F_UART_INTFL_TX_DONE));
group-onsemi 0:098463de4c5d 306
group-onsemi 0:098463de4c5d 307 // Configure TX to output 0
group-onsemi 0:098463de4c5d 308 usurp_pin(obj->tx, 0);
group-onsemi 0:098463de4c5d 309
group-onsemi 0:098463de4c5d 310 // GPIO is setup now, but we need to unmap UART from the pin
group-onsemi 0:098463de4c5d 311 pin_function_t *pin_func = (pin_function_t *)pinmap_find_function(obj->tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 312 *pin_func->reg_req &= ~MXC_F_IOMAN_UART_REQ_IO_REQ;
group-onsemi 0:098463de4c5d 313 MBED_ASSERT((*pin_func->reg_ack & MXC_F_IOMAN_UART_ACK_IO_ACK) == 0);
group-onsemi 0:098463de4c5d 314 }
group-onsemi 0:098463de4c5d 315
group-onsemi 0:098463de4c5d 316 //******************************************************************************
group-onsemi 0:098463de4c5d 317 void serial_break_clear(serial_t *obj)
group-onsemi 0:098463de4c5d 318 {
group-onsemi 0:098463de4c5d 319 // Configure TX to output 1
group-onsemi 0:098463de4c5d 320 usurp_pin(obj->tx, 1);
group-onsemi 0:098463de4c5d 321 // Return TX to UART control
group-onsemi 0:098463de4c5d 322 serial_pinout_tx(obj->tx);
group-onsemi 0:098463de4c5d 323 }
group-onsemi 0:098463de4c5d 324
group-onsemi 0:098463de4c5d 325 //******************************************************************************
group-onsemi 0:098463de4c5d 326 void serial_pinout_tx(PinName tx)
group-onsemi 0:098463de4c5d 327 {
group-onsemi 0:098463de4c5d 328 pinmap_pinout(tx, PinMap_UART_TX);
group-onsemi 0:098463de4c5d 329 }
group-onsemi 0:098463de4c5d 330
group-onsemi 0:098463de4c5d 331 //******************************************************************************
group-onsemi 0:098463de4c5d 332 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
group-onsemi 0:098463de4c5d 333 {
group-onsemi 0:098463de4c5d 334 pin_function_t rtscts_pin_func = {0};
group-onsemi 0:098463de4c5d 335
group-onsemi 0:098463de4c5d 336 obj->cfg.cts = 0;
group-onsemi 0:098463de4c5d 337 obj->cfg.rts = 0;
group-onsemi 0:098463de4c5d 338
group-onsemi 0:098463de4c5d 339 if ((FlowControlCTS == type) || (FlowControlRTSCTS == type)) {
group-onsemi 0:098463de4c5d 340 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
group-onsemi 0:098463de4c5d 341 UARTName uart = (UARTName)pinmap_merge(uart_cts, (UARTName)obj->uart);
group-onsemi 0:098463de4c5d 342 // Assert pin is usable with existing uart
group-onsemi 0:098463de4c5d 343 MBED_ASSERT(uart != (UARTName)NC);
group-onsemi 0:098463de4c5d 344
group-onsemi 0:098463de4c5d 345 pin_function_t *pin_func;
group-onsemi 0:098463de4c5d 346 pin_func = (pin_function_t *)pinmap_find_function(txflow, PinMap_UART_CTS);
group-onsemi 0:098463de4c5d 347 rtscts_pin_func.req_val |= pin_func->req_val;
group-onsemi 0:098463de4c5d 348
group-onsemi 0:098463de4c5d 349 obj->cfg.cts = 1;
group-onsemi 0:098463de4c5d 350 }
group-onsemi 0:098463de4c5d 351
group-onsemi 0:098463de4c5d 352 if ((FlowControlRTS == type) || (FlowControlRTSCTS == type)) {
group-onsemi 0:098463de4c5d 353 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
group-onsemi 0:098463de4c5d 354 UARTName uart = (UARTName)pinmap_merge(uart_rts, (UARTName)obj->uart);
group-onsemi 0:098463de4c5d 355 MBED_ASSERT(uart != (UARTName)NC);
group-onsemi 0:098463de4c5d 356
group-onsemi 0:098463de4c5d 357 pin_function_t *pin_func;
group-onsemi 0:098463de4c5d 358 pin_func = (pin_function_t *)pinmap_find_function(rxflow, PinMap_UART_RTS);
group-onsemi 0:098463de4c5d 359 rtscts_pin_func.req_val |= pin_func->req_val;
group-onsemi 0:098463de4c5d 360
group-onsemi 0:098463de4c5d 361 obj->cfg.rts = 1;
group-onsemi 0:098463de4c5d 362 }
group-onsemi 0:098463de4c5d 363
group-onsemi 0:098463de4c5d 364 obj->sys_cfg.io_cfg.req_val.value |= rtscts_pin_func.req_val;
group-onsemi 0:098463de4c5d 365
group-onsemi 0:098463de4c5d 366 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
group-onsemi 0:098463de4c5d 367 MBED_ASSERT(retval == E_NO_ERROR);
group-onsemi 0:098463de4c5d 368 }
group-onsemi 0:098463de4c5d 369
group-onsemi 0:098463de4c5d 370 //******************************************************************************
group-onsemi 0:098463de4c5d 371 static void usurp_pin(PinName pin, int state)
group-onsemi 0:098463de4c5d 372 {
group-onsemi 0:098463de4c5d 373 gpio_t gpio;
group-onsemi 0:098463de4c5d 374 gpio_init_out(&gpio, pin);
group-onsemi 0:098463de4c5d 375 gpio_write(&gpio, state);
group-onsemi 0:098463de4c5d 376 }