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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32625/device/uart_regs.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 ******************************************************************************/
group-onsemi 0:098463de4c5d 32
group-onsemi 0:098463de4c5d 33 #ifndef _MXC_UART_REGS_H_
group-onsemi 0:098463de4c5d 34 #define _MXC_UART_REGS_H_
group-onsemi 0:098463de4c5d 35
group-onsemi 0:098463de4c5d 36 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 37 extern "C" {
group-onsemi 0:098463de4c5d 38 #endif
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40 #include <stdint.h>
group-onsemi 0:098463de4c5d 41 #include "mxc_device.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /*
group-onsemi 0:098463de4c5d 44 If types are not defined elsewhere (CMSIS) define them here
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46 #ifndef __IO
group-onsemi 0:098463de4c5d 47 #define __IO volatile
group-onsemi 0:098463de4c5d 48 #endif
group-onsemi 0:098463de4c5d 49 #ifndef __I
group-onsemi 0:098463de4c5d 50 #define __I volatile const
group-onsemi 0:098463de4c5d 51 #endif
group-onsemi 0:098463de4c5d 52 #ifndef __O
group-onsemi 0:098463de4c5d 53 #define __O volatile
group-onsemi 0:098463de4c5d 54 #endif
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /*
group-onsemi 0:098463de4c5d 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
group-onsemi 0:098463de4c5d 59 access to each register in module.
group-onsemi 0:098463de4c5d 60 */
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /* Offset Register Description
group-onsemi 0:098463de4c5d 63 ============= ============================================================================ */
group-onsemi 0:098463de4c5d 64 typedef struct {
group-onsemi 0:098463de4c5d 65 __IO uint32_t ctrl; /* 0x0000 UART Control Register */
group-onsemi 0:098463de4c5d 66 __IO uint32_t baud; /* 0x0004 UART Baud Control Register */
group-onsemi 0:098463de4c5d 67 __IO uint32_t tx_fifo_ctrl; /* 0x0008 UART TX FIFO Control Register */
group-onsemi 0:098463de4c5d 68 __IO uint32_t rx_fifo_ctrl; /* 0x000C UART RX FIFO Control Register */
group-onsemi 0:098463de4c5d 69 __IO uint32_t md_ctrl; /* 0x0010 UART Multidrop Control Register */
group-onsemi 0:098463de4c5d 70 __IO uint32_t intfl; /* 0x0014 UART Interrupt Flags */
group-onsemi 0:098463de4c5d 71 __IO uint32_t inten; /* 0x0018 UART Interrupt Enable/Disable Controls */
group-onsemi 0:098463de4c5d 72 #if (MXC_UART_REV > 0)
group-onsemi 0:098463de4c5d 73 __I uint32_t idle; /* 0x001C UART Idle Status */
group-onsemi 0:098463de4c5d 74 #endif
group-onsemi 0:098463de4c5d 75 } mxc_uart_regs_t;
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 /* Offset Register Description
group-onsemi 0:098463de4c5d 79 ============= ============================================================================ */
group-onsemi 0:098463de4c5d 80 typedef struct {
group-onsemi 0:098463de4c5d 81 union { /* 0x0000-0x07FC FIFO Write Point for Data to Transmit */
group-onsemi 0:098463de4c5d 82 __IO uint8_t tx;
group-onsemi 0:098463de4c5d 83 __IO uint8_t tx_8[2048];
group-onsemi 0:098463de4c5d 84 __IO uint16_t tx_16[1024];
group-onsemi 0:098463de4c5d 85 __IO uint32_t tx_32[512];
group-onsemi 0:098463de4c5d 86 };
group-onsemi 0:098463de4c5d 87 union { /* 0x0800-0x0FFC FIFO Read Point for Received Data */
group-onsemi 0:098463de4c5d 88 __IO uint8_t rx;
group-onsemi 0:098463de4c5d 89 __IO uint8_t rx_8[2048];
group-onsemi 0:098463de4c5d 90 __IO uint16_t rx_16[1024];
group-onsemi 0:098463de4c5d 91 __IO uint32_t rx_32[512];
group-onsemi 0:098463de4c5d 92 };
group-onsemi 0:098463de4c5d 93 } mxc_uart_fifo_regs_t;
group-onsemi 0:098463de4c5d 94
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 /*
group-onsemi 0:098463de4c5d 97 Register offsets for module UART.
group-onsemi 0:098463de4c5d 98 */
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 #define MXC_R_UART_OFFS_CTRL ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 101 #define MXC_R_UART_OFFS_BAUD ((uint32_t)0x00000004UL)
group-onsemi 0:098463de4c5d 102 #define MXC_R_UART_OFFS_TX_FIFO_CTRL ((uint32_t)0x00000008UL)
group-onsemi 0:098463de4c5d 103 #define MXC_R_UART_OFFS_RX_FIFO_CTRL ((uint32_t)0x0000000CUL)
group-onsemi 0:098463de4c5d 104 #define MXC_R_UART_OFFS_MD_CTRL ((uint32_t)0x00000010UL)
group-onsemi 0:098463de4c5d 105 #define MXC_R_UART_OFFS_INTFL ((uint32_t)0x00000014UL)
group-onsemi 0:098463de4c5d 106 #define MXC_R_UART_OFFS_INTEN ((uint32_t)0x00000018UL)
group-onsemi 0:098463de4c5d 107 #define MXC_R_UART_FIFO_OFFS_TX ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 108 #define MXC_R_UART_FIFO_OFFS_RX ((uint32_t)0x00000800UL)
group-onsemi 0:098463de4c5d 109
group-onsemi 0:098463de4c5d 110
group-onsemi 0:098463de4c5d 111 /*
group-onsemi 0:098463de4c5d 112 Field positions and masks for module UART.
group-onsemi 0:098463de4c5d 113 */
group-onsemi 0:098463de4c5d 114
group-onsemi 0:098463de4c5d 115 #define MXC_F_UART_CTRL_UART_EN_POS 0
group-onsemi 0:098463de4c5d 116 #define MXC_F_UART_CTRL_UART_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_UART_EN_POS))
group-onsemi 0:098463de4c5d 117 #define MXC_F_UART_CTRL_RX_FIFO_EN_POS 1
group-onsemi 0:098463de4c5d 118 #define MXC_F_UART_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_EN_POS))
group-onsemi 0:098463de4c5d 119 #define MXC_F_UART_CTRL_TX_FIFO_EN_POS 2
group-onsemi 0:098463de4c5d 120 #define MXC_F_UART_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_EN_POS))
group-onsemi 0:098463de4c5d 121 #define MXC_F_UART_CTRL_DATA_SIZE_POS 4
group-onsemi 0:098463de4c5d 122 #define MXC_F_UART_CTRL_DATA_SIZE ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_DATA_SIZE_POS))
group-onsemi 0:098463de4c5d 123 #define MXC_F_UART_CTRL_EXTRA_STOP_POS 8
group-onsemi 0:098463de4c5d 124 #define MXC_F_UART_CTRL_EXTRA_STOP ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_EXTRA_STOP_POS))
group-onsemi 0:098463de4c5d 125 #define MXC_F_UART_CTRL_PARITY_POS 12
group-onsemi 0:098463de4c5d 126 #define MXC_F_UART_CTRL_PARITY ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_PARITY_POS))
group-onsemi 0:098463de4c5d 127 #define MXC_F_UART_CTRL_CTS_EN_POS 16
group-onsemi 0:098463de4c5d 128 #define MXC_F_UART_CTRL_CTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_EN_POS))
group-onsemi 0:098463de4c5d 129 #define MXC_F_UART_CTRL_CTS_POLARITY_POS 17
group-onsemi 0:098463de4c5d 130 #define MXC_F_UART_CTRL_CTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_POLARITY_POS))
group-onsemi 0:098463de4c5d 131 #define MXC_F_UART_CTRL_RTS_EN_POS 18
group-onsemi 0:098463de4c5d 132 #define MXC_F_UART_CTRL_RTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_EN_POS))
group-onsemi 0:098463de4c5d 133 #define MXC_F_UART_CTRL_RTS_POLARITY_POS 19
group-onsemi 0:098463de4c5d 134 #define MXC_F_UART_CTRL_RTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_POLARITY_POS))
group-onsemi 0:098463de4c5d 135 #define MXC_F_UART_CTRL_RTS_LEVEL_POS 20
group-onsemi 0:098463de4c5d 136 #define MXC_F_UART_CTRL_RTS_LEVEL ((uint32_t)(0x0000003FUL << MXC_F_UART_CTRL_RTS_LEVEL_POS))
group-onsemi 0:098463de4c5d 137
group-onsemi 0:098463de4c5d 138 #define MXC_F_UART_BAUD_BAUD_DIVISOR_POS 0
group-onsemi 0:098463de4c5d 139 #define MXC_F_UART_BAUD_BAUD_DIVISOR ((uint32_t)(0x000000FFUL << MXC_F_UART_BAUD_BAUD_DIVISOR_POS))
group-onsemi 0:098463de4c5d 140 #define MXC_F_UART_BAUD_BAUD_MODE_POS 8
group-onsemi 0:098463de4c5d 141 #define MXC_F_UART_BAUD_BAUD_MODE ((uint32_t)(0x00000003UL << MXC_F_UART_BAUD_BAUD_MODE_POS))
group-onsemi 0:098463de4c5d 142
group-onsemi 0:098463de4c5d 143 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS 0
group-onsemi 0:098463de4c5d 144 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS))
group-onsemi 0:098463de4c5d 145 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS 16
group-onsemi 0:098463de4c5d 146 #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS))
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS 0
group-onsemi 0:098463de4c5d 149 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS))
group-onsemi 0:098463de4c5d 150 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS 16
group-onsemi 0:098463de4c5d 151 #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS))
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS 0
group-onsemi 0:098463de4c5d 154 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS))
group-onsemi 0:098463de4c5d 155 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS 8
group-onsemi 0:098463de4c5d 156 #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS))
group-onsemi 0:098463de4c5d 157 #define MXC_F_UART_MD_CTRL_MD_MSTR_POS 16
group-onsemi 0:098463de4c5d 158 #define MXC_F_UART_MD_CTRL_MD_MSTR ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_MD_MSTR_POS))
group-onsemi 0:098463de4c5d 159 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS 17
group-onsemi 0:098463de4c5d 160 #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS))
group-onsemi 0:098463de4c5d 161
group-onsemi 0:098463de4c5d 162 #define MXC_F_UART_INTFL_TX_DONE_POS 0
group-onsemi 0:098463de4c5d 163 #define MXC_F_UART_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_DONE_POS))
group-onsemi 0:098463de4c5d 164 #define MXC_F_UART_INTFL_TX_UNSTALLED_POS 1
group-onsemi 0:098463de4c5d 165 #define MXC_F_UART_INTFL_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_UNSTALLED_POS))
group-onsemi 0:098463de4c5d 166 #define MXC_F_UART_INTFL_TX_FIFO_AE_POS 2
group-onsemi 0:098463de4c5d 167 #define MXC_F_UART_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_FIFO_AE_POS))
group-onsemi 0:098463de4c5d 168 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS 3
group-onsemi 0:098463de4c5d 169 #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS))
group-onsemi 0:098463de4c5d 170 #define MXC_F_UART_INTFL_RX_STALLED_POS 4
group-onsemi 0:098463de4c5d 171 #define MXC_F_UART_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_STALLED_POS))
group-onsemi 0:098463de4c5d 172 #define MXC_F_UART_INTFL_RX_FIFO_AF_POS 5
group-onsemi 0:098463de4c5d 173 #define MXC_F_UART_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_AF_POS))
group-onsemi 0:098463de4c5d 174 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS 6
group-onsemi 0:098463de4c5d 175 #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS))
group-onsemi 0:098463de4c5d 176 #define MXC_F_UART_INTFL_RX_FRAMING_ERR_POS 7
group-onsemi 0:098463de4c5d 177 #define MXC_F_UART_INTFL_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAMING_ERR_POS))
group-onsemi 0:098463de4c5d 178 #define MXC_F_UART_INTFL_RX_PARITY_ERR_POS 8
group-onsemi 0:098463de4c5d 179 #define MXC_F_UART_INTFL_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERR_POS))
group-onsemi 0:098463de4c5d 180
group-onsemi 0:098463de4c5d 181 #define MXC_F_UART_INTEN_TX_DONE_POS 0
group-onsemi 0:098463de4c5d 182 #define MXC_F_UART_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_DONE_POS))
group-onsemi 0:098463de4c5d 183 #define MXC_F_UART_INTEN_TX_UNSTALLED_POS 1
group-onsemi 0:098463de4c5d 184 #define MXC_F_UART_INTEN_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_UNSTALLED_POS))
group-onsemi 0:098463de4c5d 185 #define MXC_F_UART_INTEN_TX_FIFO_AE_POS 2
group-onsemi 0:098463de4c5d 186 #define MXC_F_UART_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_FIFO_AE_POS))
group-onsemi 0:098463de4c5d 187 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS 3
group-onsemi 0:098463de4c5d 188 #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS))
group-onsemi 0:098463de4c5d 189 #define MXC_F_UART_INTEN_RX_STALLED_POS 4
group-onsemi 0:098463de4c5d 190 #define MXC_F_UART_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_STALLED_POS))
group-onsemi 0:098463de4c5d 191 #define MXC_F_UART_INTEN_RX_FIFO_AF_POS 5
group-onsemi 0:098463de4c5d 192 #define MXC_F_UART_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_AF_POS))
group-onsemi 0:098463de4c5d 193 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS 6
group-onsemi 0:098463de4c5d 194 #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS))
group-onsemi 0:098463de4c5d 195 #define MXC_F_UART_INTEN_RX_FRAMING_ERR_POS 7
group-onsemi 0:098463de4c5d 196 #define MXC_F_UART_INTEN_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAMING_ERR_POS))
group-onsemi 0:098463de4c5d 197 #define MXC_F_UART_INTEN_RX_PARITY_ERR_POS 8
group-onsemi 0:098463de4c5d 198 #define MXC_F_UART_INTEN_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERR_POS))
group-onsemi 0:098463de4c5d 199
group-onsemi 0:098463de4c5d 200 #if (MXC_UART_REV > 0)
group-onsemi 0:098463de4c5d 201 #define MXC_F_UART_IDLE_TX_RX_IDLE_POS 0
group-onsemi 0:098463de4c5d 202 #define MXC_F_UART_IDLE_TX_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_RX_IDLE_POS))
group-onsemi 0:098463de4c5d 203 #define MXC_F_UART_IDLE_TX_IDLE_POS 1
group-onsemi 0:098463de4c5d 204 #define MXC_F_UART_IDLE_TX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_IDLE_POS))
group-onsemi 0:098463de4c5d 205 #define MXC_F_UART_IDLE_RX_IDLE_POS 2
group-onsemi 0:098463de4c5d 206 #define MXC_F_UART_IDLE_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_RX_IDLE_POS))
group-onsemi 0:098463de4c5d 207 #endif
group-onsemi 0:098463de4c5d 208
group-onsemi 0:098463de4c5d 209 /*
group-onsemi 0:098463de4c5d 210 Field values and shifted values for module UART.
group-onsemi 0:098463de4c5d 211 */
group-onsemi 0:098463de4c5d 212
group-onsemi 0:098463de4c5d 213 #define MXC_V_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(0x00000000UL))
group-onsemi 0:098463de4c5d 214 #define MXC_V_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(0x00000001UL))
group-onsemi 0:098463de4c5d 215 #define MXC_V_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(0x00000002UL))
group-onsemi 0:098463de4c5d 216 #define MXC_V_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(0x00000003UL))
group-onsemi 0:098463de4c5d 217
group-onsemi 0:098463de4c5d 218 #define MXC_S_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_5_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
group-onsemi 0:098463de4c5d 219 #define MXC_S_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_6_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
group-onsemi 0:098463de4c5d 220 #define MXC_S_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_7_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
group-onsemi 0:098463de4c5d 221 #define MXC_S_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_8_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS))
group-onsemi 0:098463de4c5d 222
group-onsemi 0:098463de4c5d 223 #define MXC_V_UART_CTRL_PARITY_DISABLE ((uint32_t)(0x00000000UL))
group-onsemi 0:098463de4c5d 224 #define MXC_V_UART_CTRL_PARITY_ODD ((uint32_t)(0x00000001UL))
group-onsemi 0:098463de4c5d 225 #define MXC_V_UART_CTRL_PARITY_EVEN ((uint32_t)(0x00000002UL))
group-onsemi 0:098463de4c5d 226 #define MXC_V_UART_CTRL_PARITY_MARK ((uint32_t)(0x00000003UL))
group-onsemi 0:098463de4c5d 227
group-onsemi 0:098463de4c5d 228 #define MXC_S_UART_CTRL_PARITY_DISABLE ((uint32_t)(MXC_V_UART_CTRL_PARITY_DISABLE << MXC_F_UART_CTRL_PARITY_POS))
group-onsemi 0:098463de4c5d 229 #define MXC_S_UART_CTRL_PARITY_ODD ((uint32_t)(MXC_V_UART_CTRL_PARITY_ODD << MXC_F_UART_CTRL_PARITY_POS))
group-onsemi 0:098463de4c5d 230 #define MXC_S_UART_CTRL_PARITY_EVEN ((uint32_t)(MXC_V_UART_CTRL_PARITY_EVEN << MXC_F_UART_CTRL_PARITY_POS))
group-onsemi 0:098463de4c5d 231 #define MXC_S_UART_CTRL_PARITY_MARK ((uint32_t)(MXC_V_UART_CTRL_PARITY_MARK << MXC_F_UART_CTRL_PARITY_POS))
group-onsemi 0:098463de4c5d 232
group-onsemi 0:098463de4c5d 233
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 236 }
group-onsemi 0:098463de4c5d 237 #endif
group-onsemi 0:098463de4c5d 238
group-onsemi 0:098463de4c5d 239 #endif /* _MXC_UART_REGS_H_ */
group-onsemi 0:098463de4c5d 240