ON Semiconductor / mbed-os

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32625/device/tmr_regs.h@1:f30bdcd2b33b, 2017-02-27 (annotated)

Committer:
jacobjohnson
Date:
Mon Feb 27 17:45:05 2017 +0000
Revision:
1:f30bdcd2b33b
Parent:
0:098463de4c5d 
changed the inputscale from 1 to 7 in analogin_api.c.  This will need to be changed later, and accessed from the main level, but for now this allows the  adc to read a value from 0 to 3.7V, instead of just up to 1V.;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 ******************************************************************************/
group-onsemi 0:098463de4c5d 32
group-onsemi 0:098463de4c5d 33 #ifndef _MXC_TMR_REGS_H_
group-onsemi 0:098463de4c5d 34 #define _MXC_TMR_REGS_H_
group-onsemi 0:098463de4c5d 35
group-onsemi 0:098463de4c5d 36 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 37 extern "C" {
group-onsemi 0:098463de4c5d 38 #endif
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40 #include <stdint.h>
group-onsemi 0:098463de4c5d 41 #include "mxc_device.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /*
group-onsemi 0:098463de4c5d 44 If types are not defined elsewhere (CMSIS) define them here
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46 #ifndef __IO
group-onsemi 0:098463de4c5d 47 #define __IO volatile
group-onsemi 0:098463de4c5d 48 #endif
group-onsemi 0:098463de4c5d 49 #ifndef __I
group-onsemi 0:098463de4c5d 50 #define __I volatile const
group-onsemi 0:098463de4c5d 51 #endif
group-onsemi 0:098463de4c5d 52 #ifndef __O
group-onsemi 0:098463de4c5d 53 #define __O volatile
group-onsemi 0:098463de4c5d 54 #endif
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /*
group-onsemi 0:098463de4c5d 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
group-onsemi 0:098463de4c5d 59 access to each register in module.
group-onsemi 0:098463de4c5d 60 */
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /* Offset Register Description
group-onsemi 0:098463de4c5d 63 ============= ============================================================================ */
group-onsemi 0:098463de4c5d 64 typedef struct {
group-onsemi 0:098463de4c5d 65 __IO uint32_t ctrl; /* 0x0000 Timer Control Register */
group-onsemi 0:098463de4c5d 66 __IO uint32_t count32; /* 0x0004 Timer [32 bit] Current Count Value */
group-onsemi 0:098463de4c5d 67 __IO uint32_t term_cnt32; /* 0x0008 Timer [32 bit] Terminal Count Setting */
group-onsemi 0:098463de4c5d 68 __IO uint32_t pwm_cap32; /* 0x000C Timer [32 bit] PWM Compare Setting or Capture/Measure Value */
group-onsemi 0:098463de4c5d 69 __IO uint32_t count16_0; /* 0x0010 Timer [16 bit] Current Count Value, 16-bit Timer 0 */
group-onsemi 0:098463de4c5d 70 __IO uint32_t term_cnt16_0; /* 0x0014 Timer [16 bit] Terminal Count Setting, 16-bit Timer 0 */
group-onsemi 0:098463de4c5d 71 __IO uint32_t count16_1; /* 0x0018 Timer [16 bit] Current Count Value, 16-bit Timer 1 */
group-onsemi 0:098463de4c5d 72 __IO uint32_t term_cnt16_1; /* 0x001C Timer [16 bit] Terminal Count Setting, 16-bit Timer 1 */
group-onsemi 0:098463de4c5d 73 __IO uint32_t intfl; /* 0x0020 Timer Interrupt Flags */
group-onsemi 0:098463de4c5d 74 __IO uint32_t inten; /* 0x0024 Timer Interrupt Enable/Disable Settings */
group-onsemi 0:098463de4c5d 75 } mxc_tmr_regs_t;
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 /*
group-onsemi 0:098463de4c5d 79 Register offsets for module TMR.
group-onsemi 0:098463de4c5d 80 */
group-onsemi 0:098463de4c5d 81
group-onsemi 0:098463de4c5d 82 #define MXC_R_TMR_OFFS_CTRL ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 83 #define MXC_R_TMR_OFFS_COUNT32 ((uint32_t)0x00000004UL)
group-onsemi 0:098463de4c5d 84 #define MXC_R_TMR_OFFS_TERM_CNT32 ((uint32_t)0x00000008UL)
group-onsemi 0:098463de4c5d 85 #define MXC_R_TMR_OFFS_PWM_CAP32 ((uint32_t)0x0000000CUL)
group-onsemi 0:098463de4c5d 86 #define MXC_R_TMR_OFFS_COUNT16_0 ((uint32_t)0x00000010UL)
group-onsemi 0:098463de4c5d 87 #define MXC_R_TMR_OFFS_TERM_CNT16_0 ((uint32_t)0x00000014UL)
group-onsemi 0:098463de4c5d 88 #define MXC_R_TMR_OFFS_COUNT16_1 ((uint32_t)0x00000018UL)
group-onsemi 0:098463de4c5d 89 #define MXC_R_TMR_OFFS_TERM_CNT16_1 ((uint32_t)0x0000001CUL)
group-onsemi 0:098463de4c5d 90 #define MXC_R_TMR_OFFS_INTFL ((uint32_t)0x00000020UL)
group-onsemi 0:098463de4c5d 91 #define MXC_R_TMR_OFFS_INTEN ((uint32_t)0x00000024UL)
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93
group-onsemi 0:098463de4c5d 94 /*
group-onsemi 0:098463de4c5d 95 Field positions and masks for module TMR.
group-onsemi 0:098463de4c5d 96 */
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 #define MXC_F_TMR_CTRL_MODE_POS 0
group-onsemi 0:098463de4c5d 99 #define MXC_F_TMR_CTRL_MODE ((uint32_t)(0x00000007UL << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 100 #define MXC_F_TMR_CTRL_TMR2X16_POS 3
group-onsemi 0:098463de4c5d 101 #define MXC_F_TMR_CTRL_TMR2X16 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_TMR2X16_POS))
group-onsemi 0:098463de4c5d 102 #define MXC_F_TMR_CTRL_PRESCALE_POS 4
group-onsemi 0:098463de4c5d 103 #define MXC_F_TMR_CTRL_PRESCALE ((uint32_t)(0x0000000FUL << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 104 #define MXC_F_TMR_CTRL_POLARITY_POS 8
group-onsemi 0:098463de4c5d 105 #define MXC_F_TMR_CTRL_POLARITY ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_POLARITY_POS))
group-onsemi 0:098463de4c5d 106 #define MXC_F_TMR_CTRL_ENABLE0_POS 12
group-onsemi 0:098463de4c5d 107 #define MXC_F_TMR_CTRL_ENABLE0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE0_POS))
group-onsemi 0:098463de4c5d 108 #define MXC_F_TMR_CTRL_ENABLE1_POS 13
group-onsemi 0:098463de4c5d 109 #define MXC_F_TMR_CTRL_ENABLE1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_ENABLE1_POS))
group-onsemi 0:098463de4c5d 110
group-onsemi 0:098463de4c5d 111 #define MXC_F_TMR_COUNT16_0_VALUE_POS 0
group-onsemi 0:098463de4c5d 112 #define MXC_F_TMR_COUNT16_0_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_0_VALUE_POS))
group-onsemi 0:098463de4c5d 113
group-onsemi 0:098463de4c5d 114 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS 0
group-onsemi 0:098463de4c5d 115 #define MXC_F_TMR_TERM_CNT16_0_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_0_TERM_COUNT_POS))
group-onsemi 0:098463de4c5d 116
group-onsemi 0:098463de4c5d 117 #define MXC_F_TMR_COUNT16_1_VALUE_POS 0
group-onsemi 0:098463de4c5d 118 #define MXC_F_TMR_COUNT16_1_VALUE ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_COUNT16_1_VALUE_POS))
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS 0
group-onsemi 0:098463de4c5d 121 #define MXC_F_TMR_TERM_CNT16_1_TERM_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_TMR_TERM_CNT16_1_TERM_COUNT_POS))
group-onsemi 0:098463de4c5d 122
group-onsemi 0:098463de4c5d 123 #define MXC_F_TMR_INTFL_TIMER0_POS 0
group-onsemi 0:098463de4c5d 124 #define MXC_F_TMR_INTFL_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER0_POS))
group-onsemi 0:098463de4c5d 125 #define MXC_F_TMR_INTFL_TIMER1_POS 1
group-onsemi 0:098463de4c5d 126 #define MXC_F_TMR_INTFL_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTFL_TIMER1_POS))
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 #define MXC_F_TMR_INTEN_TIMER0_POS 0
group-onsemi 0:098463de4c5d 129 #define MXC_F_TMR_INTEN_TIMER0 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER0_POS))
group-onsemi 0:098463de4c5d 130 #define MXC_F_TMR_INTEN_TIMER1_POS 1
group-onsemi 0:098463de4c5d 131 #define MXC_F_TMR_INTEN_TIMER1 ((uint32_t)(0x00000001UL << MXC_F_TMR_INTEN_TIMER1_POS))
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134
group-onsemi 0:098463de4c5d 135 /*
group-onsemi 0:098463de4c5d 136 Field values and shifted values for module TMR.
group-onsemi 0:098463de4c5d 137 */
group-onsemi 0:098463de4c5d 138
group-onsemi 0:098463de4c5d 139 #define MXC_V_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(0x00000000UL))
group-onsemi 0:098463de4c5d 140 #define MXC_V_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(0x00000001UL))
group-onsemi 0:098463de4c5d 141 #define MXC_V_TMR_CTRL_MODE_COUNTER ((uint32_t)(0x00000002UL))
group-onsemi 0:098463de4c5d 142 #define MXC_V_TMR_CTRL_MODE_PWM ((uint32_t)(0x00000003UL))
group-onsemi 0:098463de4c5d 143 #define MXC_V_TMR_CTRL_MODE_CAPTURE ((uint32_t)(0x00000004UL))
group-onsemi 0:098463de4c5d 144 #define MXC_V_TMR_CTRL_MODE_COMPARE ((uint32_t)(0x00000005UL))
group-onsemi 0:098463de4c5d 145 #define MXC_V_TMR_CTRL_MODE_GATED ((uint32_t)(0x00000006UL))
group-onsemi 0:098463de4c5d 146 #define MXC_V_TMR_CTRL_MODE_MEASURE ((uint32_t)(0x00000007UL))
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 #define MXC_S_TMR_CTRL_MODE_ONE_SHOT ((uint32_t)(MXC_V_TMR_CTRL_MODE_ONE_SHOT << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 149 #define MXC_S_TMR_CTRL_MODE_CONTINUOUS ((uint32_t)(MXC_V_TMR_CTRL_MODE_CONTINUOUS << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 150 #define MXC_S_TMR_CTRL_MODE_COUNTER ((uint32_t)(MXC_V_TMR_CTRL_MODE_COUNTER << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 151 #define MXC_S_TMR_CTRL_MODE_PWM ((uint32_t)(MXC_V_TMR_CTRL_MODE_PWM << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 152 #define MXC_S_TMR_CTRL_MODE_CAPTURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_CAPTURE << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 153 #define MXC_S_TMR_CTRL_MODE_COMPARE ((uint32_t)(MXC_V_TMR_CTRL_MODE_COMPARE << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 154 #define MXC_S_TMR_CTRL_MODE_GATED ((uint32_t)(MXC_V_TMR_CTRL_MODE_GATED << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 155 #define MXC_S_TMR_CTRL_MODE_MEASURE ((uint32_t)(MXC_V_TMR_CTRL_MODE_MEASURE << MXC_F_TMR_CTRL_MODE_POS))
group-onsemi 0:098463de4c5d 156
group-onsemi 0:098463de4c5d 157 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(0x00000000UL))
group-onsemi 0:098463de4c5d 158 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(0x00000001UL))
group-onsemi 0:098463de4c5d 159 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(0x00000002UL))
group-onsemi 0:098463de4c5d 160 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(0x00000003UL))
group-onsemi 0:098463de4c5d 161 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(0x00000004UL))
group-onsemi 0:098463de4c5d 162 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(0x00000005UL))
group-onsemi 0:098463de4c5d 163 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(0x00000006UL))
group-onsemi 0:098463de4c5d 164 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(0x00000007UL))
group-onsemi 0:098463de4c5d 165 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(0x00000008UL))
group-onsemi 0:098463de4c5d 166 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(0x00000009UL))
group-onsemi 0:098463de4c5d 167 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(0x0000000AUL))
group-onsemi 0:098463de4c5d 168 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(0x0000000BUL))
group-onsemi 0:098463de4c5d 169 #define MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(0x0000000CUL))
group-onsemi 0:098463de4c5d 170
group-onsemi 0:098463de4c5d 171 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 172 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 173 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 174 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_8 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_8 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 175 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_16 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_16 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 176 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_32 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_32 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 177 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_64 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_64 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 178 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_128 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_128 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 179 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_256 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_256 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 180 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_512 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_512 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 181 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_1024 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 182 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_2048 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 183 #define MXC_S_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 ((uint32_t)(MXC_V_TMR_CTRL_PRESCALE_DIVIDE_BY_4096 << MXC_F_TMR_CTRL_PRESCALE_POS))
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185
group-onsemi 0:098463de4c5d 186 /*
group-onsemi 0:098463de4c5d 187 * These two 1-bit fields replace the standard 3-bit mode field when the associated TMR module
group-onsemi 0:098463de4c5d 188 * is in dual 16-bit timer mode.
group-onsemi 0:098463de4c5d 189 */
group-onsemi 0:098463de4c5d 190
group-onsemi 0:098463de4c5d 191 #define MXC_F_TMR_CTRL_MODE_16_0_POS 0
group-onsemi 0:098463de4c5d 192 #define MXC_F_TMR_CTRL_MODE_16_0 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_0_POS))
group-onsemi 0:098463de4c5d 193
group-onsemi 0:098463de4c5d 194 #define MXC_F_TMR_CTRL_MODE_16_1_POS 1
group-onsemi 0:098463de4c5d 195 #define MXC_F_TMR_CTRL_MODE_16_1 ((uint32_t)(0x00000001UL << MXC_F_TMR_CTRL_MODE_16_1_POS))
group-onsemi 0:098463de4c5d 196
group-onsemi 0:098463de4c5d 197
group-onsemi 0:098463de4c5d 198 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 199 }
group-onsemi 0:098463de4c5d 200 #endif
group-onsemi 0:098463de4c5d 201
group-onsemi 0:098463de4c5d 202 #endif /* _MXC_TMR_REGS_H_ */
group-onsemi 0:098463de4c5d 203