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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_STM/TARGET_STM32L4/pinmap.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 *******************************************************************************
group-onsemi 0:098463de4c5d 3 * Copyright (c) 2015, STMicroelectronics
group-onsemi 0:098463de4c5d 4 * All rights reserved.
group-onsemi 0:098463de4c5d 5 *
group-onsemi 0:098463de4c5d 6 * Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 7 * modification, are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 8 *
group-onsemi 0:098463de4c5d 9 * 1. Redistributions of source code must retain the above copyright notice,
group-onsemi 0:098463de4c5d 10 * this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
group-onsemi 0:098463de4c5d 12 * this list of conditions and the following disclaimer in the documentation
group-onsemi 0:098463de4c5d 13 * and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
group-onsemi 0:098463de4c5d 15 * may be used to endorse or promote products derived from this software
group-onsemi 0:098463de4c5d 16 * without specific prior written permission.
group-onsemi 0:098463de4c5d 17 *
group-onsemi 0:098463de4c5d 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
group-onsemi 0:098463de4c5d 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
group-onsemi 0:098463de4c5d 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
group-onsemi 0:098463de4c5d 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
group-onsemi 0:098463de4c5d 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
group-onsemi 0:098463de4c5d 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
group-onsemi 0:098463de4c5d 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 28 *******************************************************************************
group-onsemi 0:098463de4c5d 29 */
group-onsemi 0:098463de4c5d 30 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 31 #include "pinmap.h"
group-onsemi 0:098463de4c5d 32 #include "PortNames.h"
group-onsemi 0:098463de4c5d 33 #include "mbed_error.h"
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 // GPIO mode look-up table
group-onsemi 0:098463de4c5d 36 // Warning: order must be the same as the one defined in PinNames.h !!!
group-onsemi 0:098463de4c5d 37 static const uint32_t gpio_mode[14] = {
group-onsemi 0:098463de4c5d 38 0x00000000, // 0 = GPIO_MODE_INPUT
group-onsemi 0:098463de4c5d 39 0x00000001, // 1 = GPIO_MODE_OUTPUT_PP
group-onsemi 0:098463de4c5d 40 0x00000011, // 2 = GPIO_MODE_OUTPUT_OD
group-onsemi 0:098463de4c5d 41 0x00000002, // 3 = GPIO_MODE_AF_PP
group-onsemi 0:098463de4c5d 42 0x00000012, // 4 = GPIO_MODE_AF_OD
group-onsemi 0:098463de4c5d 43 0x00000003, // 5 = GPIO_MODE_ANALOG
group-onsemi 0:098463de4c5d 44 0x0000000B, // 6 = GPIO_MODE_ANALOG_ADC_CONTROL
group-onsemi 0:098463de4c5d 45 0x10110000, // 7 = GPIO_MODE_IT_RISING
group-onsemi 0:098463de4c5d 46 0x10210000, // 8 = GPIO_MODE_IT_FALLING
group-onsemi 0:098463de4c5d 47 0x10310000, // 9 = GPIO_MODE_IT_RISING_FALLING
group-onsemi 0:098463de4c5d 48 0x10120000, // 10 = GPIO_MODE_EVT_RISING
group-onsemi 0:098463de4c5d 49 0x10220000, // 11 = GPIO_MODE_EVT_FALLING
group-onsemi 0:098463de4c5d 50 0x10320000, // 12 = GPIO_MODE_EVT_RISING_FALLING
group-onsemi 0:098463de4c5d 51 0x10000000 // 13 = Reset IT and EVT (not in STM32Cube HAL)
group-onsemi 0:098463de4c5d 52 };
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 // Enable GPIO clock and return GPIO base address
group-onsemi 0:098463de4c5d 55 uint32_t Set_GPIO_Clock(uint32_t port_idx)
group-onsemi 0:098463de4c5d 56 {
group-onsemi 0:098463de4c5d 57 uint32_t gpio_add = 0;
group-onsemi 0:098463de4c5d 58 switch (port_idx) {
group-onsemi 0:098463de4c5d 59 case PortA:
group-onsemi 0:098463de4c5d 60 gpio_add = GPIOA_BASE;
group-onsemi 0:098463de4c5d 61 __HAL_RCC_GPIOA_CLK_ENABLE();
group-onsemi 0:098463de4c5d 62 break;
group-onsemi 0:098463de4c5d 63 case PortB:
group-onsemi 0:098463de4c5d 64 gpio_add = GPIOB_BASE;
group-onsemi 0:098463de4c5d 65 __HAL_RCC_GPIOB_CLK_ENABLE();
group-onsemi 0:098463de4c5d 66 break;
group-onsemi 0:098463de4c5d 67 case PortC:
group-onsemi 0:098463de4c5d 68 gpio_add = GPIOC_BASE;
group-onsemi 0:098463de4c5d 69 __HAL_RCC_GPIOC_CLK_ENABLE();
group-onsemi 0:098463de4c5d 70 break;
group-onsemi 0:098463de4c5d 71 #if defined(GPIOD_BASE)
group-onsemi 0:098463de4c5d 72 case PortD:
group-onsemi 0:098463de4c5d 73 gpio_add = GPIOD_BASE;
group-onsemi 0:098463de4c5d 74 __HAL_RCC_GPIOD_CLK_ENABLE();
group-onsemi 0:098463de4c5d 75 break;
group-onsemi 0:098463de4c5d 76 #endif
group-onsemi 0:098463de4c5d 77 #if defined(GPIOE_BASE)
group-onsemi 0:098463de4c5d 78 case PortE:
group-onsemi 0:098463de4c5d 79 gpio_add = GPIOE_BASE;
group-onsemi 0:098463de4c5d 80 __HAL_RCC_GPIOE_CLK_ENABLE();
group-onsemi 0:098463de4c5d 81 break;
group-onsemi 0:098463de4c5d 82 #endif
group-onsemi 0:098463de4c5d 83 case PortH:
group-onsemi 0:098463de4c5d 84 gpio_add = GPIOH_BASE;
group-onsemi 0:098463de4c5d 85 __HAL_RCC_GPIOH_CLK_ENABLE();
group-onsemi 0:098463de4c5d 86 break;
group-onsemi 0:098463de4c5d 87 default:
group-onsemi 0:098463de4c5d 88 error("Pinmap error: wrong port number\n");
group-onsemi 0:098463de4c5d 89 break;
group-onsemi 0:098463de4c5d 90 }
group-onsemi 0:098463de4c5d 91 return gpio_add;
group-onsemi 0:098463de4c5d 92 }
group-onsemi 0:098463de4c5d 93
group-onsemi 0:098463de4c5d 94 /**
group-onsemi 0:098463de4c5d 95 * Configure pin (mode, speed, output type and pull-up/pull-down)
group-onsemi 0:098463de4c5d 96 */
group-onsemi 0:098463de4c5d 97 void pin_function(PinName pin, int data)
group-onsemi 0:098463de4c5d 98 {
group-onsemi 0:098463de4c5d 99 MBED_ASSERT(pin != (PinName)NC);
group-onsemi 0:098463de4c5d 100 // Get the pin informations
group-onsemi 0:098463de4c5d 101 uint32_t mode = STM_PIN_MODE(data);
group-onsemi 0:098463de4c5d 102 uint32_t pupd = STM_PIN_PUPD(data);
group-onsemi 0:098463de4c5d 103 uint32_t afnum = STM_PIN_AFNUM(data);
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 106 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 // Enable GPIO clock
group-onsemi 0:098463de4c5d 109 uint32_t gpio_add = Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 110 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
group-onsemi 0:098463de4c5d 111
group-onsemi 0:098463de4c5d 112 // Configure GPIO
group-onsemi 0:098463de4c5d 113 GPIO_InitTypeDef GPIO_InitStructure;
group-onsemi 0:098463de4c5d 114 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
group-onsemi 0:098463de4c5d 115 GPIO_InitStructure.Mode = gpio_mode[mode];
group-onsemi 0:098463de4c5d 116 GPIO_InitStructure.Pull = pupd;
group-onsemi 0:098463de4c5d 117 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
group-onsemi 0:098463de4c5d 118 GPIO_InitStructure.Alternate = afnum;
group-onsemi 0:098463de4c5d 119 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 // [TODO] Disconnect JTAG-DP + SW-DP signals.
group-onsemi 0:098463de4c5d 122 // Warning: Need to reconnect under reset
group-onsemi 0:098463de4c5d 123 //if ((pin == PA_13) || (pin == PA_14)) {
group-onsemi 0:098463de4c5d 124 //
group-onsemi 0:098463de4c5d 125 //}
group-onsemi 0:098463de4c5d 126 //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
group-onsemi 0:098463de4c5d 127 //
group-onsemi 0:098463de4c5d 128 //}
group-onsemi 0:098463de4c5d 129 }
group-onsemi 0:098463de4c5d 130
group-onsemi 0:098463de4c5d 131 /**
group-onsemi 0:098463de4c5d 132 * Configure pin pull-up/pull-down
group-onsemi 0:098463de4c5d 133 */
group-onsemi 0:098463de4c5d 134 void pin_mode(PinName pin, PinMode mode)
group-onsemi 0:098463de4c5d 135 {
group-onsemi 0:098463de4c5d 136 MBED_ASSERT(pin != (PinName)NC);
group-onsemi 0:098463de4c5d 137 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 138 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 // Enable GPIO clock
group-onsemi 0:098463de4c5d 141 uint32_t gpio_add = Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 142 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
group-onsemi 0:098463de4c5d 143
group-onsemi 0:098463de4c5d 144 // Configure pull-up/pull-down resistors
group-onsemi 0:098463de4c5d 145 uint32_t pupd = (uint32_t)mode;
group-onsemi 0:098463de4c5d 146 if (pupd > 2) {
group-onsemi 0:098463de4c5d 147 pupd = 0; // Open-drain = No pull-up/No pull-down
group-onsemi 0:098463de4c5d 148 }
group-onsemi 0:098463de4c5d 149 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
group-onsemi 0:098463de4c5d 150 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
group-onsemi 0:098463de4c5d 151 }
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153 /* Internal function for setting the gpiomode/function
group-onsemi 0:098463de4c5d 154 * without changing Pull mode
group-onsemi 0:098463de4c5d 155 */
group-onsemi 0:098463de4c5d 156 void pin_function_gpiomode(PinName pin, uint32_t gpiomode) {
group-onsemi 0:098463de4c5d 157
group-onsemi 0:098463de4c5d 158 /* Read current pull state from HW to avoid over-write*/
group-onsemi 0:098463de4c5d 159 uint32_t port_index = STM_PORT(pin);
group-onsemi 0:098463de4c5d 160 uint32_t pin_index = STM_PIN(pin);
group-onsemi 0:098463de4c5d 161 GPIO_TypeDef *gpio = (GPIO_TypeDef *) Set_GPIO_Clock(port_index);
group-onsemi 0:098463de4c5d 162 uint32_t temp = gpio->PUPDR;
group-onsemi 0:098463de4c5d 163 uint32_t pull = (temp >> (pin_index * 2U)) & GPIO_PUPDR_PUPDR0;
group-onsemi 0:098463de4c5d 164
group-onsemi 0:098463de4c5d 165 /* Then re-use global function for updating the mode part*/
group-onsemi 0:098463de4c5d 166 pin_function(pin, STM_PIN_DATA(gpiomode, pull, 0));
group-onsemi 0:098463de4c5d 167 }