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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_gpio.h@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /**
group-onsemi 0:098463de4c5d 2 ******************************************************************************
group-onsemi 0:098463de4c5d 3 * @file stm32f1xx_hal_gpio.h
group-onsemi 0:098463de4c5d 4 * @author MCD Application Team
group-onsemi 0:098463de4c5d 5 * @version V1.0.5
group-onsemi 0:098463de4c5d 6 * @date 06-December-2016
group-onsemi 0:098463de4c5d 7 * @brief Header file of GPIO HAL module.
group-onsemi 0:098463de4c5d 8 ******************************************************************************
group-onsemi 0:098463de4c5d 9 * @attention
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
group-onsemi 0:098463de4c5d 12 *
group-onsemi 0:098463de4c5d 13 * Redistribution and use in source and binary forms, with or without modification,
group-onsemi 0:098463de4c5d 14 * are permitted provided that the following conditions are met:
group-onsemi 0:098463de4c5d 15 * 1. Redistributions of source code must retain the above copyright notice,
group-onsemi 0:098463de4c5d 16 * this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
group-onsemi 0:098463de4c5d 18 * this list of conditions and the following disclaimer in the documentation
group-onsemi 0:098463de4c5d 19 * and/or other materials provided with the distribution.
group-onsemi 0:098463de4c5d 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
group-onsemi 0:098463de4c5d 21 * may be used to endorse or promote products derived from this software
group-onsemi 0:098463de4c5d 22 * without specific prior written permission.
group-onsemi 0:098463de4c5d 23 *
group-onsemi 0:098463de4c5d 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
group-onsemi 0:098463de4c5d 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
group-onsemi 0:098463de4c5d 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
group-onsemi 0:098463de4c5d 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
group-onsemi 0:098463de4c5d 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
group-onsemi 0:098463de4c5d 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
group-onsemi 0:098463de4c5d 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
group-onsemi 0:098463de4c5d 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
group-onsemi 0:098463de4c5d 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 34 *
group-onsemi 0:098463de4c5d 35 ******************************************************************************
group-onsemi 0:098463de4c5d 36 */
group-onsemi 0:098463de4c5d 37
group-onsemi 0:098463de4c5d 38 /* Define to prevent recursive inclusion -------------------------------------*/
group-onsemi 0:098463de4c5d 39 #ifndef __STM32F1xx_HAL_GPIO_H
group-onsemi 0:098463de4c5d 40 #define __STM32F1xx_HAL_GPIO_H
group-onsemi 0:098463de4c5d 41
group-onsemi 0:098463de4c5d 42 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 43 extern "C" {
group-onsemi 0:098463de4c5d 44 #endif
group-onsemi 0:098463de4c5d 45
group-onsemi 0:098463de4c5d 46 /* Includes ------------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 47 #include "stm32f1xx_hal_def.h"
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 /** @addtogroup STM32F1xx_HAL_Driver
group-onsemi 0:098463de4c5d 50 * @{
group-onsemi 0:098463de4c5d 51 */
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 /** @addtogroup GPIO
group-onsemi 0:098463de4c5d 54 * @{
group-onsemi 0:098463de4c5d 55 */
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 /* Exported types ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 58 /** @defgroup GPIO_Exported_Types GPIO Exported Types
group-onsemi 0:098463de4c5d 59 * @{
group-onsemi 0:098463de4c5d 60 */
group-onsemi 0:098463de4c5d 61
group-onsemi 0:098463de4c5d 62 /**
group-onsemi 0:098463de4c5d 63 * @brief GPIO Init structure definition
group-onsemi 0:098463de4c5d 64 */
group-onsemi 0:098463de4c5d 65 typedef struct
group-onsemi 0:098463de4c5d 66 {
group-onsemi 0:098463de4c5d 67 uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
group-onsemi 0:098463de4c5d 68 This parameter can be any value of @ref GPIO_pins_define */
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70 uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
group-onsemi 0:098463de4c5d 71 This parameter can be a value of @ref GPIO_mode_define */
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
group-onsemi 0:098463de4c5d 74 This parameter can be a value of @ref GPIO_pull_define */
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 uint32_t Speed; /*!< Specifies the speed for the selected pins.
group-onsemi 0:098463de4c5d 77 This parameter can be a value of @ref GPIO_speed_define */
group-onsemi 0:098463de4c5d 78 }GPIO_InitTypeDef;
group-onsemi 0:098463de4c5d 79
group-onsemi 0:098463de4c5d 80 /**
group-onsemi 0:098463de4c5d 81 * @brief GPIO Bit SET and Bit RESET enumeration
group-onsemi 0:098463de4c5d 82 */
group-onsemi 0:098463de4c5d 83 typedef enum
group-onsemi 0:098463de4c5d 84 {
group-onsemi 0:098463de4c5d 85 GPIO_PIN_RESET = 0,
group-onsemi 0:098463de4c5d 86 GPIO_PIN_SET
group-onsemi 0:098463de4c5d 87 }GPIO_PinState;
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 /**
group-onsemi 0:098463de4c5d 90 * @}
group-onsemi 0:098463de4c5d 91 */
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93
group-onsemi 0:098463de4c5d 94 /* Exported constants --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
group-onsemi 0:098463de4c5d 97 * @{
group-onsemi 0:098463de4c5d 98 */
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 /** @defgroup GPIO_pins_define GPIO pins define
group-onsemi 0:098463de4c5d 101 * @{
group-onsemi 0:098463de4c5d 102 */
group-onsemi 0:098463de4c5d 103 #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
group-onsemi 0:098463de4c5d 104 #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
group-onsemi 0:098463de4c5d 105 #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
group-onsemi 0:098463de4c5d 106 #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
group-onsemi 0:098463de4c5d 107 #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
group-onsemi 0:098463de4c5d 108 #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
group-onsemi 0:098463de4c5d 109 #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
group-onsemi 0:098463de4c5d 110 #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
group-onsemi 0:098463de4c5d 111 #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
group-onsemi 0:098463de4c5d 112 #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
group-onsemi 0:098463de4c5d 113 #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
group-onsemi 0:098463de4c5d 114 #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
group-onsemi 0:098463de4c5d 115 #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
group-onsemi 0:098463de4c5d 116 #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
group-onsemi 0:098463de4c5d 117 #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
group-onsemi 0:098463de4c5d 118 #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
group-onsemi 0:098463de4c5d 119 #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 #define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */
group-onsemi 0:098463de4c5d 122 /**
group-onsemi 0:098463de4c5d 123 * @}
group-onsemi 0:098463de4c5d 124 */
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126
group-onsemi 0:098463de4c5d 127 /** @defgroup GPIO_mode_define GPIO mode define
group-onsemi 0:098463de4c5d 128 * @brief GPIO Configuration Mode
group-onsemi 0:098463de4c5d 129 * Elements values convention: 0xX0yz00YZ
group-onsemi 0:098463de4c5d 130 * - X : GPIO mode or EXTI Mode
group-onsemi 0:098463de4c5d 131 * - y : External IT or Event trigger detection
group-onsemi 0:098463de4c5d 132 * - z : IO configuration on External IT or Event
group-onsemi 0:098463de4c5d 133 * - Y : Output type (Push Pull or Open Drain)
group-onsemi 0:098463de4c5d 134 * - Z : IO Direction mode (Input, Output, Alternate or Analog)
group-onsemi 0:098463de4c5d 135 * @{
group-onsemi 0:098463de4c5d 136 */
group-onsemi 0:098463de4c5d 137 #define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */
group-onsemi 0:098463de4c5d 138 #define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */
group-onsemi 0:098463de4c5d 139 #define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */
group-onsemi 0:098463de4c5d 140 #define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */
group-onsemi 0:098463de4c5d 141 #define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */
group-onsemi 0:098463de4c5d 142 #define GPIO_MODE_AF_INPUT GPIO_MODE_INPUT /*!< Alternate Function Input Mode */
group-onsemi 0:098463de4c5d 143
group-onsemi 0:098463de4c5d 144 #define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */
group-onsemi 0:098463de4c5d 145
group-onsemi 0:098463de4c5d 146 #define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */
group-onsemi 0:098463de4c5d 147 #define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */
group-onsemi 0:098463de4c5d 148 #define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
group-onsemi 0:098463de4c5d 149
group-onsemi 0:098463de4c5d 150 #define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */
group-onsemi 0:098463de4c5d 151 #define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */
group-onsemi 0:098463de4c5d 152 #define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 /**
group-onsemi 0:098463de4c5d 155 * @}
group-onsemi 0:098463de4c5d 156 */
group-onsemi 0:098463de4c5d 157
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 /** @defgroup GPIO_speed_define GPIO speed define
group-onsemi 0:098463de4c5d 160 * @brief GPIO Output Maximum frequency
group-onsemi 0:098463de4c5d 161 * @{
group-onsemi 0:098463de4c5d 162 */
group-onsemi 0:098463de4c5d 163 #define GPIO_SPEED_FREQ_LOW (GPIO_CRL_MODE0_1) /*!< Low speed */
group-onsemi 0:098463de4c5d 164 #define GPIO_SPEED_FREQ_MEDIUM (GPIO_CRL_MODE0_0) /*!< Medium speed */
group-onsemi 0:098463de4c5d 165 #define GPIO_SPEED_FREQ_HIGH (GPIO_CRL_MODE0) /*!< High speed */
group-onsemi 0:098463de4c5d 166
group-onsemi 0:098463de4c5d 167 /**
group-onsemi 0:098463de4c5d 168 * @}
group-onsemi 0:098463de4c5d 169 */
group-onsemi 0:098463de4c5d 170
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 /** @defgroup GPIO_pull_define GPIO pull define
group-onsemi 0:098463de4c5d 173 * @brief GPIO Pull-Up or Pull-Down Activation
group-onsemi 0:098463de4c5d 174 * @{
group-onsemi 0:098463de4c5d 175 */
group-onsemi 0:098463de4c5d 176 #define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */
group-onsemi 0:098463de4c5d 177 #define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */
group-onsemi 0:098463de4c5d 178 #define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */
group-onsemi 0:098463de4c5d 179
group-onsemi 0:098463de4c5d 180 /**
group-onsemi 0:098463de4c5d 181 * @}
group-onsemi 0:098463de4c5d 182 */
group-onsemi 0:098463de4c5d 183
group-onsemi 0:098463de4c5d 184 /**
group-onsemi 0:098463de4c5d 185 * @}
group-onsemi 0:098463de4c5d 186 */
group-onsemi 0:098463de4c5d 187
group-onsemi 0:098463de4c5d 188
group-onsemi 0:098463de4c5d 189 /* Private macros --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 190 /** @addtogroup GPIO_Private_Macros
group-onsemi 0:098463de4c5d 191 * @{
group-onsemi 0:098463de4c5d 192 */
group-onsemi 0:098463de4c5d 193
group-onsemi 0:098463de4c5d 194 #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
group-onsemi 0:098463de4c5d 195
group-onsemi 0:098463de4c5d 196 #define IS_GPIO_PIN(PIN) (((PIN) & GPIO_PIN_MASK ) != (uint32_t)0x00)
group-onsemi 0:098463de4c5d 197
group-onsemi 0:098463de4c5d 198 #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
group-onsemi 0:098463de4c5d 199 ((PULL) == GPIO_PULLDOWN))
group-onsemi 0:098463de4c5d 200
group-onsemi 0:098463de4c5d 201 #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || \
group-onsemi 0:098463de4c5d 202 ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || ((SPEED) == GPIO_SPEED_FREQ_HIGH))
group-onsemi 0:098463de4c5d 203
group-onsemi 0:098463de4c5d 204 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
group-onsemi 0:098463de4c5d 205 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
group-onsemi 0:098463de4c5d 206 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
group-onsemi 0:098463de4c5d 207 ((MODE) == GPIO_MODE_AF_PP) ||\
group-onsemi 0:098463de4c5d 208 ((MODE) == GPIO_MODE_AF_OD) ||\
group-onsemi 0:098463de4c5d 209 ((MODE) == GPIO_MODE_IT_RISING) ||\
group-onsemi 0:098463de4c5d 210 ((MODE) == GPIO_MODE_IT_FALLING) ||\
group-onsemi 0:098463de4c5d 211 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
group-onsemi 0:098463de4c5d 212 ((MODE) == GPIO_MODE_EVT_RISING) ||\
group-onsemi 0:098463de4c5d 213 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
group-onsemi 0:098463de4c5d 214 ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
group-onsemi 0:098463de4c5d 215 ((MODE) == GPIO_MODE_ANALOG))
group-onsemi 0:098463de4c5d 216
group-onsemi 0:098463de4c5d 217 /**
group-onsemi 0:098463de4c5d 218 * @}
group-onsemi 0:098463de4c5d 219 */
group-onsemi 0:098463de4c5d 220
group-onsemi 0:098463de4c5d 221
group-onsemi 0:098463de4c5d 222 /* Exported macro ------------------------------------------------------------*/
group-onsemi 0:098463de4c5d 223 /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
group-onsemi 0:098463de4c5d 224 * @{
group-onsemi 0:098463de4c5d 225 */
group-onsemi 0:098463de4c5d 226
group-onsemi 0:098463de4c5d 227 /**
group-onsemi 0:098463de4c5d 228 * @brief Checks whether the specified EXTI line flag is set or not.
group-onsemi 0:098463de4c5d 229 * @param __EXTI_LINE__: specifies the EXTI line flag to check.
group-onsemi 0:098463de4c5d 230 * This parameter can be GPIO_PIN_x where x can be(0..15)
group-onsemi 0:098463de4c5d 231 * @retval The new state of __EXTI_LINE__ (SET or RESET).
group-onsemi 0:098463de4c5d 232 */
group-onsemi 0:098463de4c5d 233 #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
group-onsemi 0:098463de4c5d 234
group-onsemi 0:098463de4c5d 235 /**
group-onsemi 0:098463de4c5d 236 * @brief Clears the EXTI's line pending flags.
group-onsemi 0:098463de4c5d 237 * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
group-onsemi 0:098463de4c5d 238 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
group-onsemi 0:098463de4c5d 239 * @retval None
group-onsemi 0:098463de4c5d 240 */
group-onsemi 0:098463de4c5d 241 #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
group-onsemi 0:098463de4c5d 242
group-onsemi 0:098463de4c5d 243 /**
group-onsemi 0:098463de4c5d 244 * @brief Checks whether the specified EXTI line is asserted or not.
group-onsemi 0:098463de4c5d 245 * @param __EXTI_LINE__: specifies the EXTI line to check.
group-onsemi 0:098463de4c5d 246 * This parameter can be GPIO_PIN_x where x can be(0..15)
group-onsemi 0:098463de4c5d 247 * @retval The new state of __EXTI_LINE__ (SET or RESET).
group-onsemi 0:098463de4c5d 248 */
group-onsemi 0:098463de4c5d 249 #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
group-onsemi 0:098463de4c5d 250
group-onsemi 0:098463de4c5d 251 /**
group-onsemi 0:098463de4c5d 252 * @brief Clears the EXTI's line pending bits.
group-onsemi 0:098463de4c5d 253 * @param __EXTI_LINE__: specifies the EXTI lines to clear.
group-onsemi 0:098463de4c5d 254 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
group-onsemi 0:098463de4c5d 255 * @retval None
group-onsemi 0:098463de4c5d 256 */
group-onsemi 0:098463de4c5d 257 #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
group-onsemi 0:098463de4c5d 258
group-onsemi 0:098463de4c5d 259 /**
group-onsemi 0:098463de4c5d 260 * @brief Generates a Software interrupt on selected EXTI line.
group-onsemi 0:098463de4c5d 261 * @param __EXTI_LINE__: specifies the EXTI line to check.
group-onsemi 0:098463de4c5d 262 * This parameter can be GPIO_PIN_x where x can be(0..15)
group-onsemi 0:098463de4c5d 263 * @retval None
group-onsemi 0:098463de4c5d 264 */
group-onsemi 0:098463de4c5d 265 #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
group-onsemi 0:098463de4c5d 266
group-onsemi 0:098463de4c5d 267 /* Include GPIO HAL Extension module */
group-onsemi 0:098463de4c5d 268 #include "stm32f1xx_hal_gpio_ex.h"
group-onsemi 0:098463de4c5d 269
group-onsemi 0:098463de4c5d 270 /**
group-onsemi 0:098463de4c5d 271 * @}
group-onsemi 0:098463de4c5d 272 */
group-onsemi 0:098463de4c5d 273
group-onsemi 0:098463de4c5d 274
group-onsemi 0:098463de4c5d 275
group-onsemi 0:098463de4c5d 276 /* Exported functions --------------------------------------------------------*/
group-onsemi 0:098463de4c5d 277 /* Initialization and de-initialization functions *******************************/
group-onsemi 0:098463de4c5d 278 /** @addtogroup GPIO_Exported_Functions
group-onsemi 0:098463de4c5d 279 * @{
group-onsemi 0:098463de4c5d 280 */
group-onsemi 0:098463de4c5d 281
group-onsemi 0:098463de4c5d 282 /** @addtogroup GPIO_Exported_Functions_Group1
group-onsemi 0:098463de4c5d 283 * @{
group-onsemi 0:098463de4c5d 284 */
group-onsemi 0:098463de4c5d 285 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
group-onsemi 0:098463de4c5d 286 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
group-onsemi 0:098463de4c5d 287 /**
group-onsemi 0:098463de4c5d 288 * @}
group-onsemi 0:098463de4c5d 289 */
group-onsemi 0:098463de4c5d 290
group-onsemi 0:098463de4c5d 291 /* IO operation functions *******************************************************/
group-onsemi 0:098463de4c5d 292 /** @addtogroup GPIO_Exported_Functions_Group2
group-onsemi 0:098463de4c5d 293 * @{
group-onsemi 0:098463de4c5d 294 */
group-onsemi 0:098463de4c5d 295 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
group-onsemi 0:098463de4c5d 296 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
group-onsemi 0:098463de4c5d 297 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
group-onsemi 0:098463de4c5d 298 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
group-onsemi 0:098463de4c5d 299 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
group-onsemi 0:098463de4c5d 300 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
group-onsemi 0:098463de4c5d 301 /**
group-onsemi 0:098463de4c5d 302 * @}
group-onsemi 0:098463de4c5d 303 */
group-onsemi 0:098463de4c5d 304
group-onsemi 0:098463de4c5d 305 /**
group-onsemi 0:098463de4c5d 306 * @}
group-onsemi 0:098463de4c5d 307 */
group-onsemi 0:098463de4c5d 308
group-onsemi 0:098463de4c5d 309 /**
group-onsemi 0:098463de4c5d 310 * @}
group-onsemi 0:098463de4c5d 311 */
group-onsemi 0:098463de4c5d 312
group-onsemi 0:098463de4c5d 313 /**
group-onsemi 0:098463de4c5d 314 * @}
group-onsemi 0:098463de4c5d 315 */
group-onsemi 0:098463de4c5d 316
group-onsemi 0:098463de4c5d 317
group-onsemi 0:098463de4c5d 318 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 319 }
group-onsemi 0:098463de4c5d 320 #endif
group-onsemi 0:098463de4c5d 321
group-onsemi 0:098463de4c5d 322 #endif /* __STM32F1xx_HAL_GPIO_H */
group-onsemi 0:098463de4c5d 323
group-onsemi 0:098463de4c5d 324 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/