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Dependents: mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510
targets/TARGET_ONSEMI/TARGET_NCS36510/test_map.h@0:098463de4c5d, 2017-01-25 (annotated)
- Committer:
- group-onsemi
- Date:
- Wed Jan 25 20:34:15 2017 +0000
- Revision:
- 0:098463de4c5d
Initial commit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| group-onsemi | 0:098463de4c5d | 1 | /** |
| group-onsemi | 0:098463de4c5d | 2 | ****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 3 | * @file test_map.h |
| group-onsemi | 0:098463de4c5d | 4 | * @brief Test hw module register map |
| group-onsemi | 0:098463de4c5d | 5 | * @internal |
| group-onsemi | 0:098463de4c5d | 6 | * @author ON Semiconductor |
| group-onsemi | 0:098463de4c5d | 7 | * $Rev: 2848 $ |
| group-onsemi | 0:098463de4c5d | 8 | * $Date: 2014-04-01 22:48:18 +0530 (Tue, 01 Apr 2014) $ |
| group-onsemi | 0:098463de4c5d | 9 | ****************************************************************************** |
| group-onsemi | 0:098463de4c5d | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
| group-onsemi | 0:098463de4c5d | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
| group-onsemi | 0:098463de4c5d | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
| group-onsemi | 0:098463de4c5d | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
| group-onsemi | 0:098463de4c5d | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
| group-onsemi | 0:098463de4c5d | 15 | * if applicable the software license agreement. Do not use this software and/or |
| group-onsemi | 0:098463de4c5d | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
| group-onsemi | 0:098463de4c5d | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
| group-onsemi | 0:098463de4c5d | 18 | * terms and conditions. |
| group-onsemi | 0:098463de4c5d | 19 | * |
| group-onsemi | 0:098463de4c5d | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| group-onsemi | 0:098463de4c5d | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| group-onsemi | 0:098463de4c5d | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| group-onsemi | 0:098463de4c5d | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
| group-onsemi | 0:098463de4c5d | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| group-onsemi | 0:098463de4c5d | 25 | * @endinternal |
| group-onsemi | 0:098463de4c5d | 26 | * |
| group-onsemi | 0:098463de4c5d | 27 | * @ingroup test |
| group-onsemi | 0:098463de4c5d | 28 | * |
| group-onsemi | 0:098463de4c5d | 29 | * @details |
| group-onsemi | 0:098463de4c5d | 30 | */ |
| group-onsemi | 0:098463de4c5d | 31 | |
| group-onsemi | 0:098463de4c5d | 32 | #ifndef TEST_MAP_H_ |
| group-onsemi | 0:098463de4c5d | 33 | #define TEST_MAP_H_ |
| group-onsemi | 0:098463de4c5d | 34 | |
| group-onsemi | 0:098463de4c5d | 35 | /************************************************************************************************* |
| group-onsemi | 0:098463de4c5d | 36 | * * |
| group-onsemi | 0:098463de4c5d | 37 | * Header files * |
| group-onsemi | 0:098463de4c5d | 38 | * * |
| group-onsemi | 0:098463de4c5d | 39 | *************************************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 40 | |
| group-onsemi | 0:098463de4c5d | 41 | #include "architecture.h" |
| group-onsemi | 0:098463de4c5d | 42 | |
| group-onsemi | 0:098463de4c5d | 43 | /************************************************************************************************** |
| group-onsemi | 0:098463de4c5d | 44 | * * |
| group-onsemi | 0:098463de4c5d | 45 | * Type definitions * |
| group-onsemi | 0:098463de4c5d | 46 | * * |
| group-onsemi | 0:098463de4c5d | 47 | **************************************************************************************************/ |
| group-onsemi | 0:098463de4c5d | 48 | |
| group-onsemi | 0:098463de4c5d | 49 | /** General test registers |
| group-onsemi | 0:098463de4c5d | 50 | * |
| group-onsemi | 0:098463de4c5d | 51 | */ |
| group-onsemi | 0:098463de4c5d | 52 | typedef struct { |
| group-onsemi | 0:098463de4c5d | 53 | __IO uint32_t UNLOCK; |
| group-onsemi | 0:098463de4c5d | 54 | __IO uint32_t ANA_TEST_MUX; |
| group-onsemi | 0:098463de4c5d | 55 | __IO uint32_t OVD_ENA_MODE; |
| group-onsemi | 0:098463de4c5d | 56 | __IO uint32_t OVD_VAL; |
| group-onsemi | 0:098463de4c5d | 57 | __IO uint32_t ANA_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 58 | __IO uint32_t CLK_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 59 | union { |
| group-onsemi | 0:098463de4c5d | 60 | struct { |
| group-onsemi | 0:098463de4c5d | 61 | __IO uint32_t PAD0:1; |
| group-onsemi | 0:098463de4c5d | 62 | __IO uint32_t PAD1:1; |
| group-onsemi | 0:098463de4c5d | 63 | __IO uint32_t FORCE_SOURCE:1; |
| group-onsemi | 0:098463de4c5d | 64 | __IO uint32_t FORCE_SINK:1; |
| group-onsemi | 0:098463de4c5d | 65 | __IO uint32_t PD_CONTROL:3; |
| group-onsemi | 0:098463de4c5d | 66 | __IO uint32_t PAD3:1; |
| group-onsemi | 0:098463de4c5d | 67 | __IO uint32_t BYPASS_PLL_REG:1; |
| group-onsemi | 0:098463de4c5d | 68 | __IO uint32_t PAD4:4; |
| group-onsemi | 0:098463de4c5d | 69 | __IO uint32_t DITHER_MODE:1; |
| group-onsemi | 0:098463de4c5d | 70 | __IO uint32_t PLL_MODE:1; |
| group-onsemi | 0:098463de4c5d | 71 | __IO uint32_t FORCE_LOCK:1; |
| group-onsemi | 0:098463de4c5d | 72 | } BITS; |
| group-onsemi | 0:098463de4c5d | 73 | __IO uint32_t WORD; |
| group-onsemi | 0:098463de4c5d | 74 | } PLL_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 75 | __IO uint32_t RX_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 76 | __IO uint32_t PMU_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 77 | } TestReg_t, *TestReg_pt; |
| group-onsemi | 0:098463de4c5d | 78 | |
| group-onsemi | 0:098463de4c5d | 79 | /** Digital test registers |
| group-onsemi | 0:098463de4c5d | 80 | * |
| group-onsemi | 0:098463de4c5d | 81 | */ |
| group-onsemi | 0:098463de4c5d | 82 | typedef struct { |
| group-onsemi | 0:098463de4c5d | 83 | union { |
| group-onsemi | 0:098463de4c5d | 84 | struct { |
| group-onsemi | 0:098463de4c5d | 85 | __IO uint32_t PAD0 :4; /**< */ |
| group-onsemi | 0:098463de4c5d | 86 | __IO uint32_t DIO4 :4; /**< DIO4 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 87 | __IO uint32_t DIO5 :4; /**< DIO5 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 88 | __IO uint32_t DIO6 :4; /**< DIO6 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 89 | __IO uint32_t DIO7 :4; /**< DIO7 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 90 | __IO uint32_t DIO8 :4; /**< DIO8 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 91 | __IO uint32_t DIO9 :4; /**< DIO9 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 92 | __IO uint32_t DIO10 :4; /**< DIO10 Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 93 | } BITS; |
| group-onsemi | 0:098463de4c5d | 94 | __IO uint32_t WORD; |
| group-onsemi | 0:098463de4c5d | 95 | } DIG_TEST_MUX; |
| group-onsemi | 0:098463de4c5d | 96 | __IO uint32_t DIG_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 97 | union { |
| group-onsemi | 0:098463de4c5d | 98 | struct { |
| group-onsemi | 0:098463de4c5d | 99 | __IO uint32_t PAD0 :12; /**< */ |
| group-onsemi | 0:098463de4c5d | 100 | __IO uint32_t DIO5 :3; /**< DIO5 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 101 | __IO uint32_t DIO6 :3; /**< DIO6 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 102 | __IO uint32_t DIO7 :3; /**< DIO7 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 103 | __IO uint32_t DIO8 :3; /**< DIO8 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 104 | __IO uint32_t DIO9 :3; /**< DIO9 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 105 | __IO uint32_t DIO10 :3; /**< DIO10 Input Test Mux Control */ |
| group-onsemi | 0:098463de4c5d | 106 | } BITS; |
| group-onsemi | 0:098463de4c5d | 107 | __IO uint32_t WORD; |
| group-onsemi | 0:098463de4c5d | 108 | } DIG_IN_TEST_MUX; |
| group-onsemi | 0:098463de4c5d | 109 | __IO uint32_t SCAN_MODE; |
| group-onsemi | 0:098463de4c5d | 110 | __IO uint32_t BIST_TEST_MUX; |
| group-onsemi | 0:098463de4c5d | 111 | __IO uint32_t RAM_DIAG_ADDR; |
| group-onsemi | 0:098463de4c5d | 112 | __IO uint32_t RAM_DIAG_DATA; |
| group-onsemi | 0:098463de4c5d | 113 | __IO uint32_t SRAMA_DIAG_COMP; |
| group-onsemi | 0:098463de4c5d | 114 | __IO uint32_t SRAMB_DIAG_COMP; |
| group-onsemi | 0:098463de4c5d | 115 | __IO uint32_t RAM_BUF_TEST_MODE; |
| group-onsemi | 0:098463de4c5d | 116 | } TestDigReg_t, *TestDigReg_pt; |
| group-onsemi | 0:098463de4c5d | 117 | |
| group-onsemi | 0:098463de4c5d | 118 | /** NVM test registers |
| group-onsemi | 0:098463de4c5d | 119 | * |
| group-onsemi | 0:098463de4c5d | 120 | */ |
| group-onsemi | 0:098463de4c5d | 121 | typedef struct { |
| group-onsemi | 0:098463de4c5d | 122 | __O uint32_t PAD; |
| group-onsemi | 0:098463de4c5d | 123 | } TestNvmReg_t, *TestNvmReg_pt; |
| group-onsemi | 0:098463de4c5d | 124 | |
| group-onsemi | 0:098463de4c5d | 125 | #endif /* TEST_MAP_H_ */ |