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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC2460/spi_api.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2015 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include <math.h>
group-onsemi 0:098463de4c5d 18
group-onsemi 0:098463de4c5d 19 #include "spi_api.h"
group-onsemi 0:098463de4c5d 20 #include "cmsis.h"
group-onsemi 0:098463de4c5d 21 #include "pinmap.h"
group-onsemi 0:098463de4c5d 22 #include "mbed_error.h"
group-onsemi 0:098463de4c5d 23
group-onsemi 0:098463de4c5d 24 static const PinMap PinMap_SPI_SCLK[] = {
group-onsemi 0:098463de4c5d 25 {P0_7 , SPI_1, 2},
group-onsemi 0:098463de4c5d 26 {P0_15, SPI_0, 2},
group-onsemi 0:098463de4c5d 27 {P1_20, SPI_0, 3},
group-onsemi 0:098463de4c5d 28 {P1_31, SPI_1, 2},
group-onsemi 0:098463de4c5d 29 {NC , NC , 0}
group-onsemi 0:098463de4c5d 30 };
group-onsemi 0:098463de4c5d 31
group-onsemi 0:098463de4c5d 32 static const PinMap PinMap_SPI_MOSI[] = {
group-onsemi 0:098463de4c5d 33 {P0_9 , SPI_1, 2},
group-onsemi 0:098463de4c5d 34 {P0_13, SPI_1, 2},
group-onsemi 0:098463de4c5d 35 {P0_18, SPI_0, 2},
group-onsemi 0:098463de4c5d 36 {P1_24, SPI_0, 3},
group-onsemi 0:098463de4c5d 37 {NC , NC , 0}
group-onsemi 0:098463de4c5d 38 };
group-onsemi 0:098463de4c5d 39
group-onsemi 0:098463de4c5d 40 static const PinMap PinMap_SPI_MISO[] = {
group-onsemi 0:098463de4c5d 41 {P0_8 , SPI_1, 2},
group-onsemi 0:098463de4c5d 42 {P0_12, SPI_1, 2},
group-onsemi 0:098463de4c5d 43 {P0_17, SPI_0, 2},
group-onsemi 0:098463de4c5d 44 {P1_23, SPI_0, 3},
group-onsemi 0:098463de4c5d 45 {NC , NC , 0}
group-onsemi 0:098463de4c5d 46 };
group-onsemi 0:098463de4c5d 47
group-onsemi 0:098463de4c5d 48 static const PinMap PinMap_SPI_SSEL[] = {
group-onsemi 0:098463de4c5d 49 {P0_6 , SPI_1, 2},
group-onsemi 0:098463de4c5d 50 {P0_14, SPI_1, 3},
group-onsemi 0:098463de4c5d 51 {P0_16, SPI_0, 2},
group-onsemi 0:098463de4c5d 52 {P1_21, SPI_0, 3},
group-onsemi 0:098463de4c5d 53 {NC , NC , 0}
group-onsemi 0:098463de4c5d 54 };
group-onsemi 0:098463de4c5d 55
group-onsemi 0:098463de4c5d 56 static inline int ssp_disable(spi_t *obj);
group-onsemi 0:098463de4c5d 57 static inline int ssp_enable(spi_t *obj);
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
group-onsemi 0:098463de4c5d 60 // determine the SPI to use
group-onsemi 0:098463de4c5d 61 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 62 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 63 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 64 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 65 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
group-onsemi 0:098463de4c5d 66 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
group-onsemi 0:098463de4c5d 67 obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
group-onsemi 0:098463de4c5d 68 MBED_ASSERT((int)obj->spi != NC);
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70 // enable power and clocking
group-onsemi 0:098463de4c5d 71 switch ((int)obj->spi) {
group-onsemi 0:098463de4c5d 72 case SPI_0: LPC_SC->PCONP |= 1 << PCSSP0; break;
group-onsemi 0:098463de4c5d 73 case SPI_1: LPC_SC->PCONP |= 1 << PCSSP1; break;
group-onsemi 0:098463de4c5d 74 }
group-onsemi 0:098463de4c5d 75
group-onsemi 0:098463de4c5d 76 // set default format and frequency
group-onsemi 0:098463de4c5d 77 if (ssel == NC) {
group-onsemi 0:098463de4c5d 78 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
group-onsemi 0:098463de4c5d 79 } else {
group-onsemi 0:098463de4c5d 80 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
group-onsemi 0:098463de4c5d 81 }
group-onsemi 0:098463de4c5d 82 spi_frequency(obj, 1000000);
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 // enable the ssp channel
group-onsemi 0:098463de4c5d 85 ssp_enable(obj);
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 // pin out the spi pins
group-onsemi 0:098463de4c5d 88 pinmap_pinout(mosi, PinMap_SPI_MOSI);
group-onsemi 0:098463de4c5d 89 pinmap_pinout(miso, PinMap_SPI_MISO);
group-onsemi 0:098463de4c5d 90 pinmap_pinout(sclk, PinMap_SPI_SCLK);
group-onsemi 0:098463de4c5d 91 if (ssel != NC) {
group-onsemi 0:098463de4c5d 92 pinmap_pinout(ssel, PinMap_SPI_SSEL);
group-onsemi 0:098463de4c5d 93 }
group-onsemi 0:098463de4c5d 94 }
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 void spi_free(spi_t *obj) {}
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 void spi_format(spi_t *obj, int bits, int mode, int slave) {
group-onsemi 0:098463de4c5d 99 MBED_ASSERT(((bits >= 4) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
group-onsemi 0:098463de4c5d 100 ssp_disable(obj);
group-onsemi 0:098463de4c5d 101
group-onsemi 0:098463de4c5d 102 int polarity = (mode & 0x2) ? 1 : 0;
group-onsemi 0:098463de4c5d 103 int phase = (mode & 0x1) ? 1 : 0;
group-onsemi 0:098463de4c5d 104
group-onsemi 0:098463de4c5d 105 // set it up
group-onsemi 0:098463de4c5d 106 int DSS = bits - 1; // DSS (data select size)
group-onsemi 0:098463de4c5d 107 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
group-onsemi 0:098463de4c5d 108 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
group-onsemi 0:098463de4c5d 109
group-onsemi 0:098463de4c5d 110 int FRF = 0; // FRF (frame format) = SPI
group-onsemi 0:098463de4c5d 111 uint32_t tmp = obj->spi->CR0;
group-onsemi 0:098463de4c5d 112 tmp &= ~(0xFFFF);
group-onsemi 0:098463de4c5d 113 tmp |= DSS << 0
group-onsemi 0:098463de4c5d 114 | FRF << 4
group-onsemi 0:098463de4c5d 115 | SPO << 6
group-onsemi 0:098463de4c5d 116 | SPH << 7;
group-onsemi 0:098463de4c5d 117 obj->spi->CR0 = tmp;
group-onsemi 0:098463de4c5d 118
group-onsemi 0:098463de4c5d 119 tmp = obj->spi->CR1;
group-onsemi 0:098463de4c5d 120 tmp &= ~(0xD);
group-onsemi 0:098463de4c5d 121 tmp |= 0 << 0 // LBM - loop back mode - off
group-onsemi 0:098463de4c5d 122 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
group-onsemi 0:098463de4c5d 123 | 0 << 3; // SOD - slave output disable - na
group-onsemi 0:098463de4c5d 124 obj->spi->CR1 = tmp;
group-onsemi 0:098463de4c5d 125
group-onsemi 0:098463de4c5d 126 ssp_enable(obj);
group-onsemi 0:098463de4c5d 127 }
group-onsemi 0:098463de4c5d 128
group-onsemi 0:098463de4c5d 129 void spi_frequency(spi_t *obj, int hz) {
group-onsemi 0:098463de4c5d 130 ssp_disable(obj);
group-onsemi 0:098463de4c5d 131
group-onsemi 0:098463de4c5d 132 // setup the spi clock diveder to /1
group-onsemi 0:098463de4c5d 133 switch ((int)obj->spi) {
group-onsemi 0:098463de4c5d 134 case SPI_0:
group-onsemi 0:098463de4c5d 135 LPC_SC->PCLKSEL1 &= ~(3 << 10);
group-onsemi 0:098463de4c5d 136 LPC_SC->PCLKSEL1 |= (1 << 10);
group-onsemi 0:098463de4c5d 137 break;
group-onsemi 0:098463de4c5d 138 case SPI_1:
group-onsemi 0:098463de4c5d 139 LPC_SC->PCLKSEL0 &= ~(3 << 20);
group-onsemi 0:098463de4c5d 140 LPC_SC->PCLKSEL0 |= (1 << 20);
group-onsemi 0:098463de4c5d 141 break;
group-onsemi 0:098463de4c5d 142 }
group-onsemi 0:098463de4c5d 143
group-onsemi 0:098463de4c5d 144 uint32_t PCLK = SystemCoreClock;
group-onsemi 0:098463de4c5d 145
group-onsemi 0:098463de4c5d 146 int prescaler;
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
group-onsemi 0:098463de4c5d 149 int prescale_hz = PCLK / prescaler;
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 // calculate the divider
group-onsemi 0:098463de4c5d 152 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 // check we can support the divider
group-onsemi 0:098463de4c5d 155 if (divider < 256) {
group-onsemi 0:098463de4c5d 156 // prescaler
group-onsemi 0:098463de4c5d 157 obj->spi->CPSR = prescaler;
group-onsemi 0:098463de4c5d 158
group-onsemi 0:098463de4c5d 159 // divider
group-onsemi 0:098463de4c5d 160 obj->spi->CR0 &= ~(0xFFFF << 8);
group-onsemi 0:098463de4c5d 161 obj->spi->CR0 |= (divider - 1) << 8;
group-onsemi 0:098463de4c5d 162 ssp_enable(obj);
group-onsemi 0:098463de4c5d 163 return;
group-onsemi 0:098463de4c5d 164 }
group-onsemi 0:098463de4c5d 165 }
group-onsemi 0:098463de4c5d 166 error("Couldn't setup requested SPI frequency");
group-onsemi 0:098463de4c5d 167 }
group-onsemi 0:098463de4c5d 168
group-onsemi 0:098463de4c5d 169 static inline int ssp_disable(spi_t *obj) {
group-onsemi 0:098463de4c5d 170 return obj->spi->CR1 &= ~(1 << 1);
group-onsemi 0:098463de4c5d 171 }
group-onsemi 0:098463de4c5d 172
group-onsemi 0:098463de4c5d 173 static inline int ssp_enable(spi_t *obj) {
group-onsemi 0:098463de4c5d 174 return obj->spi->CR1 |= (1 << 1);
group-onsemi 0:098463de4c5d 175 }
group-onsemi 0:098463de4c5d 176
group-onsemi 0:098463de4c5d 177 static inline int ssp_readable(spi_t *obj) {
group-onsemi 0:098463de4c5d 178 return obj->spi->SR & (1 << 2);
group-onsemi 0:098463de4c5d 179 }
group-onsemi 0:098463de4c5d 180
group-onsemi 0:098463de4c5d 181 static inline int ssp_writeable(spi_t *obj) {
group-onsemi 0:098463de4c5d 182 return obj->spi->SR & (1 << 1);
group-onsemi 0:098463de4c5d 183 }
group-onsemi 0:098463de4c5d 184
group-onsemi 0:098463de4c5d 185 static inline void ssp_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 186 while (!ssp_writeable(obj));
group-onsemi 0:098463de4c5d 187 obj->spi->DR = value;
group-onsemi 0:098463de4c5d 188 }
group-onsemi 0:098463de4c5d 189
group-onsemi 0:098463de4c5d 190 static inline int ssp_read(spi_t *obj) {
group-onsemi 0:098463de4c5d 191 while (!ssp_readable(obj));
group-onsemi 0:098463de4c5d 192 return obj->spi->DR;
group-onsemi 0:098463de4c5d 193 }
group-onsemi 0:098463de4c5d 194
group-onsemi 0:098463de4c5d 195 static inline int ssp_busy(spi_t *obj) {
group-onsemi 0:098463de4c5d 196 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
group-onsemi 0:098463de4c5d 197 }
group-onsemi 0:098463de4c5d 198
group-onsemi 0:098463de4c5d 199 int spi_master_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 200 ssp_write(obj, value);
group-onsemi 0:098463de4c5d 201 return ssp_read(obj);
group-onsemi 0:098463de4c5d 202 }
group-onsemi 0:098463de4c5d 203
group-onsemi 0:098463de4c5d 204 int spi_slave_receive(spi_t *obj) {
group-onsemi 0:098463de4c5d 205 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
group-onsemi 0:098463de4c5d 206 }
group-onsemi 0:098463de4c5d 207
group-onsemi 0:098463de4c5d 208 int spi_slave_read(spi_t *obj) {
group-onsemi 0:098463de4c5d 209 return obj->spi->DR;
group-onsemi 0:098463de4c5d 210 }
group-onsemi 0:098463de4c5d 211
group-onsemi 0:098463de4c5d 212 void spi_slave_write(spi_t *obj, int value) {
group-onsemi 0:098463de4c5d 213 while (ssp_writeable(obj) == 0) ;
group-onsemi 0:098463de4c5d 214 obj->spi->DR = value;
group-onsemi 0:098463de4c5d 215 }
group-onsemi 0:098463de4c5d 216
group-onsemi 0:098463de4c5d 217 int spi_busy(spi_t *obj) {
group-onsemi 0:098463de4c5d 218 return ssp_busy(obj);
group-onsemi 0:098463de4c5d 219 }