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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_NXP/TARGET_LPC15XX/analogin_api.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* mbed Microcontroller Library
group-onsemi 0:098463de4c5d 2 * Copyright (c) 2006-2013 ARM Limited
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Licensed under the Apache License, Version 2.0 (the "License");
group-onsemi 0:098463de4c5d 5 * you may not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 6 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 7 *
group-onsemi 0:098463de4c5d 8 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 11 * distributed under the License is distributed on an "AS IS" BASIS,
group-onsemi 0:098463de4c5d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 13 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 14 * limitations under the License.
group-onsemi 0:098463de4c5d 15 */
group-onsemi 0:098463de4c5d 16 #include "mbed_assert.h"
group-onsemi 0:098463de4c5d 17 #include "analogin_api.h"
group-onsemi 0:098463de4c5d 18 #include "cmsis.h"
group-onsemi 0:098463de4c5d 19 #include "pinmap.h"
group-onsemi 0:098463de4c5d 20
group-onsemi 0:098463de4c5d 21 #define ANALOGIN_MEDIAN_FILTER 1
group-onsemi 0:098463de4c5d 22
group-onsemi 0:098463de4c5d 23 #define ADC_10BIT_RANGE 0x3FF
group-onsemi 0:098463de4c5d 24 #define ADC_12BIT_RANGE 0xFFF
group-onsemi 0:098463de4c5d 25
group-onsemi 0:098463de4c5d 26 #define ADC_RANGE ADC_12BIT_RANGE
group-onsemi 0:098463de4c5d 27
group-onsemi 0:098463de4c5d 28 static const PinMap PinMap_ADC[] = {
group-onsemi 0:098463de4c5d 29 {P0_8 , ADC0_0, 0},
group-onsemi 0:098463de4c5d 30 {P0_7 , ADC0_1, 0},
group-onsemi 0:098463de4c5d 31 {P0_6 , ADC0_2, 0},
group-onsemi 0:098463de4c5d 32 {P0_5 , ADC0_3, 0},
group-onsemi 0:098463de4c5d 33 {P0_4 , ADC0_4, 0},
group-onsemi 0:098463de4c5d 34 {P0_3 , ADC0_5, 0},
group-onsemi 0:098463de4c5d 35 {P0_2 , ADC0_6, 0},
group-onsemi 0:098463de4c5d 36 {P0_1 , ADC0_7, 0},
group-onsemi 0:098463de4c5d 37 {P1_0 , ADC0_8, 0},
group-onsemi 0:098463de4c5d 38 {P0_31, ADC0_9, 0},
group-onsemi 0:098463de4c5d 39 {P0_0 , ADC0_10,0},
group-onsemi 0:098463de4c5d 40 {P0_30, ADC0_11,0},
group-onsemi 0:098463de4c5d 41 {P1_1 , ADC1_0, 0},
group-onsemi 0:098463de4c5d 42 {P0_9 , ADC1_1, 0},
group-onsemi 0:098463de4c5d 43 {P0_10, ADC1_2, 0},
group-onsemi 0:098463de4c5d 44 {P0_11, ADC1_3, 0},
group-onsemi 0:098463de4c5d 45 {P1_2 , ADC1_4, 0},
group-onsemi 0:098463de4c5d 46 {P1_3 , ADC1_5, 0},
group-onsemi 0:098463de4c5d 47 {P0_13, ADC1_6, 0},
group-onsemi 0:098463de4c5d 48 {P0_14, ADC1_7, 0},
group-onsemi 0:098463de4c5d 49 {P0_15, ADC1_8, 0},
group-onsemi 0:098463de4c5d 50 {P0_16, ADC1_9, 0},
group-onsemi 0:098463de4c5d 51 {P1_4 , ADC1_10,0},
group-onsemi 0:098463de4c5d 52 {P1_5 , ADC1_11,0},
group-onsemi 0:098463de4c5d 53 };
group-onsemi 0:098463de4c5d 54
group-onsemi 0:098463de4c5d 55 void analogin_init(analogin_t *obj, PinName pin) {
group-onsemi 0:098463de4c5d 56 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
group-onsemi 0:098463de4c5d 57 MBED_ASSERT(obj->adc != (ADCName)NC);
group-onsemi 0:098463de4c5d 58
group-onsemi 0:098463de4c5d 59 uint32_t port = (pin >> 5);
group-onsemi 0:098463de4c5d 60 // enable clock for GPIOx
group-onsemi 0:098463de4c5d 61 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1UL << (14 + port));
group-onsemi 0:098463de4c5d 62 // pin enable
group-onsemi 0:098463de4c5d 63 LPC_SWM->PINENABLE0 &= ~(1UL << obj->adc);
group-onsemi 0:098463de4c5d 64 // configure GPIO as input
group-onsemi 0:098463de4c5d 65 LPC_GPIO_PORT->DIR[port] &= ~(1UL << (pin & 0x1F));
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 // power up ADC
group-onsemi 0:098463de4c5d 68 if (obj->adc < ADC1_0)
group-onsemi 0:098463de4c5d 69 {
group-onsemi 0:098463de4c5d 70 // ADC0
group-onsemi 0:098463de4c5d 71 LPC_SYSCON->PDRUNCFG &= ~(1 << 10);
group-onsemi 0:098463de4c5d 72 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 27);
group-onsemi 0:098463de4c5d 73 }
group-onsemi 0:098463de4c5d 74 else {
group-onsemi 0:098463de4c5d 75 // ADC1
group-onsemi 0:098463de4c5d 76 LPC_SYSCON->PDRUNCFG &= ~(1 << 11);
group-onsemi 0:098463de4c5d 77 LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 28);
group-onsemi 0:098463de4c5d 78 }
group-onsemi 0:098463de4c5d 79
group-onsemi 0:098463de4c5d 80 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
group-onsemi 0:098463de4c5d 81
group-onsemi 0:098463de4c5d 82 // determine the system clock divider for a 500kHz ADC clock during calibration
group-onsemi 0:098463de4c5d 83 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85 // perform a self-calibration
group-onsemi 0:098463de4c5d 86 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
group-onsemi 0:098463de4c5d 87 while ((adc_reg->CTRL & (1UL << 30)) != 0);
group-onsemi 0:098463de4c5d 88
group-onsemi 0:098463de4c5d 89 // Sampling clock: SystemClock divided by 1
group-onsemi 0:098463de4c5d 90 adc_reg->CTRL = 0;
group-onsemi 0:098463de4c5d 91 }
group-onsemi 0:098463de4c5d 92
group-onsemi 0:098463de4c5d 93 static inline uint32_t adc_read(analogin_t *obj) {
group-onsemi 0:098463de4c5d 94 uint32_t channels;
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 if (obj->adc >= ADC1_0)
group-onsemi 0:098463de4c5d 99 channels = ((obj->adc - ADC1_0) & 0x1F);
group-onsemi 0:098463de4c5d 100 else
group-onsemi 0:098463de4c5d 101 channels = (obj->adc & 0x1F);
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 // select channel
group-onsemi 0:098463de4c5d 104 adc_reg->SEQA_CTRL &= ~(0xFFF);
group-onsemi 0:098463de4c5d 105 adc_reg->SEQA_CTRL |= (1UL << channels);
group-onsemi 0:098463de4c5d 106
group-onsemi 0:098463de4c5d 107 // start conversion and sequence enable
group-onsemi 0:098463de4c5d 108 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
group-onsemi 0:098463de4c5d 109
group-onsemi 0:098463de4c5d 110 // Repeatedly get the sample data until DONE bit
group-onsemi 0:098463de4c5d 111 volatile uint32_t data;
group-onsemi 0:098463de4c5d 112 do {
group-onsemi 0:098463de4c5d 113 data = adc_reg->SEQA_GDAT;
group-onsemi 0:098463de4c5d 114 } while ((data & (1UL << 31)) == 0);
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 // Stop conversion
group-onsemi 0:098463de4c5d 117 adc_reg->SEQA_CTRL &= ~(1UL << 31);
group-onsemi 0:098463de4c5d 118
group-onsemi 0:098463de4c5d 119 return ((data >> 4) & ADC_RANGE);
group-onsemi 0:098463de4c5d 120 }
group-onsemi 0:098463de4c5d 121
group-onsemi 0:098463de4c5d 122 static inline void order(uint32_t *a, uint32_t *b) {
group-onsemi 0:098463de4c5d 123 if (*a > *b) {
group-onsemi 0:098463de4c5d 124 uint32_t t = *a;
group-onsemi 0:098463de4c5d 125 *a = *b;
group-onsemi 0:098463de4c5d 126 *b = t;
group-onsemi 0:098463de4c5d 127 }
group-onsemi 0:098463de4c5d 128 }
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 static inline uint32_t adc_read_u32(analogin_t *obj) {
group-onsemi 0:098463de4c5d 131 uint32_t value;
group-onsemi 0:098463de4c5d 132 #if ANALOGIN_MEDIAN_FILTER
group-onsemi 0:098463de4c5d 133 uint32_t v1 = adc_read(obj);
group-onsemi 0:098463de4c5d 134 uint32_t v2 = adc_read(obj);
group-onsemi 0:098463de4c5d 135 uint32_t v3 = adc_read(obj);
group-onsemi 0:098463de4c5d 136 order(&v1, &v2);
group-onsemi 0:098463de4c5d 137 order(&v2, &v3);
group-onsemi 0:098463de4c5d 138 order(&v1, &v2);
group-onsemi 0:098463de4c5d 139 value = v2;
group-onsemi 0:098463de4c5d 140 #else
group-onsemi 0:098463de4c5d 141 value = adc_read(obj);
group-onsemi 0:098463de4c5d 142 #endif
group-onsemi 0:098463de4c5d 143 return value;
group-onsemi 0:098463de4c5d 144 }
group-onsemi 0:098463de4c5d 145
group-onsemi 0:098463de4c5d 146 uint16_t analogin_read_u16(analogin_t *obj) {
group-onsemi 0:098463de4c5d 147 uint32_t value = adc_read_u32(obj);
group-onsemi 0:098463de4c5d 148 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
group-onsemi 0:098463de4c5d 149 }
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 float analogin_read(analogin_t *obj) {
group-onsemi 0:098463de4c5d 152 uint32_t value = adc_read_u32(obj);
group-onsemi 0:098463de4c5d 153 return (float)value * (1.0f / (float)ADC_RANGE);
group-onsemi 0:098463de4c5d 154 }