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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

targets/TARGET_Maxim/TARGET_MAX32625/mxc/clkman.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *
group-onsemi 0:098463de4c5d 32 * $Date: 2016-04-27 09:12:45 -0500 (Wed, 27 Apr 2016) $
group-onsemi 0:098463de4c5d 33 * $Revision: 22531 $
group-onsemi 0:098463de4c5d 34 *
group-onsemi 0:098463de4c5d 35 ******************************************************************************/
group-onsemi 0:098463de4c5d 36 #include "mxc_config.h"
group-onsemi 0:098463de4c5d 37 #include "mxc_assert.h"
group-onsemi 0:098463de4c5d 38 #include "clkman.h"
group-onsemi 0:098463de4c5d 39 #include "pwrseq_regs.h"
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 /******************************************************************************/
group-onsemi 0:098463de4c5d 42 void CLKMAN_SetSystemClock(clkman_system_source_select_t select, clkman_system_scale_t scale)
group-onsemi 0:098463de4c5d 43 {
group-onsemi 0:098463de4c5d 44 MXC_CLKMAN->clk_ctrl = ((MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT) |
group-onsemi 0:098463de4c5d 45 (MXC_V_CLKMAN_CLK_CTRL_SYSTEM_SOURCE_SELECT_96MHZ_RO));
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 switch(select) {
group-onsemi 0:098463de4c5d 48 case CLKMAN_SYSTEM_SOURCE_96MHZ:
group-onsemi 0:098463de4c5d 49 default:
group-onsemi 0:098463de4c5d 50 // Enable and select the 96MHz oscillator
group-onsemi 0:098463de4c5d 51 MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN);
group-onsemi 0:098463de4c5d 52 MXC_PWRSEQ->reg0 &= ~(MXC_F_PWRSEQ_REG0_PWR_OSC_SELECT);
group-onsemi 0:098463de4c5d 53
group-onsemi 0:098463de4c5d 54 // Disable the 4MHz oscillator
group-onsemi 0:098463de4c5d 55 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_RCEN_RUN;
group-onsemi 0:098463de4c5d 56
group-onsemi 0:098463de4c5d 57 // Divide the system clock by the scale
group-onsemi 0:098463de4c5d 58 MXC_PWRSEQ->reg3 = ((MXC_PWRSEQ->reg3 & ~MXC_F_PWRSEQ_REG3_PWR_RO_DIV) |
group-onsemi 0:098463de4c5d 59 (scale << MXC_F_PWRSEQ_REG3_PWR_RO_DIV_POS));
group-onsemi 0:098463de4c5d 60
group-onsemi 0:098463de4c5d 61 break;
group-onsemi 0:098463de4c5d 62 case CLKMAN_SYSTEM_SOURCE_4MHZ:
group-onsemi 0:098463de4c5d 63 // Enable and select the 4MHz oscillator
group-onsemi 0:098463de4c5d 64 MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_RCEN_RUN);
group-onsemi 0:098463de4c5d 65 MXC_PWRSEQ->reg0 |= (MXC_F_PWRSEQ_REG0_PWR_OSC_SELECT);
group-onsemi 0:098463de4c5d 66
group-onsemi 0:098463de4c5d 67 // Disable the 96MHz oscillator
group-onsemi 0:098463de4c5d 68 MXC_PWRSEQ->reg0 &= ~MXC_F_PWRSEQ_REG0_PWR_ROEN_RUN;
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70 // 4MHz System source can only be divided down by a maximum factor of 8
group-onsemi 0:098463de4c5d 71 MXC_ASSERT(scale <= CLKMAN_SYSTEM_SCALE_DIV_8);
group-onsemi 0:098463de4c5d 72
group-onsemi 0:098463de4c5d 73 // Divide the system clock by the scale
group-onsemi 0:098463de4c5d 74 MXC_PWRSEQ->reg3 = ((MXC_PWRSEQ->reg3 & ~MXC_F_PWRSEQ_REG3_PWR_RC_DIV) |
group-onsemi 0:098463de4c5d 75 (scale << MXC_F_PWRSEQ_REG3_PWR_RC_DIV_POS));
group-onsemi 0:098463de4c5d 76 break;
group-onsemi 0:098463de4c5d 77 }
group-onsemi 0:098463de4c5d 78
group-onsemi 0:098463de4c5d 79 SystemCoreClockUpdate();
group-onsemi 0:098463de4c5d 80 }
group-onsemi 0:098463de4c5d 81
group-onsemi 0:098463de4c5d 82 /******************************************************************************/
group-onsemi 0:098463de4c5d 83 void CLKMAN_CryptoClockEnable(int enable)
group-onsemi 0:098463de4c5d 84 {
group-onsemi 0:098463de4c5d 85 if (enable) {
group-onsemi 0:098463de4c5d 86 /* Enable oscillator */
group-onsemi 0:098463de4c5d 87 MXC_CLKMAN->clk_config |= MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE;
group-onsemi 0:098463de4c5d 88 /* Un-gate clock to TPU modules */
group-onsemi 0:098463de4c5d 89 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_CRYPTO_CLOCK_ENABLE;
group-onsemi 0:098463de4c5d 90 } else {
group-onsemi 0:098463de4c5d 91 /* Gate clock off */
group-onsemi 0:098463de4c5d 92 MXC_CLKMAN->clk_ctrl &= ~MXC_F_CLKMAN_CLK_CTRL_CRYPTO_CLOCK_ENABLE;
group-onsemi 0:098463de4c5d 93 /* Disable oscillator */
group-onsemi 0:098463de4c5d 94 MXC_CLKMAN->clk_config &= ~MXC_F_CLKMAN_CLK_CONFIG_CRYPTO_ENABLE;
group-onsemi 0:098463de4c5d 95 }
group-onsemi 0:098463de4c5d 96 }
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 /******************************************************************************/
group-onsemi 0:098463de4c5d 99 void CLKMAN_SetClkScale(clkman_clk_t clk, clkman_scale_t scale)
group-onsemi 0:098463de4c5d 100 {
group-onsemi 0:098463de4c5d 101 volatile uint32_t *clk_ctrl_reg;
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 MXC_ASSERT(clk <= CLKMAN_CLK_MAX);
group-onsemi 0:098463de4c5d 104 MXC_ASSERT(scale != CLKMAN_SCALE_AUTO);
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 if (clk < CLKMAN_CRYPTO_CLK_AES) {
group-onsemi 0:098463de4c5d 107 clk_ctrl_reg = &MXC_CLKMAN->sys_clk_ctrl_0_cm4 + clk;
group-onsemi 0:098463de4c5d 108 } else {
group-onsemi 0:098463de4c5d 109 clk_ctrl_reg = &MXC_CLKMAN->crypt_clk_ctrl_0_aes + (clk - CLKMAN_CRYPTO_CLK_AES);
group-onsemi 0:098463de4c5d 110 }
group-onsemi 0:098463de4c5d 111
group-onsemi 0:098463de4c5d 112 *clk_ctrl_reg = scale;
group-onsemi 0:098463de4c5d 113 }
group-onsemi 0:098463de4c5d 114
group-onsemi 0:098463de4c5d 115 /******************************************************************************/
group-onsemi 0:098463de4c5d 116 clkman_scale_t CLKMAN_GetClkScale(clkman_clk_t clk)
group-onsemi 0:098463de4c5d 117 {
group-onsemi 0:098463de4c5d 118 volatile uint32_t *clk_ctrl_reg;
group-onsemi 0:098463de4c5d 119 MXC_ASSERT(clk <= CLKMAN_CLK_MAX);
group-onsemi 0:098463de4c5d 120
group-onsemi 0:098463de4c5d 121 if (clk < CLKMAN_CRYPTO_CLK_AES) {
group-onsemi 0:098463de4c5d 122 clk_ctrl_reg = &MXC_CLKMAN->sys_clk_ctrl_0_cm4 + clk;
group-onsemi 0:098463de4c5d 123 } else {
group-onsemi 0:098463de4c5d 124 clk_ctrl_reg = &MXC_CLKMAN->crypt_clk_ctrl_0_aes + (clk - CLKMAN_CRYPTO_CLK_AES);
group-onsemi 0:098463de4c5d 125 }
group-onsemi 0:098463de4c5d 126
group-onsemi 0:098463de4c5d 127 return (clkman_scale_t)*clk_ctrl_reg;
group-onsemi 0:098463de4c5d 128 }
group-onsemi 0:098463de4c5d 129
group-onsemi 0:098463de4c5d 130 /******************************************************************************/
group-onsemi 0:098463de4c5d 131 void CLKMAN_ClockGate(clkman_enable_clk_t clk, int enable)
group-onsemi 0:098463de4c5d 132 {
group-onsemi 0:098463de4c5d 133 if (enable) {
group-onsemi 0:098463de4c5d 134 MXC_CLKMAN->clk_ctrl |= clk;
group-onsemi 0:098463de4c5d 135 } else {
group-onsemi 0:098463de4c5d 136 MXC_CLKMAN->clk_ctrl &= ~clk;
group-onsemi 0:098463de4c5d 137 }
group-onsemi 0:098463de4c5d 138 }
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 /******************************************************************************/
group-onsemi 0:098463de4c5d 141 int CLKMAN_WdtClkSelect(unsigned int idx, clkman_wdt_clk_select_t select)
group-onsemi 0:098463de4c5d 142 {
group-onsemi 0:098463de4c5d 143 MXC_ASSERT(idx < MXC_CFG_WDT_INSTANCES);
group-onsemi 0:098463de4c5d 144
group-onsemi 0:098463de4c5d 145 if (select == CLKMAN_WDT_SELECT_DISABLED) {
group-onsemi 0:098463de4c5d 146 if (idx == 0) {
group-onsemi 0:098463de4c5d 147 MXC_CLKMAN->clk_ctrl &= ~MXC_F_CLKMAN_CLK_CTRL_WDT0_CLOCK_ENABLE;
group-onsemi 0:098463de4c5d 148 } else if (idx == 1) {
group-onsemi 0:098463de4c5d 149 MXC_CLKMAN->clk_ctrl &= ~MXC_F_CLKMAN_CLK_CTRL_WDT1_CLOCK_ENABLE;
group-onsemi 0:098463de4c5d 150 } else {
group-onsemi 0:098463de4c5d 151 return E_BAD_PARAM;
group-onsemi 0:098463de4c5d 152 }
group-onsemi 0:098463de4c5d 153 } else {
group-onsemi 0:098463de4c5d 154 if (idx == 0) {
group-onsemi 0:098463de4c5d 155 MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_WDT0_CLOCK_SELECT) |
group-onsemi 0:098463de4c5d 156 MXC_F_CLKMAN_CLK_CTRL_WDT0_CLOCK_ENABLE |
group-onsemi 0:098463de4c5d 157 ((select << MXC_F_CLKMAN_CLK_CTRL_WDT0_CLOCK_SELECT_POS) & MXC_F_CLKMAN_CLK_CTRL_WDT0_CLOCK_SELECT);
group-onsemi 0:098463de4c5d 158 } else if (idx == 1) {
group-onsemi 0:098463de4c5d 159 MXC_CLKMAN->clk_ctrl = (MXC_CLKMAN->clk_ctrl & ~MXC_F_CLKMAN_CLK_CTRL_WDT1_CLOCK_SELECT) |
group-onsemi 0:098463de4c5d 160 MXC_F_CLKMAN_CLK_CTRL_WDT1_CLOCK_ENABLE |
group-onsemi 0:098463de4c5d 161 ((select << MXC_F_CLKMAN_CLK_CTRL_WDT1_CLOCK_SELECT_POS) & MXC_F_CLKMAN_CLK_CTRL_WDT1_CLOCK_SELECT);
group-onsemi 0:098463de4c5d 162 } else {
group-onsemi 0:098463de4c5d 163 return E_BAD_PARAM;
group-onsemi 0:098463de4c5d 164 }
group-onsemi 0:098463de4c5d 165 }
group-onsemi 0:098463de4c5d 166
group-onsemi 0:098463de4c5d 167 return E_NO_ERROR;
group-onsemi 0:098463de4c5d 168 }
group-onsemi 0:098463de4c5d 169
group-onsemi 0:098463de4c5d 170 /******************************************************************************/
group-onsemi 0:098463de4c5d 171 /* NOTE: CLKMAN_TrimRO() is implemented in system_max32XXX.c */
group-onsemi 0:098463de4c5d 172 /******************************************************************************/