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targets/TARGET_Maxim/TARGET_MAX32600/device/uart_regs.h@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*******************************************************************************
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Permission is hereby granted, free of charge, to any person obtaining a
group-onsemi 0:098463de4c5d 5 * copy of this software and associated documentation files (the "Software"),
group-onsemi 0:098463de4c5d 6 * to deal in the Software without restriction, including without limitation
group-onsemi 0:098463de4c5d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
group-onsemi 0:098463de4c5d 8 * and/or sell copies of the Software, and to permit persons to whom the
group-onsemi 0:098463de4c5d 9 * Software is furnished to do so, subject to the following conditions:
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * The above copyright notice and this permission notice shall be included
group-onsemi 0:098463de4c5d 12 * in all copies or substantial portions of the Software.
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
group-onsemi 0:098463de4c5d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
group-onsemi 0:098463de4c5d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
group-onsemi 0:098463de4c5d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
group-onsemi 0:098463de4c5d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
group-onsemi 0:098463de4c5d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
group-onsemi 0:098463de4c5d 20 * OTHER DEALINGS IN THE SOFTWARE.
group-onsemi 0:098463de4c5d 21 *
group-onsemi 0:098463de4c5d 22 * Except as contained in this notice, the name of Maxim Integrated
group-onsemi 0:098463de4c5d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
group-onsemi 0:098463de4c5d 24 * Products, Inc. Branding Policy.
group-onsemi 0:098463de4c5d 25 *
group-onsemi 0:098463de4c5d 26 * The mere transfer of this software does not imply any licenses
group-onsemi 0:098463de4c5d 27 * of trade secrets, proprietary technology, copyrights, patents,
group-onsemi 0:098463de4c5d 28 * trademarks, maskwork rights, or any other form of intellectual
group-onsemi 0:098463de4c5d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
group-onsemi 0:098463de4c5d 30 * ownership rights.
group-onsemi 0:098463de4c5d 31 *******************************************************************************
group-onsemi 0:098463de4c5d 32 */
group-onsemi 0:098463de4c5d 33
group-onsemi 0:098463de4c5d 34 #ifndef _MXC_UART_REGS_H_
group-onsemi 0:098463de4c5d 35 #define _MXC_UART_REGS_H_
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 38 extern "C" {
group-onsemi 0:098463de4c5d 39 #endif
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include <stdint.h>
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**
group-onsemi 0:098463de4c5d 44 * @file uart_regs.h
group-onsemi 0:098463de4c5d 45 * @addtogroup uart UART
group-onsemi 0:098463de4c5d 46 * @{
group-onsemi 0:098463de4c5d 47 */
group-onsemi 0:098463de4c5d 48
group-onsemi 0:098463de4c5d 49 /* Offset Register Description
group-onsemi 0:098463de4c5d 50 ====== ============================================== */
group-onsemi 0:098463de4c5d 51 typedef struct {
group-onsemi 0:098463de4c5d 52 __IO uint32_t ctrl; /* 0x0000 UART Control Register */
group-onsemi 0:098463de4c5d 53 __IO uint32_t status; /* 0x0004 UART Status Register */
group-onsemi 0:098463de4c5d 54 __IO uint32_t inten; /* 0x0008 Interrupt Enable/Disable Controls */
group-onsemi 0:098463de4c5d 55 __IO uint32_t intfl; /* 0x000C Interrupt Flags */
group-onsemi 0:098463de4c5d 56 __IO uint32_t baud_int; /* 0x0010 Baud Rate Setting (Integer Portion) */
group-onsemi 0:098463de4c5d 57 __IO uint32_t baud_div_128; /* 0x0014 Baud Rate Setting */
group-onsemi 0:098463de4c5d 58 __IO uint32_t tx_fifo_out; /* 0x0018 TX FIFO Output End (read-only) */
group-onsemi 0:098463de4c5d 59 __IO uint32_t hw_flow_ctrl; /* 0x001C Hardware Flow Control Register */
group-onsemi 0:098463de4c5d 60 __IO uint32_t tx_rx_fifo; /* 0x0020 Write to load TX FIFO, Read to unload RX FIFO */
group-onsemi 0:098463de4c5d 61 } mxc_uart_regs_t;
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63
group-onsemi 0:098463de4c5d 64 /*
group-onsemi 0:098463de4c5d 65 Register offsets for module UART.
group-onsemi 0:098463de4c5d 66 */
group-onsemi 0:098463de4c5d 67 #define MXC_R_UART_OFFS_CTRL ((uint32_t)0x00000000UL)
group-onsemi 0:098463de4c5d 68 #define MXC_R_UART_OFFS_STATUS ((uint32_t)0x00000004UL)
group-onsemi 0:098463de4c5d 69 #define MXC_R_UART_OFFS_INTEN ((uint32_t)0x00000008UL)
group-onsemi 0:098463de4c5d 70 #define MXC_R_UART_OFFS_INTFL ((uint32_t)0x0000000CUL)
group-onsemi 0:098463de4c5d 71 #define MXC_R_UART_OFFS_BAUD_INT ((uint32_t)0x00000010UL)
group-onsemi 0:098463de4c5d 72 #define MXC_R_UART_OFFS_BAUD_DIV_128 ((uint32_t)0x00000014UL)
group-onsemi 0:098463de4c5d 73 #define MXC_R_UART_OFFS_TX_FIFO_OUT ((uint32_t)0x00000018UL)
group-onsemi 0:098463de4c5d 74 #define MXC_R_UART_OFFS_HW_FLOW_CTRL ((uint32_t)0x0000001CUL)
group-onsemi 0:098463de4c5d 75 #define MXC_R_UART_OFFS_TX_RX_FIFO ((uint32_t)0x00000020UL)
group-onsemi 0:098463de4c5d 76
group-onsemi 0:098463de4c5d 77 /*
group-onsemi 0:098463de4c5d 78 Field positions and masks for module UART.
group-onsemi 0:098463de4c5d 79 */
group-onsemi 0:098463de4c5d 80 #define MXC_F_UART_CTRL_RX_THRESHOLD_POS 0
group-onsemi 0:098463de4c5d 81 #define MXC_F_UART_CTRL_RX_THRESHOLD ((uint32_t)(0x00000007UL << MXC_F_UART_CTRL_RX_THRESHOLD_POS))
group-onsemi 0:098463de4c5d 82 #define MXC_F_UART_CTRL_PARITY_ENABLE_POS 4
group-onsemi 0:098463de4c5d 83 #define MXC_F_UART_CTRL_PARITY_ENABLE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_ENABLE_POS))
group-onsemi 0:098463de4c5d 84 #define MXC_F_UART_CTRL_PARITY_MODE_POS 5
group-onsemi 0:098463de4c5d 85 #define MXC_F_UART_CTRL_PARITY_MODE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_MODE_POS))
group-onsemi 0:098463de4c5d 86 #define MXC_F_UART_CTRL_PARITY_BIAS_POS 6
group-onsemi 0:098463de4c5d 87 #define MXC_F_UART_CTRL_PARITY_BIAS ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_PARITY_BIAS_POS))
group-onsemi 0:098463de4c5d 88 #define MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS 8
group-onsemi 0:098463de4c5d 89 #define MXC_F_UART_CTRL_TX_FIFO_FLUSH ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_FLUSH_POS))
group-onsemi 0:098463de4c5d 90 #define MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS 9
group-onsemi 0:098463de4c5d 91 #define MXC_F_UART_CTRL_RX_FIFO_FLUSH ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_FLUSH_POS))
group-onsemi 0:098463de4c5d 92 #define MXC_F_UART_CTRL_CHAR_LENGTH_POS 10
group-onsemi 0:098463de4c5d 93 #define MXC_F_UART_CTRL_CHAR_LENGTH ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_CHAR_LENGTH_POS))
group-onsemi 0:098463de4c5d 94 #define MXC_F_UART_CTRL_STOP_BIT_MODE_POS 12
group-onsemi 0:098463de4c5d 95 #define MXC_F_UART_CTRL_STOP_BIT_MODE ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_STOP_BIT_MODE_POS))
group-onsemi 0:098463de4c5d 96 #define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS 13
group-onsemi 0:098463de4c5d 97 #define MXC_F_UART_CTRL_HW_FLOW_CTRL_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_HW_FLOW_CTRL_EN_POS))
group-onsemi 0:098463de4c5d 98 #define MXC_F_UART_CTRL_BAUD_CLK_EN_POS 14
group-onsemi 0:098463de4c5d 99 #define MXC_F_UART_CTRL_BAUD_CLK_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_BAUD_CLK_EN_POS))
group-onsemi 0:098463de4c5d 100
group-onsemi 0:098463de4c5d 101 #define MXC_F_UART_STATUS_TX_BUSY_POS 0
group-onsemi 0:098463de4c5d 102 #define MXC_F_UART_STATUS_TX_BUSY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_BUSY_POS))
group-onsemi 0:098463de4c5d 103 #define MXC_F_UART_STATUS_RX_BUSY_POS 1
group-onsemi 0:098463de4c5d 104 #define MXC_F_UART_STATUS_RX_BUSY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_BUSY_POS))
group-onsemi 0:098463de4c5d 105 #define MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS 4
group-onsemi 0:098463de4c5d 106 #define MXC_F_UART_STATUS_RX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_EMPTY_POS))
group-onsemi 0:098463de4c5d 107 #define MXC_F_UART_STATUS_RX_FIFO_FULL_POS 5
group-onsemi 0:098463de4c5d 108 #define MXC_F_UART_STATUS_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_RX_FIFO_FULL_POS))
group-onsemi 0:098463de4c5d 109 #define MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS 6
group-onsemi 0:098463de4c5d 110 #define MXC_F_UART_STATUS_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_EMPTY_POS))
group-onsemi 0:098463de4c5d 111 #define MXC_F_UART_STATUS_TX_FIFO_FULL_POS 7
group-onsemi 0:098463de4c5d 112 #define MXC_F_UART_STATUS_TX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_UART_STATUS_TX_FIFO_FULL_POS))
group-onsemi 0:098463de4c5d 113 #define MXC_F_UART_STATUS_RX_FIFO_CHARS_POS 8
group-onsemi 0:098463de4c5d 114 #define MXC_F_UART_STATUS_RX_FIFO_CHARS ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_RX_FIFO_CHARS_POS))
group-onsemi 0:098463de4c5d 115 #define MXC_F_UART_STATUS_TX_FIFO_CHARS_POS 12
group-onsemi 0:098463de4c5d 116 #define MXC_F_UART_STATUS_TX_FIFO_CHARS ((uint32_t)(0x0000000FUL << MXC_F_UART_STATUS_TX_FIFO_CHARS_POS))
group-onsemi 0:098463de4c5d 117
group-onsemi 0:098463de4c5d 118 #define MXC_F_UART_INTEN_RX_FRAME_ERROR_POS 0
group-onsemi 0:098463de4c5d 119 #define MXC_F_UART_INTEN_RX_FRAME_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAME_ERROR_POS))
group-onsemi 0:098463de4c5d 120 #define MXC_F_UART_INTEN_RX_PARITY_ERROR_POS 1
group-onsemi 0:098463de4c5d 121 #define MXC_F_UART_INTEN_RX_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERROR_POS))
group-onsemi 0:098463de4c5d 122 #define MXC_F_UART_INTEN_CTS_CHANGE_POS 2
group-onsemi 0:098463de4c5d 123 #define MXC_F_UART_INTEN_CTS_CHANGE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_CTS_CHANGE_POS))
group-onsemi 0:098463de4c5d 124 #define MXC_F_UART_INTEN_RX_OVERRUN_POS 3
group-onsemi 0:098463de4c5d 125 #define MXC_F_UART_INTEN_RX_OVERRUN ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVERRUN_POS))
group-onsemi 0:098463de4c5d 126 #define MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS 4
group-onsemi 0:098463de4c5d 127 #define MXC_F_UART_INTEN_RX_OVER_THRESHOLD ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_OVER_THRESHOLD_POS))
group-onsemi 0:098463de4c5d 128 #define MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS 5
group-onsemi 0:098463de4c5d 129 #define MXC_F_UART_INTEN_TX_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_ALMOST_EMPTY_POS))
group-onsemi 0:098463de4c5d 130 #define MXC_F_UART_INTEN_TX_HALF_EMPTY_POS 6
group-onsemi 0:098463de4c5d 131 #define MXC_F_UART_INTEN_TX_HALF_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_HALF_EMPTY_POS))
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133 #define MXC_F_UART_INTFL_RX_FRAME_ERROR_POS 0
group-onsemi 0:098463de4c5d 134 #define MXC_F_UART_INTFL_RX_FRAME_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAME_ERROR_POS))
group-onsemi 0:098463de4c5d 135 #define MXC_F_UART_INTFL_RX_PARITY_ERROR_POS 1
group-onsemi 0:098463de4c5d 136 #define MXC_F_UART_INTFL_RX_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERROR_POS))
group-onsemi 0:098463de4c5d 137 #define MXC_F_UART_INTFL_CTS_CHANGE_POS 2
group-onsemi 0:098463de4c5d 138 #define MXC_F_UART_INTFL_CTS_CHANGE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_CTS_CHANGE_POS))
group-onsemi 0:098463de4c5d 139 #define MXC_F_UART_INTFL_RX_OVERRUN_POS 3
group-onsemi 0:098463de4c5d 140 #define MXC_F_UART_INTFL_RX_OVERRUN ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVERRUN_POS))
group-onsemi 0:098463de4c5d 141 #define MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS 4
group-onsemi 0:098463de4c5d 142 #define MXC_F_UART_INTFL_RX_OVER_THRESHOLD ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_OVER_THRESHOLD_POS))
group-onsemi 0:098463de4c5d 143 #define MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS 5
group-onsemi 0:098463de4c5d 144 #define MXC_F_UART_INTFL_TX_ALMOST_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_ALMOST_EMPTY_POS))
group-onsemi 0:098463de4c5d 145 #define MXC_F_UART_INTFL_TX_HALF_EMPTY_POS 6
group-onsemi 0:098463de4c5d 146 #define MXC_F_UART_INTFL_TX_HALF_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_HALF_EMPTY_POS))
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 #define MXC_F_UART_BAUD_INT_FBAUD_POS 0
group-onsemi 0:098463de4c5d 149 #define MXC_F_UART_BAUD_INT_FBAUD ((uint32_t)(0x00000FFFUL << MXC_F_UART_BAUD_INT_FBAUD_POS))
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 #define MXC_F_UART_BAUD_DIV_128_DIV_POS 0
group-onsemi 0:098463de4c5d 152 #define MXC_F_UART_BAUD_DIV_128_DIV ((uint32_t)(0x0000007FUL << MXC_F_UART_BAUD_DIV_128_DIV_POS))
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 #define MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS 0
group-onsemi 0:098463de4c5d 155 #define MXC_F_UART_TX_FIFO_OUT_TX_FIFO ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_FIFO_OUT_TX_FIFO_POS))
group-onsemi 0:098463de4c5d 156
group-onsemi 0:098463de4c5d 157 #define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS 0
group-onsemi 0:098463de4c5d 158 #define MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_CTS_INPUT_POS))
group-onsemi 0:098463de4c5d 159 #define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS 1
group-onsemi 0:098463de4c5d 160 #define MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT ((uint32_t)(0x00000001UL << MXC_F_UART_HW_FLOW_CTRL_RTS_OUTPUT_POS))
group-onsemi 0:098463de4c5d 161
group-onsemi 0:098463de4c5d 162 #define MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS 0
group-onsemi 0:098463de4c5d 163 #define MXC_F_UART_TX_RX_FIFO_FIFO_DATA ((uint32_t)(0x000000FFUL << MXC_F_UART_TX_RX_FIFO_FIFO_DATA_POS))
group-onsemi 0:098463de4c5d 164 #define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS 8
group-onsemi 0:098463de4c5d 165 #define MXC_F_UART_TX_RX_FIFO_PARITY_ERROR ((uint32_t)(0x00000001UL << MXC_F_UART_TX_RX_FIFO_PARITY_ERROR_POS))
group-onsemi 0:098463de4c5d 166
group-onsemi 0:098463de4c5d 167 #ifdef __cplusplus
group-onsemi 0:098463de4c5d 168 }
group-onsemi 0:098463de4c5d 169 #endif
group-onsemi 0:098463de4c5d 170
group-onsemi 0:098463de4c5d 171 /**
group-onsemi 0:098463de4c5d 172 * @}
group-onsemi 0:098463de4c5d 173 */
group-onsemi 0:098463de4c5d 174
group-onsemi 0:098463de4c5d 175 #endif /* _MXC_UART_REGS_H_ */