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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

features/unsupported/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* ----------------------------------------------------------------------------
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * $Date: 19. March 2015
group-onsemi 0:098463de4c5d 5 * $Revision: V.1.4.5
group-onsemi 0:098463de4c5d 6 *
group-onsemi 0:098463de4c5d 7 * Project: CMSIS DSP Library
group-onsemi 0:098463de4c5d 8 * Title: arm_q15_to_q31.c
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Description: Converts the elements of the Q15 vector to Q31 vector.
group-onsemi 0:098463de4c5d 11 *
group-onsemi 0:098463de4c5d 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 15 * modification, are permitted provided that the following conditions
group-onsemi 0:098463de4c5d 16 * are met:
group-onsemi 0:098463de4c5d 17 * - Redistributions of source code must retain the above copyright
group-onsemi 0:098463de4c5d 18 * notice, this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 19 * - Redistributions in binary form must reproduce the above copyright
group-onsemi 0:098463de4c5d 20 * notice, this list of conditions and the following disclaimer in
group-onsemi 0:098463de4c5d 21 * the documentation and/or other materials provided with the
group-onsemi 0:098463de4c5d 22 * distribution.
group-onsemi 0:098463de4c5d 23 * - Neither the name of ARM LIMITED nor the names of its contributors
group-onsemi 0:098463de4c5d 24 * may be used to endorse or promote products derived from this
group-onsemi 0:098463de4c5d 25 * software without specific prior written permission.
group-onsemi 0:098463de4c5d 26 *
group-onsemi 0:098463de4c5d 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
group-onsemi 0:098463de4c5d 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
group-onsemi 0:098463de4c5d 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
group-onsemi 0:098463de4c5d 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
group-onsemi 0:098463de4c5d 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
group-onsemi 0:098463de4c5d 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
group-onsemi 0:098463de4c5d 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
group-onsemi 0:098463de4c5d 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
group-onsemi 0:098463de4c5d 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
group-onsemi 0:098463de4c5d 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
group-onsemi 0:098463de4c5d 38 * POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 39 * ---------------------------------------------------------------------------- */
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include "arm_math.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**
group-onsemi 0:098463de4c5d 44 * @ingroup groupSupport
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 /**
group-onsemi 0:098463de4c5d 48 * @addtogroup q15_to_x
group-onsemi 0:098463de4c5d 49 * @{
group-onsemi 0:098463de4c5d 50 */
group-onsemi 0:098463de4c5d 51
group-onsemi 0:098463de4c5d 52 /**
group-onsemi 0:098463de4c5d 53 * @brief Converts the elements of the Q15 vector to Q31 vector.
group-onsemi 0:098463de4c5d 54 * @param[in] *pSrc points to the Q15 input vector
group-onsemi 0:098463de4c5d 55 * @param[out] *pDst points to the Q31 output vector
group-onsemi 0:098463de4c5d 56 * @param[in] blockSize length of the input vector
group-onsemi 0:098463de4c5d 57 * @return none.
group-onsemi 0:098463de4c5d 58 *
group-onsemi 0:098463de4c5d 59 * \par Description:
group-onsemi 0:098463de4c5d 60 *
group-onsemi 0:098463de4c5d 61 * The equation used for the conversion process is:
group-onsemi 0:098463de4c5d 62 *
group-onsemi 0:098463de4c5d 63 * <pre>
group-onsemi 0:098463de4c5d 64 * pDst[n] = (q31_t) pSrc[n] << 16; 0 <= n < blockSize.
group-onsemi 0:098463de4c5d 65 * </pre>
group-onsemi 0:098463de4c5d 66 *
group-onsemi 0:098463de4c5d 67 */
group-onsemi 0:098463de4c5d 68
group-onsemi 0:098463de4c5d 69
group-onsemi 0:098463de4c5d 70 void arm_q15_to_q31(
group-onsemi 0:098463de4c5d 71 q15_t * pSrc,
group-onsemi 0:098463de4c5d 72 q31_t * pDst,
group-onsemi 0:098463de4c5d 73 uint32_t blockSize)
group-onsemi 0:098463de4c5d 74 {
group-onsemi 0:098463de4c5d 75 q15_t *pIn = pSrc; /* Src pointer */
group-onsemi 0:098463de4c5d 76 uint32_t blkCnt; /* loop counter */
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 #ifndef ARM_MATH_CM0_FAMILY
group-onsemi 0:098463de4c5d 79
group-onsemi 0:098463de4c5d 80 /* Run the below code for Cortex-M4 and Cortex-M3 */
group-onsemi 0:098463de4c5d 81 q31_t in1, in2;
group-onsemi 0:098463de4c5d 82 q31_t out1, out2, out3, out4;
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 /*loop Unrolling */
group-onsemi 0:098463de4c5d 85 blkCnt = blockSize >> 2u;
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
group-onsemi 0:098463de4c5d 88 ** a second loop below computes the remaining 1 to 3 samples. */
group-onsemi 0:098463de4c5d 89 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 90 {
group-onsemi 0:098463de4c5d 91 /* C = (q31_t)A << 16 */
group-onsemi 0:098463de4c5d 92 /* convert from q15 to q31 and then store the results in the destination buffer */
group-onsemi 0:098463de4c5d 93 in1 = *__SIMD32(pIn)++;
group-onsemi 0:098463de4c5d 94 in2 = *__SIMD32(pIn)++;
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 #ifndef ARM_MATH_BIG_ENDIAN
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 /* extract lower 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 99 out1 = in1 << 16u;
group-onsemi 0:098463de4c5d 100 /* extract upper 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 101 out2 = in1 & 0xFFFF0000;
group-onsemi 0:098463de4c5d 102 /* extract lower 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 103 out3 = in2 << 16u;
group-onsemi 0:098463de4c5d 104 /* extract upper 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 105 out4 = in2 & 0xFFFF0000;
group-onsemi 0:098463de4c5d 106
group-onsemi 0:098463de4c5d 107 #else
group-onsemi 0:098463de4c5d 108
group-onsemi 0:098463de4c5d 109 /* extract upper 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 110 out1 = in1 & 0xFFFF0000;
group-onsemi 0:098463de4c5d 111 /* extract lower 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 112 out2 = in1 << 16u;
group-onsemi 0:098463de4c5d 113 /* extract upper 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 114 out3 = in2 & 0xFFFF0000;
group-onsemi 0:098463de4c5d 115 /* extract lower 16 bits to 32 bit result */
group-onsemi 0:098463de4c5d 116 out4 = in2 << 16u;
group-onsemi 0:098463de4c5d 117
group-onsemi 0:098463de4c5d 118 #endif // #ifndef ARM_MATH_BIG_ENDIAN
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 *pDst++ = out1;
group-onsemi 0:098463de4c5d 121 *pDst++ = out2;
group-onsemi 0:098463de4c5d 122 *pDst++ = out3;
group-onsemi 0:098463de4c5d 123 *pDst++ = out4;
group-onsemi 0:098463de4c5d 124
group-onsemi 0:098463de4c5d 125 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 126 blkCnt--;
group-onsemi 0:098463de4c5d 127 }
group-onsemi 0:098463de4c5d 128
group-onsemi 0:098463de4c5d 129 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
group-onsemi 0:098463de4c5d 130 ** No loop unrolling is used. */
group-onsemi 0:098463de4c5d 131 blkCnt = blockSize % 0x4u;
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133 #else
group-onsemi 0:098463de4c5d 134
group-onsemi 0:098463de4c5d 135 /* Run the below code for Cortex-M0 */
group-onsemi 0:098463de4c5d 136
group-onsemi 0:098463de4c5d 137 /* Loop over blockSize number of values */
group-onsemi 0:098463de4c5d 138 blkCnt = blockSize;
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
group-onsemi 0:098463de4c5d 141
group-onsemi 0:098463de4c5d 142 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 143 {
group-onsemi 0:098463de4c5d 144 /* C = (q31_t)A << 16 */
group-onsemi 0:098463de4c5d 145 /* convert from q15 to q31 and then store the results in the destination buffer */
group-onsemi 0:098463de4c5d 146 *pDst++ = (q31_t) * pIn++ << 16;
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 149 blkCnt--;
group-onsemi 0:098463de4c5d 150 }
group-onsemi 0:098463de4c5d 151
group-onsemi 0:098463de4c5d 152 }
group-onsemi 0:098463de4c5d 153
group-onsemi 0:098463de4c5d 154 /**
group-onsemi 0:098463de4c5d 155 * @} end of q15_to_x group
group-onsemi 0:098463de4c5d 156 */