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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

features/unsupported/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* ----------------------------------------------------------------------
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * $Date: 19. March 2015
group-onsemi 0:098463de4c5d 5 * $Revision: V.1.4.5
group-onsemi 0:098463de4c5d 6 *
group-onsemi 0:098463de4c5d 7 * Project: CMSIS DSP Library
group-onsemi 0:098463de4c5d 8 * Title: arm_mat_sub_f32.c
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Description: Floating-point matrix subtraction.
group-onsemi 0:098463de4c5d 11 *
group-onsemi 0:098463de4c5d 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 15 * modification, are permitted provided that the following conditions
group-onsemi 0:098463de4c5d 16 * are met:
group-onsemi 0:098463de4c5d 17 * - Redistributions of source code must retain the above copyright
group-onsemi 0:098463de4c5d 18 * notice, this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 19 * - Redistributions in binary form must reproduce the above copyright
group-onsemi 0:098463de4c5d 20 * notice, this list of conditions and the following disclaimer in
group-onsemi 0:098463de4c5d 21 * the documentation and/or other materials provided with the
group-onsemi 0:098463de4c5d 22 * distribution.
group-onsemi 0:098463de4c5d 23 * - Neither the name of ARM LIMITED nor the names of its contributors
group-onsemi 0:098463de4c5d 24 * may be used to endorse or promote products derived from this
group-onsemi 0:098463de4c5d 25 * software without specific prior written permission.
group-onsemi 0:098463de4c5d 26 *
group-onsemi 0:098463de4c5d 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
group-onsemi 0:098463de4c5d 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
group-onsemi 0:098463de4c5d 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
group-onsemi 0:098463de4c5d 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
group-onsemi 0:098463de4c5d 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
group-onsemi 0:098463de4c5d 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
group-onsemi 0:098463de4c5d 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
group-onsemi 0:098463de4c5d 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
group-onsemi 0:098463de4c5d 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
group-onsemi 0:098463de4c5d 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
group-onsemi 0:098463de4c5d 38 * POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 39 * -------------------------------------------------------------------- */
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include "arm_math.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**
group-onsemi 0:098463de4c5d 44 * @ingroup groupMatrix
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 /**
group-onsemi 0:098463de4c5d 48 * @defgroup MatrixSub Matrix Subtraction
group-onsemi 0:098463de4c5d 49 *
group-onsemi 0:098463de4c5d 50 * Subtract two matrices.
group-onsemi 0:098463de4c5d 51 * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
group-onsemi 0:098463de4c5d 52 *
group-onsemi 0:098463de4c5d 53 * The functions check to make sure that
group-onsemi 0:098463de4c5d 54 * <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
group-onsemi 0:098463de4c5d 55 * number of rows and columns.
group-onsemi 0:098463de4c5d 56 */
group-onsemi 0:098463de4c5d 57
group-onsemi 0:098463de4c5d 58 /**
group-onsemi 0:098463de4c5d 59 * @addtogroup MatrixSub
group-onsemi 0:098463de4c5d 60 * @{
group-onsemi 0:098463de4c5d 61 */
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 /**
group-onsemi 0:098463de4c5d 64 * @brief Floating-point matrix subtraction
group-onsemi 0:098463de4c5d 65 * @param[in] *pSrcA points to the first input matrix structure
group-onsemi 0:098463de4c5d 66 * @param[in] *pSrcB points to the second input matrix structure
group-onsemi 0:098463de4c5d 67 * @param[out] *pDst points to output matrix structure
group-onsemi 0:098463de4c5d 68 * @return The function returns either
group-onsemi 0:098463de4c5d 69 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
group-onsemi 0:098463de4c5d 70 */
group-onsemi 0:098463de4c5d 71
group-onsemi 0:098463de4c5d 72 arm_status arm_mat_sub_f32(
group-onsemi 0:098463de4c5d 73 const arm_matrix_instance_f32 * pSrcA,
group-onsemi 0:098463de4c5d 74 const arm_matrix_instance_f32 * pSrcB,
group-onsemi 0:098463de4c5d 75 arm_matrix_instance_f32 * pDst)
group-onsemi 0:098463de4c5d 76 {
group-onsemi 0:098463de4c5d 77 float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
group-onsemi 0:098463de4c5d 78 float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
group-onsemi 0:098463de4c5d 79 float32_t *pOut = pDst->pData; /* output data matrix pointer */
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 #ifndef ARM_MATH_CM0_FAMILY
group-onsemi 0:098463de4c5d 82
group-onsemi 0:098463de4c5d 83 float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */
group-onsemi 0:098463de4c5d 84
group-onsemi 0:098463de4c5d 85 #endif // #ifndef ARM_MATH_CM0_FAMILY
group-onsemi 0:098463de4c5d 86
group-onsemi 0:098463de4c5d 87 uint32_t numSamples; /* total number of elements in the matrix */
group-onsemi 0:098463de4c5d 88 uint32_t blkCnt; /* loop counters */
group-onsemi 0:098463de4c5d 89 arm_status status; /* status of matrix subtraction */
group-onsemi 0:098463de4c5d 90
group-onsemi 0:098463de4c5d 91 #ifdef ARM_MATH_MATRIX_CHECK
group-onsemi 0:098463de4c5d 92 /* Check for matrix mismatch condition */
group-onsemi 0:098463de4c5d 93 if((pSrcA->numRows != pSrcB->numRows) ||
group-onsemi 0:098463de4c5d 94 (pSrcA->numCols != pSrcB->numCols) ||
group-onsemi 0:098463de4c5d 95 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
group-onsemi 0:098463de4c5d 96 {
group-onsemi 0:098463de4c5d 97 /* Set status as ARM_MATH_SIZE_MISMATCH */
group-onsemi 0:098463de4c5d 98 status = ARM_MATH_SIZE_MISMATCH;
group-onsemi 0:098463de4c5d 99 }
group-onsemi 0:098463de4c5d 100 else
group-onsemi 0:098463de4c5d 101 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
group-onsemi 0:098463de4c5d 102 {
group-onsemi 0:098463de4c5d 103 /* Total number of samples in the input matrix */
group-onsemi 0:098463de4c5d 104 numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
group-onsemi 0:098463de4c5d 105
group-onsemi 0:098463de4c5d 106 #ifndef ARM_MATH_CM0_FAMILY
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 /* Run the below code for Cortex-M4 and Cortex-M3 */
group-onsemi 0:098463de4c5d 109
group-onsemi 0:098463de4c5d 110 /* Loop Unrolling */
group-onsemi 0:098463de4c5d 111 blkCnt = numSamples >> 2u;
group-onsemi 0:098463de4c5d 112
group-onsemi 0:098463de4c5d 113 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
group-onsemi 0:098463de4c5d 114 ** a second loop below computes the remaining 1 to 3 samples. */
group-onsemi 0:098463de4c5d 115 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 116 {
group-onsemi 0:098463de4c5d 117 /* C(m,n) = A(m,n) - B(m,n) */
group-onsemi 0:098463de4c5d 118 /* Subtract and then store the results in the destination buffer. */
group-onsemi 0:098463de4c5d 119 /* Read values from source A */
group-onsemi 0:098463de4c5d 120 inA1 = pIn1[0];
group-onsemi 0:098463de4c5d 121
group-onsemi 0:098463de4c5d 122 /* Read values from source B */
group-onsemi 0:098463de4c5d 123 inB1 = pIn2[0];
group-onsemi 0:098463de4c5d 124
group-onsemi 0:098463de4c5d 125 /* Read values from source A */
group-onsemi 0:098463de4c5d 126 inA2 = pIn1[1];
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 /* out = sourceA - sourceB */
group-onsemi 0:098463de4c5d 129 out1 = inA1 - inB1;
group-onsemi 0:098463de4c5d 130
group-onsemi 0:098463de4c5d 131 /* Read values from source B */
group-onsemi 0:098463de4c5d 132 inB2 = pIn2[1];
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 /* Read values from source A */
group-onsemi 0:098463de4c5d 135 inA1 = pIn1[2];
group-onsemi 0:098463de4c5d 136
group-onsemi 0:098463de4c5d 137 /* out = sourceA - sourceB */
group-onsemi 0:098463de4c5d 138 out2 = inA2 - inB2;
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 /* Read values from source B */
group-onsemi 0:098463de4c5d 141 inB1 = pIn2[2];
group-onsemi 0:098463de4c5d 142
group-onsemi 0:098463de4c5d 143 /* Store result in destination */
group-onsemi 0:098463de4c5d 144 pOut[0] = out1;
group-onsemi 0:098463de4c5d 145 pOut[1] = out2;
group-onsemi 0:098463de4c5d 146
group-onsemi 0:098463de4c5d 147 /* Read values from source A */
group-onsemi 0:098463de4c5d 148 inA2 = pIn1[3];
group-onsemi 0:098463de4c5d 149
group-onsemi 0:098463de4c5d 150 /* Read values from source B */
group-onsemi 0:098463de4c5d 151 inB2 = pIn2[3];
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153 /* out = sourceA - sourceB */
group-onsemi 0:098463de4c5d 154 out1 = inA1 - inB1;
group-onsemi 0:098463de4c5d 155
group-onsemi 0:098463de4c5d 156
group-onsemi 0:098463de4c5d 157 /* out = sourceA - sourceB */
group-onsemi 0:098463de4c5d 158 out2 = inA2 - inB2;
group-onsemi 0:098463de4c5d 159
group-onsemi 0:098463de4c5d 160 /* Store result in destination */
group-onsemi 0:098463de4c5d 161 pOut[2] = out1;
group-onsemi 0:098463de4c5d 162
group-onsemi 0:098463de4c5d 163 /* Store result in destination */
group-onsemi 0:098463de4c5d 164 pOut[3] = out2;
group-onsemi 0:098463de4c5d 165
group-onsemi 0:098463de4c5d 166
group-onsemi 0:098463de4c5d 167 /* update pointers to process next sampels */
group-onsemi 0:098463de4c5d 168 pIn1 += 4u;
group-onsemi 0:098463de4c5d 169 pIn2 += 4u;
group-onsemi 0:098463de4c5d 170 pOut += 4u;
group-onsemi 0:098463de4c5d 171
group-onsemi 0:098463de4c5d 172 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 173 blkCnt--;
group-onsemi 0:098463de4c5d 174 }
group-onsemi 0:098463de4c5d 175
group-onsemi 0:098463de4c5d 176 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
group-onsemi 0:098463de4c5d 177 ** No loop unrolling is used. */
group-onsemi 0:098463de4c5d 178 blkCnt = numSamples % 0x4u;
group-onsemi 0:098463de4c5d 179
group-onsemi 0:098463de4c5d 180 #else
group-onsemi 0:098463de4c5d 181
group-onsemi 0:098463de4c5d 182 /* Run the below code for Cortex-M0 */
group-onsemi 0:098463de4c5d 183
group-onsemi 0:098463de4c5d 184 /* Initialize blkCnt with number of samples */
group-onsemi 0:098463de4c5d 185 blkCnt = numSamples;
group-onsemi 0:098463de4c5d 186
group-onsemi 0:098463de4c5d 187 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
group-onsemi 0:098463de4c5d 188
group-onsemi 0:098463de4c5d 189 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 190 {
group-onsemi 0:098463de4c5d 191 /* C(m,n) = A(m,n) - B(m,n) */
group-onsemi 0:098463de4c5d 192 /* Subtract and then store the results in the destination buffer. */
group-onsemi 0:098463de4c5d 193 *pOut++ = (*pIn1++) - (*pIn2++);
group-onsemi 0:098463de4c5d 194
group-onsemi 0:098463de4c5d 195 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 196 blkCnt--;
group-onsemi 0:098463de4c5d 197 }
group-onsemi 0:098463de4c5d 198
group-onsemi 0:098463de4c5d 199 /* Set status as ARM_MATH_SUCCESS */
group-onsemi 0:098463de4c5d 200 status = ARM_MATH_SUCCESS;
group-onsemi 0:098463de4c5d 201 }
group-onsemi 0:098463de4c5d 202
group-onsemi 0:098463de4c5d 203 /* Return to application */
group-onsemi 0:098463de4c5d 204 return (status);
group-onsemi 0:098463de4c5d 205 }
group-onsemi 0:098463de4c5d 206
group-onsemi 0:098463de4c5d 207 /**
group-onsemi 0:098463de4c5d 208 * @} end of MatrixSub group
group-onsemi 0:098463de4c5d 209 */