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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

features/unsupported/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /* ----------------------------------------------------------------------
group-onsemi 0:098463de4c5d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * $Date: 19. March 2015
group-onsemi 0:098463de4c5d 5 * $Revision: V.1.4.5
group-onsemi 0:098463de4c5d 6 *
group-onsemi 0:098463de4c5d 7 * Project: CMSIS DSP Library
group-onsemi 0:098463de4c5d 8 * Title: arm_mat_add_q15.c
group-onsemi 0:098463de4c5d 9 *
group-onsemi 0:098463de4c5d 10 * Description: Q15 matrix addition
group-onsemi 0:098463de4c5d 11 *
group-onsemi 0:098463de4c5d 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
group-onsemi 0:098463de4c5d 13 *
group-onsemi 0:098463de4c5d 14 * Redistribution and use in source and binary forms, with or without
group-onsemi 0:098463de4c5d 15 * modification, are permitted provided that the following conditions
group-onsemi 0:098463de4c5d 16 * are met:
group-onsemi 0:098463de4c5d 17 * - Redistributions of source code must retain the above copyright
group-onsemi 0:098463de4c5d 18 * notice, this list of conditions and the following disclaimer.
group-onsemi 0:098463de4c5d 19 * - Redistributions in binary form must reproduce the above copyright
group-onsemi 0:098463de4c5d 20 * notice, this list of conditions and the following disclaimer in
group-onsemi 0:098463de4c5d 21 * the documentation and/or other materials provided with the
group-onsemi 0:098463de4c5d 22 * distribution.
group-onsemi 0:098463de4c5d 23 * - Neither the name of ARM LIMITED nor the names of its contributors
group-onsemi 0:098463de4c5d 24 * may be used to endorse or promote products derived from this
group-onsemi 0:098463de4c5d 25 * software without specific prior written permission.
group-onsemi 0:098463de4c5d 26 *
group-onsemi 0:098463de4c5d 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
group-onsemi 0:098463de4c5d 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
group-onsemi 0:098463de4c5d 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
group-onsemi 0:098463de4c5d 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
group-onsemi 0:098463de4c5d 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
group-onsemi 0:098463de4c5d 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
group-onsemi 0:098463de4c5d 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
group-onsemi 0:098463de4c5d 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
group-onsemi 0:098463de4c5d 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
group-onsemi 0:098463de4c5d 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
group-onsemi 0:098463de4c5d 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
group-onsemi 0:098463de4c5d 38 * POSSIBILITY OF SUCH DAMAGE.
group-onsemi 0:098463de4c5d 39 * -------------------------------------------------------------------- */
group-onsemi 0:098463de4c5d 40
group-onsemi 0:098463de4c5d 41 #include "arm_math.h"
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 /**
group-onsemi 0:098463de4c5d 44 * @ingroup groupMatrix
group-onsemi 0:098463de4c5d 45 */
group-onsemi 0:098463de4c5d 46
group-onsemi 0:098463de4c5d 47 /**
group-onsemi 0:098463de4c5d 48 * @addtogroup MatrixAdd
group-onsemi 0:098463de4c5d 49 * @{
group-onsemi 0:098463de4c5d 50 */
group-onsemi 0:098463de4c5d 51
group-onsemi 0:098463de4c5d 52 /**
group-onsemi 0:098463de4c5d 53 * @brief Q15 matrix addition.
group-onsemi 0:098463de4c5d 54 * @param[in] *pSrcA points to the first input matrix structure
group-onsemi 0:098463de4c5d 55 * @param[in] *pSrcB points to the second input matrix structure
group-onsemi 0:098463de4c5d 56 * @param[out] *pDst points to output matrix structure
group-onsemi 0:098463de4c5d 57 * @return The function returns either
group-onsemi 0:098463de4c5d 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
group-onsemi 0:098463de4c5d 59 *
group-onsemi 0:098463de4c5d 60 * <b>Scaling and Overflow Behavior:</b>
group-onsemi 0:098463de4c5d 61 * \par
group-onsemi 0:098463de4c5d 62 * The function uses saturating arithmetic.
group-onsemi 0:098463de4c5d 63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
group-onsemi 0:098463de4c5d 64 */
group-onsemi 0:098463de4c5d 65
group-onsemi 0:098463de4c5d 66 arm_status arm_mat_add_q15(
group-onsemi 0:098463de4c5d 67 const arm_matrix_instance_q15 * pSrcA,
group-onsemi 0:098463de4c5d 68 const arm_matrix_instance_q15 * pSrcB,
group-onsemi 0:098463de4c5d 69 arm_matrix_instance_q15 * pDst)
group-onsemi 0:098463de4c5d 70 {
group-onsemi 0:098463de4c5d 71 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
group-onsemi 0:098463de4c5d 72 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
group-onsemi 0:098463de4c5d 73 q15_t *pOut = pDst->pData; /* output data matrix pointer */
group-onsemi 0:098463de4c5d 74 uint16_t numSamples; /* total number of elements in the matrix */
group-onsemi 0:098463de4c5d 75 uint32_t blkCnt; /* loop counters */
group-onsemi 0:098463de4c5d 76 arm_status status; /* status of matrix addition */
group-onsemi 0:098463de4c5d 77
group-onsemi 0:098463de4c5d 78 #ifdef ARM_MATH_MATRIX_CHECK
group-onsemi 0:098463de4c5d 79
group-onsemi 0:098463de4c5d 80
group-onsemi 0:098463de4c5d 81 /* Check for matrix mismatch condition */
group-onsemi 0:098463de4c5d 82 if((pSrcA->numRows != pSrcB->numRows) ||
group-onsemi 0:098463de4c5d 83 (pSrcA->numCols != pSrcB->numCols) ||
group-onsemi 0:098463de4c5d 84 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
group-onsemi 0:098463de4c5d 85 {
group-onsemi 0:098463de4c5d 86 /* Set status as ARM_MATH_SIZE_MISMATCH */
group-onsemi 0:098463de4c5d 87 status = ARM_MATH_SIZE_MISMATCH;
group-onsemi 0:098463de4c5d 88 }
group-onsemi 0:098463de4c5d 89 else
group-onsemi 0:098463de4c5d 90 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
group-onsemi 0:098463de4c5d 91
group-onsemi 0:098463de4c5d 92 {
group-onsemi 0:098463de4c5d 93 /* Total number of samples in the input matrix */
group-onsemi 0:098463de4c5d 94 numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
group-onsemi 0:098463de4c5d 95
group-onsemi 0:098463de4c5d 96 #ifndef ARM_MATH_CM0_FAMILY
group-onsemi 0:098463de4c5d 97
group-onsemi 0:098463de4c5d 98 /* Run the below code for Cortex-M4 and Cortex-M3 */
group-onsemi 0:098463de4c5d 99
group-onsemi 0:098463de4c5d 100 /* Loop unrolling */
group-onsemi 0:098463de4c5d 101 blkCnt = (uint32_t) numSamples >> 2u;
group-onsemi 0:098463de4c5d 102
group-onsemi 0:098463de4c5d 103 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
group-onsemi 0:098463de4c5d 104 ** a second loop below computes the remaining 1 to 3 samples. */
group-onsemi 0:098463de4c5d 105 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 106 {
group-onsemi 0:098463de4c5d 107 /* C(m,n) = A(m,n) + B(m,n) */
group-onsemi 0:098463de4c5d 108 /* Add, Saturate and then store the results in the destination buffer. */
group-onsemi 0:098463de4c5d 109 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
group-onsemi 0:098463de4c5d 110 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
group-onsemi 0:098463de4c5d 111
group-onsemi 0:098463de4c5d 112 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 113 blkCnt--;
group-onsemi 0:098463de4c5d 114 }
group-onsemi 0:098463de4c5d 115
group-onsemi 0:098463de4c5d 116 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
group-onsemi 0:098463de4c5d 117 ** No loop unrolling is used. */
group-onsemi 0:098463de4c5d 118 blkCnt = (uint32_t) numSamples % 0x4u;
group-onsemi 0:098463de4c5d 119
group-onsemi 0:098463de4c5d 120 /* q15 pointers of input and output are initialized */
group-onsemi 0:098463de4c5d 121
group-onsemi 0:098463de4c5d 122 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 123 {
group-onsemi 0:098463de4c5d 124 /* C(m,n) = A(m,n) + B(m,n) */
group-onsemi 0:098463de4c5d 125 /* Add, Saturate and then store the results in the destination buffer. */
group-onsemi 0:098463de4c5d 126 *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
group-onsemi 0:098463de4c5d 127
group-onsemi 0:098463de4c5d 128 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 129 blkCnt--;
group-onsemi 0:098463de4c5d 130 }
group-onsemi 0:098463de4c5d 131
group-onsemi 0:098463de4c5d 132 #else
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 /* Run the below code for Cortex-M0 */
group-onsemi 0:098463de4c5d 135
group-onsemi 0:098463de4c5d 136 /* Initialize blkCnt with number of samples */
group-onsemi 0:098463de4c5d 137 blkCnt = (uint32_t) numSamples;
group-onsemi 0:098463de4c5d 138
group-onsemi 0:098463de4c5d 139
group-onsemi 0:098463de4c5d 140 /* q15 pointers of input and output are initialized */
group-onsemi 0:098463de4c5d 141 while(blkCnt > 0u)
group-onsemi 0:098463de4c5d 142 {
group-onsemi 0:098463de4c5d 143 /* C(m,n) = A(m,n) + B(m,n) */
group-onsemi 0:098463de4c5d 144 /* Add, Saturate and then store the results in the destination buffer. */
group-onsemi 0:098463de4c5d 145 *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
group-onsemi 0:098463de4c5d 146
group-onsemi 0:098463de4c5d 147 /* Decrement the loop counter */
group-onsemi 0:098463de4c5d 148 blkCnt--;
group-onsemi 0:098463de4c5d 149 }
group-onsemi 0:098463de4c5d 150
group-onsemi 0:098463de4c5d 151 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
group-onsemi 0:098463de4c5d 152
group-onsemi 0:098463de4c5d 153 /* set status as ARM_MATH_SUCCESS */
group-onsemi 0:098463de4c5d 154 status = ARM_MATH_SUCCESS;
group-onsemi 0:098463de4c5d 155 }
group-onsemi 0:098463de4c5d 156
group-onsemi 0:098463de4c5d 157 /* Return to application */
group-onsemi 0:098463de4c5d 158 return (status);
group-onsemi 0:098463de4c5d 159 }
group-onsemi 0:098463de4c5d 160
group-onsemi 0:098463de4c5d 161 /**
group-onsemi 0:098463de4c5d 162 * @} end of MatrixAdd group
group-onsemi 0:098463de4c5d 163 */