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Dependents:   mbed-TFT-example-NCS36510 mbed-Accelerometer-example-NCS36510 mbed-Accelerometer-example-NCS36510

features/mbedtls/src/aesni.c@0:098463de4c5d, 2017-01-25 (annotated)

Committer:
group-onsemi
Date:
Wed Jan 25 20:34:15 2017 +0000
Revision:
0:098463de4c5d
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
group-onsemi 0:098463de4c5d 1 /*
group-onsemi 0:098463de4c5d 2 * AES-NI support functions
group-onsemi 0:098463de4c5d 3 *
group-onsemi 0:098463de4c5d 4 * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
group-onsemi 0:098463de4c5d 5 * SPDX-License-Identifier: Apache-2.0
group-onsemi 0:098463de4c5d 6 *
group-onsemi 0:098463de4c5d 7 * Licensed under the Apache License, Version 2.0 (the "License"); you may
group-onsemi 0:098463de4c5d 8 * not use this file except in compliance with the License.
group-onsemi 0:098463de4c5d 9 * You may obtain a copy of the License at
group-onsemi 0:098463de4c5d 10 *
group-onsemi 0:098463de4c5d 11 * http://www.apache.org/licenses/LICENSE-2.0
group-onsemi 0:098463de4c5d 12 *
group-onsemi 0:098463de4c5d 13 * Unless required by applicable law or agreed to in writing, software
group-onsemi 0:098463de4c5d 14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
group-onsemi 0:098463de4c5d 15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
group-onsemi 0:098463de4c5d 16 * See the License for the specific language governing permissions and
group-onsemi 0:098463de4c5d 17 * limitations under the License.
group-onsemi 0:098463de4c5d 18 *
group-onsemi 0:098463de4c5d 19 * This file is part of mbed TLS (https://tls.mbed.org)
group-onsemi 0:098463de4c5d 20 */
group-onsemi 0:098463de4c5d 21
group-onsemi 0:098463de4c5d 22 /*
group-onsemi 0:098463de4c5d 23 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
group-onsemi 0:098463de4c5d 24 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
group-onsemi 0:098463de4c5d 25 */
group-onsemi 0:098463de4c5d 26
group-onsemi 0:098463de4c5d 27 #if !defined(MBEDTLS_CONFIG_FILE)
group-onsemi 0:098463de4c5d 28 #include "mbedtls/config.h"
group-onsemi 0:098463de4c5d 29 #else
group-onsemi 0:098463de4c5d 30 #include MBEDTLS_CONFIG_FILE
group-onsemi 0:098463de4c5d 31 #endif
group-onsemi 0:098463de4c5d 32
group-onsemi 0:098463de4c5d 33 #if defined(MBEDTLS_AESNI_C)
group-onsemi 0:098463de4c5d 34
group-onsemi 0:098463de4c5d 35 #include "mbedtls/aesni.h"
group-onsemi 0:098463de4c5d 36
group-onsemi 0:098463de4c5d 37 #include <string.h>
group-onsemi 0:098463de4c5d 38
group-onsemi 0:098463de4c5d 39 #ifndef asm
group-onsemi 0:098463de4c5d 40 #define asm __asm
group-onsemi 0:098463de4c5d 41 #endif
group-onsemi 0:098463de4c5d 42
group-onsemi 0:098463de4c5d 43 #if defined(MBEDTLS_HAVE_X86_64)
group-onsemi 0:098463de4c5d 44
group-onsemi 0:098463de4c5d 45 /*
group-onsemi 0:098463de4c5d 46 * AES-NI support detection routine
group-onsemi 0:098463de4c5d 47 */
group-onsemi 0:098463de4c5d 48 int mbedtls_aesni_has_support( unsigned int what )
group-onsemi 0:098463de4c5d 49 {
group-onsemi 0:098463de4c5d 50 static int done = 0;
group-onsemi 0:098463de4c5d 51 static unsigned int c = 0;
group-onsemi 0:098463de4c5d 52
group-onsemi 0:098463de4c5d 53 if( ! done )
group-onsemi 0:098463de4c5d 54 {
group-onsemi 0:098463de4c5d 55 asm( "movl $1, %%eax \n\t"
group-onsemi 0:098463de4c5d 56 "cpuid \n\t"
group-onsemi 0:098463de4c5d 57 : "=c" (c)
group-onsemi 0:098463de4c5d 58 :
group-onsemi 0:098463de4c5d 59 : "eax", "ebx", "edx" );
group-onsemi 0:098463de4c5d 60 done = 1;
group-onsemi 0:098463de4c5d 61 }
group-onsemi 0:098463de4c5d 62
group-onsemi 0:098463de4c5d 63 return( ( c & what ) != 0 );
group-onsemi 0:098463de4c5d 64 }
group-onsemi 0:098463de4c5d 65
group-onsemi 0:098463de4c5d 66 /*
group-onsemi 0:098463de4c5d 67 * Binutils needs to be at least 2.19 to support AES-NI instructions.
group-onsemi 0:098463de4c5d 68 * Unfortunately, a lot of users have a lower version now (2014-04).
group-onsemi 0:098463de4c5d 69 * Emit bytecode directly in order to support "old" version of gas.
group-onsemi 0:098463de4c5d 70 *
group-onsemi 0:098463de4c5d 71 * Opcodes from the Intel architecture reference manual, vol. 3.
group-onsemi 0:098463de4c5d 72 * We always use registers, so we don't need prefixes for memory operands.
group-onsemi 0:098463de4c5d 73 * Operand macros are in gas order (src, dst) as opposed to Intel order
group-onsemi 0:098463de4c5d 74 * (dst, src) in order to blend better into the surrounding assembly code.
group-onsemi 0:098463de4c5d 75 */
group-onsemi 0:098463de4c5d 76 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
group-onsemi 0:098463de4c5d 77 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
group-onsemi 0:098463de4c5d 78 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
group-onsemi 0:098463de4c5d 79 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
group-onsemi 0:098463de4c5d 80 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
group-onsemi 0:098463de4c5d 81 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
group-onsemi 0:098463de4c5d 82 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
group-onsemi 0:098463de4c5d 83
group-onsemi 0:098463de4c5d 84 #define xmm0_xmm0 "0xC0"
group-onsemi 0:098463de4c5d 85 #define xmm0_xmm1 "0xC8"
group-onsemi 0:098463de4c5d 86 #define xmm0_xmm2 "0xD0"
group-onsemi 0:098463de4c5d 87 #define xmm0_xmm3 "0xD8"
group-onsemi 0:098463de4c5d 88 #define xmm0_xmm4 "0xE0"
group-onsemi 0:098463de4c5d 89 #define xmm1_xmm0 "0xC1"
group-onsemi 0:098463de4c5d 90 #define xmm1_xmm2 "0xD1"
group-onsemi 0:098463de4c5d 91
group-onsemi 0:098463de4c5d 92 /*
group-onsemi 0:098463de4c5d 93 * AES-NI AES-ECB block en(de)cryption
group-onsemi 0:098463de4c5d 94 */
group-onsemi 0:098463de4c5d 95 int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx,
group-onsemi 0:098463de4c5d 96 int mode,
group-onsemi 0:098463de4c5d 97 const unsigned char input[16],
group-onsemi 0:098463de4c5d 98 unsigned char output[16] )
group-onsemi 0:098463de4c5d 99 {
group-onsemi 0:098463de4c5d 100 asm( "movdqu (%3), %%xmm0 \n\t" // load input
group-onsemi 0:098463de4c5d 101 "movdqu (%1), %%xmm1 \n\t" // load round key 0
group-onsemi 0:098463de4c5d 102 "pxor %%xmm1, %%xmm0 \n\t" // round 0
group-onsemi 0:098463de4c5d 103 "add $16, %1 \n\t" // point to next round key
group-onsemi 0:098463de4c5d 104 "subl $1, %0 \n\t" // normal rounds = nr - 1
group-onsemi 0:098463de4c5d 105 "test %2, %2 \n\t" // mode?
group-onsemi 0:098463de4c5d 106 "jz 2f \n\t" // 0 = decrypt
group-onsemi 0:098463de4c5d 107
group-onsemi 0:098463de4c5d 108 "1: \n\t" // encryption loop
group-onsemi 0:098463de4c5d 109 "movdqu (%1), %%xmm1 \n\t" // load round key
group-onsemi 0:098463de4c5d 110 AESENC xmm1_xmm0 "\n\t" // do round
group-onsemi 0:098463de4c5d 111 "add $16, %1 \n\t" // point to next round key
group-onsemi 0:098463de4c5d 112 "subl $1, %0 \n\t" // loop
group-onsemi 0:098463de4c5d 113 "jnz 1b \n\t"
group-onsemi 0:098463de4c5d 114 "movdqu (%1), %%xmm1 \n\t" // load round key
group-onsemi 0:098463de4c5d 115 AESENCLAST xmm1_xmm0 "\n\t" // last round
group-onsemi 0:098463de4c5d 116 "jmp 3f \n\t"
group-onsemi 0:098463de4c5d 117
group-onsemi 0:098463de4c5d 118 "2: \n\t" // decryption loop
group-onsemi 0:098463de4c5d 119 "movdqu (%1), %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 120 AESDEC xmm1_xmm0 "\n\t" // do round
group-onsemi 0:098463de4c5d 121 "add $16, %1 \n\t"
group-onsemi 0:098463de4c5d 122 "subl $1, %0 \n\t"
group-onsemi 0:098463de4c5d 123 "jnz 2b \n\t"
group-onsemi 0:098463de4c5d 124 "movdqu (%1), %%xmm1 \n\t" // load round key
group-onsemi 0:098463de4c5d 125 AESDECLAST xmm1_xmm0 "\n\t" // last round
group-onsemi 0:098463de4c5d 126
group-onsemi 0:098463de4c5d 127 "3: \n\t"
group-onsemi 0:098463de4c5d 128 "movdqu %%xmm0, (%4) \n\t" // export output
group-onsemi 0:098463de4c5d 129 :
group-onsemi 0:098463de4c5d 130 : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output)
group-onsemi 0:098463de4c5d 131 : "memory", "cc", "xmm0", "xmm1" );
group-onsemi 0:098463de4c5d 132
group-onsemi 0:098463de4c5d 133
group-onsemi 0:098463de4c5d 134 return( 0 );
group-onsemi 0:098463de4c5d 135 }
group-onsemi 0:098463de4c5d 136
group-onsemi 0:098463de4c5d 137 /*
group-onsemi 0:098463de4c5d 138 * GCM multiplication: c = a times b in GF(2^128)
group-onsemi 0:098463de4c5d 139 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
group-onsemi 0:098463de4c5d 140 */
group-onsemi 0:098463de4c5d 141 void mbedtls_aesni_gcm_mult( unsigned char c[16],
group-onsemi 0:098463de4c5d 142 const unsigned char a[16],
group-onsemi 0:098463de4c5d 143 const unsigned char b[16] )
group-onsemi 0:098463de4c5d 144 {
group-onsemi 0:098463de4c5d 145 unsigned char aa[16], bb[16], cc[16];
group-onsemi 0:098463de4c5d 146 size_t i;
group-onsemi 0:098463de4c5d 147
group-onsemi 0:098463de4c5d 148 /* The inputs are in big-endian order, so byte-reverse them */
group-onsemi 0:098463de4c5d 149 for( i = 0; i < 16; i++ )
group-onsemi 0:098463de4c5d 150 {
group-onsemi 0:098463de4c5d 151 aa[i] = a[15 - i];
group-onsemi 0:098463de4c5d 152 bb[i] = b[15 - i];
group-onsemi 0:098463de4c5d 153 }
group-onsemi 0:098463de4c5d 154
group-onsemi 0:098463de4c5d 155 asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0
group-onsemi 0:098463de4c5d 156 "movdqu (%1), %%xmm1 \n\t" // b1:b0
group-onsemi 0:098463de4c5d 157
group-onsemi 0:098463de4c5d 158 /*
group-onsemi 0:098463de4c5d 159 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
group-onsemi 0:098463de4c5d 160 * using [CLMUL-WP] algorithm 1 (p. 13).
group-onsemi 0:098463de4c5d 161 */
group-onsemi 0:098463de4c5d 162 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
group-onsemi 0:098463de4c5d 163 "movdqa %%xmm1, %%xmm3 \n\t" // same
group-onsemi 0:098463de4c5d 164 "movdqa %%xmm1, %%xmm4 \n\t" // same
group-onsemi 0:098463de4c5d 165 PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0
group-onsemi 0:098463de4c5d 166 PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0
group-onsemi 0:098463de4c5d 167 PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0
group-onsemi 0:098463de4c5d 168 PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0
group-onsemi 0:098463de4c5d 169 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
group-onsemi 0:098463de4c5d 170 "movdqa %%xmm4, %%xmm3 \n\t" // same
group-onsemi 0:098463de4c5d 171 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
group-onsemi 0:098463de4c5d 172 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
group-onsemi 0:098463de4c5d 173 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
group-onsemi 0:098463de4c5d 174 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
group-onsemi 0:098463de4c5d 175
group-onsemi 0:098463de4c5d 176 /*
group-onsemi 0:098463de4c5d 177 * Now shift the result one bit to the left,
group-onsemi 0:098463de4c5d 178 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
group-onsemi 0:098463de4c5d 179 */
group-onsemi 0:098463de4c5d 180 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
group-onsemi 0:098463de4c5d 181 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
group-onsemi 0:098463de4c5d 182 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
group-onsemi 0:098463de4c5d 183 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
group-onsemi 0:098463de4c5d 184 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
group-onsemi 0:098463de4c5d 185 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
group-onsemi 0:098463de4c5d 186 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
group-onsemi 0:098463de4c5d 187 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
group-onsemi 0:098463de4c5d 188 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
group-onsemi 0:098463de4c5d 189 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
group-onsemi 0:098463de4c5d 190 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
group-onsemi 0:098463de4c5d 191 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
group-onsemi 0:098463de4c5d 192 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
group-onsemi 0:098463de4c5d 193
group-onsemi 0:098463de4c5d 194 /*
group-onsemi 0:098463de4c5d 195 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
group-onsemi 0:098463de4c5d 196 * using [CLMUL-WP] algorithm 5 (p. 20).
group-onsemi 0:098463de4c5d 197 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
group-onsemi 0:098463de4c5d 198 */
group-onsemi 0:098463de4c5d 199 /* Step 2 (1) */
group-onsemi 0:098463de4c5d 200 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
group-onsemi 0:098463de4c5d 201 "movdqa %%xmm1, %%xmm4 \n\t" // same
group-onsemi 0:098463de4c5d 202 "movdqa %%xmm1, %%xmm5 \n\t" // same
group-onsemi 0:098463de4c5d 203 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
group-onsemi 0:098463de4c5d 204 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
group-onsemi 0:098463de4c5d 205 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
group-onsemi 0:098463de4c5d 206
group-onsemi 0:098463de4c5d 207 /* Step 2 (2) */
group-onsemi 0:098463de4c5d 208 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
group-onsemi 0:098463de4c5d 209 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
group-onsemi 0:098463de4c5d 210 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
group-onsemi 0:098463de4c5d 211 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
group-onsemi 0:098463de4c5d 212
group-onsemi 0:098463de4c5d 213 /* Steps 3 and 4 */
group-onsemi 0:098463de4c5d 214 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
group-onsemi 0:098463de4c5d 215 "movdqa %%xmm1,%%xmm4 \n\t" // same
group-onsemi 0:098463de4c5d 216 "movdqa %%xmm1,%%xmm5 \n\t" // same
group-onsemi 0:098463de4c5d 217 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
group-onsemi 0:098463de4c5d 218 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
group-onsemi 0:098463de4c5d 219 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
group-onsemi 0:098463de4c5d 220 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
group-onsemi 0:098463de4c5d 221 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
group-onsemi 0:098463de4c5d 222 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
group-onsemi 0:098463de4c5d 223 // bits carried from d. Now get those\t bits back in.
group-onsemi 0:098463de4c5d 224 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
group-onsemi 0:098463de4c5d 225 "movdqa %%xmm1,%%xmm4 \n\t" // same
group-onsemi 0:098463de4c5d 226 "movdqa %%xmm1,%%xmm5 \n\t" // same
group-onsemi 0:098463de4c5d 227 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
group-onsemi 0:098463de4c5d 228 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
group-onsemi 0:098463de4c5d 229 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
group-onsemi 0:098463de4c5d 230 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
group-onsemi 0:098463de4c5d 231 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
group-onsemi 0:098463de4c5d 232 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
group-onsemi 0:098463de4c5d 233 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
group-onsemi 0:098463de4c5d 234 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
group-onsemi 0:098463de4c5d 235 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
group-onsemi 0:098463de4c5d 236
group-onsemi 0:098463de4c5d 237 "movdqu %%xmm0, (%2) \n\t" // done
group-onsemi 0:098463de4c5d 238 :
group-onsemi 0:098463de4c5d 239 : "r" (aa), "r" (bb), "r" (cc)
group-onsemi 0:098463de4c5d 240 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
group-onsemi 0:098463de4c5d 241
group-onsemi 0:098463de4c5d 242 /* Now byte-reverse the outputs */
group-onsemi 0:098463de4c5d 243 for( i = 0; i < 16; i++ )
group-onsemi 0:098463de4c5d 244 c[i] = cc[15 - i];
group-onsemi 0:098463de4c5d 245
group-onsemi 0:098463de4c5d 246 return;
group-onsemi 0:098463de4c5d 247 }
group-onsemi 0:098463de4c5d 248
group-onsemi 0:098463de4c5d 249 /*
group-onsemi 0:098463de4c5d 250 * Compute decryption round keys from encryption round keys
group-onsemi 0:098463de4c5d 251 */
group-onsemi 0:098463de4c5d 252 void mbedtls_aesni_inverse_key( unsigned char *invkey,
group-onsemi 0:098463de4c5d 253 const unsigned char *fwdkey, int nr )
group-onsemi 0:098463de4c5d 254 {
group-onsemi 0:098463de4c5d 255 unsigned char *ik = invkey;
group-onsemi 0:098463de4c5d 256 const unsigned char *fk = fwdkey + 16 * nr;
group-onsemi 0:098463de4c5d 257
group-onsemi 0:098463de4c5d 258 memcpy( ik, fk, 16 );
group-onsemi 0:098463de4c5d 259
group-onsemi 0:098463de4c5d 260 for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 )
group-onsemi 0:098463de4c5d 261 asm( "movdqu (%0), %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 262 AESIMC xmm0_xmm0 "\n\t"
group-onsemi 0:098463de4c5d 263 "movdqu %%xmm0, (%1) \n\t"
group-onsemi 0:098463de4c5d 264 :
group-onsemi 0:098463de4c5d 265 : "r" (fk), "r" (ik)
group-onsemi 0:098463de4c5d 266 : "memory", "xmm0" );
group-onsemi 0:098463de4c5d 267
group-onsemi 0:098463de4c5d 268 memcpy( ik, fk, 16 );
group-onsemi 0:098463de4c5d 269 }
group-onsemi 0:098463de4c5d 270
group-onsemi 0:098463de4c5d 271 /*
group-onsemi 0:098463de4c5d 272 * Key expansion, 128-bit case
group-onsemi 0:098463de4c5d 273 */
group-onsemi 0:098463de4c5d 274 static void aesni_setkey_enc_128( unsigned char *rk,
group-onsemi 0:098463de4c5d 275 const unsigned char *key )
group-onsemi 0:098463de4c5d 276 {
group-onsemi 0:098463de4c5d 277 asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key
group-onsemi 0:098463de4c5d 278 "movdqu %%xmm0, (%0) \n\t" // as round key 0
group-onsemi 0:098463de4c5d 279 "jmp 2f \n\t" // skip auxiliary routine
group-onsemi 0:098463de4c5d 280
group-onsemi 0:098463de4c5d 281 /*
group-onsemi 0:098463de4c5d 282 * Finish generating the next round key.
group-onsemi 0:098463de4c5d 283 *
group-onsemi 0:098463de4c5d 284 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
group-onsemi 0:098463de4c5d 285 * with X = rot( sub( r3 ) ) ^ RCON.
group-onsemi 0:098463de4c5d 286 *
group-onsemi 0:098463de4c5d 287 * On exit, xmm0 is r7:r6:r5:r4
group-onsemi 0:098463de4c5d 288 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
group-onsemi 0:098463de4c5d 289 * and those are written to the round key buffer.
group-onsemi 0:098463de4c5d 290 */
group-onsemi 0:098463de4c5d 291 "1: \n\t"
group-onsemi 0:098463de4c5d 292 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
group-onsemi 0:098463de4c5d 293 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
group-onsemi 0:098463de4c5d 294 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
group-onsemi 0:098463de4c5d 295 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
group-onsemi 0:098463de4c5d 296 "pslldq $4, %%xmm0 \n\t" // etc
group-onsemi 0:098463de4c5d 297 "pxor %%xmm0, %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 298 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 299 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
group-onsemi 0:098463de4c5d 300 "add $16, %0 \n\t" // point to next round key
group-onsemi 0:098463de4c5d 301 "movdqu %%xmm0, (%0) \n\t" // write it
group-onsemi 0:098463de4c5d 302 "ret \n\t"
group-onsemi 0:098463de4c5d 303
group-onsemi 0:098463de4c5d 304 /* Main "loop" */
group-onsemi 0:098463de4c5d 305 "2: \n\t"
group-onsemi 0:098463de4c5d 306 AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 307 AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 308 AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 309 AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 310 AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 311 AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 312 AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 313 AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 314 AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 315 AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 316 :
group-onsemi 0:098463de4c5d 317 : "r" (rk), "r" (key)
group-onsemi 0:098463de4c5d 318 : "memory", "cc", "0" );
group-onsemi 0:098463de4c5d 319 }
group-onsemi 0:098463de4c5d 320
group-onsemi 0:098463de4c5d 321 /*
group-onsemi 0:098463de4c5d 322 * Key expansion, 192-bit case
group-onsemi 0:098463de4c5d 323 */
group-onsemi 0:098463de4c5d 324 static void aesni_setkey_enc_192( unsigned char *rk,
group-onsemi 0:098463de4c5d 325 const unsigned char *key )
group-onsemi 0:098463de4c5d 326 {
group-onsemi 0:098463de4c5d 327 asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key
group-onsemi 0:098463de4c5d 328 "movdqu %%xmm0, (%0) \n\t"
group-onsemi 0:098463de4c5d 329 "add $16, %0 \n\t"
group-onsemi 0:098463de4c5d 330 "movq 16(%1), %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 331 "movq %%xmm1, (%0) \n\t"
group-onsemi 0:098463de4c5d 332 "add $8, %0 \n\t"
group-onsemi 0:098463de4c5d 333 "jmp 2f \n\t" // skip auxiliary routine
group-onsemi 0:098463de4c5d 334
group-onsemi 0:098463de4c5d 335 /*
group-onsemi 0:098463de4c5d 336 * Finish generating the next 6 quarter-keys.
group-onsemi 0:098463de4c5d 337 *
group-onsemi 0:098463de4c5d 338 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
group-onsemi 0:098463de4c5d 339 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
group-onsemi 0:098463de4c5d 340 *
group-onsemi 0:098463de4c5d 341 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
group-onsemi 0:098463de4c5d 342 * and those are written to the round key buffer.
group-onsemi 0:098463de4c5d 343 */
group-onsemi 0:098463de4c5d 344 "1: \n\t"
group-onsemi 0:098463de4c5d 345 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
group-onsemi 0:098463de4c5d 346 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
group-onsemi 0:098463de4c5d 347 "pslldq $4, %%xmm0 \n\t" // etc
group-onsemi 0:098463de4c5d 348 "pxor %%xmm0, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 349 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 350 "pxor %%xmm0, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 351 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 352 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
group-onsemi 0:098463de4c5d 353 "movdqu %%xmm0, (%0) \n\t"
group-onsemi 0:098463de4c5d 354 "add $16, %0 \n\t"
group-onsemi 0:098463de4c5d 355 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
group-onsemi 0:098463de4c5d 356 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
group-onsemi 0:098463de4c5d 357 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
group-onsemi 0:098463de4c5d 358 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
group-onsemi 0:098463de4c5d 359 "movq %%xmm1, (%0) \n\t"
group-onsemi 0:098463de4c5d 360 "add $8, %0 \n\t"
group-onsemi 0:098463de4c5d 361 "ret \n\t"
group-onsemi 0:098463de4c5d 362
group-onsemi 0:098463de4c5d 363 "2: \n\t"
group-onsemi 0:098463de4c5d 364 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 365 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 366 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 367 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 368 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 369 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 370 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 371 AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 372
group-onsemi 0:098463de4c5d 373 :
group-onsemi 0:098463de4c5d 374 : "r" (rk), "r" (key)
group-onsemi 0:098463de4c5d 375 : "memory", "cc", "0" );
group-onsemi 0:098463de4c5d 376 }
group-onsemi 0:098463de4c5d 377
group-onsemi 0:098463de4c5d 378 /*
group-onsemi 0:098463de4c5d 379 * Key expansion, 256-bit case
group-onsemi 0:098463de4c5d 380 */
group-onsemi 0:098463de4c5d 381 static void aesni_setkey_enc_256( unsigned char *rk,
group-onsemi 0:098463de4c5d 382 const unsigned char *key )
group-onsemi 0:098463de4c5d 383 {
group-onsemi 0:098463de4c5d 384 asm( "movdqu (%1), %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 385 "movdqu %%xmm0, (%0) \n\t"
group-onsemi 0:098463de4c5d 386 "add $16, %0 \n\t"
group-onsemi 0:098463de4c5d 387 "movdqu 16(%1), %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 388 "movdqu %%xmm1, (%0) \n\t"
group-onsemi 0:098463de4c5d 389 "jmp 2f \n\t" // skip auxiliary routine
group-onsemi 0:098463de4c5d 390
group-onsemi 0:098463de4c5d 391 /*
group-onsemi 0:098463de4c5d 392 * Finish generating the next two round keys.
group-onsemi 0:098463de4c5d 393 *
group-onsemi 0:098463de4c5d 394 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
group-onsemi 0:098463de4c5d 395 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
group-onsemi 0:098463de4c5d 396 *
group-onsemi 0:098463de4c5d 397 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
group-onsemi 0:098463de4c5d 398 * and those have been written to the output buffer.
group-onsemi 0:098463de4c5d 399 */
group-onsemi 0:098463de4c5d 400 "1: \n\t"
group-onsemi 0:098463de4c5d 401 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 402 "pxor %%xmm0, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 403 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 404 "pxor %%xmm0, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 405 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 406 "pxor %%xmm0, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 407 "pslldq $4, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 408 "pxor %%xmm2, %%xmm0 \n\t"
group-onsemi 0:098463de4c5d 409 "add $16, %0 \n\t"
group-onsemi 0:098463de4c5d 410 "movdqu %%xmm0, (%0) \n\t"
group-onsemi 0:098463de4c5d 411
group-onsemi 0:098463de4c5d 412 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
group-onsemi 0:098463de4c5d 413 * and proceed to generate next round key from there */
group-onsemi 0:098463de4c5d 414 AESKEYGENA xmm0_xmm2 ",0x00 \n\t"
group-onsemi 0:098463de4c5d 415 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 416 "pxor %%xmm1, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 417 "pslldq $4, %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 418 "pxor %%xmm1, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 419 "pslldq $4, %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 420 "pxor %%xmm1, %%xmm2 \n\t"
group-onsemi 0:098463de4c5d 421 "pslldq $4, %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 422 "pxor %%xmm2, %%xmm1 \n\t"
group-onsemi 0:098463de4c5d 423 "add $16, %0 \n\t"
group-onsemi 0:098463de4c5d 424 "movdqu %%xmm1, (%0) \n\t"
group-onsemi 0:098463de4c5d 425 "ret \n\t"
group-onsemi 0:098463de4c5d 426
group-onsemi 0:098463de4c5d 427 /*
group-onsemi 0:098463de4c5d 428 * Main "loop" - Generating one more key than necessary,
group-onsemi 0:098463de4c5d 429 * see definition of mbedtls_aes_context.buf
group-onsemi 0:098463de4c5d 430 */
group-onsemi 0:098463de4c5d 431 "2: \n\t"
group-onsemi 0:098463de4c5d 432 AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 433 AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 434 AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 435 AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 436 AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 437 AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 438 AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t"
group-onsemi 0:098463de4c5d 439 :
group-onsemi 0:098463de4c5d 440 : "r" (rk), "r" (key)
group-onsemi 0:098463de4c5d 441 : "memory", "cc", "0" );
group-onsemi 0:098463de4c5d 442 }
group-onsemi 0:098463de4c5d 443
group-onsemi 0:098463de4c5d 444 /*
group-onsemi 0:098463de4c5d 445 * Key expansion, wrapper
group-onsemi 0:098463de4c5d 446 */
group-onsemi 0:098463de4c5d 447 int mbedtls_aesni_setkey_enc( unsigned char *rk,
group-onsemi 0:098463de4c5d 448 const unsigned char *key,
group-onsemi 0:098463de4c5d 449 size_t bits )
group-onsemi 0:098463de4c5d 450 {
group-onsemi 0:098463de4c5d 451 switch( bits )
group-onsemi 0:098463de4c5d 452 {
group-onsemi 0:098463de4c5d 453 case 128: aesni_setkey_enc_128( rk, key ); break;
group-onsemi 0:098463de4c5d 454 case 192: aesni_setkey_enc_192( rk, key ); break;
group-onsemi 0:098463de4c5d 455 case 256: aesni_setkey_enc_256( rk, key ); break;
group-onsemi 0:098463de4c5d 456 default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
group-onsemi 0:098463de4c5d 457 }
group-onsemi 0:098463de4c5d 458
group-onsemi 0:098463de4c5d 459 return( 0 );
group-onsemi 0:098463de4c5d 460 }
group-onsemi 0:098463de4c5d 461
group-onsemi 0:098463de4c5d 462 #endif /* MBEDTLS_HAVE_X86_64 */
group-onsemi 0:098463de4c5d 463
group-onsemi 0:098463de4c5d 464 #endif /* MBEDTLS_AESNI_C */