mbed official / mbed-dsp

CMSIS DSP library

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Fork of mbed-dsp by mbed official

cmsis_dsp/SupportFunctions/arm_fill_q15.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_fill_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Fills a constant value into a Q15 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37
emilmont 1:fdd22bb7aa52 38 /**
emilmont 1:fdd22bb7aa52 39 * @ingroup groupSupport
emilmont 1:fdd22bb7aa52 40 */
emilmont 1:fdd22bb7aa52 41
emilmont 1:fdd22bb7aa52 42 /**
emilmont 1:fdd22bb7aa52 43 * @addtogroup Fill
emilmont 1:fdd22bb7aa52 44 * @{
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @brief Fills a constant value into a Q15 vector.
emilmont 1:fdd22bb7aa52 49 * @param[in] value input value to be filled
emilmont 1:fdd22bb7aa52 50 * @param[out] *pDst points to output vector
emilmont 1:fdd22bb7aa52 51 * @param[in] blockSize length of the output vector
emilmont 1:fdd22bb7aa52 52 * @return none.
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 */
emilmont 1:fdd22bb7aa52 55
emilmont 1:fdd22bb7aa52 56 void arm_fill_q15(
emilmont 1:fdd22bb7aa52 57 q15_t value,
emilmont 1:fdd22bb7aa52 58 q15_t * pDst,
emilmont 1:fdd22bb7aa52 59 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 60 {
emilmont 1:fdd22bb7aa52 61 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 62
emilmont 1:fdd22bb7aa52 63 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 64
emilmont 1:fdd22bb7aa52 65 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 66
emilmont 1:fdd22bb7aa52 67 q31_t packedValue; /* value packed to 32 bits */
emilmont 1:fdd22bb7aa52 68
emilmont 1:fdd22bb7aa52 69
emilmont 1:fdd22bb7aa52 70 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 71 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 /* Packing two 16 bit values to 32 bit value in order to use SIMD */
emilmont 1:fdd22bb7aa52 74 packedValue = __PKHBT(value, value, 16u);
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 77 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 78 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 79 {
emilmont 1:fdd22bb7aa52 80 /* C = value */
emilmont 1:fdd22bb7aa52 81 /* Fill the value in the destination buffer */
emilmont 1:fdd22bb7aa52 82 *__SIMD32(pDst)++ = packedValue;
emilmont 1:fdd22bb7aa52 83 *__SIMD32(pDst)++ = packedValue;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 86 blkCnt--;
emilmont 1:fdd22bb7aa52 87 }
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 90 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 91 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 #else
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* Loop over blockSize number of values */
emilmont 1:fdd22bb7aa52 98 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 103 {
emilmont 1:fdd22bb7aa52 104 /* C = value */
emilmont 1:fdd22bb7aa52 105 /* Fill the value in the destination buffer */
emilmont 1:fdd22bb7aa52 106 *pDst++ = value;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 109 blkCnt--;
emilmont 1:fdd22bb7aa52 110 }
emilmont 1:fdd22bb7aa52 111 }
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 /**
emilmont 1:fdd22bb7aa52 114 * @} end of Fill group
emilmont 1:fdd22bb7aa52 115 */