mbed official / mbed-dsp

CMSIS DSP library

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cmsis_dsp/StatisticsFunctions/arm_power_q7.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_power_q7.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Sum of the squares of the elements of a Q7 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @ingroup groupStats
emilmont 1:fdd22bb7aa52 37 */
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup power
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Sum of the squares of the elements of a Q7 vector.
emilmont 1:fdd22bb7aa52 46 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 47 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 48 * @param[out] *pResult sum of the squares value returned here
emilmont 1:fdd22bb7aa52 49 * @return none.
emilmont 1:fdd22bb7aa52 50 *
emilmont 1:fdd22bb7aa52 51 * @details
emilmont 1:fdd22bb7aa52 52 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 53 *
emilmont 1:fdd22bb7aa52 54 * \par
emilmont 1:fdd22bb7aa52 55 * The function is implemented using a 32-bit internal accumulator.
emilmont 1:fdd22bb7aa52 56 * The input is represented in 1.7 format.
emilmont 1:fdd22bb7aa52 57 * Intermediate multiplication yields a 2.14 format, and this
emilmont 1:fdd22bb7aa52 58 * result is added without saturation to an accumulator in 18.14 format.
emilmont 1:fdd22bb7aa52 59 * With 17 guard bits in the accumulator, there is no risk of overflow, and the
emilmont 1:fdd22bb7aa52 60 * full precision of the intermediate multiplication is preserved.
emilmont 1:fdd22bb7aa52 61 * Finally, the return result is in 18.14 format.
emilmont 1:fdd22bb7aa52 62 *
emilmont 1:fdd22bb7aa52 63 */
emilmont 1:fdd22bb7aa52 64
emilmont 1:fdd22bb7aa52 65 void arm_power_q7(
emilmont 1:fdd22bb7aa52 66 q7_t * pSrc,
emilmont 1:fdd22bb7aa52 67 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 68 q31_t * pResult)
emilmont 1:fdd22bb7aa52 69 {
emilmont 1:fdd22bb7aa52 70 q31_t sum = 0; /* Temporary result storage */
emilmont 1:fdd22bb7aa52 71 q7_t in; /* Temporary variable to store input */
emilmont 1:fdd22bb7aa52 72 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 73
emilmont 1:fdd22bb7aa52 74 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 q31_t input1; /* Temporary variable to store packed input */
emilmont 1:fdd22bb7aa52 79 q31_t in1, in2; /* Temporary variables to store input */
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 82 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 85 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 86 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 87 {
emilmont 1:fdd22bb7aa52 88 /* Reading two inputs of pSrc vector and packing */
emilmont 1:fdd22bb7aa52 89 input1 = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 in1 = __SXTB16(__ROR(input1, 8));
emilmont 1:fdd22bb7aa52 92 in2 = __SXTB16(input1);
emilmont 1:fdd22bb7aa52 93
emilmont 1:fdd22bb7aa52 94 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emilmont 1:fdd22bb7aa52 95 /* calculate power and accumulate to accumulator */
emilmont 1:fdd22bb7aa52 96 sum = __SMLAD(in1, in1, sum);
emilmont 1:fdd22bb7aa52 97 sum = __SMLAD(in2, in2, sum);
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 100 blkCnt--;
emilmont 1:fdd22bb7aa52 101 }
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 104 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 105 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 106
emilmont 1:fdd22bb7aa52 107 #else
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* Loop over blockSize number of values */
emilmont 1:fdd22bb7aa52 112 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 117 {
emilmont 1:fdd22bb7aa52 118 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
emilmont 1:fdd22bb7aa52 119 /* Compute Power and then store the result in a temporary variable, sum. */
emilmont 1:fdd22bb7aa52 120 in = *pSrc++;
emilmont 1:fdd22bb7aa52 121 sum += ((q15_t) in * in);
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 124 blkCnt--;
emilmont 1:fdd22bb7aa52 125 }
emilmont 1:fdd22bb7aa52 126
emilmont 1:fdd22bb7aa52 127 /* Store the result in 18.14 format */
emilmont 1:fdd22bb7aa52 128 *pResult = sum;
emilmont 1:fdd22bb7aa52 129 }
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /**
emilmont 1:fdd22bb7aa52 132 * @} end of power group
emilmont 1:fdd22bb7aa52 133 */