koikelab
/
USBHost
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Dependencies: FATFileSystem mbed-rtos
Fork of
USBHost
by 
mbed official
Revision 29:d3b77affed28, committed 2015-03-31
- Comitter:
- mbed_official
- Date:
- Tue Mar 31 16:15:42 2015 +0100
- Parent:
- 28:8e62b6403505
- Child:
- 30:8738e5882d4e
- Commit message:
- Synchronized with git revision 251f3f8b55a4dc98b831c80e032464ed45cce309
Full URL: https://github.com/mbedmicro/mbed/commit/251f3f8b55a4dc98b831c80e032464ed45cce309/
[RZ/A1H]Add some function(USB 2port, NVIC wrapper) and modify some settings(OS, Terminal).
Changed in this revision
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/devdrv_usb_host_api.h Fri Feb 27 10:01:08 2015 +0000 +++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/devdrv_usb_host_api.h Tue Mar 31 16:15:42 2015 +0100 @@ -286,10 +286,7 @@ Includes <System Includes> , "Project Includes" *******************************************************************************/ #include "usb0_host_api.h" -#if(1) /* ohci_wrapp */ -#else #include "usb1_host_api.h" -#endif /*******************************************************************************
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/usb0_host.h Fri Feb 27 10:01:08 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,156 +0,0 @@ -/******************************************************************************* -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only -* intended for use with Renesas products. No other uses are authorized. This -* software is owned by Renesas Electronics Corporation and is protected under -* all applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT -* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE -* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. -* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS -* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE -* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR -* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE -* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software -* and to discontinue the availability of this software. By using this software, -* you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. -*******************************************************************************/ -/******************************************************************************* -* File Name : usb0_host.h -* $Rev: 1116 $ -* $Date:: 2014-07-09 16:29:19 +0900#$ -* Description : RZ/A1H R7S72100 USB Sample Program -*******************************************************************************/ -#ifndef USB0_HOST_H -#define USB0_HOST_H - -/******************************************************************************* -Includes <System Includes> , "Project Includes" -*******************************************************************************/ -#include "devdrv_usb_host_api.h" -#include "usb_host.h" - -/******************************************************************************* -Imported global variables and functions (from other files) -*******************************************************************************/ -extern const uint16_t g_usb0_host_bit_set[]; -extern uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1]; -extern uint8_t *g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1]; - -extern uint16_t g_usb0_host_PipeIgnore[]; -extern uint16_t g_usb0_host_PipeTbl[]; -extern uint16_t g_usb0_host_pipe_status[]; -extern uint32_t g_usb0_host_PipeDataSize[]; - -extern USB_HOST_DMA_t g_usb0_host_DmaInfo[]; -extern uint16_t g_usb0_host_DmaPipe[]; -extern uint16_t g_usb0_host_DmaBval[]; -extern uint16_t g_usb0_host_DmaStatus[]; - -extern uint16_t g_usb0_host_driver_state; -extern uint16_t g_usb0_host_ConfigNum; -extern uint16_t g_usb0_host_CmdStage; -extern uint16_t g_usb0_host_bchg_flag; -extern uint16_t g_usb0_host_detach_flag; -extern uint16_t g_usb0_host_attach_flag; - -extern uint16_t g_usb0_host_UsbAddress; -extern uint16_t g_usb0_host_setUsbAddress; -extern uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1]; -extern uint16_t g_usb0_host_UsbDeviceSpeed; -extern uint16_t g_usb0_host_SupportUsbDeviceSpeed; - -extern uint16_t g_usb0_host_SavReq; -extern uint16_t g_usb0_host_SavVal; -extern uint16_t g_usb0_host_SavIndx; -extern uint16_t g_usb0_host_SavLen; - -extern uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1]; -extern uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1]; -extern uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1]; -extern uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1]; - -/******************************************************************************* -Functions Prototypes -*******************************************************************************/ -/* ==== common ==== */ -void usb0_host_dma_stop_d0(uint16_t pipe, uint32_t remain); -void usb0_host_dma_stop_d1(uint16_t pipe, uint32_t remain); -uint16_t usb0_host_is_hispeed(void); -uint16_t usb0_host_is_hispeed_enable(void); -uint16_t usb0_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data); -uint16_t usb0_host_write_buffer(uint16_t pipe); -uint16_t usb0_host_write_buffer_c(uint16_t pipe); -uint16_t usb0_host_write_buffer_d0(uint16_t pipe); -uint16_t usb0_host_write_buffer_d1(uint16_t pipe); -void usb0_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data); -uint16_t usb0_host_read_buffer(uint16_t pipe); -uint16_t usb0_host_read_buffer_c(uint16_t pipe); -uint16_t usb0_host_read_buffer_d0(uint16_t pipe); -uint16_t usb0_host_read_buffer_d1(uint16_t pipe); -uint16_t usb0_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); -void usb0_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); -void usb0_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc); -uint16_t usb0_host_get_mbw(uint32_t trncount, uint32_t dtptr); -uint16_t usb0_host_read_dma(uint16_t pipe); -void usb0_host_stop_transfer(uint16_t pipe); -void usb0_host_brdy_int(uint16_t status, uint16_t int_enb); -void usb0_host_nrdy_int(uint16_t status, uint16_t int_enb); -void usb0_host_bemp_int(uint16_t status, uint16_t int_enb); -void usb0_host_setting_interrupt(uint8_t level); -void usb0_host_reset_module(uint16_t clockmode); -uint16_t usb0_host_get_buf_size(uint16_t pipe); -uint16_t usb0_host_get_mxps(uint16_t pipe); -void usb0_host_enable_brdy_int(uint16_t pipe); -void usb0_host_disable_brdy_int(uint16_t pipe); -void usb0_host_clear_brdy_sts(uint16_t pipe); -void usb0_host_enable_bemp_int(uint16_t pipe); -void usb0_host_disable_bemp_int(uint16_t pipe); -void usb0_host_clear_bemp_sts(uint16_t pipe); -void usb0_host_enable_nrdy_int(uint16_t pipe); -void usb0_host_disable_nrdy_int(uint16_t pipe); -void usb0_host_clear_nrdy_sts(uint16_t pipe); -void usb0_host_set_pid_buf(uint16_t pipe); -void usb0_host_set_pid_nak(uint16_t pipe); -void usb0_host_set_pid_stall(uint16_t pipe); -void usb0_host_clear_pid_stall(uint16_t pipe); -uint16_t usb0_host_get_pid(uint16_t pipe); -void usb0_host_set_sqclr(uint16_t pipe); -void usb0_host_set_sqset(uint16_t pipe); -void usb0_host_set_csclr(uint16_t pipe); -void usb0_host_aclrm(uint16_t pipe); -void usb0_host_set_aclrm(uint16_t pipe); -void usb0_host_clr_aclrm(uint16_t pipe); -uint16_t usb0_host_get_sqmon(uint16_t pipe); -uint16_t usb0_host_get_inbuf(uint16_t pipe); - -/* ==== host ==== */ -void usb0_host_init_pipe_status(void); -int32_t usb0_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); -void usb0_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); -void usb0_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table); -uint16_t usb0_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table); -void usb0_host_StatusStage(void); -void usb0_host_get_devadd(uint16_t addr, uint16_t *devadd); -void usb0_host_set_devadd(uint16_t addr, uint16_t *devadd); -void usb0_host_InitModule(void); -uint16_t usb0_host_CheckAttach(void); -void usb0_host_UsbDetach(void); -void usb0_host_UsbDetach2(void); -void usb0_host_UsbAttach(void); -uint16_t usb0_host_UsbBusReset(void); -int32_t usb0_host_UsbResume(void); -int32_t usb0_host_UsbSuspend(void); -void usb0_host_Enable_DetachINT(void); -void usb0_host_Disable_DetachINT(void); -void usb0_host_UsbStateManager(void); - - -#endif /* USB0_HOST_H */ - -/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/usb0_host_api.h Fri Feb 27 10:01:08 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,112 +0,0 @@ -/******************************************************************************* -* DISCLAIMER -* This software is supplied by Renesas Electronics Corporation and is only -* intended for use with Renesas products. No other uses are authorized. This -* software is owned by Renesas Electronics Corporation and is protected under -* all applicable laws, including copyright laws. -* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING -* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT -* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE -* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. -* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS -* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE -* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR -* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE -* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* Renesas reserves the right, without notice, to make changes to this software -* and to discontinue the availability of this software. By using this software, -* you agree to the additional terms and conditions found by accessing the -* following link: -* http://www.renesas.com/disclaimer -* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. -*******************************************************************************/ -/******************************************************************************* -* File Name : usb0_host_api.h -* $Rev: 1116 $ -* $Date:: 2014-07-09 16:29:19 +0900#$ -* Description : RZ/A1H R7S72100 USB Sample Program -*******************************************************************************/ -#ifndef USB0_HOST_API_H -#define USB0_HOST_API_H - - -/******************************************************************************* -Typedef definitions -*******************************************************************************/ - - -/******************************************************************************* -Macro definitions -*******************************************************************************/ - - -/******************************************************************************* -Variable Externs -*******************************************************************************/ - - -/******************************************************************************* -Functions Prototypes -*******************************************************************************/ -void usb0_host_interrupt(uint32_t int_sense); -void usb0_host_dma_interrupt_d0fifo(uint32_t int_sense); -void usb0_host_dma_interrupt_d1fifo(uint32_t int_sense); - -uint16_t usb0_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode); -int32_t usb0_api_host_enumeration(uint16_t devadr); -int32_t usb0_api_host_detach(void); -int32_t usb0_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); -int32_t usb0_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); -int32_t usb0_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); -int32_t usb0_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor); -int32_t usb0_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table); -int32_t usb0_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table); -uint16_t usb0_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table); -int32_t usb0_api_host_data_count(uint16_t pipe, uint32_t *data_count); - -int32_t usb0_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); -int32_t usb0_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); -int32_t usb0_api_host_SetConfig(uint16_t devadr, uint16_t confignum); -int32_t usb0_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index); -int32_t usb0_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir); -uint16_t usb0_api_host_GetUsbDeviceState(void); - -void usb0_api_host_elt_4_4(void); -void usb0_api_host_elt_4_5(void); -void usb0_api_host_elt_4_6(void); -void usb0_api_host_elt_4_7(void); -void usb0_api_host_elt_4_8(void); -void usb0_api_host_elt_4_9(void); -void usb0_api_host_elt_get_desc(void); - -void usb0_host_EL_ModeInit(void); -void usb0_host_EL_SetUACT(void); -void usb0_host_EL_ClearUACT(void); -void usb0_host_EL_SetTESTMODE(uint16_t mode); -void usb0_host_EL_ClearNRDYSTS(uint16_t pipe); -uint16_t usb0_host_EL_GetINTSTS1(void); -void usb0_host_EL_UsbBusReset(void); -void usb0_host_EL_UsbAttach(void); -void usb0_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); -void usb0_host_EL_StatusStage(void); -void usb0_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table); -int32_t usb0_host_EL_UsbSuspend(void); -int32_t usb0_host_EL_UsbResume(void); - -#if 0 /* prototype in devdrv_usb_host_api.h */ -uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void); -uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void); -void Userdef_USB_usb0_host_attach(void); -void Userdef_USB_usb0_host_detach(void); -void Userdef_USB_usb0_host_delay_1ms(void); -void Userdef_USB_usb0_host_delay_xms(uint32_t msec); -void Userdef_USB_usb0_host_delay_10us(uint32_t usec); -void Userdef_USB_usb0_host_delay_500ns(void); -void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc); -uint32_t Userdef_USB_usb0_host_stop_dma0(void); -uint32_t Userdef_USB_usb0_host_stop_dma1(void); -#endif - -#endif /* USB0_HOST_API_H */ - -/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/usb0_host_dmacdrv.h Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,139 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_dmacdrv.h
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Description : RZ/A1H R7S72100 USB Sample Program
-*******************************************************************************/
-#ifndef USB0_HOST_DMACDRV_H
-#define USB0_HOST_DMACDRV_H
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-typedef struct dmac_transinfo
-{
- uint32_t src_addr; /* Transfer source address */
- uint32_t dst_addr; /* Transfer destination address */
- uint32_t count; /* Transfer byte count */
- uint32_t src_size; /* Transfer source data size */
- uint32_t dst_size; /* Transfer destination data size */
- uint32_t saddr_dir; /* Transfer source address direction */
- uint32_t daddr_dir; /* Transfer destination address direction */
-} dmac_transinfo_t;
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-/* ==== Transfer specification of the sample program ==== */
-#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
-#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
-
-/* ==== DMA modes ==== */
-#define DMAC_MODE_REGISTER (0) /* Register mode */
-#define DMAC_MODE_LINK (1) /* Link mode */
-
-/* ==== Transfer requests ==== */
-#define DMAC_REQ_MODE_EXT (0) /* External request */
-#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
-#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
-
-/* ==== DMAC transfer sizes ==== */
-#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
-#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
-#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
-#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
-#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
-#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
-#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
-#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
-
-/* ==== Address increment for transferring ==== */
-#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
-#define DMAC_TRANS_ADR_INC (0) /* Increment */
-
-/* ==== Method for detecting DMA request ==== */
-#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
-#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
-#define DMAC_REQ_DET_LOW (2) /* Low level detection */
-#define DMAC_REQ_DET_HIGH (3) /* High level detection */
-
-/* ==== Request Direction ==== */
-#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
-#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
-
-/* ==== Descriptors ==== */
-#define DMAC_DESC_HEADER (0) /* Header */
-#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
-#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
-#define DMAC_DESC_COUNT (3) /* Transaction Byte */
-#define DMAC_DESC_CHCFG (4) /* Channel Confg */
-#define DMAC_DESC_CHITVL (5) /* Channel Interval */
-#define DMAC_DESC_CHEXT (6) /* Channel Extension */
-#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
-
-/* ==== On-chip peripheral module requests ===== */
-typedef enum dmac_request_factor
-{
- DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
- DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
- DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
- DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
- DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
- DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
- DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
- DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
-} dmac_request_factor_t;
-
-
-/*******************************************************************************
-Variable Externs
-*******************************************************************************/
-
-
-/*******************************************************************************
-Functions Prototypes
-*******************************************************************************/
-void usb0_host_DMAC1_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
- uint32_t request_factor, uint32_t req_direction);
-int32_t usb0_host_DMAC1_Open(uint32_t req);
-void usb0_host_DMAC1_Close(uint32_t * remain);
-void usb0_host_DMAC1_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
-
-void usb0_host_DMAC2_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
- uint32_t request_factor, uint32_t req_direction);
-int32_t usb0_host_DMAC2_Open(uint32_t req);
-void usb0_host_DMAC2_Close(uint32_t * remain);
-void usb0_host_DMAC2_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
-
-#endif /* USB0_HOST_DMACDRV_H */
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_RZ_A1.c Fri Feb 27 10:01:08 2015 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_RZ_A1.c Tue Mar 31 16:15:42 2015 +0100
@@ -21,12 +21,12 @@
#include "cmsis_os.h"
#include "ohci_wrapp_RZ_A1.h"
#include "ohci_wrapp_RZ_A1_local.h"
-
#include "rza_io_regrw.h"
-#include "usb0_host.h"
+#include "usb_host_setting.h"
/* ------------------ HcControl Register --------------------- */
#define OR_CONTROL_PLE (0x00000004)
+#define OR_CONTROL_IE (0x00000008)
#define OR_CONTROL_CLE (0x00000010)
#define OR_CONTROL_BLE (0x00000020)
/* ----------------- HcCommandStatus Register ----------------- */
@@ -47,6 +47,7 @@
#define OR_RH_PORT_POCI (0x00000008)
#define OR_RH_PORT_CCS (0x00000001)
+#define ED_FORMAT (0x00008000) /* Format */
#define ED_SKIP (0x00004000) /* Skip this ep in queue */
#define ED_TOGLE_CARRY (0x00000002)
#define ED_HALTED (0x00000001)
@@ -70,11 +71,16 @@
#define TD_CTL_SHFT_T (24)
#define ED_SHFT_TOGLE_CARRY (1)
#define SIG_GEN_LIST_REQ (1)
+#if (ISO_TRANS_MAX_NUM > 0)
+#define TD_PSW_MSK_CC (0xF000)
+#define TD_PSW_SHFT_CC (12)
+#define TD_CTL_MSK_FC (0x07000000)
+#define TD_CTL_SHFT_FC (24)
+#endif
#define CTL_TRANS_TIMEOUT (1000)
#define BLK_TRANS_TIMEOUT (5)
-#define INT_TRANS_MAX_NUM (4) /* min:1 max:4 */
-#define TOTAL_SEM_NUM (5 + (2 * INT_TRANS_MAX_NUM))
+#define TOTAL_SEM_NUM (5 + (2 * INT_TRANS_MAX_NUM) + (2 * ISO_TRANS_MAX_NUM))
#define PORT_LOW_SPEED (0x00000200)
#define PORT_HIGH_SPEED (0x00000400)
@@ -87,10 +93,21 @@
uint8_t *bufEnd; /* Physical address of end of buffer */
} hctd_t;
+#if (ISO_TRANS_MAX_NUM > 0)
+#define PSW_NUM (8)
+typedef struct tag_hcisotd {
+ uint32_t control; /* Transfer descriptor control */
+ uint8_t *bufferPage0; /* Buffer Page 0 */
+ struct tag_hcisotd *nextTD; /* Physical pointer to next Transfer Descriptor */
+ uint8_t *bufEnd; /* Physical address of end of buffer */
+ uint16_t offsetPSW[PSW_NUM]; /* Offset/PSW */
+} hcisotd_t;
+#endif
+
typedef struct tag_hced {
uint32_t control; /* Endpoint descriptor control */
- hctd_t *tailTD; /* Physical address of tail in Transfer descriptor list */
- hctd_t *headTD; /* Physcial address of head in Transfer descriptor list */
+ uint32_t tailTD; /* Physical address of tail in Transfer descriptor list */
+ uint32_t headTD; /* Physcial address of head in Transfer descriptor list */
struct tag_hced *nextED; /* Physical address of next Endpoint descriptor */
} hced_t;
@@ -131,12 +148,15 @@
osThreadId tskid;
osSemaphoreId semid_wait;
osSemaphoreId semid_list;
- hctd_t *p_curr_td;
+ void *p_curr_td; /* pointer of hctd_t or hcisotd_t */
hced_t *p_curr_ed;
uint32_t pipe_no;
uint32_t trans_wait;
uint32_t cycle_time;
uint8_t *p_start_buf;
+#if (ISO_TRANS_MAX_NUM > 0)
+ uint32_t psw_idx;
+#endif
} genelal_ed_t;
typedef struct tag_tdinfo {
@@ -163,7 +183,7 @@
static void int_ed_task(void const * argument);
static int32_t int_trans_doing(hced_t *p_ed, uint32_t index);
static int32_t chk_genelal_ed(genelal_ed_t *p_g_ed);
-static void chk_td_done(genelal_ed_t *p_g_ed);
+static void chk_genelal_td_done(genelal_ed_t *p_g_ed);
static void chk_split_trans_setting(genelal_ed_t *p_g_ed);
static void set_split_trans_setting(void);
static void control_trans(genelal_ed_t *p_g_ed);
@@ -173,10 +193,22 @@
static void int_trans(genelal_ed_t *p_g_ed);
static void get_td_info(genelal_ed_t *p_g_ed, tdinfo_t *p_td_info);
static void set_togle(uint32_t pipe, hctd_t *p_td, hced_t *p_ed);
+#if (ISO_TRANS_MAX_NUM > 0)
+static void iso_ed_task(void const * argument);
+static int32_t iso_trans_doing(hced_t *p_ed, uint32_t index);
+static void chk_iso_td_done(genelal_ed_t *p_g_ed);
+static int32_t chk_iso_ed(genelal_ed_t *p_g_ed);
+static void iso_trans_setting(genelal_ed_t *p_g_ed, uint32_t index);
+static uint32_t iso_chk_starting_frame(genelal_ed_t *p_g_ed);
+static void iso_trans(genelal_ed_t *p_g_ed);
+#endif
static void connect_check(void);
-extern USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[];
-extern USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[];
+extern USB_HOST_CFG_PIPETBL_t usb_host_blk_ep_tbl1[];
+extern USB_HOST_CFG_PIPETBL_t usb_host_int_ep_tbl1[];
+#if (ISO_TRANS_MAX_NUM > 0)
+extern USB_HOST_CFG_PIPETBL_t usb_host_iso_ep_tbl1[];
+#endif
static usb_ohci_reg_t usb_reg;
static usb_ohci_reg_t *p_usb_reg = &usb_reg;
@@ -189,6 +221,10 @@
static genelal_ed_t int_ed[INT_TRANS_MAX_NUM];
static split_trans_t split_ctl;
+#if (ISO_TRANS_MAX_NUM > 0)
+static genelal_ed_t iso_ed[ISO_TRANS_MAX_NUM];
+#endif
+
osSemaphoreDef(ohciwrapp_sem_01);
osSemaphoreDef(ohciwrapp_sem_02);
osSemaphoreDef(ohciwrapp_sem_03);
@@ -208,13 +244,55 @@
osSemaphoreDef(ohciwrapp_sem_12);
osSemaphoreDef(ohciwrapp_sem_13);
#endif
+#if (ISO_TRANS_MAX_NUM >= 1)
+osSemaphoreDef(ohciwrapp_sem_14);
+osSemaphoreDef(ohciwrapp_sem_15);
+#endif
+#if (ISO_TRANS_MAX_NUM >= 2)
+osSemaphoreDef(ohciwrapp_sem_16);
+osSemaphoreDef(ohciwrapp_sem_17);
+#endif
osThreadDef(callback_task, osPriorityHigh, 512);
osThreadDef(control_ed_task, osPriorityNormal, 512);
osThreadDef(bulk_ed_task, osPriorityNormal, 512);
-osThreadDef(int_ed_task, osPriorityAboveNormal, 512);
+static void int_ed_task_1(void const * argument) {
+ int_ed_task(argument);
+}
+osThreadDef(int_ed_task_1, osPriorityNormal, 512);
+#if (INT_TRANS_MAX_NUM >= 2)
+static void int_ed_task_2(void const * argument) {
+ int_ed_task(argument);
+}
+osThreadDef(int_ed_task_2, osPriorityNormal, 512);
+#endif
+#if (INT_TRANS_MAX_NUM >= 3)
+static void int_ed_task_3(void const * argument) {
+ int_ed_task(argument);
+}
+osThreadDef(int_ed_task_3, osPriorityNormal, 512);
+#endif
+#if (INT_TRANS_MAX_NUM >= 4)
+static void int_ed_task_4(void const * argument) {
+ int_ed_task(argument);
+}
+osThreadDef(int_ed_task_4, osPriorityNormal, 512);
+#endif
-void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed) {
+#if (ISO_TRANS_MAX_NUM >= 1)
+static void iso_ed_task_1(void const * argument) {
+ iso_ed_task(argument);
+}
+osThreadDef(iso_ed_task_1, osPriorityNormal, 512);
+#endif
+#if (ISO_TRANS_MAX_NUM >= 2)
+static void iso_ed_task_2(void const * argument) {
+ iso_ed_task(argument);
+}
+osThreadDef(iso_ed_task_2, osPriorityNormal, 512);
+#endif
+
+void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc) {
static const osSemaphoreDef_t * const sem_def_tbl[TOTAL_SEM_NUM] = {
osSemaphore(ohciwrapp_sem_01), osSemaphore(ohciwrapp_sem_02), osSemaphore(ohciwrapp_sem_03)
, osSemaphore(ohciwrapp_sem_04), osSemaphore(ohciwrapp_sem_05), osSemaphore(ohciwrapp_sem_06)
@@ -228,24 +306,53 @@
#if (INT_TRANS_MAX_NUM >= 4)
, osSemaphore(ohciwrapp_sem_12), osSemaphore(ohciwrapp_sem_13)
#endif
+#if (ISO_TRANS_MAX_NUM >= 1)
+ , osSemaphore(ohciwrapp_sem_14), osSemaphore(ohciwrapp_sem_15)
+#endif
+#if (ISO_TRANS_MAX_NUM >= 2)
+ , osSemaphore(ohciwrapp_sem_16), osSemaphore(ohciwrapp_sem_17)
+#endif
};
+ static const osThreadDef_t * const int_tsk_def_tbl[INT_TRANS_MAX_NUM] = {
+ osThread(int_ed_task_1)
+#if (INT_TRANS_MAX_NUM >= 2)
+ , osThread(int_ed_task_2)
+#endif
+#if (INT_TRANS_MAX_NUM >= 3)
+ , osThread(int_ed_task_3)
+#endif
+#if (INT_TRANS_MAX_NUM >= 4)
+ , osThread(int_ed_task_4)
+#endif
+ };
+#if (ISO_TRANS_MAX_NUM > 0)
+ static const osThreadDef_t * const iso_tsk_def_tbl[ISO_TRANS_MAX_NUM] = {
+ osThread(iso_ed_task_1)
+#if (ISO_TRANS_MAX_NUM >= 2)
+ , osThread(iso_ed_task_2)
+#endif
+ };
+#endif
+
uint32_t cnt;
uint32_t index = 0;
/* Disables interrupt for usb */
- GIC_DisableIRQ(USBI0_IRQn);
+ GIC_DisableIRQ(USBIXUSBIX);
+#if (USB_HOST_CH == 0)
/* P4_1(USB0_EN) */
GPIOP4 &= ~0x0002; /* Outputs low level */
GPIOPMC4 &= ~0x0002; /* Port mode */
GPIOPM4 &= ~0x0002; /* Output mode */
+#endif
p_usbisr_cb = p_usbisr_fnc;
- if (hi_speed == 0) {
- g_usb0_host_SupportUsbDeviceSpeed = USB_HOST_FULL_SPEED;
- } else {
- g_usb0_host_SupportUsbDeviceSpeed = USB_HOST_HIGH_SPEED;
- }
+#if (USB_HOST_HISPEED == 0)
+ g_usbx_host_SupportUsbDeviceSpeed = USB_HOST_FULL_SPEED;
+#else
+ g_usbx_host_SupportUsbDeviceSpeed = USB_HOST_HIGH_SPEED;
+#endif
p_usb_reg->HcRevision = 0x00000010;
p_usb_reg->HcControl = 0x00000000;
p_usb_reg->HcCommandStatus = 0x00000000;
@@ -269,15 +376,22 @@
p_usb_reg->HcRhStatus = 0x00000000;
p_usb_reg->HcRhPortStatus1 = 0x00000000;
+#if (USB_HOST_CH == 0)
GPIOP4 |= 0x0002; /* P4_1 Outputs high level */
osDelay(5);
GPIOP4 &= ~0x0002; /* P4_1 Outputs low level */
osDelay(10);
+#else
+ osDelay(15);
+#endif
if (init_end == 0) {
(void)memset(&ctl_ed, 0, sizeof(ctl_ed));
(void)memset(&blk_ed, 0, sizeof(blk_ed));
(void)memset(&int_ed[0], 0, sizeof(int_ed));
+#if (ISO_TRANS_MAX_NUM > 0)
+ (void)memset(&iso_ed[0], 0, sizeof(iso_ed));
+#endif
/* callback */
semid_cb = osSemaphoreCreate(sem_def_tbl[index], 0);
@@ -304,8 +418,19 @@
index++;
int_ed[cnt].semid_list = osSemaphoreCreate(sem_def_tbl[index], 0);
index++;
- int_ed[cnt].tskid = osThreadCreate(osThread(int_ed_task), (void *)cnt);
+ int_ed[cnt].tskid = osThreadCreate(int_tsk_def_tbl[cnt], (void *)cnt);
}
+
+#if (ISO_TRANS_MAX_NUM > 0)
+ /* isochronous transfer */
+ for (cnt = 0; cnt < ISO_TRANS_MAX_NUM; cnt++) {
+ iso_ed[cnt].semid_wait = osSemaphoreCreate(sem_def_tbl[index], 0);
+ index++;
+ iso_ed[cnt].semid_list = osSemaphoreCreate(sem_def_tbl[index], 0);
+ index++;
+ iso_ed[cnt].tskid = osThreadCreate(iso_tsk_def_tbl[cnt], (void *)cnt);
+ }
+#endif
init_end = 1;
}
}
@@ -355,6 +480,22 @@
(void)osSemaphoreWait(blk_ed.semid_list, osWaitForever);
}
}
+#if (ISO_TRANS_MAX_NUM > 0)
+ if ((last_data & OR_CONTROL_IE) != (set_data & OR_CONTROL_IE)) {
+ /* change IE */
+ for (cnt = 0; cnt < ISO_TRANS_MAX_NUM; cnt++) {
+ if ((set_data & OR_CONTROL_IE) != 0) {
+ (void)osSemaphoreRelease(iso_ed[cnt].semid_list);
+ } else {
+ if (iso_ed[cnt].trans_wait == 1) {
+ iso_ed[cnt].trans_wait = 0;
+ (void)osSemaphoreRelease(iso_ed[cnt].semid_wait);
+ }
+ (void)osSemaphoreWait(iso_ed[cnt].semid_list, osWaitForever);
+ }
+ }
+ }
+#endif
if ((last_data & OR_CONTROL_PLE) != (set_data & OR_CONTROL_PLE)) {
/* change PLE */
for (cnt = 0; cnt < INT_TRANS_MAX_NUM; cnt++) {
@@ -373,7 +514,7 @@
case OHCI_REG_COMMANDSTATUS:
if ((set_data & OR_CMD_STATUS_HCR) != 0) { /* HostController Reset */
p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_HCR;
- if (usb0_api_host_init(16, g_usb0_host_SupportUsbDeviceSpeed, USBHCLOCK_X1_48MHZ) == USB_HOST_ATTACH) {
+ if (usbx_api_host_init(16, g_usbx_host_SupportUsbDeviceSpeed, USBHCLOCK_X1_48MHZ) == USB_HOST_ATTACH) {
ohciwrapp_loc_Connect(1);
}
p_usb_reg->HcCommandStatus &= ~OR_CMD_STATUS_HCR;
@@ -429,7 +570,7 @@
p_usb_reg->HcRhPortStatus1 &= ~(set_data & 0xFFFF0000);
if ((set_data & OR_RH_PORT_PRS) != 0) { /* Set Port Reset */
p_usb_reg->HcRhPortStatus1 |= OR_RH_PORT_PRS;
- usb0_host_UsbBusReset();
+ usbx_host_UsbBusReset();
p_usb_reg->HcRhPortStatus1 &= ~OR_RH_PORT_PRS;
}
break;
@@ -474,9 +615,7 @@
ctl_ed.p_curr_ed = (hced_t *)p_usb_reg->HcControlCurrentED;
if (chk_genelal_ed(&ctl_ed) != 0) {
control_trans(&ctl_ed);
- chk_split_trans_setting(&ctl_ed);
p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_CLF;
- chk_td_done(&ctl_ed);
}
p_usb_reg->HcControlCurrentED = (uint32_t)ctl_ed.p_curr_ed->nextED;
} else {
@@ -505,7 +644,6 @@
if (chk_genelal_ed(&blk_ed) != 0) {
bulk_trans(&blk_ed);
p_usb_reg->HcCommandStatus |= OR_CMD_STATUS_BLF;
- chk_td_done(&blk_ed);
}
p_usb_reg->HcBulkCurrentED = (uint32_t)blk_ed.p_curr_ed->nextED;
} else {
@@ -551,7 +689,8 @@
while ((p_usb_reg->HcControl & OR_CONTROL_PLE) != 0) {
if (chk_genelal_ed(p_int_ed) != 0) {
int_trans(p_int_ed);
- chk_td_done(p_int_ed);
+ (void)osSemaphoreWait(p_int_ed->semid_wait, osWaitForever);
+ usbx_host_stop_transfer(p_int_ed->pipe_no);
wait_cnt = p_int_ed->cycle_time;
} else {
if (wait_cnt > 0) {
@@ -590,17 +729,20 @@
hced_t *p_ed = p_g_ed->p_curr_ed;
if (((p_ed->control & ED_SKIP) != 0)
- || (((uint32_t)p_ed->headTD & ED_HALTED) != 0)
- || (((uint32_t)p_ed->tailTD & 0xFFFFFFF0) == ((uint32_t)p_ed->headTD & 0xFFFFFFF0))) {
+ || ((p_ed->control & ED_FORMAT) != 0)
+ || ((p_ed->headTD & ED_HALTED) != 0)
+ || ((p_ed->tailTD & 0xFFFFFFF0) == (p_ed->headTD & 0xFFFFFFF0))) {
/* Do Nothing */
} else if ((p_ed->control & 0x0000007F) > 10) {
- p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_HALTED);
+ p_ed->headTD |= ED_HALTED;
} else {
- p_g_ed->p_curr_td = (hctd_t *)((uint32_t)p_ed->headTD & 0xFFFFFFF0);
+ p_g_ed->p_curr_td = (void *)(p_ed->headTD & 0xFFFFFFF0);
if (p_g_ed->p_curr_td == NULL) {
- p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_HALTED);
+ p_ed->headTD |= ED_HALTED;
} else {
- p_g_ed->p_start_buf = p_g_ed->p_curr_td->currBufPtr;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
+
+ p_g_ed->p_start_buf = p_td->currBufPtr;
ret = 1;
}
}
@@ -608,14 +750,15 @@
return ret;
}
-static void chk_td_done(genelal_ed_t *p_g_ed) {
+static void chk_genelal_td_done(genelal_ed_t *p_g_ed) {
hcca_t *p_hcca;
- uint32_t ConditionCode = RZA_IO_RegRead_32(&p_g_ed->p_curr_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
+ uint32_t ConditionCode = RZA_IO_RegRead_32(&p_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
if ((ConditionCode != TD_CC_NOT_ACCESSED_1) && (ConditionCode != TD_CC_NOT_ACCESSED_2)) {
- p_g_ed->p_curr_ed->headTD = (hctd_t *)(((uint32_t)p_g_ed->p_curr_td->nextTD & 0xFFFFFFF0)
- | ((uint32_t)p_g_ed->p_curr_ed->headTD & 0x0000000F));
- p_g_ed->p_curr_td->nextTD = (hctd_t *)p_usb_reg->HcDoneHead;
+ p_g_ed->p_curr_ed->headTD = ((uint32_t)p_td->nextTD & 0xFFFFFFF0)
+ | (p_g_ed->p_curr_ed->headTD & 0x0000000F);
+ p_td->nextTD = (hctd_t *)p_usb_reg->HcDoneHead;
p_usb_reg->HcDoneHead = (uint32_t)p_g_ed->p_curr_td;
if ((p_usb_reg->HcInterruptStatus & OR_INTR_STATUS_WDH) == 0) {
p_hcca = (hcca_t *)p_usb_reg->HcHCCA;
@@ -630,13 +773,14 @@
static void chk_split_trans_setting(genelal_ed_t *p_g_ed) {
uint8_t *p_buf;
tdinfo_t td_info;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
/* Hi-Speed mode only */
- if (g_usb0_host_UsbDeviceSpeed != USB_HOST_HIGH_SPEED) {
+ if (g_usbx_host_UsbDeviceSpeed != USB_HOST_HIGH_SPEED) {
return;
}
- if (RZA_IO_RegRead_32(&p_g_ed->p_curr_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC) != TD_CC_NOERROR) {
+ if (RZA_IO_RegRead_32(&p_td->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC) != TD_CC_NOERROR) {
return;
}
@@ -651,8 +795,8 @@
if ((td_info.devadr == 0) && (bRequest == SET_ADDRESS)) {
/* SET_ADDRESS */
- usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
- usb0_host_set_devadd(wValue, &devadd);
+ usbx_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
+ usbx_host_set_devadd(wValue, &devadd);
if (split_ctl.root_devadr == 0) {
split_ctl.root_devadr = wValue; /* New Address */
}
@@ -684,7 +828,7 @@
uint16_t devadd;
if ((split_ctl.root_devadr != 0) && (split_ctl.reset_port != 0) && (split_ctl.reset_port < PORT_NUM)) {
- usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
+ usbx_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
RZA_IO_RegWrite_16(&devadd, split_ctl.root_devadr, USB_DEVADDn_UPPHUB_SHIFT, USB_DEVADDn_UPPHUB);
RZA_IO_RegWrite_16(&devadd, split_ctl.reset_port, USB_DEVADDn_HUBPORT_SHIFT, USB_DEVADDn_HUBPORT);
if ((split_ctl.port_sts_bits[split_ctl.reset_port] & PORT_HIGH_SPEED) != 0) {
@@ -695,42 +839,42 @@
port_speed = USB_HOST_FULL_SPEED;
}
RZA_IO_RegWrite_16(&devadd, port_speed, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD);
- usb0_host_set_devadd(USB_HOST_DEVICE_0, &devadd);
+ usbx_host_set_devadd(USB_HOST_DEVICE_0, &devadd);
split_ctl.reset_port = 0;
}
}
static void control_trans(genelal_ed_t *p_g_ed) {
- hctd_t *p_td = p_g_ed->p_curr_td;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
tdinfo_t td_info;
uint16_t devadd;
get_td_info(p_g_ed, &td_info);
- if (g_usb0_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) {
+ if (g_usbx_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) {
if (td_info.devadr == 0) {
set_split_trans_setting();
}
} else {
/* When a non-Hi-Speed, the communication speed is determined from the TD. */
- usb0_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
+ usbx_host_get_devadd(USB_HOST_DEVICE_0, &devadd);
if (td_info.speed == 1) {
RZA_IO_RegWrite_16(&devadd, USB_HOST_LOW_SPEED, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD);
} else {
RZA_IO_RegWrite_16(&devadd, USB_HOST_FULL_SPEED, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD);
}
- usb0_host_set_devadd(td_info.devadr, &devadd);
+ usbx_host_set_devadd(td_info.devadr, &devadd);
}
- USB200.DCPMAXP = (td_info.devadr << 12) + td_info.msp;
+ USB20X.DCPMAXP = (td_info.devadr << 12) + td_info.msp;
if (td_info.direction == 0) {
- g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
+ g_usbx_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
} else if (td_info.count != 0) {
- g_usb0_host_CmdStage = (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE);
+ g_usbx_host_CmdStage = (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE);
} else {
- g_usb0_host_CmdStage = (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE);
+ g_usbx_host_CmdStage = (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE);
}
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
+ g_usbx_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
p_g_ed->pipe_no = USB_HOST_PIPE0;
p_g_ed->trans_wait = 1;
@@ -741,12 +885,12 @@
uint16_t Indx = (p_td->currBufPtr[5] << 8) + p_td->currBufPtr[4];
uint16_t Len = (p_td->currBufPtr[7] << 8) + p_td->currBufPtr[6];
- g_usb0_host_data_pointer[USB_HOST_PIPE0] = p_td->bufEnd;
- usb0_host_SetupStage(Req, Val, Indx, Len);
+ g_usbx_host_data_pointer[USB_HOST_PIPE0] = p_td->bufEnd;
+ usbx_host_SetupStage(Req, Val, Indx, Len);
} else if (td_info.direction == 1) {
- usb0_host_CtrlWriteStart(td_info.count, p_td->currBufPtr);
+ usbx_host_CtrlWriteStart(td_info.count, p_td->currBufPtr);
} else {
- usb0_host_CtrlReadStart(td_info.count, p_td->currBufPtr);
+ usbx_host_CtrlReadStart(td_info.count, p_td->currBufPtr);
}
(void)osSemaphoreWait(p_g_ed->semid_wait, CTL_TRANS_TIMEOUT);
@@ -755,16 +899,16 @@
RZA_IO_RegWrite_32(&p_td->control, TD_CC_DEVICENOTRESPONDING, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
}
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
+ g_usbx_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usbx_host_CmdStage |= USB_HOST_CMD_IDLE;
+ g_usbx_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
}
static void bulk_trans(genelal_ed_t *p_g_ed) {
- hctd_t *p_td = p_g_ed->p_curr_td;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
hced_t *p_ed = p_g_ed->p_curr_ed;
tdinfo_t td_info;
- USB_HOST_CFG_PIPETBL_t *user_table = &usb0_host_blk_ep_tbl1[0];
+ USB_HOST_CFG_PIPETBL_t *user_table = &usb_host_blk_ep_tbl1[0];
uint8_t wk_table[6];
get_td_info(p_g_ed, &td_info);
@@ -779,26 +923,26 @@
wk_table[4] = (uint8_t)td_info.msp;
wk_table[5] = (uint8_t)(td_info.msp >> 8);
p_g_ed->pipe_no = user_table->pipe_number;
- usb0_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table);
+ usbx_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table);
set_togle(p_g_ed->pipe_no, p_td, p_ed);
p_g_ed->trans_wait = 1;
if (td_info.direction == 1) {
- usb0_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
+ usbx_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
} else {
- usb0_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
+ usbx_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
}
(void)osSemaphoreWait(p_g_ed->semid_wait, BLK_TRANS_TIMEOUT);
- usb0_host_stop_transfer(p_g_ed->pipe_no);
+ usbx_host_stop_transfer(p_g_ed->pipe_no);
}
static void int_trans_setting(genelal_ed_t *p_g_ed, uint32_t index) {
- hctd_t *p_td = p_g_ed->p_curr_td;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
hced_t *p_ed = p_g_ed->p_curr_ed;
tdinfo_t td_info;
- USB_HOST_CFG_PIPETBL_t *user_table = &usb0_host_int_ep_tbl1[index];
+ USB_HOST_CFG_PIPETBL_t *user_table = &usb_host_int_ep_tbl1[index];
uint8_t wk_table[6];
uint32_t cycle_time;
uint16_t devadd;
@@ -821,8 +965,8 @@
cycle_time >>= 1;
user_table->pipe_cycle++;
}
- if (g_usb0_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) {
- usb0_host_get_devadd(td_info.devadr, &devadd);
+ if (g_usbx_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) {
+ usbx_host_get_devadd(td_info.devadr, &devadd);
if (RZA_IO_RegRead_16(&devadd, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD) == USB_HOST_HIGH_SPEED) {
user_table->pipe_cycle += 3;
if (user_table->pipe_cycle > 7) {
@@ -832,7 +976,7 @@
}
p_g_ed->pipe_no = user_table->pipe_number;
- usb0_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table);
+ usbx_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table);
set_togle(p_g_ed->pipe_no, p_td, p_ed);
}
@@ -874,22 +1018,19 @@
}
static void int_trans(genelal_ed_t *p_g_ed) {
- hctd_t *p_td = p_g_ed->p_curr_td;
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
tdinfo_t td_info;
get_td_info(p_g_ed, &td_info);
p_g_ed->trans_wait = 1;
if (td_info.direction == 1) {
- usb0_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
+ usbx_host_start_send_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
} else {
- usb0_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
+ usbx_host_start_receive_transfer(p_g_ed->pipe_no, td_info.count, p_td->currBufPtr);
}
- (void)osSemaphoreWait(p_g_ed->semid_wait, osWaitForever);
- usb0_host_stop_transfer(p_g_ed->pipe_no);
}
static void get_td_info(genelal_ed_t *p_g_ed, tdinfo_t *p_td_info) {
- hctd_t *p_td = p_g_ed->p_curr_td;
hced_t *p_ed = p_g_ed->p_curr_ed;
p_td_info->endpoint_no = (uint8_t)((p_ed->control >> 7) & 0x0000000F);
@@ -897,42 +1038,251 @@
p_td_info->devadr = p_ed->control & 0x0000000F;
p_td_info->speed = (p_ed->control >> 13) & 0x00000001;
p_td_info->direction = (p_ed->control >> 11) & 0x00000003;
- if ((p_td_info->direction == 0) || (p_td_info->direction == 3)) {
- if ((p_td->control & TD_CTL_MSK_DP) == TD_SETUP) {
- p_td_info->direction = 0;
- } else if ((p_td->control & TD_CTL_MSK_DP) == TD_OUT) {
- p_td_info->direction = 1;
+
+ if ((p_ed->control & ED_FORMAT) == 0) {
+ hctd_t *p_td = (hctd_t *)p_g_ed->p_curr_td;
+
+ if ((p_td_info->direction == 0) || (p_td_info->direction == 3)) {
+ if ((p_td->control & TD_CTL_MSK_DP) == TD_SETUP) {
+ p_td_info->direction = 0;
+ } else if ((p_td->control & TD_CTL_MSK_DP) == TD_OUT) {
+ p_td_info->direction = 1;
+ } else {
+ p_td_info->direction = 2;
+ }
+ }
+ if (p_td->currBufPtr != NULL) {
+ p_td_info->count = (uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1;
} else {
- p_td_info->direction = 2;
+ p_td_info->count = 0;
}
- }
- if (p_td->currBufPtr != NULL) {
- p_td_info->count = (uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1;
} else {
- p_td_info->count = 0;
+#if (ISO_TRANS_MAX_NUM > 0)
+ hcisotd_t *p_isotd = (hcisotd_t *)p_g_ed->p_curr_td;
+
+ if ((p_td_info->direction == 0) || (p_td_info->direction == 3)) {
+ if ((p_isotd->control & TD_CTL_MSK_DP) == TD_SETUP) {
+ p_td_info->direction = 0;
+ } else if ((p_isotd->control & TD_CTL_MSK_DP) == TD_OUT) {
+ p_td_info->direction = 1;
+ } else {
+ p_td_info->direction = 2;
+ }
+ }
+#endif
}
}
static void set_togle(uint32_t pipe, hctd_t *p_td, hced_t *p_ed) {
if ((p_td->control & TD_CTL_MSK_T) == TD_TOGGLE_0) {
- usb0_host_set_sqclr(pipe);
+ usbx_host_set_sqclr(pipe);
} else if ((p_td->control & TD_CTL_MSK_T) == TD_TOGGLE_1) {
- usb0_host_set_sqset(pipe);
- } else if (((uint32_t)p_ed->headTD & ED_TOGLE_CARRY) == 0) {
- usb0_host_set_sqclr(pipe);
+ usbx_host_set_sqset(pipe);
+ } else if ((p_ed->headTD & ED_TOGLE_CARRY) == 0) {
+ usbx_host_set_sqclr(pipe);
} else {
- usb0_host_set_sqset(pipe);
+ usbx_host_set_sqset(pipe);
+ }
+}
+
+#if (ISO_TRANS_MAX_NUM > 0)
+static void iso_ed_task(void const * argument) {
+ genelal_ed_t *p_iso_ed = &iso_ed[(uint32_t)argument];
+ uint32_t wait_cnt = 0;
+ uint32_t wait_time = 0;
+ hcca_t *p_hcca;
+ hced_t *p_ed;
+
+ while (1) {
+ (void)osSemaphoreWait(p_iso_ed->semid_list, osWaitForever);
+ if (p_iso_ed->p_curr_ed == NULL) {
+ p_hcca = (hcca_t *)p_usb_reg->HcHCCA;
+ p_ed = (hced_t *)p_hcca->IntTable[0];
+ while ((p_ed != NULL) && ((p_usb_reg->HcControl & OR_CONTROL_IE) != 0)
+ && (p_iso_ed->p_curr_ed == NULL)) {
+ if (iso_trans_doing(p_ed, (uint32_t)argument) == 0) {
+ p_iso_ed->p_curr_ed = p_ed;
+ if (chk_iso_ed(p_iso_ed) != 0) {
+ iso_trans_setting(p_iso_ed, (uint32_t)argument);
+ } else {
+ p_iso_ed->p_curr_ed = NULL;
+ }
+ }
+ p_ed = p_ed->nextED;
+ }
+ p_iso_ed->psw_idx = 0;
+ }
+ if (p_iso_ed->p_curr_ed != NULL) {
+ while ((p_usb_reg->HcControl & OR_CONTROL_IE) != 0) {
+ if (chk_iso_ed(p_iso_ed) != 0) {
+ wait_time = iso_chk_starting_frame(p_iso_ed);
+ if (wait_time != 0) {
+ osDelay(wait_time);
+ p_usb_reg->HcFmNumber += wait_time;
+ p_usb_reg->HcFmNumber &= 0x0000FFFF;
+ }
+ p_iso_ed->psw_idx = 0;
+ iso_trans(p_iso_ed);
+ (void)osSemaphoreWait(p_iso_ed->semid_wait, osWaitForever);
+ usbx_host_stop_transfer(p_iso_ed->pipe_no);
+ wait_cnt = 1;
+ } else {
+ if (wait_cnt > 0) {
+ wait_cnt--;
+ } else {
+ p_iso_ed->p_curr_ed = NULL;
+ }
+ break;
+ }
+ }
+ }
+ (void)osSemaphoreRelease(p_iso_ed->semid_list);
+ if (p_iso_ed->p_curr_ed == NULL) {
+ osDelay(10);
+ } else {
+ osDelay(1);
+ }
}
}
+static int32_t iso_trans_doing(hced_t *p_ed, uint32_t index) {
+ uint32_t cnt;
+ int32_t ret = 0;
+
+ for (cnt = 0; cnt < ISO_TRANS_MAX_NUM; cnt++) {
+ if ((index != cnt) && (iso_ed[cnt].p_curr_ed == p_ed)) {
+ ret = 1;
+ }
+ }
+
+ return ret;
+}
+
+static void chk_iso_td_done(genelal_ed_t *p_g_ed) {
+ hcca_t *p_hcca;
+ hcisotd_t *p_isotd = (hcisotd_t *)p_g_ed->p_curr_td;
+ uint32_t ConditionCode = RZA_IO_RegRead_32(&p_isotd->control, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
+
+ if ((ConditionCode != TD_CC_NOT_ACCESSED_1) && (ConditionCode != TD_CC_NOT_ACCESSED_2)) {
+ p_g_ed->p_curr_ed->headTD = ((uint32_t)p_isotd->nextTD & 0xFFFFFFF0)
+ | (p_g_ed->p_curr_ed->headTD & 0x0000000F);
+ p_isotd->nextTD = (hcisotd_t *)p_usb_reg->HcDoneHead;
+ p_usb_reg->HcDoneHead = (uint32_t)p_g_ed->p_curr_td;
+ if ((p_usb_reg->HcInterruptStatus & OR_INTR_STATUS_WDH) == 0) {
+ p_hcca = (hcca_t *)p_usb_reg->HcHCCA;
+ p_hcca->DoneHead = p_usb_reg->HcDoneHead;
+ p_usb_reg->HcDoneHead = 0x00000000;
+ p_usb_reg->HcInterruptStatus |= OR_INTR_STATUS_WDH;
+ (void)osSemaphoreRelease(semid_cb);
+ }
+ }
+}
+
+static int32_t chk_iso_ed(genelal_ed_t *p_g_ed){
+ int32_t ret = 0;
+ hced_t *p_ed = p_g_ed->p_curr_ed;
+
+ if (((p_ed->control & ED_SKIP) != 0)
+ || ((p_ed->control & ED_FORMAT) == 0)
+ || ((p_ed->headTD & ED_HALTED) != 0)
+ || ((p_ed->tailTD & 0xFFFFFFF0) == (p_ed->headTD & 0xFFFFFFF0))) {
+ /* Do Nothing */
+ } else if ((p_ed->control & 0x0000007F) > 10) {
+ p_ed->headTD |= ED_HALTED;
+ } else {
+ p_g_ed->p_curr_td = (void *)(p_ed->headTD & 0xFFFFFFF0);
+ if (p_g_ed->p_curr_td == NULL) {
+ p_ed->headTD |= ED_HALTED;
+ } else {
+ hcisotd_t *p_isotd = (hcisotd_t *)p_g_ed->p_curr_td;
+
+ p_g_ed->p_start_buf = p_isotd->bufferPage0;
+ ret = 1;
+ }
+ }
+
+ return ret;
+}
+
+static void iso_trans_setting(genelal_ed_t *p_g_ed, uint32_t index) {
+ tdinfo_t td_info;
+ USB_HOST_CFG_PIPETBL_t *user_table = &usb_host_iso_ep_tbl1[index];
+ uint8_t wk_table[6];
+ uint16_t devadd;
+
+ get_td_info(p_g_ed, &td_info);
+
+ wk_table[0] = 0;
+ wk_table[1] = USB_HOST_ENDPOINT_DESC;
+ wk_table[2] = td_info.endpoint_no;
+ if (td_info.direction == 2) {
+ wk_table[2] |= USB_HOST_EP_IN;
+ }
+ wk_table[3] = USB_HOST_EP_ISO;
+ wk_table[4] = (uint8_t)td_info.msp;
+ wk_table[5] = (uint8_t)(td_info.msp >> 8);
+ p_g_ed->cycle_time = 1;
+ user_table->pipe_cycle = 0;
+ if (g_usbx_host_UsbDeviceSpeed == USB_HOST_HIGH_SPEED) {
+ usbx_host_get_devadd(td_info.devadr, &devadd);
+ if (RZA_IO_RegRead_16(&devadd, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD) == USB_HOST_HIGH_SPEED) {
+ user_table->pipe_cycle += 3;
+ }
+ }
+
+ p_g_ed->pipe_no = user_table->pipe_number;
+ usbx_api_host_SetEndpointTable(td_info.devadr, user_table, wk_table);
+}
+
+static uint32_t iso_chk_starting_frame(genelal_ed_t *p_g_ed) {
+ hcisotd_t *p_isotd = (hcisotd_t *)p_g_ed->p_curr_td;
+ uint32_t starting_frame = p_isotd->control & 0x0000FFFF;
+ uint32_t wait_time = 0;
+
+ if ((p_g_ed->psw_idx == 0) && (starting_frame > p_usb_reg->HcFmNumber)) {
+ wait_time = starting_frame - p_usb_reg->HcFmNumber;
+ }
+
+ return wait_time;
+}
+
+static void iso_trans(genelal_ed_t *p_g_ed) {
+ hcisotd_t *p_isotd = (hcisotd_t *)p_g_ed->p_curr_td;
+ tdinfo_t td_info;
+ uint32_t buff_addr;
+ uint32_t data_size;
+
+ if (((uint32_t)p_isotd->offsetPSW[p_g_ed->psw_idx] & 0x00001000) == 0) {
+ buff_addr = (uint32_t)p_isotd->bufferPage0 & 0xFFFFF000;
+ } else {
+ buff_addr = (uint32_t)p_isotd->bufEnd & 0xFFFFF000;
+ }
+ buff_addr |= (uint32_t)p_isotd->offsetPSW[p_g_ed->psw_idx] & 0x00000FFF;
+
+ if (p_g_ed->psw_idx < RZA_IO_RegRead_32(&p_isotd->control, TD_CTL_SHFT_FC, TD_CTL_MSK_FC)) {
+ data_size = p_isotd->offsetPSW[p_g_ed->psw_idx + 1] - p_isotd->offsetPSW[p_g_ed->psw_idx];
+ } else {
+ data_size = (uint32_t)p_isotd->bufEnd - buff_addr + 1;
+ }
+ p_isotd->offsetPSW[p_g_ed->psw_idx] = (uint16_t)data_size;
+
+ get_td_info(p_g_ed, &td_info);
+ p_g_ed->trans_wait = 1;
+ if (td_info.direction == 1) {
+ usbx_host_start_send_transfer(p_g_ed->pipe_no, data_size, (uint8_t *)buff_addr);
+ } else {
+ usbx_host_start_receive_transfer(p_g_ed->pipe_no, data_size, (uint8_t *)buff_addr);
+ }
+}
+#endif
+
static void connect_check(void) {
- uint32_t cnt;
uint32_t type = 0;
uint16_t stat;
uint16_t devadd = 0;
uint32_t wk_HcRhPortStatus1 = p_usb_reg->HcRhPortStatus1;
- if (usb0_host_CheckAttach() == USB_HOST_ATTACH) {
+ if (usbx_host_CheckAttach() == USB_HOST_ATTACH) {
type = 1;
}
@@ -942,36 +1292,41 @@
}
if (type == 0) {
- usb0_host_UsbDetach();
+ usbx_host_UsbDetach();
wk_HcRhPortStatus1 &= ~OR_RH_PORT_CCS;
} else {
- usb0_host_UsbAttach();
- stat = usb0_host_UsbBusReset();
+ usbx_host_UsbAttach();
+ stat = usbx_host_UsbBusReset();
RZA_IO_RegWrite_16(&devadd, 0, USB_DEVADDn_UPPHUB_SHIFT, USB_DEVADDn_UPPHUB);
RZA_IO_RegWrite_16(&devadd, 0, USB_DEVADDn_HUBPORT_SHIFT, USB_DEVADDn_HUBPORT);
if (stat == USB_HOST_HSMODE) {
wk_HcRhPortStatus1 &= ~OR_RH_PORT_LSDA;
- RZA_IO_RegWrite_16(&USB200.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
- g_usb0_host_UsbDeviceSpeed = USB_HOST_HIGH_SPEED;
+ RZA_IO_RegWrite_16(&USB20X.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
+ g_usbx_host_UsbDeviceSpeed = USB_HOST_HIGH_SPEED;
} else if (stat == USB_HOST_FSMODE) {
wk_HcRhPortStatus1 &= ~OR_RH_PORT_LSDA;
- RZA_IO_RegWrite_16(&USB200.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
- g_usb0_host_UsbDeviceSpeed = USB_HOST_FULL_SPEED;
+ RZA_IO_RegWrite_16(&USB20X.SOFCFG, 0, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
+ g_usbx_host_UsbDeviceSpeed = USB_HOST_FULL_SPEED;
} else {
wk_HcRhPortStatus1 |= OR_RH_PORT_LSDA;
- RZA_IO_RegWrite_16(&USB200.SOFCFG, 1, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
- g_usb0_host_UsbDeviceSpeed = USB_HOST_LOW_SPEED;
+ RZA_IO_RegWrite_16(&USB20X.SOFCFG, 1, USB_SOFCFG_TRNENSEL_SHIFT, USB_SOFCFG_TRNENSEL);
+ g_usbx_host_UsbDeviceSpeed = USB_HOST_LOW_SPEED;
}
- RZA_IO_RegWrite_16(&devadd, g_usb0_host_UsbDeviceSpeed, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD);
- usb0_host_init_pipe_status();
- usb0_host_set_devadd(USB_HOST_DEVICE_0, &devadd);
+ RZA_IO_RegWrite_16(&devadd, g_usbx_host_UsbDeviceSpeed, USB_DEVADDn_USBSPD_SHIFT, USB_DEVADDn_USBSPD);
+ usbx_host_init_pipe_status();
+ usbx_host_set_devadd(USB_HOST_DEVICE_0, &devadd);
wk_HcRhPortStatus1 |= OR_RH_PORT_CCS;
}
wk_HcRhPortStatus1 |= OR_RH_PORT_CSC;
p_usb_reg->HcRhPortStatus1 = wk_HcRhPortStatus1;
p_usb_reg->HcInterruptStatus |= OR_INTR_STATUS_RHSC;
(void)memset(&split_ctl, 0, sizeof(split_ctl));
+}
+void ohciwrapp_loc_Connect(uint32_t type) {
+ uint32_t cnt;
+
+ connect_change = type;
if (type == 0) {
if (ctl_ed.trans_wait == 1) {
ohciwrapp_loc_TransEnd(ctl_ed.pipe_no, TD_CC_DEVICENOTRESPONDING);
@@ -984,18 +1339,24 @@
ohciwrapp_loc_TransEnd(int_ed[cnt].pipe_no, TD_CC_DEVICENOTRESPONDING);
}
}
- }
-}
+#if (ISO_TRANS_MAX_NUM > 0)
+ for (cnt = 0; cnt< ISO_TRANS_MAX_NUM; cnt++) {
+ if (iso_ed[cnt].trans_wait == 1) {
+ hced_t *p_ed = iso_ed[cnt].p_curr_ed;
-void ohciwrapp_loc_Connect(uint32_t type) {
- connect_change = type;
+ p_ed->headTD |= ED_HALTED;
+ ohciwrapp_loc_TransEnd(iso_ed[cnt].pipe_no, TD_CC_DEVICENOTRESPONDING);
+ }
+ }
+#endif
+ }
(void)osSemaphoreRelease(semid_cb);
}
void ohciwrapp_loc_TransEnd(uint32_t pipe, uint32_t ConditionCode) {
+ uint32_t periodic = 0;
uint32_t cnt;
uint32_t sqmon;
- hctd_t *p_td;
hced_t *p_ed;
genelal_ed_t *p_wait_ed = NULL;
@@ -1004,48 +1365,122 @@
} else if (blk_ed.pipe_no == pipe) {
p_wait_ed = &blk_ed;
} else {
- for (cnt = 0; cnt< INT_TRANS_MAX_NUM; cnt++) {
- if (int_ed[cnt].pipe_no == pipe) {
- p_wait_ed = &int_ed[cnt];
- break;
+#if (ISO_TRANS_MAX_NUM > 0)
+ if (p_wait_ed == NULL) {
+ for (cnt = 0; cnt< ISO_TRANS_MAX_NUM; cnt++) {
+ if (iso_ed[cnt].pipe_no == pipe) {
+ p_wait_ed = &iso_ed[cnt];
+ break;
+ }
+ }
+ }
+#endif
+ if (p_wait_ed == NULL) {
+ for (cnt = 0; cnt< INT_TRANS_MAX_NUM; cnt++) {
+ if (int_ed[cnt].pipe_no == pipe) {
+ p_wait_ed = &int_ed[cnt];
+ periodic = 1;
+ break;
+ }
}
}
}
+
if (p_wait_ed == NULL) {
return;
}
-
- p_td = p_wait_ed->p_curr_td;
p_ed = p_wait_ed->p_curr_ed;
- if ((p_td == NULL) || (p_ed == NULL)) {
+ if (p_ed == NULL) {
return;
}
- if (ConditionCode == TD_CC_NOERROR) {
- /* ErrorCount */
- RZA_IO_RegWrite_32(&p_td->control, 0, TD_CTL_SHFT_EC, TD_CTL_MSK_EC);
+ if ((p_ed->control & ED_FORMAT) == 0) {
+ hctd_t *p_td = (hctd_t *)p_wait_ed->p_curr_td;
+
+ if (p_td != NULL) {
+ if (ConditionCode == TD_CC_NOERROR) {
+ /* ErrorCount */
+ RZA_IO_RegWrite_32(&p_td->control, 0, TD_CTL_SHFT_EC, TD_CTL_MSK_EC);
+
+ /* CurrentBufferPointer */
+ p_td->currBufPtr += ((uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1) - g_usbx_host_data_count[pipe];
+ } else {
+ /* ErrorCount */
+ RZA_IO_RegWrite_32(&p_td->control, 3, TD_CTL_SHFT_EC, TD_CTL_MSK_EC);
+ }
+
+ /* DataToggle */
+ sqmon = usbx_host_get_sqmon(pipe);
+ RZA_IO_RegWrite_32(&p_td->control, sqmon, TD_CTL_SHFT_T, TD_CTL_MSK_T);
+ if (sqmon == 0) {
+ p_ed->headTD &= ~ED_TOGLE_CARRY;
+ } else {
+ p_ed->headTD |= ED_TOGLE_CARRY;
+ }
+
+ /* ConditionCode */
+ RZA_IO_RegWrite_32(&p_td->control, ConditionCode, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
+
+ if (p_wait_ed == &ctl_ed) {
+ chk_split_trans_setting(&ctl_ed);
+ }
+ chk_genelal_td_done(p_wait_ed);
- /* CurrentBufferPointer */
- p_td->currBufPtr += ((uint32_t)p_td->bufEnd - (uint32_t)p_td->currBufPtr + 1) - g_usb0_host_data_count[pipe];
+ if (periodic != 0) {
+ if (chk_genelal_ed(p_wait_ed) != 0) {
+ int_trans(p_wait_ed);
+ } else {
+ p_wait_ed->trans_wait = 0;
+ (void)osSemaphoreRelease(p_wait_ed->semid_wait);
+ }
+ } else {
+ p_wait_ed->trans_wait = 0;
+ (void)osSemaphoreRelease(p_wait_ed->semid_wait);
+ }
+ }
} else {
- /* ErrorCount */
- RZA_IO_RegWrite_32(&p_td->control, 3, TD_CTL_SHFT_EC, TD_CTL_MSK_EC);
+#if (ISO_TRANS_MAX_NUM > 0)
+ hcisotd_t *p_isotd = (hcisotd_t *)p_wait_ed->p_curr_td;
+ uint32_t next_trans = 0;
+
+ if (p_isotd != NULL) {
+ usbx_host_stop_transfer(pipe);
+ if (p_usb_reg->HcFmNumber < 0x0000FFFF) {
+ p_usb_reg->HcFmNumber++;
+ } else {
+ p_usb_reg->HcFmNumber = 0;
+ }
+
+ /* Size of packet */
+ p_isotd->offsetPSW[p_wait_ed->psw_idx] -= g_usbx_host_data_count[pipe];
+
+ /* ConditionCode */
+ RZA_IO_RegWrite_32(&p_isotd->control, ConditionCode, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
+ RZA_IO_RegWrite_16(&p_isotd->offsetPSW[p_wait_ed->psw_idx],
+ (uint16_t)ConditionCode, TD_PSW_SHFT_CC, TD_PSW_MSK_CC);
+
+ if (usbx_host_CheckAttach() != USB_HOST_ATTACH) {
+ p_ed->headTD |= ED_HALTED;
+ }
+ if (p_wait_ed->psw_idx >= RZA_IO_RegRead_32(&p_isotd->control, TD_CTL_SHFT_FC, TD_CTL_MSK_FC)) {
+ p_wait_ed->psw_idx = 0;
+ chk_iso_td_done(p_wait_ed);
+ } else {
+ p_wait_ed->psw_idx++;
+ }
+ if (chk_iso_ed(p_wait_ed) != 0) {
+ if (iso_chk_starting_frame(p_wait_ed) == 0) {
+ iso_trans(p_wait_ed);
+ next_trans = 1;
+ }
+ }
+ if (next_trans == 0) {
+ p_wait_ed->trans_wait = 0;
+ (void)osSemaphoreRelease(p_wait_ed->semid_wait);
+ }
+ }
+#endif
}
- /* DataToggle */
- sqmon = usb0_host_get_sqmon(pipe);
- RZA_IO_RegWrite_32(&p_td->control, sqmon, TD_CTL_SHFT_T, TD_CTL_MSK_T);
- if (sqmon == 0) {
- p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD & ~ED_TOGLE_CARRY);
- } else {
- p_ed->headTD = (hctd_t *)((uint32_t)p_ed->headTD | ED_TOGLE_CARRY);
- }
-
- /* ConditionCode */
- RZA_IO_RegWrite_32(&p_td->control, ConditionCode, TD_CTL_SHFT_CC, TD_CTL_MSK_CC);
-
- p_wait_ed->trans_wait = 0;
-
- (void)osSemaphoreRelease(p_wait_ed->semid_wait);
}
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_RZ_A1.h Fri Feb 27 10:01:08 2015 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_RZ_A1.h Tue Mar 31 16:15:42 2015 +0100
@@ -23,32 +23,32 @@
extern "C" {
#endif
-#define OHCI_REG_REVISION (0x00)
-#define OHCI_REG_CONTROL (0x04)
-#define OHCI_REG_COMMANDSTATUS (0x08)
-#define OHCI_REG_INTERRUPTSTATUS (0x0C)
-#define OHCI_REG_INTERRUPTENABLE (0x10)
-#define OHCI_REG_INTERRUPTDISABLE (0x14)
-#define OHCI_REG_HCCA (0x18)
-#define OHCI_REG_PERIODCURRENTED (0x1C)
-#define OHCI_REG_CONTROLHEADED (0x20)
-#define OHCI_REG_CONTROLCURRENTED (0x24)
-#define OHCI_REG_BULKHEADED (0x28)
-#define OHCI_REG_BULKCURRENTED (0x2C)
-#define OHCI_REG_DONEHEADED (0x30)
-#define OHCI_REG_FMINTERVAL (0x34)
-#define OHCI_REG_FMREMAINING (0x38)
-#define OHCI_REG_FMNUMBER (0x3C)
-#define OHCI_REG_PERIODICSTART (0x40)
-#define OHCI_REG_LSTHRESHOLD (0x44)
-#define OHCI_REG_RHDESCRIPTORA (0x48)
-#define OHCI_REG_RHDESCRIPTORB (0x4C)
-#define OHCI_REG_RHSTATUS (0x50)
-#define OHCI_REG_RHPORTSTATUS1 (0x54)
+#define OHCI_REG_REVISION (0x00) /* HcRevision */
+#define OHCI_REG_CONTROL (0x04) /* HcControl */
+#define OHCI_REG_COMMANDSTATUS (0x08) /* HcCommandStatus */
+#define OHCI_REG_INTERRUPTSTATUS (0x0C) /* HcInterruptStatus */
+#define OHCI_REG_INTERRUPTENABLE (0x10) /* HcInterruptEnable */
+#define OHCI_REG_INTERRUPTDISABLE (0x14) /* HcInterruptDisable */
+#define OHCI_REG_HCCA (0x18) /* HcHCCA */
+#define OHCI_REG_PERIODCURRENTED (0x1C) /* HcPeriodCurrentED */
+#define OHCI_REG_CONTROLHEADED (0x20) /* HcControlHeadED */
+#define OHCI_REG_CONTROLCURRENTED (0x24) /* HcControlCurrentED */
+#define OHCI_REG_BULKHEADED (0x28) /* HcBulkHeadED */
+#define OHCI_REG_BULKCURRENTED (0x2C) /* HcBulkCurrentED */
+#define OHCI_REG_DONEHEADED (0x30) /* HcDoneHead */
+#define OHCI_REG_FMINTERVAL (0x34) /* HcFmInterval */
+#define OHCI_REG_FMREMAINING (0x38) /* HcFmRemaining */
+#define OHCI_REG_FMNUMBER (0x3C) /* HcFmNumber */
+#define OHCI_REG_PERIODICSTART (0x40) /* HcPeriodicStart */
+#define OHCI_REG_LSTHRESHOLD (0x44) /* HcLSThreshold */
+#define OHCI_REG_RHDESCRIPTORA (0x48) /* HcRhDescriptorA */
+#define OHCI_REG_RHDESCRIPTORB (0x4C) /* HcRhDescriptorB */
+#define OHCI_REG_RHSTATUS (0x50) /* HcRhStatus */
+#define OHCI_REG_RHPORTSTATUS1 (0x54) /* HcRhPortStatus1 */
typedef void (usbisr_fnc_t)(void);
-extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed);
+extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc);
extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
extern void ohciwrapp_interrupt(uint32_t int_sense);
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/ohci_wrapp_pipe.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,190 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "devdrv_usb_host_api.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/********************************************************************************************************/
+/* Endpoint Configuration Data Format */
+/********************************************************************************************************/
+/* LINE1: Pipe Window Select Register */
+/* CPU Access PIPE : PIPE1 to PIPE9 [ ### SET ### ] */
+/* LINE2: Pipe Configuration Register */
+/* Transfer Type : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* Buffer Ready interrupt : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* Double Buffer Mode : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
+/* Continuous Transmit: : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
+/* Short NAK : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* Transfer Direction : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* Endpoint Number : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* LINE3: Pipe Buffer Configuration Register */
+/* Buffer Size : (uint16_t)((uint16_t)(((x) / 64) - 1) << 10) */
+/* [ ### SET ### ] */
+/* Buffer Top Number : (uint16_t)(x) [ ### SET ### ] */
+/* LINE4: Pipe Maxpacket Size Register */
+/* Max Packet Size : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* LINE5: Pipe Cycle Configuration Register (0x6C) */
+/* ISO Buffer Flush Mode : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* ISO Interval Value : USB_HOST_NONE [ USB_HOST_NONE ] */
+/* LINE6: use FIFO port */
+/* : USB_HOST_CUSE [ ### SET ### ] */
+/* : USB_HOST_D0USE / USB_HOST_D1USE */
+/* : USB_HOST_D0DMA / USB_HOST_D0DMA */
+/* LINE7: use FIFO port Endian : USB_HOST_FIFO_BIG / USB_HOST_FIFO_LITTLE [ #SET# ] */
+/********************************************************************************************************/
+
+/* Device Address 1 */
+USB_HOST_CFG_PIPETBL_t usb_host_blk_ep_tbl1[ ] =
+{
+ {
+ USB_HOST_PIPE3,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(8),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D0USE
+ },
+
+ {
+ /* Pipe end */
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF
+ }
+};
+
+USB_HOST_CFG_PIPETBL_t usb_host_int_ep_tbl1[ ] =
+{
+ {
+ USB_HOST_PIPE6,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(40),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ USB_HOST_PIPE7,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(41),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ USB_HOST_PIPE8,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(42),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ USB_HOST_PIPE9,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(43),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ /* Pipe end */
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF
+ }
+};
+
+USB_HOST_CFG_PIPETBL_t usb_host_iso_ep_tbl1[ ] =
+{
+ {
+ USB_HOST_PIPE1,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(44),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ USB_HOST_PIPE2,
+ /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
+ USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
+ (uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(60),
+ USB_HOST_NONE,
+ USB_HOST_NONE,
+ USB_HOST_D1USE
+ },
+
+ {
+ /* Pipe end */
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF,
+ 0xFFFF
+ }
+};
+
+
+/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/common/usb0_host_dataio.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,2835 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_dataio.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-static uint16_t g_usb0_host_mbw[(USB_HOST_MAX_PIPE_NO + 1)];
-
-static void usb0_host_start_receive_trns_c(uint16_t pipe, uint32_t size, uint8_t *data);
-static void usb0_host_start_receive_trns_d0(uint16_t pipe, uint32_t size, uint8_t *data);
-static void usb0_host_start_receive_trns_d1(uint16_t pipe, uint32_t size, uint8_t *data);
-static void usb0_host_start_receive_dma_d0(uint16_t pipe, uint32_t size, uint8_t *data);
-static void usb0_host_start_receive_dma_d1(uint16_t pipe, uint32_t size, uint8_t *data);
-static uint16_t usb0_host_read_dma_d0(uint16_t pipe);
-static uint16_t usb0_host_read_dma_d1(uint16_t pipe);
-static uint16_t usb0_host_write_dma_d0(uint16_t pipe);
-static uint16_t usb0_host_write_dma_d1(uint16_t pipe);
-
-static void usb0_host_read_c_fifo(uint16_t pipe, uint16_t count);
-static void usb0_host_write_c_fifo(uint16_t Pipe, uint16_t count);
-static void usb0_host_read_d0_fifo(uint16_t pipe, uint16_t count);
-static void usb0_host_write_d0_fifo(uint16_t pipe, uint16_t count);
-static void usb0_host_read_d1_fifo(uint16_t pipe, uint16_t count);
-static void usb0_host_write_d1_fifo(uint16_t pipe, uint16_t count);
-
-static void usb0_host_clear_transaction_counter(uint16_t pipe);
-static void usb0_host_set_transaction_counter(uint16_t pipe, uint32_t count);
-
-static uint32_t usb0_host_com_get_dmasize(uint32_t trncount, uint32_t dtptr);
-
-static uint16_t usb0_host_set_dfacc_d0(uint16_t mbw, uint32_t count);
-static uint16_t usb0_host_set_dfacc_d1(uint16_t mbw, uint32_t count);
-
-
-/*******************************************************************************
-* Function Name: usb0_host_start_send_transfer
-* Description : Starts the USB data communication using pipe specified by the argument.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data data Address
-* Return Value : USB_HOST_WRITEEND ; Write end
-* : USB_HOST_WRITESHRT ; short data
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_WRITEDMA ; Write DMA
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_start_send_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t status;
- uint16_t usefifo;
- uint16_t mbw;
-
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- usb0_host_clear_bemp_sts(pipe);
- usb0_host_clear_brdy_sts(pipe);
- usb0_host_clear_nrdy_sts(pipe);
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
-
- usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- switch (usefifo)
- {
- case USB_HOST_D0FIFO_USE:
- case USB_HOST_D0FIFO_DMA:
- usefifo = USB_HOST_D0USE;
- break;
-
- case USB_HOST_D1FIFO_USE:
- case USB_HOST_D1FIFO_DMA:
- usefifo = USB_HOST_D1USE;
- break;
-
- default:
- usefifo = USB_HOST_CUSE;
- break;
- };
-
- usb0_host_set_curpipe(USB_HOST_PIPE0, usefifo, USB_HOST_NO, mbw);
-
- usb0_host_clear_transaction_counter(pipe);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- status = usb0_host_write_buffer(pipe);
-
- if (status != USB_HOST_FIFOERROR)
- {
- usb0_host_set_pid_buf(pipe);
- }
-
- return status;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_buffer
-* Description : Writes data in the buffer allocated in the pipe specified by
-* : the argument. The FIFO for using is set in the pipe definition table.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND ; Write end
-* : USB_HOST_WRITESHRT ; short data
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_WRITEDMA ; Write DMA
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_write_buffer (uint16_t pipe)
-{
- uint16_t status;
- uint16_t usefifo;
-
- g_usb0_host_PipeIgnore[pipe] = 0;
- usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- switch (usefifo)
- {
- case USB_HOST_D0FIFO_USE:
- status = usb0_host_write_buffer_d0(pipe);
- break;
-
- case USB_HOST_D1FIFO_USE:
- status = usb0_host_write_buffer_d1(pipe);
- break;
-
- case USB_HOST_D0FIFO_DMA:
- status = usb0_host_write_dma_d0(pipe);
- break;
-
- case USB_HOST_D1FIFO_DMA:
- status = usb0_host_write_dma_d1(pipe);
- break;
-
- default:
- status = usb0_host_write_buffer_c(pipe);
- break;
- };
-
- switch (status)
- {
- case USB_HOST_WRITING: /* Continue of data write */
- usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
- usb0_host_enable_brdy_int(pipe); /* Enable Ready Interrupt */
- break;
-
- case USB_HOST_WRITEEND: /* End of data write */
- case USB_HOST_WRITESHRT: /* End of data write */
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
-
- usb0_host_clear_nrdy_sts(pipe);
- usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
-
- /* for last transfer */
- usb0_host_enable_bemp_int(pipe); /* Enable Empty Interrupt */
- break;
-
- case USB_HOST_WRITEDMA: /* DMA write */
- usb0_host_clear_nrdy_sts(pipe);
- usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access status */
- default:
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
- usb0_host_disable_bemp_int(pipe); /* Disable Empty Interrupt */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
- break;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_buffer_c
-* Description : Writes data in the buffer allocated in the pipe specified in
-* : the argument. Writes data by CPU transfer using CFIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND ; Write end
-* : USB_HOST_WRITESHRT ; short data
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_WRITEDMA ; Write DMA
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_write_buffer_c (uint16_t pipe)
-{
- uint32_t count;
- uint16_t size;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
-
- if (pipe == USB_HOST_PIPE0)
- {
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_CFIFO_WRITE, mbw);
- }
- else
- {
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
- }
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
- {
- status = USB_HOST_WRITEEND; /* write continues */
- count = g_usb0_host_data_count[pipe];
-
- if (count == 0)
- {
- status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
- }
- }
- else
- {
- status = USB_HOST_WRITING; /* write continues */
- count = (uint32_t)size;
- }
-
- usb0_host_write_c_fifo(pipe, (uint16_t)count);
-
- if (g_usb0_host_data_count[pipe] < (uint32_t)size)
- {
- g_usb0_host_data_count[pipe] = 0;
-
- if (RZA_IO_RegRead_16(&USB200.CFIFOCTR,
- USB_CFIFOCTR_BVAL_SHIFT,
- USB_CFIFOCTR_BVAL) == 0)
- {
- USB200.CFIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
- }
- }
- else
- {
- g_usb0_host_data_count[pipe] -= count;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_buffer_d0
-* Description : Writes data in the buffer allocated in the pipe specified in the argument.
-* : Writes data by CPU transfer using D0FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND ; Write end
-* : USB_HOST_WRITESHRT ; short data
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_WRITEDMA ; Write DMA
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_write_buffer_d0 (uint16_t pipe)
-{
- uint32_t count;
- uint16_t size;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
- {
- status = USB_HOST_WRITEEND; /* write continues */
- count = g_usb0_host_data_count[pipe];
-
- if (count == 0)
- {
- status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
- }
- }
- else
- {
- status = USB_HOST_WRITING; /* write continues */
- count = (uint32_t)size;
- }
-
- usb0_host_write_d0_fifo(pipe, (uint16_t)count);
-
- if (g_usb0_host_data_count[pipe] < (uint32_t)size)
- {
- g_usb0_host_data_count[pipe] = 0;
-
- if (RZA_IO_RegRead_16(&USB200.D0FIFOCTR,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL) == 0)
- {
- USB200.D0FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
- }
- }
- else
- {
- g_usb0_host_data_count[pipe] -= count;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_buffer_d1
-* Description : Writes data in the buffer allocated in the pipe specified in the argument.
-* : Writes data by CPU transfer using D1FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND ; Write end
-* : USB_HOST_WRITESHRT ; short data
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_WRITEDMA ; Write DMA
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_write_buffer_d1 (uint16_t pipe)
-{
- uint32_t count;
- uint16_t size;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
- {
- status = USB_HOST_WRITEEND; /* write continues */
- count = g_usb0_host_data_count[pipe];
-
- if (count == 0)
- {
- status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
- }
- }
- else
- {
- status = USB_HOST_WRITING; /* write continues */
- count = (uint32_t)size;
- }
-
- usb0_host_write_d1_fifo(pipe, (uint16_t)count);
-
- if (g_usb0_host_data_count[pipe] < (uint32_t)size)
- {
- g_usb0_host_data_count[pipe] = 0;
-
- if (RZA_IO_RegRead_16(&USB200.D1FIFOCTR,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL) == 0)
- {
- USB200.D1FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
- }
- }
- else
- {
- g_usb0_host_data_count[pipe] -= count;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_dma_d0
-* Description : Writes data in the buffer allocated in the pipe specified in the argument.
-* : Writes data by DMA transfer using D0FIFO.
-* : The DMA-ch for using is specified by Userdef_USB_usb0_host_start_dma().
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND : Write end
-* : USB_HOST_WRITESHRT : short data
-* : USB_HOST_WRITING : Continue of data write
-* : USB_HOST_WRITEDMA : Write DMA
-* : USB_HOST_FIFOERROR : FIFO status
-*******************************************************************************/
-static uint16_t usb0_host_write_dma_d0 (uint16_t pipe)
-{
- uint32_t count;
- uint16_t size;
- uint16_t buffer;
- uint16_t status;
- uint16_t mbw;
- uint16_t dfacc = 0;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- count = g_usb0_host_data_count[pipe];
-
- if (count != 0)
- {
- g_usb0_host_DmaPipe[USB_HOST_D0FIFO] = pipe;
-
- if ((count % size) != 0)
- {
- g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 1;
- }
- else
- {
- g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 0;
- }
-
- dfacc = usb0_host_set_dfacc_d0(mbw, count);
-
- if (mbw == USB_HOST_BITMBW_32)
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
- }
- else
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
- }
-
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_BUF2FIFO;
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
-
- Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
-
- usb0_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
-
- RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
- 1,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
-
- g_usb0_host_data_count[pipe] = 0;
- g_usb0_host_data_pointer[pipe] += count;
-
- status = USB_HOST_WRITEDMA; /* DMA write */
- }
- else
- {
- if (RZA_IO_RegRead_16(&USB200.D0FIFOCTR,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL) == 0)
- {
- RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
- 1,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL); /* Short Packet */
- }
- status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_dma_d1
-* Description : Writes data in the buffer allocated in the pipe specified in the argument.
-* : Writes data by DMA transfer using D1FIFO.
-* : The DMA-ch for using is specified by Userdef_USB_usb0_host_start_dma().
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_WRITEEND : Write end
-* : USB_HOST_WRITESHRT : short data
-* : USB_HOST_WRITING : Continue of data write
-* : USB_HOST_WRITEDMA : Write DMA
-* : USB_HOST_FIFOERROR : FIFO status
-*******************************************************************************/
-static uint16_t usb0_host_write_dma_d1 (uint16_t pipe)
-{
- uint32_t count;
- uint16_t size;
- uint16_t buffer;
- uint16_t status;
- uint16_t mbw;
- uint16_t dfacc = 0;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- count = g_usb0_host_data_count[pipe];
-
- if (count != 0)
- {
- g_usb0_host_DmaPipe[USB_HOST_D1FIFO] = pipe;
-
- if ((count % size) != 0)
- {
- g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 1;
- }
- else
- {
- g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 0;
- }
-
- dfacc = usb0_host_set_dfacc_d1(mbw, count);
-
- if (mbw == USB_HOST_BITMBW_32)
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
- }
- else
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
- }
-
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_BUF2FIFO;
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
-
- Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
-
- usb0_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw, dfacc);
-
- RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
- 1,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
-
- g_usb0_host_data_count[pipe] = 0;
- g_usb0_host_data_pointer[pipe] += count;
-
- status = USB_HOST_WRITEDMA; /* DMA write */
- }
- else
- {
- if (RZA_IO_RegRead_16(&USB200.D1FIFOCTR,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL) == 0)
- {
- RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
- 1,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL); /* Short Packet */
- }
- status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_transfer
-* Description : Starts USB data reception using the pipe specified in the argument.
-* : The FIFO for using is set in the pipe definition table.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-void usb0_host_start_receive_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t usefifo;
-
- usb0_host_clear_bemp_sts(pipe);
- usb0_host_clear_brdy_sts(pipe);
- usb0_host_clear_nrdy_sts(pipe);
-
- usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- switch (usefifo)
- {
- case USB_HOST_D0FIFO_USE:
- usb0_host_start_receive_trns_d0(pipe, size, data);
- break;
-
- case USB_HOST_D1FIFO_USE:
- usb0_host_start_receive_trns_d1(pipe, size, data);
- break;
-
- case USB_HOST_D0FIFO_DMA:
- usb0_host_start_receive_dma_d0(pipe, size, data);
- break;
-
- case USB_HOST_D1FIFO_DMA:
- usb0_host_start_receive_dma_d1(pipe, size, data);
- break;
-
- default:
- usb0_host_start_receive_trns_c(pipe, size, data);
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_trns_c
-* Description : Reads data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by CPU transfer using CFIFO.
-* : When storing data in the buffer allocated in the pipe specified in the
-* : argument, BRDY interrupt is generated to read data
-* : in the interrupt.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_start_receive_trns_c (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t mbw;
-
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- g_usb0_host_PipeDataSize[pipe] = size;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_CFIFO_READ, mbw);
- USB200.CFIFOCTR = USB_HOST_BITBCLR;
-
- usb0_host_set_transaction_counter(pipe, size);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
-
- usb0_host_set_pid_buf(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_trns_d0
-* Description : Reads data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by CPU transfer using D0FIFO.
-* : This function does not read data from the buffer.
-* : When storing data in the buffer allocated in the pipe specified
-* : in the argument, BRDY interrupt is generated to read data in the
-* : interrupt.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_start_receive_trns_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t mbw;
-
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- g_usb0_host_PipeDataSize[pipe] = size;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
-
- usb0_host_set_transaction_counter(pipe, size);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
-
- usb0_host_set_pid_buf(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_trns_d1
-* Description : Reads data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by CPU transfer using D1FIFO.
-* : This function does not read data from the buffer.
-* : When storing data in the buffer allocated in the pipe specified
-* : in the argument, BRDY interrupt is generated to read data.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_start_receive_trns_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t mbw;
-
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- g_usb0_host_PipeDataSize[pipe] = size;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
-
- usb0_host_set_transaction_counter(pipe, size);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
-
- usb0_host_set_pid_buf(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_dma_d0
-* Description : Reads data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by DMA transfer using D0FIFO.
-* : This function does not read data from the buffer.
-* : When storing data in the buffer allocated in the pipe specified
-* : in the argument, delivered read request to DMAC to read data from
-* : the buffer by DMAC.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_start_receive_dma_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t mbw;
-
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- g_usb0_host_PipeDataSize[pipe] = 0;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
-
- usb0_host_set_transaction_counter(pipe, size);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- usb0_host_read_dma(pipe);
-
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
- }
- else
- {
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
- }
-
- usb0_host_set_pid_buf(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_start_receive_dma_d1
-* Description : Read data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by DMA transfer using D0FIFO.
-* : This function does not read data from the buffer.
-* : When storing data in the buffer allocated in the pipe specified
-* : in the argument, delivered read request to DMAC to read data from
-* : the buffer by DMAC.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t size ; Data Size
-* : uint8_t *data ; Data Address
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_start_receive_dma_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
-{
- uint16_t mbw;
-
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_data_count[pipe] = size;
- g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- g_usb0_host_PipeDataSize[pipe] = 0;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
-
- mbw = usb0_host_get_mbw(size, (uint32_t)data);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
-
- usb0_host_set_transaction_counter(pipe, size);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- usb0_host_read_dma(pipe);
-
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
- }
- else
- {
- usb0_host_enable_nrdy_int(pipe);
- usb0_host_enable_brdy_int(pipe);
- }
-
- usb0_host_set_pid_buf(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_buffer
-* Description : Reads data from the buffer allocated in the pipe specified
-* : in the argument.
-* : Uses FIF0 set in the pipe definition table.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_read_buffer (uint16_t pipe)
-{
- uint16_t status;
-
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
- {
- status = usb0_host_read_buffer_d0(pipe);
- }
- else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
- {
- status = usb0_host_read_buffer_d1(pipe);
- }
- else
- {
- status = usb0_host_read_buffer_c(pipe);
- }
-
- switch (status)
- {
- case USB_HOST_READING: /* Continue of data read */
- break;
-
- case USB_HOST_READEND: /* End of data read */
- case USB_HOST_READSHRT: /* End of data read */
- usb0_host_disable_brdy_int(pipe);
- g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- break;
-
- case USB_HOST_READOVER: /* buffer over */
- if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
- {
- USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
- {
- USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- else
- {
- USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
-#else
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
-#endif
- g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access status */
- default:
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
- break;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_buffer_c
-* Description : Reads data from the buffer allocated in the pipe specified in the argument.
-* : Reads data by CPU transfer using CFIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_read_buffer_c (uint16_t pipe)
-{
- uint32_t count;
- uint32_t dtln;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
- {
- status = USB_HOST_READOVER;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = g_usb0_host_data_count[pipe];
- }
- else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
- {
- status = USB_HOST_READEND;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- else /* continue Receive data */
- {
- status = USB_HOST_READING;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
- }
-
- if (count == 0) /* 0 length packet */
- {
- USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- else
- {
- usb0_host_read_c_fifo(pipe, (uint16_t)count);
- }
-
- g_usb0_host_data_count[pipe] -= count;
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_buffer_d0
-* Description : Reads data from the buffer allocated in the pipe specified in
-* : the argument.
-* : Reads data by CPU transfer using D0FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_read_buffer_d0 (uint16_t pipe)
-{
- uint32_t count;
- uint32_t dtln;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
- uint16_t pipebuf_size;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
- {
- status = USB_HOST_READOVER;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = g_usb0_host_data_count[pipe];
- }
- else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
- {
- status = USB_HOST_READEND;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- else /* continue Receive data */
- {
- status = USB_HOST_READING;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
- else
- {
- pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
-
- if (count != pipebuf_size)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
- }
- }
-
- if (count == 0) /* 0 length packet */
- {
- USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- else
- {
- usb0_host_read_d0_fifo(pipe, (uint16_t)count);
- }
-
- g_usb0_host_data_count[pipe] -= count;
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_buffer_d1
-* Description : Reads data from the buffer allocated in the pipe specified
-* : in the argument.
-* : Reads data by CPU transfer using D1FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_read_buffer_d1 (uint16_t pipe)
-{
- uint32_t count;
- uint32_t dtln;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
- uint16_t pipebuf_size;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
- {
- status = USB_HOST_READOVER;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = g_usb0_host_data_count[pipe];
- }
- else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
- {
- status = USB_HOST_READEND;
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) !=0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- else /* continue Receive data */
- {
- status = USB_HOST_READING;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
- else
- {
- pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
- if (count != pipebuf_size)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- usb0_host_set_pid_nak(pipe); /* Set NAK */
- }
- }
- }
-
- if (count == 0) /* 0 length packet */
- {
- USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- }
- else
- {
- usb0_host_read_d1_fifo(pipe, (uint16_t)count);
- }
-
- g_usb0_host_data_count[pipe] -= count;
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_dma
-* Description : Reads data from the buffer allocated in the pipe specified
-* : in the argument.
-* : Reads data by DMA transfer using D0FIFO or D1FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READZERO ; zero data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-uint16_t usb0_host_read_dma (uint16_t pipe)
-{
- uint16_t status;
-
- g_usb0_host_PipeIgnore[pipe] = 0;
-
- if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
- {
- status = usb0_host_read_dma_d0(pipe);
- }
- else
- {
- status = usb0_host_read_dma_d1(pipe);
- }
-
- switch (status)
- {
- case USB_HOST_READING: /* Continue of data read */
- break;
-
- case USB_HOST_READZERO: /* End of data read */
- usb0_host_disable_brdy_int(pipe);
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- break;
-
- case USB_HOST_READEND: /* End of data read */
- case USB_HOST_READSHRT: /* End of data read */
- usb0_host_disable_brdy_int(pipe);
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
- }
- break;
-
- case USB_HOST_READOVER: /* buffer over */
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
- }
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
-#else
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
-#endif
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access status */
- default:
- usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
- break;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_dma_d0
-* Description : Writes data in the buffer allocated in the pipe specified
-* : in the argument.
-* : Reads data by DMA transfer using D0FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READZERO ; zero data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-static uint16_t usb0_host_read_dma_d0 (uint16_t pipe)
-{
- uint32_t count;
- uint32_t dtln;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
- uint16_t dfacc = 0;
- uint16_t pipebuf_size;
-
- g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- count = g_usb0_host_data_count[pipe];
- status = USB_HOST_READING;
- }
- else
- {
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
- {
- status = USB_HOST_READOVER;
- count = g_usb0_host_data_count[pipe];
- }
- else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
- {
- status = USB_HOST_READEND;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- else /* continue Receive data */
- {
- status = USB_HOST_READING;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- else
- {
- pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
-
- if (count != pipebuf_size)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- }
- }
-
- if (count == 0) /* 0 length packet */
- {
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear B_CLR */
- status = USB_HOST_READZERO; /* Null Packet receive */
- }
- else
- {
- usb0_host_set_curpipe(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
- /* transaction counter No set */
- /* FRDY = 1, DTLN = 0 -> BRDY */
- }
- }
- else
- {
- dfacc = usb0_host_set_dfacc_d0(mbw, count);
-
- if (mbw == USB_HOST_BITMBW_32)
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
- }
- else
- {
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
- }
-
- g_usb0_host_DmaPipe[USB_HOST_D0FIFO] = pipe; /* not use in read operation */
- g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 0; /* not use in read operation */
-
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_FIFO2BUF;
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
- g_usb0_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
-
- if (status == USB_HOST_READING)
- {
- g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSY;
- }
- else
- {
- g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSYEND;
- }
-
- Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
-
- usb0_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
-
- RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
- 1,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- g_usb0_host_data_count[pipe] -= count;
- g_usb0_host_data_pointer[pipe] += count;
- g_usb0_host_PipeDataSize[pipe] += count;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_dma_d1
-* Description : Reads data from the buffer allocated in the pipe specified in
-* : the argument.
-* : Reads data by DMA transfer using D1FIFO.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : USB_HOST_READEND ; Read end
-* : USB_HOST_READSHRT ; short data
-* : USB_HOST_READZERO ; zero data
-* : USB_HOST_READING ; Continue of data read
-* : USB_HOST_READOVER ; buffer over
-* : USB_HOST_FIFOERROR ; FIFO status
-*******************************************************************************/
-static uint16_t usb0_host_read_dma_d1 (uint16_t pipe)
-{
- uint32_t count;
- uint32_t dtln;
- uint16_t buffer;
- uint16_t mxps;
- uint16_t status;
- uint16_t mbw;
- uint16_t dfacc = 0;
- uint16_t pipebuf_size;
-
- g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- count = g_usb0_host_data_count[pipe];
- status = USB_HOST_READING;
- }
- else
- {
- buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
-
- if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
- {
- return USB_HOST_FIFOERROR;
- }
-
- dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
- {
- status = USB_HOST_READOVER;
- count = g_usb0_host_data_count[pipe];
- }
- else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
- {
- status = USB_HOST_READEND;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- else /* continue Receive data */
- {
- status = USB_HOST_READING;
- count = dtln;
-
- if (count == 0)
- {
- status = USB_HOST_READSHRT; /* Null Packet receive */
- }
-
- if ((count % mxps) != 0)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- else
- {
- pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
-
- if (count != pipebuf_size)
- {
- status = USB_HOST_READSHRT; /* Short Packet receive */
- }
- }
- }
- }
-
- if (count == 0) /* 0 length packet */
- {
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
- status = USB_HOST_READZERO; /* Null Packet receive */
- }
- else
- {
- usb0_host_set_curpipe(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
- /* transaction counter No set */
- /* FRDY = 1, DTLN = 0 -> BRDY */
- }
- }
- else
- {
- dfacc = usb0_host_set_dfacc_d1(mbw, count);
-
- if (mbw == USB_HOST_BITMBW_32)
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
- }
- else
- {
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
- }
-
- g_usb0_host_DmaPipe[USB_HOST_D1FIFO] = pipe; /* not use in read operation */
- g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 0; /* not use in read operation */
-
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_FIFO2BUF;
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
- g_usb0_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
-
- if (status == USB_HOST_READING)
- {
- g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSY;
- }
- else
- {
- g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSYEND;
- }
-
- Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
-
- usb0_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw, dfacc);
-
- RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
- 1,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- g_usb0_host_data_count[pipe] -= count;
- g_usb0_host_data_pointer[pipe] += count;
- g_usb0_host_PipeDataSize[pipe] += count;
- }
-
- return status; /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_change_fifo_port
-* Description : Allocates FIF0 specified by the argument in the pipe assigned
-* : by the argument. After allocating FIF0, waits in the software
-* : till the corresponding pipe becomes ready.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t fifosel ; Select FIFO
-* : uint16_t isel ; FIFO Access Direction
-* : uint16_t mbw ; FIFO Port Access Bit Width
-* Return Value : USB_HOST_FIFOERROR ; Error
-* : Others ; CFIFOCTR/D0FIFOCTR/D1FIFOCTR Register Value
-*******************************************************************************/
-uint16_t usb0_host_change_fifo_port (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
-{
- uint16_t buffer;
- uint32_t loop;
- volatile uint32_t loop2;
-
- usb0_host_set_curpipe(pipe, fifosel, isel, mbw);
-
- for (loop = 0; loop < 4; loop++)
- {
- switch (fifosel)
- {
- case USB_HOST_CUSE:
- buffer = USB200.CFIFOCTR;
- break;
-
- case USB_HOST_D0USE:
- case USB_HOST_D0DMA:
- buffer = USB200.D0FIFOCTR;
- break;
-
- case USB_HOST_D1USE:
- case USB_HOST_D1DMA:
- buffer = USB200.D1FIFOCTR;
- break;
-
- default:
- buffer = 0;
- break;
- }
-
- if ((buffer & USB_HOST_BITFRDY) == USB_HOST_BITFRDY)
- {
- return buffer;
- }
-
- loop2 = 25;
-
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
- return USB_HOST_FIFOERROR;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_curpipe
-* Description : Allocates FIF0 specified by the argument in the pipe assigned
-* : by the argument.
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t fifosel ; Select FIFO
-* : uint16_t isel ; FIFO Access Direction
-* : uint16_t mbw ; FIFO Port Access Bit Width
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_curpipe (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
-{
- uint16_t buffer;
- uint32_t loop;
- volatile uint32_t loop2;
-
- g_usb0_host_mbw[pipe] = mbw;
-
- switch (fifosel)
- {
- case USB_HOST_CUSE:
- buffer = USB200.CFIFOSEL;
- buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
- buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
- USB200.CFIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
- == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
- buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(isel | pipe | mbw);
- USB200.CFIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
- == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- case USB_HOST_D0DMA:
- case USB_HOST_D0USE:
- buffer = USB200.D0FIFOSEL;
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
- USB200.D0FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(pipe | mbw);
- USB200.D0FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- case USB_HOST_D1DMA:
- case USB_HOST_D1USE:
- buffer = USB200.D1FIFOSEL;
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
- USB200.D1FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(pipe | mbw);
- USB200.D1FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- default:
- break;
- }
-
- /* Cautions !!!
- * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
- * For details, please look at the data sheet. */
- loop2 = 100;
-
- while (loop2-- > 0)
- {
- /* wait */
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_curpipe2
-* Description : Allocates FIF0 specified by the argument in the pipe assigned
-* : by the argument.(DFACC)
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t fifosel ; Select FIFO
-* : uint16_t isel ; FIFO Access Direction
-* : uint16_t mbw ; FIFO Port Access Bit Width
-* : uint16_t dfacc ; DFACC Access mode
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_curpipe2 (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc)
-{
- uint16_t buffer;
- uint32_t loop;
-#ifdef __USB_HOST_DF_ACC_ENABLE__
- uint32_t dummy;
-#endif
- volatile uint32_t loop2;
-
- g_usb0_host_mbw[pipe] = mbw;
-
- switch (fifosel)
- {
- case USB_HOST_CUSE:
- buffer = USB200.CFIFOSEL;
- buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
- buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
- USB200.CFIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
- == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
- buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(isel | pipe | mbw);
- USB200.CFIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
- == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- case USB_HOST_D0DMA:
- case USB_HOST_D0USE:
- buffer = USB200.D0FIFOSEL;
-#ifdef __USB_HOST_DF_ACC_ENABLE__
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
-
- if (dfacc != 0)
- {
- buffer |= (uint16_t)(USB_HOST_BITMBW_32);
- }
-#else
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
-#endif
- USB200.D0FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
-#ifdef __USB_HOST_DF_ACC_ENABLE__
- if (dfacc != 0)
- {
- dummy = USB200.D0FIFO.UINT32;
- }
-#endif
-
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(pipe | mbw);
- USB200.D0FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- case USB_HOST_D1DMA:
- case USB_HOST_D1USE:
- buffer = USB200.D1FIFOSEL;
-#ifdef __USB_HOST_DF_ACC_ENABLE__
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
-
- if (dfacc != 0)
- {
- buffer |= (uint16_t)(USB_HOST_BITMBW_32);
- }
-#else
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
-#endif
- USB200.D1FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
-
-#ifdef __USB_HOST_DF_ACC_ENABLE__
- if (dfacc != 0)
- {
- dummy = USB200.D1FIFO.UINT32;
- loop = dummy; // avoid warning.
- }
-#endif
-
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
- buffer |= (uint16_t)(pipe | mbw);
- USB200.D1FIFOSEL = buffer;
-
- for (loop = 0; loop < 4; loop++)
- {
- if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
- {
- break;
- }
-
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
- }
- break;
-
- default:
- break;
- }
-
- /* Cautions !!!
- * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
- * For details, please look at the data sheet. */
- loop2 = 100;
- while (loop2-- > 0)
- {
- /* wait */
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_c_fifo
-* Description : Writes data in CFIFO.
-* : Writes data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating CFIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb1_host_mbw[].
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_write_c_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- USB200.CFIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)(count / 2); even; --even)
- {
- USB200.CFIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)(count / 4); even; --even)
- {
- USB200.CFIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_c_fifo
-* Description : Reads data from CFIFO.
-* : Reads data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating CFIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb0_host_mbw[].
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_read_c_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- *g_usb0_host_data_pointer[pipe] = USB200.CFIFO.UINT8[HH];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)((count + 1) / 2); even; --even)
- {
- *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.CFIFO.UINT16[H];
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)((count + 3) / 4); even; --even)
- {
- *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.CFIFO.UINT32;
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_d0_fifo
-* Description : Writes data in D0FIFO.
-* : Writes data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating CFIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb0_host_mbw[].
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_write_d0_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- USB200.D0FIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)(count / 2); even; --even)
- {
- USB200.D0FIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)(count / 4); even; --even)
- {
- USB200.D0FIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_d0_fifo
-* Description : Reads data from D0FIFO.
-* : Reads data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating DOFIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb0_host_mbw[].
-* Arguments : uint16_t Pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_read_d0_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- *g_usb0_host_data_pointer[pipe] = USB200.D0FIFO.UINT8[HH];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)((count + 1) / 2); even; --even)
- {
- *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.D0FIFO.UINT16[H];
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)((count + 3) / 4); even; --even)
- {
- *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.D0FIFO.UINT32;
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_write_d1_fifo
-* Description : Writes data in D1FIFO.
-* : Writes data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating D1FIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb1_host_mbw[].
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_write_d1_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- USB200.D1FIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)(count / 2); even; --even)
- {
- USB200.D1FIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)(count / 4); even; --even)
- {
- USB200.D1FIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_read_d1_fifo
-* Description : Reads data from D1FIFO.
-* : Reads data by BYTE/WORD/LONG according to access size
-* : to the pipe specified by the arguments.
-* : Before executing this function, allocating D1FIF0 in the specified pipe
-* : should be completed.
-* : Before executing this function, access size to the specified pipe
-* : should be fixed and set in g_usb1_host_mbw[].
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint16_t count ; Data Size(Byte)
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_read_d1_fifo (uint16_t pipe, uint16_t count)
-{
- uint16_t even;
-
- if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
- {
- for (even = count; even; --even)
- {
- *g_usb0_host_data_pointer[pipe] = USB200.D1FIFO.UINT8[HH];
- g_usb0_host_data_pointer[pipe] += 1;
- }
- }
- else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
- {
- for (even = (uint16_t)((count + 1) / 2); even; --even)
- {
- *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.D1FIFO.UINT16[H];
- g_usb0_host_data_pointer[pipe] += 2;
- }
- }
- else
- {
- for (even = (uint16_t)((count + 3) / 4); even; --even)
- {
- *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.D1FIFO.UINT32;
- g_usb0_host_data_pointer[pipe] += 4;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_com_get_dmasize
-* Description : Calculates access width of DMA transfer by the argument to
- return as the Return Value.
-* Arguments : uint32_t trncount : transfer byte
-* : uint32_t dtptr : transfer data pointer
-* Return Value : DMA transfer size : 0 8bit
-* : : 1 16bit
-* : : 2 32bit
-*******************************************************************************/
-static uint32_t usb0_host_com_get_dmasize (uint32_t trncount, uint32_t dtptr)
-{
- uint32_t size;
-
- if (((trncount & 0x0001) != 0) || ((dtptr & 0x00000001) != 0))
- {
- /* When transfer byte count is odd */
- /* or transfer data area is 8-bit alignment */
- size = 0; /* 8bit */
- }
- else if (((trncount & 0x0003) != 0) || ((dtptr & 0x00000003) != 0))
- {
- /* When the transfer byte count is multiples of 2 */
- /* or the transfer data area is 16-bit alignment */
- size = 1; /* 16bit */
- }
- else
- {
- /* When the transfer byte count is multiples of 4 */
- /* or the transfer data area is 32-bit alignment */
- size = 2; /* 32bit */
- }
-
- return size;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_mbw
-* Description : Calculates access width of DMA to return the value set in MBW.
-* Arguments : uint32_t trncount : transfer byte
-* : uint32_t dtptr : transfer data pointer
-* Return Value : FIFO transfer size : USB_HOST_BITMBW_8 8bit
-* : : USB_HOST_BITMBW_16 16bit
-* : : USB_HOST_BITMBW_32 32bit
-*******************************************************************************/
-uint16_t usb0_host_get_mbw (uint32_t trncount, uint32_t dtptr)
-{
- uint32_t size;
- uint16_t mbw;
-
- size = usb0_host_com_get_dmasize(trncount, dtptr);
-
- if (size == 0)
- {
- /* 8bit */
- mbw = USB_HOST_BITMBW_8;
- }
- else if (size == 1)
- {
- /* 16bit */
- mbw = USB_HOST_BITMBW_16;
- }
- else
- {
- /* 32bit */
- mbw = USB_HOST_BITMBW_32;
- }
-
- return mbw;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_transaction_counter
-* Description : Sets transaction counter by the argument(PIPEnTRN).
-* : Clears transaction before setting to enable transaction counter setting.
-* Arguments : uint16_t pipe ; Pipe number
-* : uint32_t bsize : Data transfer size
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_set_transaction_counter (uint16_t pipe, uint32_t bsize)
-{
- uint16_t mxps;
- uint16_t cnt;
-
- if (bsize == 0)
- {
- return;
- }
-
- mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
-
- if ((bsize % mxps) == 0)
- {
- cnt = (uint16_t)(bsize / mxps);
- }
- else
- {
- cnt = (uint16_t)((bsize / mxps) + 1);
- }
-
- switch (pipe)
- {
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE1TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE2TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE3TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE4TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE5TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- USB200.PIPE9TRN = cnt;
- RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
- 1,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clear_transaction_counter
-* Description : Clears the transaction counter by the argument.
-* : After executing this function, the transaction counter is invalid.
-* Arguments : uint16_t pipe ; Pipe number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clear_transaction_counter (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
- 0,
- USB_PIPEnTRE_TRENB_SHIFT,
- USB_PIPEnTRE_TRENB);
- RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
- 1,
- USB_PIPEnTRE_TRCLR_SHIFT,
- USB_PIPEnTRE_TRCLR);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_stop_transfer
-* Description : Stops the USB transfer in the pipe specified by the argument.
-* : After stopping the USB transfer, clears the buffer allocated in
-* : the pipe.
-* : After executing this function, allocation in FIF0 becomes USB_HOST_PIPE0;
-* : invalid. After executing this function, BRDY/NRDY/BEMP interrupt
-* : in the corresponding pipe becomes invalid. Sequence bit is also
-* : cleared.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_stop_transfer (uint16_t pipe)
-{
- uint16_t usefifo;
- uint32_t remain;
-
- usb0_host_set_pid_nak(pipe);
-
- usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- switch (usefifo)
- {
- case USB_HOST_D0FIFO_USE:
- usb0_host_clear_transaction_counter(pipe);
- USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
- break;
-
- case USB_HOST_D1FIFO_USE:
- usb0_host_clear_transaction_counter(pipe);
- USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
- break;
-
- case USB_HOST_D0FIFO_DMA:
- remain = Userdef_USB_usb0_host_stop_dma0();
- usb0_host_dma_stop_d0(pipe, remain);
- usb0_host_clear_transaction_counter(pipe);
- USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
- break;
-
- case USB_HOST_D1FIFO_DMA:
- remain = Userdef_USB_usb0_host_stop_dma1();
- usb0_host_dma_stop_d1(pipe, remain);
- usb0_host_clear_transaction_counter(pipe);
- USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
- break;
-
- default:
- usb0_host_clear_transaction_counter(pipe);
- USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
- break;
- }
-
- /* Interrupt of pipe set is disabled */
- usb0_host_disable_brdy_int(pipe);
- usb0_host_disable_nrdy_int(pipe);
- usb0_host_disable_bemp_int(pipe);
-
-#if(1) /* ohci_wrapp */
-#else
- usb0_host_aclrm(pipe);
-#endif
- usb0_host_set_csclr(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_dfacc_d0
-* Description : Sets the DFACC setting value in D0FIFO using the transfer size.
-* Arguments : uint16_t mbw ; MBW
-* : uint16_t count ; data count
-* Return Value : DFACC Access mode
-*******************************************************************************/
-static uint16_t usb0_host_set_dfacc_d0 (uint16_t mbw, uint32_t count)
-{
- uint16_t dfacc = 0;
-
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
-#else
- if (mbw == USB_HOST_BITMBW_32)
- {
- if ((count % 32) == 0)
- {
- /* 32byte transfer */
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 2,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 2;
- }
- else if ((count % 16) == 0)
- {
- /* 16byte transfer */
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 1,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 1;
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D0FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
-#endif
-
- return dfacc;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_dfacc_d1
-* Description : Sets the DFACC setting value in D1FIFO using the transfer size.
-* Arguments : uint16_t mbw ; MBW
-* : uint16_t count ; data count
-* Return Value : DFACC Access mode
-*******************************************************************************/
-static uint16_t usb0_host_set_dfacc_d1 (uint16_t mbw, uint32_t count)
-{
- uint16_t dfacc = 0;
-
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
-#else
- if (mbw == USB_HOST_BITMBW_32)
- {
- if ((count % 32) == 0)
- {
- /* 32byte transfer */
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 2,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 2;
- }
- else if ((count % 16) == 0)
- {
- /* 16byte transfer */
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 1,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 1;
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
- }
- else if (mbw == USB_HOST_BITMBW_16)
- {
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- RZA_IO_RegWrite_16(&USB200.D1FBCFG,
- 0,
- USB_DnFBCFG_TENDE_SHIFT,
- USB_DnFBCFG_TENDE);
- dfacc = 0;
- }
-#endif
-
- return dfacc;
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/common/usb0_host_dma.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,355 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_dma.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-/* #include "usb0_host_dmacdrv.h" */
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-static void usb0_host_dmaint(uint16_t fifo);
-static void usb0_host_dmaint_buf2fifo(uint16_t pipe);
-static void usb0_host_dmaint_fifo2buf(uint16_t pipe);
-
-
-/*******************************************************************************
-* Function Name: usb0_host_dma_stop_d0
-* Description : D0FIFO DMA stop
-* Arguments : uint16_t pipe : pipe number
-* : uint32_t remain : transfer byte
-* Return Value : none
-*******************************************************************************/
-void usb0_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
-{
- uint16_t dtln;
- uint16_t dfacc;
- uint16_t buffer;
- uint16_t sds_b = 1;
-
- dfacc = RZA_IO_RegRead_16(&USB200.D0FBCFG,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- if (dfacc == 2)
- {
- sds_b = 32;
- }
- else if (dfacc == 1)
- {
- sds_b = 16;
- }
- else
- {
- if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
- {
- sds_b = 4;
- }
- else if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
- {
- sds_b = 2;
- }
- else
- {
- sds_b = 1;
- }
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
- {
- buffer = USB200.D0FIFOCTR;
- dtln = (buffer & USB_HOST_BITDTLN);
-
- if ((dtln % sds_b) != 0)
- {
- remain += (sds_b - (dtln % sds_b));
- }
- g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
- g_usb0_host_data_count[pipe] = remain;
- }
- }
-
- RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
- 0,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dma_stop_d1
-* Description : D1FIFO DMA stop
-* Arguments : uint16_t pipe : pipe number
-* : uint32_t remain : transfer byte
-* Return Value : none
-*******************************************************************************/
-void usb0_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
-{
- uint16_t dtln;
- uint16_t dfacc;
- uint16_t buffer;
- uint16_t sds_b = 1;
-
- dfacc = RZA_IO_RegRead_16(&USB200.D1FBCFG,
- USB_DnFBCFG_DFACC_SHIFT,
- USB_DnFBCFG_DFACC);
- if (dfacc == 2)
- {
- sds_b = 32;
- }
- else if (dfacc == 1)
- {
- sds_b = 16;
- }
- else
- {
- if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
- {
- sds_b = 4;
- }
- else if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
- {
- sds_b = 2;
- }
- else
- {
- sds_b = 1;
- }
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
- {
- if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
- {
- buffer = USB200.D1FIFOCTR;
- dtln = (buffer & USB_HOST_BITDTLN);
-
- if ((dtln % sds_b) != 0)
- {
- remain += (sds_b - (dtln % sds_b));
- }
- g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
- g_usb0_host_data_count[pipe] = remain;
- }
- }
-
- RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
- 0,
- USB_DnFIFOSEL_DREQE_SHIFT,
- USB_DnFIFOSEL_DREQE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dma_interrupt_d0fifo
-* Description : This function is DMA interrupt handler entry.
-* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
-* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
-* : specified by dma->fifo.
-* : Register this function as DMA complete interrupt.
-* Arguments : uint32_t int_sense ; Interrupts detection mode
-* : ; INTC_LEVEL_SENSITIVE : Level sense
-* : ; INTC_EDGE_TRIGGER : Edge trigger
-* Return Value : none
-*******************************************************************************/
-void usb0_host_dma_interrupt_d0fifo (uint32_t int_sense)
-{
- usb0_host_dmaint(USB_HOST_D0FIFO);
- g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dma_interrupt_d1fifo
-* Description : This function is DMA interrupt handler entry.
-* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
-* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
-* : specified by dma->fifo.
-* : Register this function as DMA complete interrupt.
-* Arguments : uint32_t int_sense ; Interrupts detection mode
-* : ; INTC_LEVEL_SENSITIVE : Level sense
-* : ; INTC_EDGE_TRIGGER : Edge trigger
-* Return Value : none
-*******************************************************************************/
-void usb0_host_dma_interrupt_d1fifo (uint32_t int_sense)
-{
- usb0_host_dmaint(USB_HOST_D1FIFO);
- g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dmaint
-* Description : This function is DMA transfer end interrupt
-* Arguments : uint16_t fifo ; fifo number
-* : ; USB_HOST_D0FIFO
-* : ; USB_HOST_D1FIFO
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_dmaint (uint16_t fifo)
-{
- uint16_t pipe;
-
- pipe = g_usb0_host_DmaPipe[fifo];
-
- if (g_usb0_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
- {
- usb0_host_dmaint_buf2fifo(pipe);
- }
- else
- {
- usb0_host_dmaint_fifo2buf(pipe);
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dmaint_fifo2buf
-* Description : Executes read completion from FIFO by DMAC.
-* Arguments : uint16_t pipe : pipe number
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_dmaint_fifo2buf (uint16_t pipe)
-{
- uint32_t remain;
- uint16_t useport;
-
- if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
- {
- useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- if (useport == USB_HOST_D0FIFO_DMA)
- {
- remain = Userdef_USB_usb0_host_stop_dma0();
- usb0_host_dma_stop_d0(pipe, remain);
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
- {
- USB200.D0FIFOCTR = USB_HOST_BITBCLR;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- }
- else
- {
- usb0_host_enable_brdy_int(pipe);
- }
- }
- }
- else
- {
- remain = Userdef_USB_usb0_host_stop_dma1();
- usb0_host_dma_stop_d1(pipe, remain);
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
- {
- USB200.D1FIFOCTR = USB_HOST_BITBCLR;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- }
- else
- {
- usb0_host_enable_brdy_int(pipe);
- }
- }
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_dmaint_buf2fifo
-* Description : Executes write completion in FIFO by DMAC.
-* Arguments : uint16_t pipe : pipe number
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_dmaint_buf2fifo (uint16_t pipe)
-{
- uint16_t useport;
- uint32_t remain;
-
- useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
-
- if (useport == USB_HOST_D0FIFO_DMA)
- {
- remain = Userdef_USB_usb0_host_stop_dma0();
- usb0_host_dma_stop_d0(pipe, remain);
-
- if (g_usb0_host_DmaBval[USB_HOST_D0FIFO] != 0)
- {
- RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
- 1,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL);
- }
- }
- else
- {
- remain = Userdef_USB_usb0_host_stop_dma1();
- usb0_host_dma_stop_d1(pipe, remain);
-
- if (g_usb0_host_DmaBval[USB_HOST_D1FIFO] != 0)
- {
- RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
- 1,
- USB_DnFIFOCTR_BVAL_SHIFT,
- USB_DnFIFOCTR_BVAL);
- }
- }
-
- usb0_host_enable_bemp_int(pipe);
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/common/usb0_host_intrn.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,285 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_intrn.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#if(1) /* ohci_wrapp */
-#include "ohci_wrapp_RZ_A1_local.h"
-#endif
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_brdy_int
-* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
-* : According to the pipe that interrupt is generated in,
-* : reads/writes buffer allocated in the pipe.
-* : This function is executed in the BRDY interrupt handler.
-* : This function clears BRDY interrupt status and BEMP interrupt
-* : status.
-* Arguments : uint16_t status ; BRDYSTS Register Value
-* : uint16_t int_enb ; BRDYENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_brdy_int (uint16_t status, uint16_t int_enb)
-{
- uint32_t int_sense = 0;
- uint16_t pipe;
- uint16_t pipebit;
-
- for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
- {
- pipebit = g_usb0_host_bit_set[pipe];
-
- if ((status & pipebit) && (int_enb & pipebit))
- {
- USB200.BRDYSTS = (uint16_t)~pipebit;
- USB200.BEMPSTS = (uint16_t)~pipebit;
-
- if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
- {
- if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
- {
- usb0_host_dma_interrupt_d0fifo(int_sense);
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- usb0_host_read_dma(pipe);
- usb0_host_disable_brdy_int(pipe);
- }
- else
- {
- USB200.D0FIFOCTR = USB_HOST_BITBCLR;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- }
- }
- else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
- {
- if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
- {
- usb0_host_dma_interrupt_d1fifo(int_sense);
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
- {
- usb0_host_read_dma(pipe);
- usb0_host_disable_brdy_int(pipe);
- }
- else
- {
- USB200.D1FIFOCTR = USB_HOST_BITBCLR;
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
- }
- }
- else
- {
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
- {
- usb0_host_read_buffer(pipe);
- }
- else
- {
- usb0_host_write_buffer(pipe);
- }
- }
-#if(1) /* ohci_wrapp */
- switch (g_usb0_host_pipe_status[pipe])
- {
- case USB_HOST_PIPE_DONE:
- ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
- break;
- case USB_HOST_PIPE_NORES:
- case USB_HOST_PIPE_STALL:
- case USB_HOST_PIPE_ERROR:
- ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
- break;
- default:
- /* Do Nothing */
- break;
- }
-#endif
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_nrdy_int
-* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
-* : Checks NRDY interrupt cause by PID. When the cause if STALL,
-* : regards the pipe state as STALL and ends the processing.
-* : Then the cause is not STALL, increments the error count to
-* : communicate again. When the error count is 3, determines
-* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
-* : This function is executed in the NRDY interrupt handler.
-* : This function clears NRDY interrupt status.
-* Arguments : uint16_t status ; NRDYSTS Register Value
-* : uint16_t int_enb ; NRDYENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_nrdy_int (uint16_t status, uint16_t int_enb)
-{
- uint16_t pid;
- uint16_t pipe;
- uint16_t bitcheck;
-
- bitcheck = (uint16_t)(status & int_enb);
-
- USB200.NRDYSTS = (uint16_t)~status;
-
- for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
- {
- if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
- {
- if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
- USB_SYSCFG_DCFM_SHIFT,
- USB_SYSCFG_DCFM) == 1)
- {
- if (g_usb0_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
- {
- pid = usb0_host_get_pid(pipe);
-
- if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
- {
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
-#if(1) /* ohci_wrapp */
- ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
-#endif
- }
- else
- {
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
- ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
-#else
- g_usb0_host_PipeIgnore[pipe]++;
-
- if (g_usb0_host_PipeIgnore[pipe] == 3)
- {
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
- }
- else
- {
- usb0_host_set_pid_buf(pipe);
- }
-#endif
- }
- }
- }
- else
- {
- /* USB Function */
- }
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_bemp_int
-* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
-* Arguments : uint16_t status ; BEMPSTS Register Value
-* : uint16_t int_enb ; BEMPENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_bemp_int (uint16_t status, uint16_t int_enb)
-{
- uint16_t pid;
- uint16_t pipe;
- uint16_t bitcheck;
- uint16_t inbuf;
-
- bitcheck = (uint16_t)(status & int_enb);
-
- USB200.BEMPSTS = (uint16_t)~status;
-
- for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
- {
- if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
- {
- pid = usb0_host_get_pid(pipe);
-
- if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
- {
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
-#if(1) /* ohci_wrapp */
- ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
-#endif
- }
- else
- {
- inbuf = usb0_host_get_inbuf(pipe);
-
- if (inbuf == 0)
- {
- usb0_host_disable_bemp_int(pipe);
- usb0_host_set_pid_nak(pipe);
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
-#if(1) /* ohci_wrapp */
- ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
-#endif
- }
- }
- }
- }
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/common/usb0_host_lib.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,1580 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_lib.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#if(1) /* ohci_wrapp */
-#include "MBRZA1H.h" /* INTC Driver Header */
-#else
-#include "devdrv_intc.h" /* INTC Driver Header */
-#endif
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_enable_brdy_int
-* Description : Enables BRDY interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
-* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
-* : in the disabled status. After enabling BRDY, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_enable_brdy_int (uint16_t pipe)
-{
- /* enable brdy interrupt */
- USB200.BRDYENB |= (uint16_t)g_usb0_host_bit_set[pipe];
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_disable_brdy_int
-* Description : Disables BRDY interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
-* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
-* : in the disabled status. After disabling BRDY, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_disable_brdy_int (uint16_t pipe)
-{
- /* disable brdy interrupt */
- USB200.BRDYENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clear_brdy_sts
-* Description : Clear BRDY interrupt status in the pipe spceified by the argument.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clear_brdy_sts (uint16_t pipe)
-{
- /* clear brdy status */
- USB200.BRDYSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_enable_bemp_int
-* Description : Enables BEMP interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
-* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
-* : in the disabled status. After enabling BEMP, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_enable_bemp_int (uint16_t pipe)
-{
- /* enable bemp interrupt */
- USB200.BEMPENB |= (uint16_t)g_usb0_host_bit_set[pipe];
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_disable_bemp_int
-* Description : Disables BEMP interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
-* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
-* : in the disabled status. After enabling BEMP, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_disable_bemp_int (uint16_t pipe)
-{
- /* disable bemp interrupt */
- USB200.BEMPENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clear_bemp_sts
-* Description : Clear BEMP interrupt status in the pipe spceified by the argument.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clear_bemp_sts (uint16_t pipe)
-{
- /* clear bemp status */
- USB200.BEMPSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_enable_nrdy_int
-* Description : Enables NRDY interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
-* : NRDY. Enables NRDY interrupt in the pipe specified by the argument
-* : in the disabled status. After enabling NRDY, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_enable_nrdy_int (uint16_t pipe)
-{
- /* enable nrdy interrupt */
- USB200.NRDYENB |= (uint16_t)g_usb0_host_bit_set[pipe];
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_disable_nrdy_int
-* Description : Disables NRDY interrupt in the pipe spceified by the argument.
-* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
-* : NRDY. Disables NRDY interrupt in the pipe specified by the argument
-* : in the disabled status. After disabling NRDY, recover all
-* : BEMP/NRDY/BRDY disabled/enabled status.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_disable_nrdy_int (uint16_t pipe)
-{
- /* disable nrdy interrupt */
- USB200.NRDYENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clear_nrdy_sts
-* Description : Clear NRDY interrupt status in the pipe spceified by the argument.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clear_nrdy_sts (uint16_t pipe)
-{
- /* clear nrdy status */
- USB200.NRDYSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_is_hispeed
-* Description : Returns the result of USB reset hand shake (RHST) as
-* : return value.
-* Arguments : none
-* Return Value : USB_HOST_HIGH_SPEED ; Hi-Speed
-* : USB_HOST_FULL_SPEED ; Full-Speed
-* : USB_HOST_LOW_SPEED ; Low-Speed
-* : USB_HOST_NON_SPEED ; error
-*******************************************************************************/
-uint16_t usb0_host_is_hispeed (void)
-{
- uint16_t rhst;
- uint16_t speed;
-
- rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
- USB_DVSTCTR0_RHST_SHIFT,
- USB_DVSTCTR0_RHST);
- if (rhst == USB_HOST_HSMODE)
- {
- speed = USB_HOST_HIGH_SPEED;
- }
- else if (rhst == USB_HOST_FSMODE)
- {
- speed = USB_HOST_FULL_SPEED;
- }
- else if (rhst == USB_HOST_LSMODE)
- {
- speed = USB_HOST_LOW_SPEED;
- }
- else
- {
- speed = USB_HOST_NON_SPEED;
- }
-
- return speed;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_is_hispeed_enable
-* Description : Returns the USB High-Speed connection enabled status as
-* : return value.
-* Arguments : none
-* Return Value : USB_HOST_YES : Hi-Speed Enable
-* : USB_HOST_NO : Hi-Speed Disable
-*******************************************************************************/
-uint16_t usb0_host_is_hispeed_enable (void)
-{
- uint16_t ret;
-
- ret = USB_HOST_NO;
-
- if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
- USB_SYSCFG_HSE_SHIFT,
- USB_SYSCFG_HSE) == 1)
- {
- ret = USB_HOST_YES;
- }
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_pid_buf
-* Description : Enables communicaqtion in the pipe specified by the argument
-* : (BUF).
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_pid_buf (uint16_t pipe)
-{
- uint16_t pid;
-
- pid = usb0_host_get_pid(pipe);
-
- if (pid == USB_HOST_PID_STALL2)
- {
- usb0_host_set_pid_nak(pipe);
- }
-
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- USB_HOST_PID_BUF,
- USB_DCPCTR_PID_SHIFT,
- USB_DCPCTR_PID);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- USB_HOST_PID_BUF,
- USB_PIPEnCTR_9_PID_SHIFT,
- USB_PIPEnCTR_9_PID);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_pid_nak
-* Description : Disables communication (NAK) in the pipe specified by the argument.
-* : When the pipe status was enabling communication (BUF) before
-* : executing before executing this function, waits in the software
-* : until the pipe becomes ready after setting disabled.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_pid_nak (uint16_t pipe)
-{
- uint16_t pid;
- uint16_t pbusy;
- uint32_t loop;
-
- pid = usb0_host_get_pid(pipe);
-
- if (pid == USB_HOST_PID_STALL2)
- {
- usb0_host_set_pid_stall(pipe);
- }
-
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- USB_HOST_PID_NAK,
- USB_DCPCTR_PID_SHIFT,
- USB_DCPCTR_PID);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- USB_HOST_PID_NAK,
- USB_PIPEnCTR_9_PID_SHIFT,
- USB_PIPEnCTR_9_PID);
- break;
-
- default:
- break;
- }
-
- if (pid == USB_HOST_PID_BUF)
- {
- for (loop = 0; loop < 200; loop++)
- {
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- pbusy = RZA_IO_RegRead_16(&USB200.DCPCTR,
- USB_DCPCTR_PBUSY_SHIFT,
- USB_DCPCTR_PBUSY);
- break;
-
- case USB_HOST_PIPE1:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
- USB_PIPEnCTR_1_5_PBUSY_SHIFT,
- USB_PIPEnCTR_1_5_PBUSY);
- break;
-
- case USB_HOST_PIPE2:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
- USB_PIPEnCTR_1_5_PBUSY_SHIFT,
- USB_PIPEnCTR_1_5_PBUSY);
- break;
-
- case USB_HOST_PIPE3:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
- USB_PIPEnCTR_1_5_PBUSY_SHIFT,
- USB_PIPEnCTR_1_5_PBUSY);
- break;
-
- case USB_HOST_PIPE4:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
- USB_PIPEnCTR_1_5_PBUSY_SHIFT,
- USB_PIPEnCTR_1_5_PBUSY);
- break;
-
- case USB_HOST_PIPE5:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
- USB_PIPEnCTR_1_5_PBUSY_SHIFT,
- USB_PIPEnCTR_1_5_PBUSY);
- break;
-
- case USB_HOST_PIPE6:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
- USB_PIPEnCTR_6_8_PBUSY_SHIFT,
- USB_PIPEnCTR_6_8_PBUSY);
- break;
-
- case USB_HOST_PIPE7:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
- USB_PIPEnCTR_6_8_PBUSY_SHIFT,
- USB_PIPEnCTR_6_8_PBUSY);
- break;
-
- case USB_HOST_PIPE8:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
- USB_PIPEnCTR_6_8_PBUSY_SHIFT,
- USB_PIPEnCTR_6_8_PBUSY);
- break;
-
- case USB_HOST_PIPE9:
- pbusy = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
- USB_PIPEnCTR_9_PBUSY_SHIFT,
- USB_PIPEnCTR_9_PBUSY);
- break;
-
- default:
- pbusy = 1;
- break;
- }
-
- if (pbusy == 0)
- {
- break;
- }
-
- Userdef_USB_usb0_host_delay_500ns();
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_pid_stall
-* Description : Disables communication (STALL) in the pipe specified by the
-* : argument.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_pid_stall (uint16_t pipe)
-{
- uint16_t pid;
-
- pid = usb0_host_get_pid(pipe);
-
- if (pid == USB_HOST_PID_BUF)
- {
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- USB_HOST_PID_STALL2,
- USB_DCPCTR_PID_SHIFT,
- USB_DCPCTR_PID);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- USB_HOST_PID_STALL2,
- USB_PIPEnCTR_9_PID_SHIFT,
- USB_PIPEnCTR_9_PID);
- break;
-
- default:
- break;
- }
- }
- else
- {
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- USB_HOST_PID_STALL,
- USB_DCPCTR_PID_SHIFT,
- USB_DCPCTR_PID);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- USB_HOST_PID_STALL,
- USB_PIPEnCTR_9_PID_SHIFT,
- USB_PIPEnCTR_9_PID);
- break;
-
- default:
- break;
- }
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clear_pid_stall
-* Description : Disables communication (NAK) in the pipe specified by the argument.
-* Arguments : uint16_t pipe ; pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clear_pid_stall (uint16_t pipe)
-{
- usb0_host_set_pid_nak(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_pid
-* Description : Returns the pipe state specified by the argument.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : PID
-*******************************************************************************/
-uint16_t usb0_host_get_pid (uint16_t pipe)
-{
- uint16_t pid;
-
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- pid = RZA_IO_RegRead_16(&USB200.DCPCTR,
- USB_DCPCTR_PID_SHIFT,
- USB_DCPCTR_PID);
- break;
-
- case USB_HOST_PIPE1:
- pid = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE2:
- pid = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE3:
- pid = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE4:
- pid = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE5:
- pid = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
- USB_PIPEnCTR_1_5_PID_SHIFT,
- USB_PIPEnCTR_1_5_PID);
- break;
-
- case USB_HOST_PIPE6:
- pid = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE7:
- pid = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE8:
- pid = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
- USB_PIPEnCTR_6_8_PID_SHIFT,
- USB_PIPEnCTR_6_8_PID);
- break;
-
- case USB_HOST_PIPE9:
- pid = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
- USB_PIPEnCTR_9_PID_SHIFT,
- USB_PIPEnCTR_9_PID);
- break;
-
- default:
- pid = 0;
- break;
- }
-
- return pid;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_csclr
-* Description : CSPLIT status clear setting of sprit transaction in specified
-* : pipe is performed.
-* : When SQSET bit or SQCLR bit, and SQSET bit or SQCLR bit
-* : in DCPCTR register are continuously changed (when the sequence
-* : toggle bit of data PID is continuously changed over two or more pipes),
-* : the access cycle with 120 ns and more than 5 cycle bus clock is necessary.
-* : Do not set both SQCLR bit and SQSET bit to 1 at the same time.
-* : In addition, both bits should be operated after PID is set to NAK.
-* : However, when it is set to the isochronous transfer as the transfer type
-* : (TYPE=11), writing in SQSET bit is disabled.
-* Arguments : uint16_t pipe ; Pipe number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_csclr (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- 1,
- USB_DCPCTR_CSCLR_SHIFT,
- USB_DCPCTR_CSCLR);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- 1,
- USB_PIPEnCTR_1_5_CSCLR_SHIFT,
- USB_PIPEnCTR_1_5_CSCLR);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- 1,
- USB_PIPEnCTR_1_5_CSCLR_SHIFT,
- USB_PIPEnCTR_1_5_CSCLR);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- 1,
- USB_PIPEnCTR_1_5_CSCLR_SHIFT,
- USB_PIPEnCTR_1_5_CSCLR);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- 1,
- USB_PIPEnCTR_1_5_CSCLR_SHIFT,
- USB_PIPEnCTR_1_5_CSCLR);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- 1,
- USB_PIPEnCTR_1_5_CSCLR_SHIFT,
- USB_PIPEnCTR_1_5_CSCLR);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- 1,
- USB_PIPEnCTR_6_8_CSCLR_SHIFT,
- USB_PIPEnCTR_6_8_CSCLR);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- 1,
- USB_PIPEnCTR_6_8_CSCLR_SHIFT,
- USB_PIPEnCTR_6_8_CSCLR);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- 1,
- USB_PIPEnCTR_6_8_CSCLR_SHIFT,
- USB_PIPEnCTR_6_8_CSCLR);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- 1,
- USB_PIPEnCTR_9_CSCLR_SHIFT,
- USB_PIPEnCTR_9_CSCLR);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_sqclr
-* Description : Sets the sequence bit of the pipe specified by the argument to
-* : DATA0.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_sqclr (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- 1,
- USB_DCPCTR_SQCLR_SHIFT,
- USB_DCPCTR_SQCLR);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- 1,
- USB_PIPEnCTR_1_5_SQCLR_SHIFT,
- USB_PIPEnCTR_1_5_SQCLR);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- 1,
- USB_PIPEnCTR_1_5_SQCLR_SHIFT,
- USB_PIPEnCTR_1_5_SQCLR);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- 1,
- USB_PIPEnCTR_1_5_SQCLR_SHIFT,
- USB_PIPEnCTR_1_5_SQCLR);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- 1,
- USB_PIPEnCTR_1_5_SQCLR_SHIFT,
- USB_PIPEnCTR_1_5_SQCLR);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- 1,
- USB_PIPEnCTR_1_5_SQCLR_SHIFT,
- USB_PIPEnCTR_1_5_SQCLR);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- 1,
- USB_PIPEnCTR_6_8_SQCLR_SHIFT,
- USB_PIPEnCTR_6_8_SQCLR);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- 1,
- USB_PIPEnCTR_6_8_SQCLR_SHIFT,
- USB_PIPEnCTR_6_8_SQCLR);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- 1,
- USB_PIPEnCTR_6_8_SQCLR_SHIFT,
- USB_PIPEnCTR_6_8_SQCLR);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- 1,
- USB_PIPEnCTR_9_SQCLR_SHIFT,
- USB_PIPEnCTR_9_SQCLR);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_sqset
-* Description : Sets the sequence bit of the pipe specified by the argument to
-* : DATA1.
-* Arguments : uint16_t pipe ; Pipe number
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_sqset (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- RZA_IO_RegWrite_16(&USB200.DCPCTR,
- 1,
- USB_DCPCTR_SQSET_SHIFT,
- USB_DCPCTR_SQSET);
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- 1,
- USB_PIPEnCTR_1_5_SQSET_SHIFT,
- USB_PIPEnCTR_1_5_SQSET);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- 1,
- USB_PIPEnCTR_1_5_SQSET_SHIFT,
- USB_PIPEnCTR_1_5_SQSET);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- 1,
- USB_PIPEnCTR_1_5_SQSET_SHIFT,
- USB_PIPEnCTR_1_5_SQSET);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- 1,
- USB_PIPEnCTR_1_5_SQSET_SHIFT,
- USB_PIPEnCTR_1_5_SQSET);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- 1,
- USB_PIPEnCTR_1_5_SQSET_SHIFT,
- USB_PIPEnCTR_1_5_SQSET);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- 1,
- USB_PIPEnCTR_6_8_SQSET_SHIFT,
- USB_PIPEnCTR_6_8_SQSET);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- 1,
- USB_PIPEnCTR_6_8_SQSET_SHIFT,
- USB_PIPEnCTR_6_8_SQSET);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- 1,
- USB_PIPEnCTR_6_8_SQSET_SHIFT,
- USB_PIPEnCTR_6_8_SQSET);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- 1,
- USB_PIPEnCTR_9_SQSET_SHIFT,
- USB_PIPEnCTR_9_SQSET);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_sqmon
-* Description : Toggle bit of specified pipe is obtained
-* Arguments : uint16_t pipe ; Pipe number
-* Return Value : sqmon
-*******************************************************************************/
-uint16_t usb0_host_get_sqmon (uint16_t pipe)
-{
- uint16_t sqmon;
-
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- sqmon = RZA_IO_RegRead_16(&USB200.DCPCTR,
- USB_DCPCTR_SQMON_SHIFT,
- USB_DCPCTR_SQMON);
- break;
-
- case USB_HOST_PIPE1:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
- USB_PIPEnCTR_1_5_SQMON_SHIFT,
- USB_PIPEnCTR_1_5_SQMON);
- break;
-
- case USB_HOST_PIPE2:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
- USB_PIPEnCTR_1_5_SQMON_SHIFT,
- USB_PIPEnCTR_1_5_SQMON);
- break;
-
- case USB_HOST_PIPE3:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
- USB_PIPEnCTR_1_5_SQMON_SHIFT,
- USB_PIPEnCTR_1_5_SQMON);
- break;
-
- case USB_HOST_PIPE4:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
- USB_PIPEnCTR_1_5_SQMON_SHIFT,
- USB_PIPEnCTR_1_5_SQMON);
- break;
-
- case USB_HOST_PIPE5:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
- USB_PIPEnCTR_1_5_SQMON_SHIFT,
- USB_PIPEnCTR_1_5_SQMON);
- break;
-
- case USB_HOST_PIPE6:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
- USB_PIPEnCTR_6_8_SQMON_SHIFT,
- USB_PIPEnCTR_6_8_SQMON);
- break;
-
- case USB_HOST_PIPE7:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
- USB_PIPEnCTR_6_8_SQMON_SHIFT,
- USB_PIPEnCTR_6_8_SQMON);
- break;
-
- case USB_HOST_PIPE8:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
- USB_PIPEnCTR_6_8_SQMON_SHIFT,
- USB_PIPEnCTR_6_8_SQMON);
- break;
-
- case USB_HOST_PIPE9:
- sqmon = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
- USB_PIPEnCTR_9_SQMON_SHIFT,
- USB_PIPEnCTR_9_SQMON);
- break;
-
- default:
- sqmon = 0;
- break;
- }
-
- return sqmon;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_aclrm
-* Description : The buffer of specified pipe is initialized
-* Arguments : uint16_t pipe : Pipe
-* Return Value : none
-*******************************************************************************/
-void usb0_host_aclrm (uint16_t pipe)
-{
- usb0_host_set_aclrm(pipe);
- usb0_host_clr_aclrm(pipe);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_aclrm
-* Description : The auto buffer clear mode of specified pipe is enabled
-* Arguments : uint16_t pipe : Pipe
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_aclrm (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- 1,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- 1,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- 1,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- 1,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- 1,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- 1,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- 1,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- 1,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- 1,
- USB_PIPEnCTR_9_ACLRM_SHIFT,
- USB_PIPEnCTR_9_ACLRM);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_clr_aclrm
-* Description : The auto buffer clear mode of specified pipe is enabled
-* Arguments : uint16_t pipe : Pipe
-* Return Value : none
-*******************************************************************************/
-void usb0_host_clr_aclrm (uint16_t pipe)
-{
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- break;
-
- case USB_HOST_PIPE1:
- RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
- 0,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE2:
- RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
- 0,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE3:
- RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
- 0,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE4:
- RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
- 0,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE5:
- RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
- 0,
- USB_PIPEnCTR_1_5_ACLRM_SHIFT,
- USB_PIPEnCTR_1_5_ACLRM);
- break;
-
- case USB_HOST_PIPE6:
- RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
- 0,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE7:
- RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
- 0,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE8:
- RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
- 0,
- USB_PIPEnCTR_6_8_ACLRM_SHIFT,
- USB_PIPEnCTR_6_8_ACLRM);
- break;
-
- case USB_HOST_PIPE9:
- RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
- 0,
- USB_PIPEnCTR_9_ACLRM_SHIFT,
- USB_PIPEnCTR_9_ACLRM);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_inbuf
-* Description : Returns INBUFM of the pipe specified by the argument.
-* Arguments : uint16_t pipe ; Pipe Number
-* Return Value : inbuf
-*******************************************************************************/
-uint16_t usb0_host_get_inbuf (uint16_t pipe)
-{
- uint16_t inbuf;
-
- switch (pipe)
- {
- case USB_HOST_PIPE0:
- inbuf = 0;
- break;
-
- case USB_HOST_PIPE1:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
- USB_PIPEnCTR_1_5_INBUFM_SHIFT,
- USB_PIPEnCTR_1_5_INBUFM);
- break;
-
- case USB_HOST_PIPE2:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
- USB_PIPEnCTR_1_5_INBUFM_SHIFT,
- USB_PIPEnCTR_1_5_INBUFM);
- break;
-
- case USB_HOST_PIPE3:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
- USB_PIPEnCTR_1_5_INBUFM_SHIFT,
- USB_PIPEnCTR_1_5_INBUFM);
- break;
-
- case USB_HOST_PIPE4:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
- USB_PIPEnCTR_1_5_INBUFM_SHIFT,
- USB_PIPEnCTR_1_5_INBUFM);
- break;
-
- case USB_HOST_PIPE5:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
- USB_PIPEnCTR_1_5_INBUFM_SHIFT,
- USB_PIPEnCTR_1_5_INBUFM);
- break;
-
- case USB_HOST_PIPE6:
- inbuf = 0;
- break;
-
- case USB_HOST_PIPE7:
- inbuf = 0;
- break;
-
- case USB_HOST_PIPE8:
- inbuf = 0;
- break;
-
- case USB_HOST_PIPE9:
- inbuf = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
- USB_PIPEnCTR_9_INBUFM_SHIFT,
- USB_PIPEnCTR_9_INBUFM);
- break;
-
- default:
- inbuf = 0;
- break;
- }
-
- return inbuf;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_setting_interrupt
-* Description : Sets the USB module interrupt level.
-* Arguments : uint8_t level ; interrupt level
-* Return Value : none
-*******************************************************************************/
-void usb0_host_setting_interrupt (uint8_t level)
-{
-#if(1) /* ohci_wrapp */
- IRQn_Type d0fifo_dmaintid;
- IRQn_Type d1fifo_dmaintid;
-
- InterruptHandlerRegister(USBI0_IRQn, usb0_host_interrupt);
- GIC_SetPriority(USBI0_IRQn, level);
- GIC_EnableIRQ(USBI0_IRQn);
-
- d0fifo_dmaintid = (IRQn_Type)Userdef_USB_usb0_host_d0fifo_dmaintid();
-
- if (d0fifo_dmaintid != 0xFFFF)
- {
- InterruptHandlerRegister(d0fifo_dmaintid, usb0_host_dma_interrupt_d0fifo);
- GIC_SetPriority(d0fifo_dmaintid, level);
- GIC_EnableIRQ(d0fifo_dmaintid);
- }
-
- d1fifo_dmaintid = (IRQn_Type)Userdef_USB_usb0_host_d1fifo_dmaintid();
-
- if (d1fifo_dmaintid != 0xFFFF)
- {
- InterruptHandlerRegister(d1fifo_dmaintid, usb0_host_dma_interrupt_d1fifo);
- GIC_SetPriority(d1fifo_dmaintid, level);
- GIC_EnableIRQ(d1fifo_dmaintid);
- }
-#else
- uint16_t d0fifo_dmaintid;
- uint16_t d1fifo_dmaintid;
-
- R_INTC_RegistIntFunc(INTC_ID_USBI0, usb0_host_interrupt);
- R_INTC_SetPriority(INTC_ID_USBI0, level);
- R_INTC_Enable(INTC_ID_USBI0);
-
- d0fifo_dmaintid = Userdef_USB_usb0_host_d0fifo_dmaintid();
-
- if (d0fifo_dmaintid != 0xFFFF)
- {
- R_INTC_RegistIntFunc(d0fifo_dmaintid, usb0_host_dma_interrupt_d0fifo);
- R_INTC_SetPriority(d0fifo_dmaintid, level);
- R_INTC_Enable(d0fifo_dmaintid);
- }
-
- d1fifo_dmaintid = Userdef_USB_usb0_host_d1fifo_dmaintid();
-
- if (d1fifo_dmaintid != 0xFFFF)
- {
- R_INTC_RegistIntFunc(d1fifo_dmaintid, usb0_host_dma_interrupt_d1fifo);
- R_INTC_SetPriority(d1fifo_dmaintid, level);
- R_INTC_Enable(d1fifo_dmaintid);
- }
-#endif
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_reset_module
-* Description : Initializes the USB module.
-* : Enables providing clock to the USB module.
-* : Sets USB bus wait register.
-* Arguments : uint16_t clockmode ; 48MHz ; USBHCLOCK_X1_48MHZ
-* : ; 12MHz ; USBHCLOCK_EXTAL_12MHZ
-* Return Value : none
-*******************************************************************************/
-void usb0_host_reset_module (uint16_t clockmode)
-{
- if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
- USB_SYSCFG_UPLLE_SHIFT,
- USB_SYSCFG_UPLLE) == 1)
- {
- if ((USB200.SYSCFG0 & USB_HOST_BITUCKSEL) != clockmode)
- {
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 0,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- USB200.SYSCFG0 = 0;
- USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
- Userdef_USB_usb0_host_delay_xms(1);
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 1,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 0,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- Userdef_USB_usb0_host_delay_xms(1);
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 1,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- }
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 0,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- USB200.SYSCFG0 = 0;
- USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
- Userdef_USB_usb0_host_delay_xms(1);
- RZA_IO_RegWrite_16(&USB200.SUSPMODE,
- 1,
- USB_SUSPMODE_SUSPM_SHIFT,
- USB_SUSPMODE_SUSPM);
- }
-
- USB200.BUSWAIT = (uint16_t)(USB_HOST_BUSWAIT_05 & USB_HOST_BITBWAIT);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_buf_size
-* Description : Obtains pipe buffer size specified by the argument and
-* : maximum packet size of the USB device in use.
-* : When USB_HOST_PIPE0 is specified by the argument, obtains the maximum
-* : packet size of the USB device using the corresponding pipe.
-* : For the case that USB_HOST_PIPE0 is not assigned by the argument, when the
-* : corresponding pipe is in continuous transfer mode,
-* : obtains the buffer size allocated in the corresponcing pipe,
-* : when incontinuous transfer, obtains maximum packet size.
-* Arguments : uint16_t ; pipe Number
-* Return Value : Maximum packet size or buffer size
-*******************************************************************************/
-uint16_t usb0_host_get_buf_size (uint16_t pipe)
-{
- uint16_t size;
- uint16_t bufsize;
-
- if (pipe == USB_HOST_PIPE0)
- {
- size = RZA_IO_RegRead_16(&USB200.DCPMAXP,
- USB_DCPMAXP_MXPS_SHIFT,
- USB_DCPMAXP_MXPS);
- }
- else
- {
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_CNTMD_SHIFT, USB_PIPECFG_CNTMD) == 1)
- {
- bufsize = RZA_IO_RegRead_16(&g_usb0_host_pipebuf[pipe], USB_PIPEBUF_BUFSIZE_SHIFT, USB_PIPEBUF_BUFSIZE);
- size = (uint16_t)((bufsize + 1) * USB_HOST_PIPExBUF);
- }
- else
- {
- size = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
- }
- }
- return size;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_mxps
-* Description : Obtains maximum packet size of the USB device using the pipe
-* : specified by the argument.
-* Arguments : uint16_t ; Pipe Number
-* Return Value : Max Packet Size
-*******************************************************************************/
-uint16_t usb0_host_get_mxps (uint16_t pipe)
-{
- uint16_t size;
-
- if (pipe == USB_HOST_PIPE0)
- {
- size = RZA_IO_RegRead_16(&USB200.DCPMAXP,
- USB_DCPMAXP_MXPS_SHIFT,
- USB_DCPMAXP_MXPS);
- }
- else
- {
- size = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
- }
-
- return size;
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_controlrw.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,434 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_controlrw.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#include "dev_drv.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_CtrlTransStart
-* Description : Executes USB control transfer.
-* Arguments : uint16_t devadr ; device address
-* : uint16_t Req ; bmRequestType & bRequest
-* : uint16_t Val ; wValue
-* : uint16_t Indx ; wIndex
-* : uint16_t Len ; wLength
-* : uint8_t *Buf ; Data buffer
-* Return Value : DEVDRV_SUCCESS ; SUCCESS
-* : DEVDRV_ERROR ; ERROR
-*******************************************************************************/
-int32_t usb0_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
- uint16_t Indx, uint16_t Len, uint8_t * Buf)
-{
- if (g_usb0_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
- {
- RZA_IO_RegWrite_16(&USB200.SOFCFG,
- 1,
- USB_SOFCFG_TRNENSEL_SHIFT,
- USB_SOFCFG_TRNENSEL);
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.SOFCFG,
- 0,
- USB_SOFCFG_TRNENSEL_SHIFT,
- USB_SOFCFG_TRNENSEL);
- }
-
- USB200.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb0_host_default_max_packet[devadr]);
-
- if (g_usb0_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
- {
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
- g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
-
- if (Len == 0)
- {
- g_usb0_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
- }
- else
- {
- if ((Req & 0x0080) != 0)
- {
- g_usb0_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
- }
- else
- {
- g_usb0_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
- }
- }
-
- g_usb0_host_SavReq = Req; /* save request */
- g_usb0_host_SavVal = Val;
- g_usb0_host_SavIndx = Indx;
- g_usb0_host_SavLen = Len;
- }
- else
- {
- if ((g_usb0_host_SavReq != Req) || (g_usb0_host_SavVal != Val)
- || (g_usb0_host_SavIndx != Indx) || (g_usb0_host_SavLen != Len))
- {
- return DEVDRV_ERROR;
- }
- }
-
- switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
- {
- /* --------------- SETUP STAGE --------------- */
- case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
- usb0_host_SetupStage(Req, Val, Indx, Len);
- break;
-
- case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
- /* do nothing */
- break;
-
- case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
- switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
- {
- case USB_HOST_MODE_WRITE:
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
- break;
-
- case USB_HOST_MODE_READ:
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
- break;
-
- case USB_HOST_MODE_NO_DATA:
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
- break;
-
- default:
- break;
- }
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
- break;
-
- case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
- if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
- {
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
- }
- else
- {
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
- }
- break;
-
- /* --------------- DATA STAGE --------------- */
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
- switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
- {
- case USB_HOST_MODE_WRITE:
- usb0_host_CtrlWriteStart((uint32_t)Len, Buf);
- break;
-
- case USB_HOST_MODE_READ:
- usb0_host_CtrlReadStart((uint32_t)Len, Buf);
- break;
-
- default:
- break;
- }
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
- /* do nothing */
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
- if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
- {
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
- }
- else
- {
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
- usb0_host_clear_pid_stall(USB_HOST_PIPE0);
- usb0_host_set_pid_buf(USB_HOST_PIPE0);
- }
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
- break;
-
- /* --------------- STATUS STAGE --------------- */
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
- usb0_host_StatusStage();
- break;
-
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- /* do nothing */
- break;
-
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
- usb0_host_set_pid_nak(USB_HOST_PIPE0);
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
- break;
-
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
- if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
- {
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
- }
- else
- {
- g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
- usb0_host_clear_pid_stall(USB_HOST_PIPE0);
- usb0_host_set_pid_buf(USB_HOST_PIPE0);
- }
- break;
-
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
- break;
-
- default:
- break;
- }
-
- if (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
- {
- RZA_IO_RegWrite_16(&USB200.SOFCFG,
- 0,
- USB_SOFCFG_TRNENSEL_SHIFT,
- USB_SOFCFG_TRNENSEL);
- }
-
- return DEVDRV_SUCCESS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_SetupStage
-* Description : Executes USB control transfer/set up stage.
-* Arguments : uint16_t Req ; bmRequestType & bRequest
-* : uint16_t Val ; wValue
-* : uint16_t Indx ; wIndex
-* : uint16_t Len ; wLength
-* Return Value : none
-*******************************************************************************/
-void usb0_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
-{
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
-
- USB200.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
- USB200.USBREQ = Req;
- USB200.USBVAL = Val;
- USB200.USBINDX = Indx;
- USB200.USBLENG = Len;
- USB200.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_StatusStage
-* Description : Executes USB control transfer/status stage.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_StatusStage (void)
-{
- uint8_t Buf1[16];
-
- switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
- {
- case USB_HOST_MODE_READ:
- usb0_host_CtrlWriteStart((uint32_t)0, (uint8_t *)&Buf1);
- break;
-
- case USB_HOST_MODE_WRITE:
- usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
- break;
-
- case USB_HOST_MODE_NO_DATA:
- usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
- break;
-
- default:
- break;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_CtrlWriteStart
-* Description : Executes USB control transfer/data stage(write).
-* Arguments : uint32_t Bsize ; Data Size
-* : uint8_t *Table ; Data Table Address
-* Return Value : USB_HOST_WRITESHRT ; End of data write
-* : USB_HOST_WRITEEND ; End of data write (not null)
-* : USB_HOST_WRITING ; Continue of data write
-* : USB_HOST_FIFOERROR ; FIFO access error
-*******************************************************************************/
-uint16_t usb0_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
-{
- uint16_t EndFlag_K;
- uint16_t mbw;
-
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
-
- usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
- g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
- g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
-
- USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
-#if(1) /* ohci_wrapp */
- Userdef_USB_usb0_host_delay_10us(3);
-#endif
- RZA_IO_RegWrite_16(&USB200.DCPCFG,
- 1,
- USB_DCPCFG_DIR_SHIFT,
- USB_DCPCFG_DIR);
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
- USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
-
- usb0_host_clear_pid_stall(USB_HOST_PIPE0);
- EndFlag_K = usb0_host_write_buffer_c(USB_HOST_PIPE0);
- /* Host Control sequence */
- switch (EndFlag_K)
- {
- case USB_HOST_WRITESHRT: /* End of data write */
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
- usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
- usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
- break;
-
- case USB_HOST_WRITEEND: /* End of data write (not null) */
- case USB_HOST_WRITING: /* Continue of data write */
- usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
- usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access error */
- break;
-
- default:
- break;
- }
- usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
- return (EndFlag_K); /* End or Err or Continue */
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_CtrlReadStart
-* Description : Executes USB control transfer/data stage(read).
-* Arguments : uint32_t Bsize ; Data Size
-* : uint8_t *Table ; Data Table Address
-* Return Value : none
-*******************************************************************************/
-void usb0_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
-{
- uint16_t mbw;
-
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
-
- usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
- g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
- g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
-
- USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
-#if(1) /* ohci_wrapp */
- Userdef_USB_usb0_host_delay_10us(3);
-#endif
- RZA_IO_RegWrite_16(&USB200.DCPCFG,
- 0,
- USB_DCPCFG_DIR_SHIFT,
- USB_DCPCFG_DIR);
-
- mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
- usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
- USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
-
- usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
- usb0_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
- usb0_host_clear_pid_stall(USB_HOST_PIPE0);
- usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_drv_api.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,889 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_drv_api.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#include "dev_drv.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-static void usb0_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_api_host_init
-* Description : Initializes USB module in the USB host mode.
-* : USB connection is executed when executing this function in
-* : the states that USB device isconnected to the USB port.
-* Arguments : uint8_t int_level : USB Module interrupt level
-* : USBU16 mode : USB_HOST_HIGH_SPEED
-* : USB_HOST_FULL_SPEED
-* : uint16_t clockmode : USB Clock mode
-* Return Value : USB detach or attach
-* : USB_HOST_ATTACH
-* : USB_HOST_DETACH
-*******************************************************************************/
-uint16_t usb0_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
-{
- uint16_t connect;
- volatile uint8_t dummy_buf;
-
- CPG.STBCR7 &= 0xfd; /*The clock of USB0 modules is permitted */
- dummy_buf = CPG.STBCR7; /* (Dummy read) */
-
- g_usb0_host_SupportUsbDeviceSpeed = mode;
-
- usb0_host_setting_interrupt(int_level);
- usb0_host_reset_module(clockmode);
-
- g_usb0_host_bchg_flag = USB_HOST_NO;
- g_usb0_host_detach_flag = USB_HOST_NO;
- g_usb0_host_attach_flag = USB_HOST_NO;
-
- g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
- g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
-
- usb0_host_InitModule();
-
- connect = usb0_host_CheckAttach();
-
- if (connect == USB_HOST_ATTACH)
- {
- g_usb0_host_attach_flag = USB_HOST_YES;
- }
- else
- {
- usb0_host_UsbDetach2();
- }
-
- return connect;
-}
-
-#if(1) /* ohci_wrapp */
-#else
-/*******************************************************************************
-* Function Name: usb0_api_host_enumeration
-* Description : Initializes USB module in the USB host mode.
-* : USB connection is executed when executing this function in
-* : the states that USB device isconnected to the USB port.
-* Arguments : uint16_t devadr : device address
-* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
-* : DEVDRV_SUCCESS : device enumeration success
-* : DEVDRV_ERROR : device enumeration error
-*******************************************************************************/
-int32_t usb0_api_host_enumeration (uint16_t devadr)
-{
- int32_t ret;
- uint16_t driver_sts;
-
- g_usb0_host_setUsbAddress = devadr;
-
- while (1)
- {
- driver_sts = usb0_api_host_GetUsbDeviceState();
-
- if (driver_sts == USB_HOST_DRV_DETACHED)
- {
- ret = DEVDRV_USBH_DETACH_ERR;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_CONFIGURED)
- {
- ret = DEVDRV_SUCCESS;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_STALL)
- {
- ret = DEVDRV_ERROR;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_NORES)
- {
- ret = DEVDRV_ERROR;
- break;
- }
- else
- {
- /* Do Nothing */
- }
- }
-
- if (driver_sts == USB_HOST_DRV_NORES)
- {
- while (1)
- {
- driver_sts = usb0_api_host_GetUsbDeviceState();
-
- if (driver_sts == USB_HOST_DRV_DETACHED)
- {
- break;
- }
- }
- }
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_detach
-* Description : USB detach routine
-* Arguments : none
-* Return Value : USB_HOST_DETACH : USB detach
-* : USB_HOST_ATTACH : USB attach
-* : DEVDRV_ERROR : error
-*******************************************************************************/
-int32_t usb0_api_host_detach (void)
-{
- int32_t ret;
- uint16_t driver_sts;
-
- while (1)
- {
- driver_sts = usb0_api_host_GetUsbDeviceState();
-
- if (driver_sts == USB_HOST_DRV_DETACHED)
- {
- ret = USB_HOST_DETACH;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_CONFIGURED)
- {
- ret = USB_HOST_ATTACH;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_STALL)
- {
- ret = DEVDRV_ERROR;
- break;
- }
- else if (driver_sts == USB_HOST_DRV_NORES)
- {
- ret = DEVDRV_ERROR;
- break;
- }
- else
- {
- /* Do Nothing */
- }
- }
-
- if (driver_sts == USB_HOST_DRV_NORES)
- {
- while (1)
- {
- driver_sts = usb0_api_host_GetUsbDeviceState();
-
- if (driver_sts == USB_HOST_DRV_DETACHED)
- {
- break;
- }
- }
- }
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_data_in
-* Description : Executes USB transfer as data-in in the argument specified pipe.
-* Arguments : uint16_t devadr ; device address
-* : uint16_t Pipe ; Pipe Number
-* : uint32_t Size ; Data Size
-* : uint8_t *data_buf ; Data data_buf Address
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
-{
- int32_t ret;
-
- if (Pipe == USB_HOST_PIPE0)
- {
- return DEVDRV_ERROR;
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
- {
- return DEVDRV_ERROR;
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
- {
- return DEVDRV_ERROR;
- }
-
- if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
- {
- usb0_host_start_receive_transfer(Pipe, Size, data_buf);
- }
- else
- {
- return DEVDRV_ERROR; /* Now pipe is busy */
- }
-
- /* waiting for completing routine */
- do
- {
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- break;
- }
-
- if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
- {
- break;
- }
-
- } while (1);
-
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- return DEVDRV_USBH_DETACH_ERR;
- }
-
- switch (g_usb0_host_pipe_status[Pipe])
- {
- case USB_HOST_PIPE_DONE:
- ret = DEVDRV_SUCCESS;
- break;
-
- case USB_HOST_PIPE_STALL:
- ret = DEVDRV_USBH_STALL;
- break;
-
- case USB_HOST_PIPE_NORES:
- ret = DEVDRV_USBH_COM_ERR;
- break;
-
- default:
- ret = DEVDRV_ERROR;
- break;
- }
-
- usb0_host_stop_transfer(Pipe);
-
- g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_data_out
-* Description : Executes USB transfer as data-out in the argument specified pipe.
-* Arguments : uint16_t devadr ; device address
-* : uint16_t Pipe ; Pipe Number
-* : uint32_t Size ; Data Size
-* : uint8_t *data_buf ; Data data_buf Address
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
-{
- int32_t ret;
-
- if (Pipe == USB_HOST_PIPE0)
- {
- return DEVDRV_ERROR;
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
- {
- return DEVDRV_ERROR;
- }
-
- if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
- {
- return DEVDRV_ERROR;
- }
-
- if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
- {
- usb0_host_start_send_transfer(Pipe, Size, data_buf);
- }
- else
- {
- return DEVDRV_ERROR; /* Now pipe is busy */
- }
-
- /* waiting for completing routine */
- do
- {
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- break;
- }
-
- if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
- {
- break;
- }
-
- } while (1);
-
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- return DEVDRV_USBH_DETACH_ERR;
- }
-
- switch (g_usb0_host_pipe_status[Pipe])
- {
- case USB_HOST_PIPE_DONE:
- ret = DEVDRV_SUCCESS;
- break;
-
- case USB_HOST_PIPE_STALL:
- ret = DEVDRV_USBH_STALL;
- break;
-
- case USB_HOST_PIPE_NORES:
- ret = DEVDRV_USBH_COM_ERR;
- break;
-
- default:
- ret = DEVDRV_ERROR;
- break;
- }
-
- usb0_host_stop_transfer(Pipe);
-
- g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_control_transfer
-* Description : Executes USB control transfer.
-* Arguments : uint16_t devadr ; device address
-* : uint16_t Req ; bmRequestType & bRequest
-* : uint16_t Val ; wValue
-* : uint16_t Indx ; wIndex
-* : uint16_t Len ; wLength
-* : uint8_t *buf ; Buffer
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_USBH_DETACH_ERR ; device detach
-* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
-* : DEVDRV_USBH_STALL ; STALL
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
- uint16_t Len, uint8_t * Buf)
-{
- int32_t ret;
-
- do
- {
- ret = usb0_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
-
- if (ret == DEVDRV_SUCCESS)
- {
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- break;
- }
-
- if ((g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
- && (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
- {
- break;
- }
- }
- else
- {
- return DEVDRV_ERROR;
- }
- } while (1);
-
- if (g_usb0_host_detach_flag == USB_HOST_YES)
- {
- return DEVDRV_USBH_DETACH_ERR;
- }
-
- switch (g_usb0_host_pipe_status[USB_HOST_PIPE0])
- {
- case USB_HOST_PIPE_DONE:
- ret = DEVDRV_SUCCESS;
- break;
-
- case USB_HOST_PIPE_STALL:
- ret = DEVDRV_USBH_STALL;
- break;
-
- case USB_HOST_PIPE_NORES:
- ret = DEVDRV_USBH_CTRL_COM_ERR;
- break;
-
- default:
- ret = DEVDRV_ERROR;
- break;
- }
-
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_set_endpoint
-* Description : Sets end point on the information specified in the argument.
-* Arguments : uint16_t devadr ; device address
-* : uint8_t *configdescriptor ; device configration descriptor
-* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
-{
- uint16_t ret;
- uint32_t end_point;
- uint32_t offset;
- uint32_t totalLength;
- USB_HOST_CFG_PIPETBL_t * pipe_table;
-
- /* End Point Search */
- end_point = 0;
- offset = configdescriptor[0];
- totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
-
- do
- {
- if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
- {
- pipe_table = &user_table[end_point];
-
- if (pipe_table->pipe_number == 0xffff)
- {
- break;
- }
-
- ret = usb0_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
-
- if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
- {
- return DEVDRV_ERROR;
- }
-
- ++end_point;
- }
-
- /* Next End Point Search */
- offset += configdescriptor[offset];
-
- } while (offset < totalLength);
-
- return DEVDRV_SUCCESS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_clear_endpoint
-* Description : Clears the pipe definition table specified in the argument.
-* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
-{
- uint16_t pipe;
-
- for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
- {
- if (user_table->pipe_number == 0xffff)
- {
- break;
- }
- user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
- user_table->pipe_max_pktsize = 0;
- user_table->pipe_cycle = 0;
-
- user_table++;
- }
-
- return DEVDRV_SUCCESS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_api_host_clear_endpoint_pipe
-* Description : Clears the pipe definition table specified in the argument.
-* Arguments : uint16_t pipe_sel : Pipe Number
-* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
-{
- uint16_t pipe;
-
- for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
- {
- if (user_table->pipe_number == 0xffff)
- {
- break;
- }
-
- if (user_table->pipe_number == pipe_sel)
- {
- user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
- user_table->pipe_max_pktsize = 0;
- user_table->pipe_cycle = 0;
- break;
- }
-
- user_table++;
- }
-
- return DEVDRV_SUCCESS;
-}
-#endif
-
-/*******************************************************************************
-* Function Name: usb0_api_host_SetEndpointTable
-* Description : Sets the end point on the information specified by the argument.
-* Arguments : uint16_t devadr : device address
-* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
-* : uint8_t *Table : Endpoint descriptor
-* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
-* : USB_HOST_DIR_H_OUT ; OUT endpoint
-* : USB_END_POINT_ERROR ; error
-*******************************************************************************/
-uint16_t usb0_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
-{
- uint16_t PipeCfg;
- uint16_t PipeMaxp;
- uint16_t pipe_number;
- uint16_t ret;
- uint16_t ret_flag = 0; // avoid warning.
-
- pipe_number = user_table->pipe_number;
-
- if (Table[1] != USB_HOST_ENDPOINT_DESC)
- {
- return USB_END_POINT_ERROR;
- }
-
- switch (Table[3] & USB_HOST_EP_TYPE)
- {
- case USB_HOST_EP_CNTRL:
- ret_flag = USB_END_POINT_ERROR;
- break;
-
- case USB_HOST_EP_ISO:
- if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
- {
- return USB_END_POINT_ERROR;
- }
-
- PipeCfg = USB_HOST_ISO;
- break;
-
- case USB_HOST_EP_BULK:
- if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
- {
- return USB_END_POINT_ERROR;
- }
-
- PipeCfg = USB_HOST_BULK;
- break;
-
- case USB_HOST_EP_INT:
- if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
- {
- return USB_END_POINT_ERROR;
- }
-
- PipeCfg = USB_HOST_INTERRUPT;
- break;
-
- default:
- ret_flag = USB_END_POINT_ERROR;
- break;
- }
-
- if (ret_flag == USB_END_POINT_ERROR)
- {
- return ret_flag;
- }
-
- /* Set pipe configuration table */
- if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
- {
- if (PipeCfg == USB_HOST_ISO)
- {
- /* Transfer Type is ISO*/
- PipeCfg |= USB_HOST_DIR_H_IN;
-
- switch (user_table->fifo_port)
- {
- case USB_HOST_CUSE:
- case USB_HOST_D0USE:
- case USB_HOST_D1USE:
- case USB_HOST_D0DMA:
- case USB_HOST_D1DMA:
- PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
- break;
-
- default:
- ret_flag = USB_END_POINT_ERROR;
- break;
- }
-
- if (ret_flag == USB_END_POINT_ERROR)
- {
- return ret_flag;
- }
- }
- else
- {
- /* Transfer Type is BULK or INT */
- PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
-
- switch (user_table->fifo_port)
- {
- case USB_HOST_CUSE:
- case USB_HOST_D0USE:
- case USB_HOST_D1USE:
- PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
- break;
-
- case USB_HOST_D0DMA:
- case USB_HOST_D1DMA:
- PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
-#ifdef __USB_DMA_BFRE_ENABLE__
- /* this routine cannnot be perfomred if read operation is executed in buffer size */
- PipeCfg |= USB_HOST_BFREON;
-#endif
- break;
-
- default:
- ret_flag = USB_END_POINT_ERROR;
- break;
- }
-
- if (ret_flag == USB_END_POINT_ERROR)
- {
- return ret_flag;
- }
- }
- ret = USB_HOST_PIPE_IN;
- }
- else /* OUT(send) */
- {
- if (PipeCfg == USB_HOST_ISO)
- {
- /* Transfer Type is ISO*/
- PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
- }
- else
- {
- /* Transfer Type is BULK or INT */
- PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
- }
- PipeCfg |= USB_HOST_DIR_H_OUT;
- ret = USB_HOST_PIPE_OUT;
- }
-
- switch (user_table->fifo_port)
- {
- case USB_HOST_CUSE:
- g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
- break;
-
- case USB_HOST_D0USE:
- g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
- break;
-
- case USB_HOST_D1USE:
- g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
- break;
-
- case USB_HOST_D0DMA:
- g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
- break;
-
- case USB_HOST_D1DMA:
- g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
- break;
-
- default:
- ret_flag = USB_END_POINT_ERROR;
- break;
- }
-
- if (ret_flag == USB_END_POINT_ERROR)
- {
- return ret_flag;
- }
-
- /* Endpoint number set */
- PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
- g_usb0_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
-
- /* Max packet size set */
- PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
-
- if (PipeMaxp == 0u)
- {
- return USB_END_POINT_ERROR;
- }
-
- /* Set device address */
- PipeMaxp |= (uint16_t)(devadr << 12);
-
- user_table->pipe_cfg = PipeCfg;
- user_table->pipe_max_pktsize = PipeMaxp;
-
- usb0_host_resetEP(user_table);
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_resetEP
-* Description : Sets the end point on the information specified by the argument.
-* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
-{
-
- uint16_t pipe;
-
- /* Host pipe */
- /* The pipe number of pipe definition table is obtained */
- pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
-
- /* FIFO port access pipe is set to initial value */
- /* The connection with FIFO should be cut before setting the pipe */
- if (RZA_IO_RegRead_16(&USB200.CFIFOSEL,
- USB_CFIFOSEL_CURPIPE_SHIFT,
- USB_CFIFOSEL_CURPIPE) == pipe)
- {
- usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
- }
-
- if (RZA_IO_RegRead_16(&USB200.D0FIFOSEL,
- USB_DnFIFOSEL_CURPIPE_SHIFT,
- USB_DnFIFOSEL_CURPIPE) == pipe)
- {
- usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
- }
-
- if (RZA_IO_RegRead_16(&USB200.D1FIFOSEL,
- USB_DnFIFOSEL_CURPIPE_SHIFT,
- USB_DnFIFOSEL_CURPIPE) == pipe)
- {
- usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
- }
-
- /* Interrupt of pipe set is disabled */
- usb0_host_disable_brdy_int(pipe);
- usb0_host_disable_nrdy_int(pipe);
- usb0_host_disable_bemp_int(pipe);
-
- /* Pipe to set is set to NAK */
- usb0_host_set_pid_nak(pipe);
-
- /* Pipe is set */
- USB200.PIPESEL = pipe;
-
- USB200.PIPECFG = tbl->pipe_cfg;
- USB200.PIPEBUF = tbl->pipe_buf;
- USB200.PIPEMAXP = tbl->pipe_max_pktsize;
- USB200.PIPEPERI = tbl->pipe_cycle;
-
- g_usb0_host_pipecfg[pipe] = tbl->pipe_cfg;
- g_usb0_host_pipebuf[pipe] = tbl->pipe_buf;
- g_usb0_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
- g_usb0_host_pipeperi[pipe] = tbl->pipe_cycle;
-
- /* Sequence bit clear */
- usb0_host_set_sqclr(pipe);
-
- usb0_host_aclrm(pipe);
- usb0_host_set_csclr(pipe);
-
- /* Pipe window selection is set to unused */
- USB200.PIPESEL = USB_HOST_PIPE0;
-
-}
-
-#if(1) /* ohci_wrapp */
-#else
-/*******************************************************************************
-* Function Name: usb0_api_host_data_count
-* Description : Get g_usb0_host_data_count[pipe]
-* Arguments : uint16_t pipe ; Pipe Number
-* : uint32_t *data_count ; return g_usb0_data_count[pipe]
-* Return Value : DEVDRV_SUCCESS ; success
-* : DEVDRV_ERROR ; error
-*******************************************************************************/
-int32_t usb0_api_host_data_count (uint16_t pipe, uint32_t * data_count)
-{
- if (pipe > USB_HOST_MAX_PIPE_NO)
- {
- return DEVDRV_ERROR;
- }
-
- *data_count = g_usb0_host_PipeDataSize[pipe];
-
- return DEVDRV_SUCCESS;
-}
-#endif
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_global.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,137 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_global.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-const uint16_t g_usb0_host_bit_set[16] =
-{
- 0x0001, 0x0002, 0x0004, 0x0008,
- 0x0010, 0x0020, 0x0040, 0x0080,
- 0x0100, 0x0200, 0x0400, 0x0800,
- 0x1000, 0x2000, 0x4000, 0x8000
-};
-
-uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
-uint8_t * g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
-
-uint16_t g_usb0_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
-uint16_t g_usb0_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
-uint16_t g_usb0_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
-uint32_t g_usb0_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
-
-USB_HOST_DMA_t g_usb0_host_DmaInfo[2];
-
-uint16_t g_usb0_host_DmaPipe[2];
-uint16_t g_usb0_host_DmaBval[2];
-uint16_t g_usb0_host_DmaStatus[2];
-
-uint16_t g_usb0_host_driver_state;
-uint16_t g_usb0_host_ConfigNum;
-uint16_t g_usb0_host_CmdStage;
-uint16_t g_usb0_host_bchg_flag;
-uint16_t g_usb0_host_detach_flag;
-uint16_t g_usb0_host_attach_flag;
-
-uint16_t g_usb0_host_UsbAddress;
-uint16_t g_usb0_host_setUsbAddress;
-uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
-uint16_t g_usb0_host_UsbDeviceSpeed;
-uint16_t g_usb0_host_SupportUsbDeviceSpeed;
-
-uint16_t g_usb0_host_SavReq;
-uint16_t g_usb0_host_SavVal;
-uint16_t g_usb0_host_SavIndx;
-uint16_t g_usb0_host_SavLen;
-
-uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
-uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
-uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
-uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_init_pipe_status
-* Description : Initialize pipe status.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_init_pipe_status (void)
-{
- uint16_t loop;
-
- g_usb0_host_ConfigNum = 0;
-
- for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
- {
- g_usb0_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
- g_usb0_host_PipeDataSize[loop] = 0;
-
- /* pipe configuration in usb0_host_resetEP() */
- g_usb0_host_pipecfg[loop] = 0;
- g_usb0_host_pipebuf[loop] = 0;
- g_usb0_host_pipemaxp[loop] = 0;
- g_usb0_host_pipeperi[loop] = 0;
- }
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_usbint.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,496 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_usbint.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#if(1) /* ohci_wrapp */
-#include "ohci_wrapp_RZ_A1_local.h"
-#endif
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-static void usb0_host_interrupt1(void);
-static void usb0_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
-static void usb0_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
-static void usb0_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_interrupt
-* Description : Executes USB interrupt.
-* : Register this function in the USB interrupt handler.
-* : Set CFIF0 in the pipe set before the interrupt after executing
-* : this function.
-* Arguments : uint32_t int_sense ; Interrupts detection mode
-* : ; INTC_LEVEL_SENSITIVE : Level sense
-* : ; INTC_EDGE_TRIGGER : Edge trigger
-* Return Value : none
-*******************************************************************************/
-void usb0_host_interrupt (uint32_t int_sense)
-{
- uint16_t savepipe1;
- uint16_t savepipe2;
- uint16_t buffer;
-
- savepipe1 = USB200.CFIFOSEL;
- savepipe2 = USB200.PIPESEL;
- usb0_host_interrupt1();
-
- /* Control transmission changes ISEL within interruption processing. */
- /* For this reason, write return of ISEL cannot be performed. */
- buffer = USB200.CFIFOSEL;
- buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
- buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
- USB200.CFIFOSEL = buffer;
- USB200.PIPESEL = savepipe2;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_interrupt1
-* Description : Execue the USB interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_interrupt1 (void)
-{
- uint16_t intsts0;
- uint16_t intsts1;
- uint16_t intenb0;
- uint16_t intenb1;
- uint16_t brdysts;
- uint16_t nrdysts;
- uint16_t bempsts;
- uint16_t brdyenb;
- uint16_t nrdyenb;
- uint16_t bempenb;
- volatile uint16_t dumy_sts;
-
- intsts0 = USB200.INTSTS0;
- intsts1 = USB200.INTSTS1;
- intenb0 = USB200.INTENB0;
- intenb1 = USB200.INTENB1;
-
- if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
- {
- USB200.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_BCHGE_SHIFT,
- USB_INTENB1_BCHGE);
- g_usb0_host_bchg_flag = USB_HOST_YES;
- }
- else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
- {
- USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
-#if(1) /* ohci_wrapp */
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
-#else
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
-#endif
- }
- else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
- {
- USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
-#else
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
-#endif
- }
- else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
- && ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
- {
- USB200.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_DTCHE_SHIFT,
- USB_INTENB1_DTCHE);
- g_usb0_host_detach_flag = USB_HOST_YES;
-
- Userdef_USB_usb0_host_detach();
-
- usb0_host_UsbDetach2();
- }
- else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
- && ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
- {
- USB200.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_ATTCHE_SHIFT,
- USB_INTENB1_ATTCHE);
- g_usb0_host_attach_flag = USB_HOST_YES;
-
- Userdef_USB_usb0_host_attach();
-
- usb0_host_UsbAttach();
- }
- else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
- {
- brdysts = USB200.BRDYSTS;
- nrdysts = USB200.NRDYSTS;
- bempsts = USB200.BEMPSTS;
- brdyenb = USB200.BRDYENB;
- nrdyenb = USB200.NRDYENB;
- bempenb = USB200.BEMPENB;
-
- if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
- {
- usb0_host_BRDYInterrupt(brdysts, brdyenb);
- }
- else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
- {
- usb0_host_BEMPInterrupt(bempsts, bempenb);
- }
- else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
- {
- usb0_host_NRDYInterrupt(nrdysts, nrdyenb);
- }
- else
- {
- /* Do Nothing */
- }
- }
- else
- {
- /* Do Nothing */
- }
-
- /* Three dummy read for clearing interrupt requests */
- dumy_sts = USB200.INTSTS0;
- dumy_sts = USB200.INTSTS1;
-
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_BRDYInterrupt
-* Description : Executes USB BRDY interrupt.
-* Arguments : uint16_t Status ; BRDYSTS Register Value
-* : uint16_t Int_enbl ; BRDYENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
-{
- uint16_t buffer;
- volatile uint16_t dumy_sts;
-
- if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
- {
- USB200.BRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
-
-#if(1) /* ohci_wrapp */
- switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
- {
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
- buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
- switch (buffer)
- {
- case USB_HOST_READING: /* Continue of data read */
- break;
-
- case USB_HOST_READEND: /* End of data read */
- case USB_HOST_READSHRT: /* End of data read */
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
- break;
-
- case USB_HOST_READOVER: /* buffer over */
- USB200.CFIFOCTR = USB_HOST_BITBCLR;
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access error */
- default:
- break;
- }
- break;
-
- default:
- break;
- }
-#else
- switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
- {
- case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- break;
-
- case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
- buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
-
- switch (buffer)
- {
- case USB_HOST_READING: /* Continue of data read */
- break;
-
- case USB_HOST_READEND: /* End of data read */
- case USB_HOST_READSHRT: /* End of data read */
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- break;
-
- case USB_HOST_READOVER: /* buffer over */
- USB200.CFIFOCTR = USB_HOST_BITBCLR;
- usb0_host_disable_brdy_int(USB_HOST_PIPE0);
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access error */
- default:
- break;
- }
- break;
-
- default:
- break;
- }
-#endif
- }
- else
- {
- usb0_host_brdy_int(Status, Int_enbl);
- }
-
- /* Three dummy reads for clearing interrupt requests */
- dumy_sts = USB200.BRDYSTS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_NRDYInterrupt
-* Description : Executes USB NRDY interrupt.
-* Arguments : uint16_t Status ; NRDYSTS Register Value
-* : uint16_t Int_enbl ; NRDYENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
-{
- uint16_t pid;
- volatile uint16_t dumy_sts;
-
- if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
- {
- USB200.NRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
- pid = usb0_host_get_pid(USB_HOST_PIPE0);
-
- if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
- {
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
-#endif
- }
- else if (pid == USB_HOST_PID_NAK)
- {
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
-#endif
- }
- else
- {
- /* Do Nothing */
- }
- }
- else
- {
- usb0_host_nrdy_int(Status, Int_enbl);
- }
-
- /* Three dummy reads for clearing interrupt requests */
- dumy_sts = USB200.NRDYSTS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_BEMPInterrupt
-* Description : Executes USB BEMP interrupt.
-* Arguments : uint16_t Status ; BEMPSTS Register Value
-* : uint16_t Int_enbl ; BEMPENB Register Value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
-{
- uint16_t buffer;
- uint16_t pid;
- volatile uint16_t dumy_sts;
-
- if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
- {
- USB200.BEMPSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
- pid = usb0_host_get_pid(USB_HOST_PIPE0);
-
- if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
- {
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
-#if(1) /* ohci_wrapp */
- g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
-#endif
- }
- else
- {
-#if(1) /* ohci_wrapp */
- switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
- {
- case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
- break;
-
- case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
- buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
- switch (buffer)
- {
- case USB_HOST_WRITING: /* Continue of data write */
- case USB_HOST_WRITEEND: /* End of data write (zero-length) */
- break;
-
- case USB_HOST_WRITESHRT: /* End of data write */
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
- ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access error */
- default:
- break;
- }
- break;
-
- default:
- /* do nothing */
- break;
- }
-#else
- switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
- {
- case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
- break;
-
- case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
- buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
- switch (buffer)
- {
- case USB_HOST_WRITING: /* Continue of data write */
- case USB_HOST_WRITEEND: /* End of data write (zero-length) */
- break;
-
- case USB_HOST_WRITESHRT: /* End of data write */
- g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
- break;
-
- case USB_HOST_FIFOERROR: /* FIFO access error */
- default:
- break;
- }
- break;
-
- case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
- g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
- g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
- break;
-
- default:
- /* do nothing */
- break;
- }
-#endif
- }
- }
- else
- {
- usb0_host_bemp_int(Status, Int_enbl);
- }
-
- /* Three dummy reads for clearing interrupt requests */
- dumy_sts = USB200.BEMPSTS;
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_usbsig.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,637 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_usbsig.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "usb0_host.h"
-#include "dev_drv.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-static void usb0_host_EnableINT_Module(void);
-static void usb0_host_Enable_AttachINT(void);
-static void usb0_host_Disable_AttachINT(void);
-static void usb0_host_Disable_BchgINT(void);
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: usb0_host_InitModule
-* Description : Initializes the USB module in USB host module.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_InitModule (void)
-{
- uint16_t buf1;
- uint16_t buf2;
- uint16_t buf3;
-
- usb0_host_init_pipe_status();
-
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 1,
- USB_SYSCFG_DCFM_SHIFT,
- USB_SYSCFG_DCFM); /* HOST mode */
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 1,
- USB_SYSCFG_DRPD_SHIFT,
- USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
-
- do
- {
- buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
- Userdef_USB_usb0_host_delay_xms(50);
- buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
- Userdef_USB_usb0_host_delay_xms(50);
- buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
-
- } while ((buf1 != buf2) || (buf1 != buf3));
-
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 1,
- USB_SYSCFG_USBE_SHIFT,
- USB_SYSCFG_USBE);
-
- USB200.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
- USB200.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
- USB200.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_CheckAttach
-* Description : Returns the USB device connection state.
-* Arguments : none
-* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
-* : ; USB_HOST_DETACH : not Attached
-*******************************************************************************/
-uint16_t usb0_host_CheckAttach (void)
-{
- uint16_t buf1;
- uint16_t buf2;
- uint16_t buf3;
- uint16_t rhst;
-
- do
- {
- buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
- Userdef_USB_usb0_host_delay_xms(50);
- buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
- Userdef_USB_usb0_host_delay_xms(50);
- buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
-
- } while ((buf1 != buf2) || (buf1 != buf3));
-
- rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
- USB_DVSTCTR0_RHST_SHIFT,
- USB_DVSTCTR0_RHST);
- if (rhst == USB_HOST_UNDECID)
- {
- if (buf1 == USB_HOST_FS_JSTS)
- {
- if (g_usb0_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
- {
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 1,
- USB_SYSCFG_HSE_SHIFT,
- USB_SYSCFG_HSE);
- }
- else
- {
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 0,
- USB_SYSCFG_HSE_SHIFT,
- USB_SYSCFG_HSE);
- }
- return USB_HOST_ATTACH;
- }
- else if (buf1 == USB_HOST_LS_JSTS)
- {
- /* Low Speed Device */
- RZA_IO_RegWrite_16(&USB200.SYSCFG0,
- 0,
- USB_SYSCFG_HSE_SHIFT,
- USB_SYSCFG_HSE);
- return USB_HOST_ATTACH;
- }
- else
- {
- /* Do Nothing */
- }
- }
- else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
- {
- return USB_HOST_ATTACH;
- }
- else if (rhst == USB_HOST_LSMODE)
- {
- return USB_HOST_ATTACH;
- }
- else
- {
- /* Do Nothing */
- }
-
- return USB_HOST_DETACH;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbAttach
-* Description : Connects the USB device.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_UsbAttach (void)
-{
- usb0_host_EnableINT_Module();
- usb0_host_Disable_BchgINT();
- usb0_host_Disable_AttachINT();
- usb0_host_Enable_DetachINT();
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbDetach
-* Description : Disconnects the USB device.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_UsbDetach (void)
-{
- uint16_t pipe;
- uint16_t devadr;
-
- g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
-
- /* Terminate all the pipes in which communications on port */
- /* are currently carried out */
- for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
- {
- if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
- {
- if (pipe == USB_HOST_PIPE0)
- {
- devadr = RZA_IO_RegRead_16(&USB200.DCPMAXP,
- USB_DCPMAXP_DEVSEL_SHIFT,
- USB_DCPMAXP_DEVSEL);
- }
- else
- {
- devadr = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
- }
-
- if (devadr == g_usb0_host_UsbAddress)
- {
- usb0_host_stop_transfer(pipe);
- }
-
- g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
- }
- }
-
- g_usb0_host_ConfigNum = 0;
- g_usb0_host_UsbAddress = 0;
- g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
-
- usb0_host_UsbDetach2();
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbDetach2
-* Description : Disconnects the USB device.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_UsbDetach2 (void)
-{
- usb0_host_Disable_DetachINT();
- usb0_host_Disable_BchgINT();
- usb0_host_Enable_AttachINT();
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbBusReset
-* Description : Issues the USB bus reset signal.
-* Arguments : none
-* Return Value : uint16_t ; RHST
-*******************************************************************************/
-uint16_t usb0_host_UsbBusReset (void)
-{
- uint16_t buffer;
- uint16_t loop;
-
- RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
- 1,
- USB_DVSTCTR0_USBRST_SHIFT,
- USB_DVSTCTR0_USBRST);
- RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
- 0,
- USB_DVSTCTR0_UACT_SHIFT,
- USB_DVSTCTR0_UACT);
-
- Userdef_USB_usb0_host_delay_xms(50);
-
- buffer = USB200.DVSTCTR0;
- buffer &= (uint16_t)(~(USB_HOST_BITRST));
- buffer |= USB_HOST_BITUACT;
- USB200.DVSTCTR0 = buffer;
-
- Userdef_USB_usb0_host_delay_xms(20);
-
- for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
- {
- buffer = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
- USB_DVSTCTR0_RHST_SHIFT,
- USB_DVSTCTR0_RHST);
- if (buffer == USB_HOST_HSPROC)
- {
- Userdef_USB_usb0_host_delay_xms(10);
- }
- else
- {
- break;
- }
- }
-
- return buffer;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbResume
-* Description : Issues the USB resume signal.
-* Arguments : none
-* Return Value : int32_t ; DEVDRV_SUCCESS
-* : ; DEVDRV_ERROR
-*******************************************************************************/
-int32_t usb0_host_UsbResume (void)
-{
- uint16_t buf;
-
- if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
- {
- /* not SUSPEND */
- return DEVDRV_ERROR;
- }
-
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_BCHGE_SHIFT,
- USB_INTENB1_BCHGE);
- RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
- 1,
- USB_DVSTCTR0_RESUME_SHIFT,
- USB_DVSTCTR0_RESUME);
- Userdef_USB_usb0_host_delay_xms(20);
-
- buf = USB200.DVSTCTR0;
- buf &= (uint16_t)(~(USB_HOST_BITRESUME));
- buf |= USB_HOST_BITUACT;
- USB200.DVSTCTR0 = buf;
-
- g_usb0_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
-
- return DEVDRV_SUCCESS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_UsbSuspend
-* Description : Issues the USB suspend signal.
-* Arguments : none
-* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
-* : ; DEVDRV_ERROR :SUSPEND
-*******************************************************************************/
-int32_t usb0_host_UsbSuspend (void)
-{
- uint16_t buf;
-
- if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
- {
- /* SUSPEND */
- return DEVDRV_ERROR;
- }
-
- RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
- 0,
- USB_DVSTCTR0_UACT_SHIFT,
- USB_DVSTCTR0_UACT);
-
- Userdef_USB_usb0_host_delay_xms(5);
-
- buf = RZA_IO_RegRead_16(&USB200.SYSSTS0,
- USB_SYSSTS0_LNST_SHIFT,
- USB_SYSSTS0_LNST);
- if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
- {
- usb0_host_UsbDetach();
- }
- else
- {
- g_usb0_host_driver_state |= USB_HOST_DRV_SUSPEND;
- }
-
- return DEVDRV_SUCCESS;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_Enable_DetachINT
-* Description : Enables the USB disconnection interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_Enable_DetachINT (void)
-{
- USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 1,
- USB_INTENB1_DTCHE_SHIFT,
- USB_INTENB1_DTCHE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_Disable_DetachINT
-* Description : Disables the USB disconnection interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_Disable_DetachINT (void)
-{
- USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_DTCHE_SHIFT,
- USB_INTENB1_DTCHE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_Enable_AttachINT
-* Description : Enables the USB connection detection interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_Enable_AttachINT (void)
-{
- USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 1,
- USB_INTENB1_ATTCHE_SHIFT,
- USB_INTENB1_ATTCHE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_Disable_AttachINT
-* Description : Disables the USB connection detection interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_Disable_AttachINT (void)
-{
- USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_ATTCHE_SHIFT,
- USB_INTENB1_ATTCHE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_Disable_BchgINT
-* Description : Disables the USB bus change detection interrupt.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_Disable_BchgINT (void)
-{
- USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
- RZA_IO_RegWrite_16(&USB200.INTENB1,
- 0,
- USB_INTENB1_BCHGE_SHIFT,
- USB_INTENB1_BCHGE);
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_set_devadd
-* Description : DEVADDn register is set by specified value
-* Arguments : uint16_t addr : Device address
-* : uint16_t *devadd : Set value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_set_devadd (uint16_t addr, uint16_t * devadd)
-{
- uint16_t * ptr;
- uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
-
- switch (addr)
- {
- case USB_HOST_DEVICE_0:
- ptr = (uint16_t *)&USB200.DEVADD0;
- break;
-
- case USB_HOST_DEVICE_1:
- ptr = (uint16_t *)&USB200.DEVADD1;
- break;
-
- case USB_HOST_DEVICE_2:
- ptr = (uint16_t *)&USB200.DEVADD2;
- break;
-
- case USB_HOST_DEVICE_3:
- ptr = (uint16_t *)&USB200.DEVADD3;
- break;
-
- case USB_HOST_DEVICE_4:
- ptr = (uint16_t *)&USB200.DEVADD4;
- break;
-
- case USB_HOST_DEVICE_5:
- ptr = (uint16_t *)&USB200.DEVADD5;
- break;
-
- case USB_HOST_DEVICE_6:
- ptr = (uint16_t *)&USB200.DEVADD6;
- break;
-
- case USB_HOST_DEVICE_7:
- ptr = (uint16_t *)&USB200.DEVADD7;
- break;
-
- case USB_HOST_DEVICE_8:
- ptr = (uint16_t *)&USB200.DEVADD8;
- break;
-
- case USB_HOST_DEVICE_9:
- ptr = (uint16_t *)&USB200.DEVADD9;
- break;
-
- case USB_HOST_DEVICE_10:
- ptr = (uint16_t *)&USB200.DEVADDA;
- break;
-
- default:
- ret_flag = DEVDRV_FLAG_OFF;
- break;
- }
-
- if (ret_flag == DEVDRV_FLAG_ON)
- {
- *ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_get_devadd
-* Description : DEVADDn register is obtained
-* Arguments : uint16_t addr : Device address
-* : uint16_t *devadd : USB_HOST_DEVADD register value
-* Return Value : none
-*******************************************************************************/
-void usb0_host_get_devadd (uint16_t addr, uint16_t * devadd)
-{
- uint16_t * ptr;
- uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
-
- switch (addr)
- {
- case USB_HOST_DEVICE_0:
- ptr = (uint16_t *)&USB200.DEVADD0;
- break;
-
- case USB_HOST_DEVICE_1:
- ptr = (uint16_t *)&USB200.DEVADD1;
- break;
-
- case USB_HOST_DEVICE_2:
- ptr = (uint16_t *)&USB200.DEVADD2;
- break;
-
- case USB_HOST_DEVICE_3:
- ptr = (uint16_t *)&USB200.DEVADD3;
- break;
-
- case USB_HOST_DEVICE_4:
- ptr = (uint16_t *)&USB200.DEVADD4;
- break;
-
- case USB_HOST_DEVICE_5:
- ptr = (uint16_t *)&USB200.DEVADD5;
- break;
-
- case USB_HOST_DEVICE_6:
- ptr = (uint16_t *)&USB200.DEVADD6;
- break;
-
- case USB_HOST_DEVICE_7:
- ptr = (uint16_t *)&USB200.DEVADD7;
- break;
-
- case USB_HOST_DEVICE_8:
- ptr = (uint16_t *)&USB200.DEVADD8;
- break;
-
- case USB_HOST_DEVICE_9:
- ptr = (uint16_t *)&USB200.DEVADD9;
- break;
-
- case USB_HOST_DEVICE_10:
- ptr = (uint16_t *)&USB200.DEVADDA;
- break;
-
- default:
- ret_flag = DEVDRV_FLAG_OFF;
- break;
- }
-
- if (ret_flag == DEVDRV_FLAG_ON)
- {
- *devadd = *ptr;
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_EnableINT_Module
-* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
-* : Enables NRDY/BEMP interrupt in the pipe0.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void usb0_host_EnableINT_Module (void)
-{
- uint16_t buf;
-
- buf = USB200.INTENB0;
- buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
- USB200.INTENB0 = buf;
-
- buf = USB200.INTENB1;
- buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
- USB200.INTENB1 = buf;
-
- usb0_host_enable_nrdy_int(USB_HOST_PIPE0);
- usb0_host_enable_bemp_int(USB_HOST_PIPE0);
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/usb0_host_dmacdrv.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,698 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_dmacdrv.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "r_typedefs.h"
-#include "iodefine.h"
-#include "rza_io_regrw.h"
-#include "usb0_host_dmacdrv.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
-
-/* ==== Request setting information for on-chip peripheral module ==== */
-typedef enum dmac_peri_req_reg_type
-{
- DMAC_REQ_MID,
- DMAC_REQ_RID,
- DMAC_REQ_AM,
- DMAC_REQ_LVL,
- DMAC_REQ_REQD
-} dmac_peri_req_reg_type_t;
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-/* ==== Prototype declaration ==== */
-
-/* ==== Global variable ==== */
-/* On-chip peripheral module request setting table */
-static const uint8_t usb0_host_dmac_peri_req_init_table[8][5] =
-{
- /* MID,RID, AM,LVL,REQD */
- { 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
- { 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
- { 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
- { 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
- { 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
- { 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
- { 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
- { 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
-};
-
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC1_PeriReqInit
-* Description : Sets the register mode for DMA mode and the on-chip peripheral
-* : module request for transfer request for DMAC channel 1.
-* : Executes DMAC initial setting using the DMA information
-* : specified by the argument *trans_info and the enabled/disabled
-* : continuous transfer specified by the argument continuation.
-* : Registers DMAC channel 1 interrupt handler function and sets
-* : the interrupt priority level. Then enables transfer completion
-* : interrupt.
-* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
-* : : register
-* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
-* : uint32_t continuation : Set continuous transfer to be valid
-* : : after DMA transfer has been completed
-* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
-* : DMAC_SAMPLE_SINGLE : Do not execute continuous
-* : : transfer
-* : uint32_t request_factor : Factor for on-chip peripheral module
-* : : request
-* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
-* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
-* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
-* : :
-* : uint32_t req_direction : Setting value of CHCFG_n register
-* : : REQD bit
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC1_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
- uint32_t request_factor, uint32_t req_direction)
-{
- /* ==== Register mode ==== */
- if (DMAC_MODE_REGISTER == dmamode)
- {
- /* ==== Next0 register set ==== */
- DMAC1.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
- DMAC1.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
- DMAC1.N0TB_n = trans_info->count; /* Total transfer byte count */
-
- /* DAD : Transfer destination address counting direction */
- /* SAD : Transfer source address counting direction */
- /* DDS : Transfer destination transfer size */
- /* SDS : Transfer source transfer size */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- trans_info->daddr_dir,
- DMAC1_CHCFG_n_DAD_SHIFT,
- DMAC1_CHCFG_n_DAD);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- trans_info->saddr_dir,
- DMAC1_CHCFG_n_SAD_SHIFT,
- DMAC1_CHCFG_n_SAD);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- trans_info->dst_size,
- DMAC1_CHCFG_n_DDS_SHIFT,
- DMAC1_CHCFG_n_DDS);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- trans_info->src_size,
- DMAC1_CHCFG_n_SDS_SHIFT,
- DMAC1_CHCFG_n_SDS);
-
- /* DMS : Register mode */
- /* RSEL : Select Next0 register set */
- /* SBE : No discharge of buffer data when aborted */
- /* DEM : No DMA interrupt mask */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_DMS_SHIFT,
- DMAC1_CHCFG_n_DMS);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_RSEL_SHIFT,
- DMAC1_CHCFG_n_RSEL);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_SBE_SHIFT,
- DMAC1_CHCFG_n_SBE);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_DEM_SHIFT,
- DMAC1_CHCFG_n_DEM);
-
- /* ---- Continuous transfer ---- */
- if (DMAC_SAMPLE_CONTINUATION == continuation)
- {
- /* REN : Execute continuous transfer */
- /* RSW : Change register set when DMA transfer is completed. */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 1,
- DMAC1_CHCFG_n_REN_SHIFT,
- DMAC1_CHCFG_n_REN);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 1,
- DMAC1_CHCFG_n_RSW_SHIFT,
- DMAC1_CHCFG_n_RSW);
- }
- /* ---- Single transfer ---- */
- else
- {
- /* REN : Do not execute continuous transfer */
- /* RSW : Do not change register set when DMA transfer is completed. */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_REN_SHIFT,
- DMAC1_CHCFG_n_REN);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_RSW_SHIFT,
- DMAC1_CHCFG_n_RSW);
- }
-
- /* TM : Single transfer */
- /* SEL : Channel setting */
- /* HIEN, LOEN : On-chip peripheral module request */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_TM_SHIFT,
- DMAC1_CHCFG_n_TM);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 1,
- DMAC1_CHCFG_n_SEL_SHIFT,
- DMAC1_CHCFG_n_SEL);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 1,
- DMAC1_CHCFG_n_HIEN_SHIFT,
- DMAC1_CHCFG_n_HIEN);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- 0,
- DMAC1_CHCFG_n_LOEN_SHIFT,
- DMAC1_CHCFG_n_LOEN);
-
- /* ---- Set factor by specified on-chip peripheral module request ---- */
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
- DMAC1_CHCFG_n_AM_SHIFT,
- DMAC1_CHCFG_n_AM);
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
- DMAC1_CHCFG_n_LVL_SHIFT,
- DMAC1_CHCFG_n_LVL);
- if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
- {
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
- DMAC1_CHCFG_n_REQD_SHIFT,
- DMAC1_CHCFG_n_REQD);
- }
- else
- {
- RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
- req_direction,
- DMAC1_CHCFG_n_REQD_SHIFT,
- DMAC1_CHCFG_n_REQD);
- }
- RZA_IO_RegWrite_32(&DMAC01.DMARS,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
- DMAC01_DMARS_CH1_RID_SHIFT,
- DMAC01_DMARS_CH1_RID);
- RZA_IO_RegWrite_32(&DMAC01.DMARS,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
- DMAC01_DMARS_CH1_MID_SHIFT,
- DMAC01_DMARS_CH1_MID);
-
- /* PR : Round robin mode */
- RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
- 1,
- DMAC07_DCTRL_0_7_PR_SHIFT,
- DMAC07_DCTRL_0_7_PR);
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC1_Open
-* Description : Enables DMAC channel 1 transfer.
-* Arguments : uint32_t req : DMAC request mode
-* Return Value : 0 : Succeeded in enabling DMA transfer
-* : -1 : Failed to enable DMA transfer (due to DMA operation)
-*******************************************************************************/
-int32_t usb0_host_DMAC1_Open (uint32_t req)
-{
- int32_t ret;
- volatile uint8_t dummy;
-
- /* Transferable? */
- if ((0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
- DMAC1_CHSTAT_n_EN_SHIFT,
- DMAC1_CHSTAT_n_EN)) &&
- (0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
- DMAC1_CHSTAT_n_TACT_SHIFT,
- DMAC1_CHSTAT_n_TACT)))
- {
- /* Clear Channel Status Register */
- RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
- 1,
- DMAC1_CHCTRL_n_SWRST_SHIFT,
- DMAC1_CHCTRL_n_SWRST);
- dummy = RZA_IO_RegRead_32(&DMAC1.CHCTRL_n,
- DMAC1_CHCTRL_n_SWRST_SHIFT,
- DMAC1_CHCTRL_n_SWRST);
- /* Enable DMA transfer */
- RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
- 1,
- DMAC1_CHCTRL_n_SETEN_SHIFT,
- DMAC1_CHCTRL_n_SETEN);
-
- /* ---- Request by software ---- */
- if (DMAC_REQ_MODE_SOFT == req)
- {
- /* DMA transfer Request by software */
- RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
- 1,
- DMAC1_CHCTRL_n_STG_SHIFT,
- DMAC1_CHCTRL_n_STG);
- }
-
- ret = 0;
- }
- else
- {
- ret = -1;
- }
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC1_Close
-* Description : Aborts DMAC channel 1 transfer. Returns the remaining transfer
-* : byte count at the time of DMA transfer abort to the argument
-* : *remain.
-* Arguments : uint32_t * remain : Remaining transfer byte count when
-* : : DMA transfer is aborted
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC1_Close (uint32_t * remain)
-{
-
- /* ==== Abort transfer ==== */
- RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
- 1,
- DMAC1_CHCTRL_n_CLREN_SHIFT,
- DMAC1_CHCTRL_n_CLREN);
-
- while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
- DMAC1_CHSTAT_n_TACT_SHIFT,
- DMAC1_CHSTAT_n_TACT))
- {
- /* Loop until transfer is aborted */
- }
-
- while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
- DMAC1_CHSTAT_n_EN_SHIFT,
- DMAC1_CHSTAT_n_EN))
- {
- /* Loop until 0 is set in EN before checking the remaining transfer byte count */
- }
- /* ==== Obtain remaining transfer byte count ==== */
- *remain = DMAC1.CRTB_n;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC1_Load_Set
-* Description : Sets the transfer source address, transfer destination
-* : address, and total transfer byte count respectively
-* : specified by the argument src_addr, dst_addr, and count to
-* : DMAC channel 1 as DMA transfer information.
-* : Sets the register set selected by the CHCFG_n register
-* : RSEL bit from the Next0 or Next1 register set.
-* : This function should be called when DMA transfer of DMAC
-* : channel 1 is aboted.
-* Arguments : uint32_t src_addr : Transfer source address
-* : uint32_t dst_addr : Transfer destination address
-* : uint32_t count : Total transfer byte count
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC1_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
-{
- uint8_t reg_set;
-
- /* Obtain register set in use */
- reg_set = RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
- DMAC1_CHSTAT_n_SR_SHIFT,
- DMAC1_CHSTAT_n_SR);
-
- /* ==== Load ==== */
- if (0 == reg_set)
- {
- /* ---- Next0 Register Set ---- */
- DMAC1.N0SA_n = src_addr; /* Start address of transfer source */
- DMAC1.N0DA_n = dst_addr; /* Start address of transfer destination */
- DMAC1.N0TB_n = count; /* Total transfer byte count */
- }
- else
- {
- /* ---- Next1 Register Set ---- */
- DMAC1.N1SA_n = src_addr; /* Start address of transfer source */
- DMAC1.N1DA_n = dst_addr; /* Start address of transfer destination */
- DMAC1.N1TB_n = count; /* Total transfer byte count */
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC2_PeriReqInit
-* Description : Sets the register mode for DMA mode and the on-chip peripheral
-* : module request for transfer request for DMAC channel 2.
-* : Executes DMAC initial setting using the DMA information
-* : specified by the argument *trans_info and the enabled/disabled
-* : continuous transfer specified by the argument continuation.
-* : Registers DMAC channel 2 interrupt handler function and sets
-* : the interrupt priority level. Then enables transfer completion
-* : interrupt.
-* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
-* : : register
-* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
-* : uint32_t continuation : Set continuous transfer to be valid
-* : : after DMA transfer has been completed
-* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
-* : DMAC_SAMPLE_SINGLE : Do not execute continuous
-* : : transfer
-* : uint32_t request_factor : Factor for on-chip peripheral module
-* : : request
-* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
-* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
-* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
-* : :
-* : uint32_t req_direction : Setting value of CHCFG_n register
-* : : REQD bit
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC2_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
- uint32_t request_factor, uint32_t req_direction)
-{
- /* ==== Register mode ==== */
- if (DMAC_MODE_REGISTER == dmamode)
- {
- /* ==== Next0 register set ==== */
- DMAC2.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
- DMAC2.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
- DMAC2.N0TB_n = trans_info->count; /* Total transfer byte count */
-
- /* DAD : Transfer destination address counting direction */
- /* SAD : Transfer source address counting direction */
- /* DDS : Transfer destination transfer size */
- /* SDS : Transfer source transfer size */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- trans_info->daddr_dir,
- DMAC2_CHCFG_n_DAD_SHIFT,
- DMAC2_CHCFG_n_DAD);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- trans_info->saddr_dir,
- DMAC2_CHCFG_n_SAD_SHIFT,
- DMAC2_CHCFG_n_SAD);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- trans_info->dst_size,
- DMAC2_CHCFG_n_DDS_SHIFT,
- DMAC2_CHCFG_n_DDS);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- trans_info->src_size,
- DMAC2_CHCFG_n_SDS_SHIFT,
- DMAC2_CHCFG_n_SDS);
-
- /* DMS : Register mode */
- /* RSEL : Select Next0 register set */
- /* SBE : No discharge of buffer data when aborted */
- /* DEM : No DMA interrupt mask */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_DMS_SHIFT,
- DMAC2_CHCFG_n_DMS);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_RSEL_SHIFT,
- DMAC2_CHCFG_n_RSEL);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_SBE_SHIFT,
- DMAC2_CHCFG_n_SBE);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_DEM_SHIFT,
- DMAC2_CHCFG_n_DEM);
-
- /* ---- Continuous transfer ---- */
- if (DMAC_SAMPLE_CONTINUATION == continuation)
- {
- /* REN : Execute continuous transfer */
- /* RSW : Change register set when DMA transfer is completed. */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 1,
- DMAC2_CHCFG_n_REN_SHIFT,
- DMAC2_CHCFG_n_REN);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 1,
- DMAC2_CHCFG_n_RSW_SHIFT,
- DMAC2_CHCFG_n_RSW);
- }
- /* ---- Single transfer ---- */
- else
- {
- /* REN : Do not execute continuous transfer */
- /* RSW : Do not change register set when DMA transfer is completed. */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_REN_SHIFT,
- DMAC2_CHCFG_n_REN);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_RSW_SHIFT,
- DMAC2_CHCFG_n_RSW);
- }
-
- /* TM : Single transfer */
- /* SEL : Channel setting */
- /* HIEN, LOEN : On-chip peripheral module request */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_TM_SHIFT,
- DMAC2_CHCFG_n_TM);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 2,
- DMAC2_CHCFG_n_SEL_SHIFT,
- DMAC2_CHCFG_n_SEL);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 1,
- DMAC2_CHCFG_n_HIEN_SHIFT,
- DMAC2_CHCFG_n_HIEN);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- 0,
- DMAC2_CHCFG_n_LOEN_SHIFT,
- DMAC2_CHCFG_n_LOEN);
-
- /* ---- Set factor by specified on-chip peripheral module request ---- */
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
- DMAC2_CHCFG_n_AM_SHIFT,
- DMAC2_CHCFG_n_AM);
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
- DMAC2_CHCFG_n_LVL_SHIFT,
- DMAC2_CHCFG_n_LVL);
- if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
- {
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
- DMAC2_CHCFG_n_REQD_SHIFT,
- DMAC2_CHCFG_n_REQD);
- }
- else
- {
- RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
- req_direction,
- DMAC2_CHCFG_n_REQD_SHIFT,
- DMAC2_CHCFG_n_REQD);
- }
- RZA_IO_RegWrite_32(&DMAC23.DMARS,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
- DMAC23_DMARS_CH2_RID_SHIFT,
- DMAC23_DMARS_CH2_RID);
- RZA_IO_RegWrite_32(&DMAC23.DMARS,
- usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
- DMAC23_DMARS_CH2_MID_SHIFT,
- DMAC23_DMARS_CH2_MID);
-
- /* PR : Round robin mode */
- RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
- 1,
- DMAC07_DCTRL_0_7_PR_SHIFT,
- DMAC07_DCTRL_0_7_PR);
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC2_Open
-* Description : Enables DMAC channel 2 transfer.
-* Arguments : uint32_t req : DMAC request mode
-* Return Value : 0 : Succeeded in enabling DMA transfer
-* : -1 : Failed to enable DMA transfer (due to DMA operation)
-*******************************************************************************/
-int32_t usb0_host_DMAC2_Open (uint32_t req)
-{
- int32_t ret;
- volatile uint8_t dummy;
-
- /* Transferable? */
- if ((0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
- DMAC2_CHSTAT_n_EN_SHIFT,
- DMAC2_CHSTAT_n_EN)) &&
- (0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
- DMAC2_CHSTAT_n_TACT_SHIFT,
- DMAC2_CHSTAT_n_TACT)))
- {
- /* Clear Channel Status Register */
- RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
- 1,
- DMAC2_CHCTRL_n_SWRST_SHIFT,
- DMAC2_CHCTRL_n_SWRST);
- dummy = RZA_IO_RegRead_32(&DMAC2.CHCTRL_n,
- DMAC2_CHCTRL_n_SWRST_SHIFT,
- DMAC2_CHCTRL_n_SWRST);
- /* Enable DMA transfer */
- RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
- 1,
- DMAC2_CHCTRL_n_SETEN_SHIFT,
- DMAC2_CHCTRL_n_SETEN);
-
- /* ---- Request by software ---- */
- if (DMAC_REQ_MODE_SOFT == req)
- {
- /* DMA transfer Request by software */
- RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
- 1,
- DMAC2_CHCTRL_n_STG_SHIFT,
- DMAC2_CHCTRL_n_STG);
- }
-
- ret = 0;
- }
- else
- {
- ret = -1;
- }
-
- return ret;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC2_Close
-* Description : Aborts DMAC channel 2 transfer. Returns the remaining transfer
-* : byte count at the time of DMA transfer abort to the argument
-* : *remain.
-* Arguments : uint32_t * remain : Remaining transfer byte count when
-* : : DMA transfer is aborted
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC2_Close (uint32_t * remain)
-{
-
- /* ==== Abort transfer ==== */
- RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
- 1,
- DMAC2_CHCTRL_n_CLREN_SHIFT,
- DMAC2_CHCTRL_n_CLREN);
-
- while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
- DMAC2_CHSTAT_n_TACT_SHIFT,
- DMAC2_CHSTAT_n_TACT))
- {
- /* Loop until transfer is aborted */
- }
-
- while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
- DMAC2_CHSTAT_n_EN_SHIFT,
- DMAC2_CHSTAT_n_EN))
- {
- /* Loop until 0 is set in EN before checking the remaining transfer byte count */
- }
- /* ==== Obtain remaining transfer byte count ==== */
- *remain = DMAC2.CRTB_n;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_DMAC2_Load_Set
-* Description : Sets the transfer source address, transfer destination
-* : address, and total transfer byte count respectively
-* : specified by the argument src_addr, dst_addr, and count to
-* : DMAC channel 2 as DMA transfer information.
-* : Sets the register set selected by the CHCFG_n register
-* : RSEL bit from the Next0 or Next1 register set.
-* : This function should be called when DMA transfer of DMAC
-* : channel 2 is aboted.
-* Arguments : uint32_t src_addr : Transfer source address
-* : uint32_t dst_addr : Transfer destination address
-* : uint32_t count : Total transfer byte count
-* Return Value : none
-*******************************************************************************/
-void usb0_host_DMAC2_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
-{
- uint8_t reg_set;
-
- /* Obtain register set in use */
- reg_set = RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
- DMAC2_CHSTAT_n_SR_SHIFT,
- DMAC2_CHSTAT_n_SR);
-
- /* ==== Load ==== */
- if (0 == reg_set)
- {
- /* ---- Next0 Register Set ---- */
- DMAC2.N0SA_n = src_addr; /* Start address of transfer source */
- DMAC2.N0DA_n = dst_addr; /* Start address of transfer destination */
- DMAC2.N0TB_n = count; /* Total transfer byte count */
- }
- else
- {
- /* ---- Next1 Register Set ---- */
- DMAC2.N1SA_n = src_addr; /* Start address of transfer source */
- DMAC2.N1DA_n = dst_addr; /* Start address of transfer destination */
- DMAC2.N1TB_n = count; /* Total transfer byte count */
- }
-}
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/usb0_host_ohci_wrapp_pipe.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,156 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include "devdrv_usb_host_api.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-
-
-/********************************************************************************************************/
-/* Endpoint Configuration Data Format */
-/********************************************************************************************************/
-/* LINE1: Pipe Window Select Register */
-/* CPU Access PIPE : PIPE1 to PIPE9 [ ### SET ### ] */
-/* LINE2: Pipe Configuration Register */
-/* Transfer Type : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* Buffer Ready interrupt : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* Double Buffer Mode : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
-/* Continuous Transmit: : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
-/* Short NAK : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* Transfer Direction : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* Endpoint Number : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* LINE3: Pipe Buffer Configuration Register */
-/* Buffer Size : (uint16_t)((uint16_t)(((x) / 64) - 1) << 10) */
-/* [ ### SET ### ] */
-/* Buffer Top Number : (uint16_t)(x) [ ### SET ### ] */
-/* LINE4: Pipe Maxpacket Size Register */
-/* Max Packet Size : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* LINE5: Pipe Cycle Configuration Register (0x6C) */
-/* ISO Buffer Flush Mode : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* ISO Interval Value : USB_HOST_NONE [ USB_HOST_NONE ] */
-/* LINE6: use FIFO port */
-/* : USB_HOST_CUSE [ ### SET ### ] */
-/* : USB_HOST_D0USE / USB_HOST_D1USE */
-/* : USB_HOST_D0DMA / USB_HOST_D0DMA */
-/* LINE7: use FIFO port Endian : USB_HOST_FIFO_BIG / USB_HOST_FIFO_LITTLE [ #SET# ] */
-/********************************************************************************************************/
-
-/* Device Address 1 */
-USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[ ] =
-{
- {
- USB_HOST_PIPE1,
- /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
- USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
- (uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(8),
- USB_HOST_NONE,
- USB_HOST_NONE,
- USB_HOST_D0USE
- },
-
- {
- /* Pipe end */
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF
- }
-};
-
-USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[ ] =
-{
- {
- USB_HOST_PIPE6,
- /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
- USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
- (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(40),
- USB_HOST_NONE,
- USB_HOST_NONE,
- USB_HOST_D1USE
- },
-
- {
- USB_HOST_PIPE7,
- /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
- USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
- (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(41),
- USB_HOST_NONE,
- USB_HOST_NONE,
- USB_HOST_D1USE
- },
-
- {
- USB_HOST_PIPE8,
- /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
- USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
- (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(42),
- USB_HOST_NONE,
- USB_HOST_NONE,
- USB_HOST_D1USE
- },
-
- {
- USB_HOST_PIPE9,
- /* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
- USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
- (uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(43),
- USB_HOST_NONE,
- USB_HOST_NONE,
- USB_HOST_D1USE
- },
-
- {
- /* Pipe end */
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF,
- 0xFFFF
- }
-};
-
-/* End of File */
--- a/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/usb0_host_userdef.c Fri Feb 27 10:01:08 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,770 +0,0 @@
-/*******************************************************************************
-* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only
-* intended for use with Renesas products. No other uses are authorized. This
-* software is owned by Renesas Electronics Corporation and is protected under
-* all applicable laws, including copyright laws.
-* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
-* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
-* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
-* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
-* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
-* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
-* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
-* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software
-* and to discontinue the availability of this software. By using this software,
-* you agree to the additional terms and conditions found by accessing the
-* following link:
-* http://www.renesas.com/disclaimer
-* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
-*******************************************************************************/
-/*******************************************************************************
-* File Name : usb0_host_userdef.c
-* $Rev: 1116 $
-* $Date:: 2014-07-09 16:29:19 +0900#$
-* Device(s) : RZ/A1H
-* Tool-Chain :
-* OS : None
-* H/W Platform :
-* Description : RZ/A1H R7S72100 USB Sample Program
-* Operation :
-* Limitations :
-*******************************************************************************/
-
-
-/*******************************************************************************
-Includes <System Includes> , "Project Includes"
-*******************************************************************************/
-#include <stdio.h>
-#include "cmsis_os.h"
-#include "r_typedefs.h"
-#include "iodefine.h"
-#include "devdrv_usb_host_api.h"
-#include "usb0_host.h"
-#include "MBRZA1H.h" /* INTC Driver Header */
-#include "usb0_host_dmacdrv.h"
-#include "ohci_wrapp_RZ_A1_local.h"
-
-
-/*******************************************************************************
-Typedef definitions
-*******************************************************************************/
-
-
-/*******************************************************************************
-Macro definitions
-*******************************************************************************/
-#define DUMMY_ACCESS OSTM0CNT
-
-/* #define CACHE_WRITEBACK */
-
-
-/*******************************************************************************
-Imported global variables and functions (from other files)
-*******************************************************************************/
-extern int32_t io_cwb(unsigned long start, unsigned long end);
-
-
-/*******************************************************************************
-Exported global variables and functions (to be accessed by other files)
-*******************************************************************************/
-static void usb0_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
- uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
-static void usb0_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
- uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
-static void Userdef_USB_usb0_host_delay_10us_2(void);
-
-
-/*******************************************************************************
-Private global variables and functions
-*******************************************************************************/
-
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_d0fifo_dmaintid
-* Description : get D0FIFO DMA Interrupt ID
-* Arguments : none
-* Return Value : D0FIFO DMA Interrupt ID
-*******************************************************************************/
-uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
-{
- return DMAINT1_IRQn;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_d1fifo_dmaintid
-* Description : get D1FIFO DMA Interrupt ID
-* Arguments : none
-* Return Value : D1FIFO DMA Interrupt ID
-*******************************************************************************/
-uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid (void)
-{
- return DMAINT2_IRQn;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_attach
-* Description : Wait for the software of 1ms.
-* : Alter this function according to the user's system.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_attach (void)
-{
-// printf("\n");
-// printf("channel 0 attach device\n");
-// printf("\n");
- ohciwrapp_loc_Connect(1);
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_detach
-* Description : Wait for the software of 1ms.
-* : Alter this function according to the user's system.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_detach (void)
-{
-// printf("\n");
-// printf("channel 0 detach device\n");
-// printf("\n");
- ohciwrapp_loc_Connect(0);
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_delay_1ms
-* Description : Wait for the software of 1ms.
-* : Alter this function according to the user's system.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_delay_1ms (void)
-{
- osDelay(1);
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_delay_xms
-* Description : Wait for the software in the period of time specified by the
-* : argument.
-* : Alter this function according to the user's system.
-* Arguments : uint32_t msec ; Wait Time (msec)
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_delay_xms (uint32_t msec)
-{
- osDelay(msec);
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_delay_10us
-* Description : Waits for software for the period specified by the argument.
-* : Alter this function according to the user's system.
-* Arguments : uint32_t usec ; Wait Time(x 10usec)
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_delay_10us (uint32_t usec)
-{
- volatile int i;
-
- /* Wait 10us (Please change for your MCU) */
- for (i = 0; i < usec; ++i)
- {
- Userdef_USB_usb0_host_delay_10us_2();
- }
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_delay_10us_2
-* Description : Waits for software for the period specified by the argument.
-* : Alter this function according to the user's system.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-static void Userdef_USB_usb0_host_delay_10us_2 (void)
-{
- volatile int i;
- volatile unsigned long tmp;
-
- /* Wait 1us (Please change for your MCU) */
- for (i = 0; i < 14; ++i)
- {
- tmp = DUMMY_ACCESS;
- }
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_delay_500ns
-* Description : Wait for software for 500ns.
-* : Alter this function according to the user's system.
-* Arguments : none
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_delay_500ns (void)
-{
- volatile int i;
- volatile unsigned long tmp;
-
- /* Wait 500ns (Please change for your MCU) */
- /* Wait 500ns I clock 266MHz */
- tmp = DUMMY_ACCESS;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_start_dma
-* Description : Enables DMA transfer on the information specified by the argument.
-* : Set DMAC register by this function to enable DMA transfer.
-* : After executing this function, USB module is set to start DMA
-* : transfer. DMA transfer should not wait for DMA transfer complete.
-* Arguments : USB_HOST_DMA_t *dma : DMA parameter
-* : typedef struct{
-* : uint32_t fifo; FIFO for using
-* : uint32_t buffer; Start address of transfer source/destination
-* : uint32_t bytes; Transfer size(Byte)
-* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
-* : uint32_t size; DMA transfer size
-* : } USB_HOST_DMA_t;
-* : uint16_t dfacc ; 0 : cycle steal mode
-* : 1 : 16byte continuous mode
-* : 2 : 32byte continuous mode
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
-{
- uint32_t trncount;
- uint32_t src;
- uint32_t dst;
- uint32_t size;
- uint32_t dir;
-#ifdef CACHE_WRITEBACK
- uint32_t ptr;
-#endif
-
- trncount = dma->bytes;
- dir = dma->dir;
-
- if (dir == USB_HOST_FIFO2BUF)
- {
- /* DxFIFO determination */
- dst = dma->buffer;
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- size = dma->size;
-
- if (size == 0)
- {
- src += 3; /* byte access */
- }
- else if (size == 1)
- {
- src += 2; /* short access */
- }
- else
- {
- /* Do Nothing */
- }
-#else
- size = dma->size;
-
- if (size == 2)
- {
- /* 32bit access */
- if (dfacc == 2)
- {
- /* 32byte access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFOB0);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFOB0);
- }
- }
- else if (dfacc == 1)
- {
- /* 16byte access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFOB0);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFOB0);
- }
- }
- else
- {
- /* normal access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- }
- }
- else if (size == 1)
- {
- /* 16bit access */
- dfacc = 0; /* force normal access */
-
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- src += 2; /* short access */
- }
- else
- {
- /* 8bit access */
- dfacc = 0; /* force normal access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- src = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- src = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- src += 3; /* byte access */
- }
-#endif
- }
- else
- {
- /* DxFIFO determination */
- src = dma->buffer;
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- size = dma->size;
-
- if (size == 0)
- {
- dst += 3; /* byte access */
- }
- else if (size == 1)
- {
- dst += 2; /* short access */
- }
- else
- {
- /* Do Nothing */
- }
-#else
- size = dma->size;
- if (size == 2)
- {
- /* 32bit access */
- if (dfacc == 2)
- {
- /* 32byte access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFOB0);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFOB0);
- }
- }
- else if (dfacc == 1)
- {
- /* 16byte access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFOB0);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFOB0);
- }
- }
- else
- {
- /* normal access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- }
- }
- else if (size == 1)
- {
- /* 16bit access */
- dfacc = 0; /* force normal access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- dst += 2; /* short access */
- }
- else
- {
- /* 8bit access */
- dfacc = 0; /* force normal access */
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- dst = (uint32_t)(&USB200.D0FIFO.UINT32);
- }
- else
- {
- dst = (uint32_t)(&USB200.D1FIFO.UINT32);
- }
- dst += 3; /* byte access */
- }
-#endif
- }
-
-#ifdef CACHE_WRITEBACK
- ptr = (uint32_t)dma->buffer;
- if ((ptr & 0x20000000ul) == 0)
- {
- io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
- }
-#endif
-
- if (dma->fifo == USB_HOST_D0FIFO_DMA)
- {
- usb0_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
- }
- else
- {
- usb0_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
- }
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_enable_dmac0
-* Description : Enables DMA transfer on the information specified by the argument.
-* Arguments : uint32_t src : src address
-* : uint32_t dst : dst address
-* : uint32_t count : transfer byte
-* : uint32_t size : transfer size
-* : uint32_t dir : direction
-* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
-* : uint16_t dfacc : 0 : normal access
-* : : 1 : 16byte access
-* : : 2 : 32byte access
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
- uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
-{
- dmac_transinfo_t trans_info;
- uint32_t request_factor = 0;
- int32_t ret;
-
- /* ==== Variable setting for DMAC initialization ==== */
- trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
- trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
- trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- if (size == 0)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
- }
- else if (size == 1)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
- }
- else if (size == 2)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
- }
- else
- {
-// printf("size error!!\n");
- }
-#else
- if (dfacc == 2)
- {
- /* 32byte access */
- trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
- }
- else if (dfacc == 1)
- {
- /* 16byte access */
- trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
- }
- else
- {
- /* normal access */
- if (size == 0)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
- }
- else if (size == 1)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
- }
- else if (size == 2)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
- }
- else
- {
-// printf("size error!!\n");
- }
- }
-#endif
-
- if (dir == USB_HOST_FIFO2BUF)
- {
- request_factor = DMAC_REQ_USB0_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
- trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
- trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
- }
- else if (dir == USB_HOST_BUF2FIFO)
- {
- request_factor = DMAC_REQ_USB0_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
- trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
- trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
- }
- else
- {
- /* Do Nothing */
- }
-
- /* ==== DMAC initialization ==== */
- usb0_host_DMAC1_PeriReqInit((const dmac_transinfo_t *)&trans_info,
- DMAC_MODE_REGISTER,
- DMAC_SAMPLE_SINGLE,
- request_factor,
- 0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC1_PeriReqInit() */
-
- /* ==== DMAC startup ==== */
- ret = usb0_host_DMAC1_Open(DMAC_REQ_MODE_PERI);
-
- if (ret != 0)
- {
-// printf("DMAC1 Open error!!\n");
- }
-
- return;
-}
-
-/*******************************************************************************
-* Function Name: usb0_host_enable_dmac1
-* Description : Enables DMA transfer on the information specified by the argument.
-* Arguments : uint32_t src : src address
-* : uint32_t dst : dst address
-* : uint32_t count : transfer byte
-* : uint32_t size : transfer size
-* : uint32_t dir : direction
-* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
-* : uint16_t dfacc : 0 : normal access
-* : : 1 : 16byte access
-* : : 2 : 32byte access
-* Return Value : none
-*******************************************************************************/
-static void usb0_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
- uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
-{
- dmac_transinfo_t trans_info;
- uint32_t request_factor = 0;
- int32_t ret;
-
- /* ==== Variable setting for DMAC initialization ==== */
- trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
- trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
- trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
-#ifndef __USB_HOST_DF_ACC_ENABLE__
- if (size == 0)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
- }
- else if (size == 1)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
- }
- else if (size == 2)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
- }
- else
- {
-// printf("size error!!\n");
- }
-#else
- if (dfacc == 2)
- {
- /* 32byte access */
- trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
- }
- else if (dfacc == 1)
- {
- /* 16byte access */
- trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
- }
- else
- {
- /* normal access */
- if (size == 0)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
- }
- else if (size == 1)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
- }
- else if (size == 2)
- {
- trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
- trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
- }
- else
- {
-// printf("size error!!\n");
- }
- }
-#endif
-
- if (dir == USB_HOST_FIFO2BUF)
- {
- request_factor =DMAC_REQ_USB0_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
- trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
- trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
- }
- else if (dir == USB_HOST_BUF2FIFO)
- {
- request_factor =DMAC_REQ_USB0_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
- trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
- trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
- }
- else
- {
- /* Do Nothing */
- }
-
- /* ==== DMAC initialization ==== */
- usb0_host_DMAC2_PeriReqInit((const dmac_transinfo_t *)&trans_info,
- DMAC_MODE_REGISTER,
- DMAC_SAMPLE_SINGLE,
- request_factor,
- 0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC2_PeriReqInit() */
-
- /* ==== DMAC startup ==== */
- ret = usb0_host_DMAC2_Open(DMAC_REQ_MODE_PERI);
-
- if (ret != 0)
- {
-// printf("DMAC2 Open error!!\n");
- }
-
- return;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_stop_dma0
-* Description : Disables DMA transfer.
-* Arguments : none
-* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
-* : regarding to the bus width.
-* Notice : This function should be executed to DMAC executed at the time
-* : of specification of D0_FIF0_DMA in dma->fifo.
-*******************************************************************************/
-uint32_t Userdef_USB_usb0_host_stop_dma0 (void)
-{
- uint32_t remain;
-
- /* ==== DMAC release ==== */
- usb0_host_DMAC1_Close(&remain);
-
- return remain;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_stop_dma1
-* Description : Disables DMA transfer.
-* : This function should be executed to DMAC executed at the time
-* : of specification of D1_FIF0_DMA in dma->fifo.
-* Arguments : none
-* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
-* : regarding to the bus width.
-*******************************************************************************/
-uint32_t Userdef_USB_usb0_host_stop_dma1 (void)
-{
- uint32_t remain;
-
- /* ==== DMAC release ==== */
- usb0_host_DMAC2_Close(&remain);
-
- return remain;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_notice
-* Description : Notice of USER
-* Arguments : const char *format
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_notice (const char * format)
-{
-// printf(format);
-
- return;
-}
-
-/*******************************************************************************
-* Function Name: Userdef_USB_usb0_host_user_rdy
-* Description : This function notify a user and wait for trigger
-* Arguments : const char *format
-* : uint16_t data
-* Return Value : none
-*******************************************************************************/
-void Userdef_USB_usb0_host_user_rdy (const char * format, uint16_t data)
-{
-// printf(format, data);
- getchar();
-
- return;
-}
-
-/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/inc/usb0_host.h Tue Mar 31 16:15:42 2015 +0100 @@ -0,0 +1,156 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. +*******************************************************************************/ +/******************************************************************************* +* File Name : usb0_host.h +* $Rev: 1116 $ +* $Date:: 2014-07-09 16:29:19 +0900#$ +* Description : RZ/A1H R7S72100 USB Sample Program +*******************************************************************************/ +#ifndef USB0_HOST_H +#define USB0_HOST_H + +/******************************************************************************* +Includes <System Includes> , "Project Includes" +*******************************************************************************/ +#include "devdrv_usb_host_api.h" +#include "usb_host.h" + +/******************************************************************************* +Imported global variables and functions (from other files) +*******************************************************************************/ +extern const uint16_t g_usb0_host_bit_set[]; +extern uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1]; +extern uint8_t *g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1]; + +extern uint16_t g_usb0_host_PipeIgnore[]; +extern uint16_t g_usb0_host_PipeTbl[]; +extern uint16_t g_usb0_host_pipe_status[]; +extern uint32_t g_usb0_host_PipeDataSize[]; + +extern USB_HOST_DMA_t g_usb0_host_DmaInfo[]; +extern uint16_t g_usb0_host_DmaPipe[]; +extern uint16_t g_usb0_host_DmaBval[]; +extern uint16_t g_usb0_host_DmaStatus[]; + +extern uint16_t g_usb0_host_driver_state; +extern uint16_t g_usb0_host_ConfigNum; +extern uint16_t g_usb0_host_CmdStage; +extern uint16_t g_usb0_host_bchg_flag; +extern uint16_t g_usb0_host_detach_flag; +extern uint16_t g_usb0_host_attach_flag; + +extern uint16_t g_usb0_host_UsbAddress; +extern uint16_t g_usb0_host_setUsbAddress; +extern uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1]; +extern uint16_t g_usb0_host_UsbDeviceSpeed; +extern uint16_t g_usb0_host_SupportUsbDeviceSpeed; + +extern uint16_t g_usb0_host_SavReq; +extern uint16_t g_usb0_host_SavVal; +extern uint16_t g_usb0_host_SavIndx; +extern uint16_t g_usb0_host_SavLen; + +extern uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1]; + +/******************************************************************************* +Functions Prototypes +*******************************************************************************/ +/* ==== common ==== */ +void usb0_host_dma_stop_d0(uint16_t pipe, uint32_t remain); +void usb0_host_dma_stop_d1(uint16_t pipe, uint32_t remain); +uint16_t usb0_host_is_hispeed(void); +uint16_t usb0_host_is_hispeed_enable(void); +uint16_t usb0_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data); +uint16_t usb0_host_write_buffer(uint16_t pipe); +uint16_t usb0_host_write_buffer_c(uint16_t pipe); +uint16_t usb0_host_write_buffer_d0(uint16_t pipe); +uint16_t usb0_host_write_buffer_d1(uint16_t pipe); +void usb0_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data); +uint16_t usb0_host_read_buffer(uint16_t pipe); +uint16_t usb0_host_read_buffer_c(uint16_t pipe); +uint16_t usb0_host_read_buffer_d0(uint16_t pipe); +uint16_t usb0_host_read_buffer_d1(uint16_t pipe); +uint16_t usb0_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); +void usb0_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); +void usb0_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc); +uint16_t usb0_host_get_mbw(uint32_t trncount, uint32_t dtptr); +uint16_t usb0_host_read_dma(uint16_t pipe); +void usb0_host_stop_transfer(uint16_t pipe); +void usb0_host_brdy_int(uint16_t status, uint16_t int_enb); +void usb0_host_nrdy_int(uint16_t status, uint16_t int_enb); +void usb0_host_bemp_int(uint16_t status, uint16_t int_enb); +void usb0_host_setting_interrupt(uint8_t level); +void usb0_host_reset_module(uint16_t clockmode); +uint16_t usb0_host_get_buf_size(uint16_t pipe); +uint16_t usb0_host_get_mxps(uint16_t pipe); +void usb0_host_enable_brdy_int(uint16_t pipe); +void usb0_host_disable_brdy_int(uint16_t pipe); +void usb0_host_clear_brdy_sts(uint16_t pipe); +void usb0_host_enable_bemp_int(uint16_t pipe); +void usb0_host_disable_bemp_int(uint16_t pipe); +void usb0_host_clear_bemp_sts(uint16_t pipe); +void usb0_host_enable_nrdy_int(uint16_t pipe); +void usb0_host_disable_nrdy_int(uint16_t pipe); +void usb0_host_clear_nrdy_sts(uint16_t pipe); +void usb0_host_set_pid_buf(uint16_t pipe); +void usb0_host_set_pid_nak(uint16_t pipe); +void usb0_host_set_pid_stall(uint16_t pipe); +void usb0_host_clear_pid_stall(uint16_t pipe); +uint16_t usb0_host_get_pid(uint16_t pipe); +void usb0_host_set_sqclr(uint16_t pipe); +void usb0_host_set_sqset(uint16_t pipe); +void usb0_host_set_csclr(uint16_t pipe); +void usb0_host_aclrm(uint16_t pipe); +void usb0_host_set_aclrm(uint16_t pipe); +void usb0_host_clr_aclrm(uint16_t pipe); +uint16_t usb0_host_get_sqmon(uint16_t pipe); +uint16_t usb0_host_get_inbuf(uint16_t pipe); + +/* ==== host ==== */ +void usb0_host_init_pipe_status(void); +int32_t usb0_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); +void usb0_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); +void usb0_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table); +uint16_t usb0_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table); +void usb0_host_StatusStage(void); +void usb0_host_get_devadd(uint16_t addr, uint16_t *devadd); +void usb0_host_set_devadd(uint16_t addr, uint16_t *devadd); +void usb0_host_InitModule(void); +uint16_t usb0_host_CheckAttach(void); +void usb0_host_UsbDetach(void); +void usb0_host_UsbDetach2(void); +void usb0_host_UsbAttach(void); +uint16_t usb0_host_UsbBusReset(void); +int32_t usb0_host_UsbResume(void); +int32_t usb0_host_UsbSuspend(void); +void usb0_host_Enable_DetachINT(void); +void usb0_host_Disable_DetachINT(void); +void usb0_host_UsbStateManager(void); + + +#endif /* USB0_HOST_H */ + +/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/inc/usb0_host_api.h Tue Mar 31 16:15:42 2015 +0100 @@ -0,0 +1,112 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. +*******************************************************************************/ +/******************************************************************************* +* File Name : usb0_host_api.h +* $Rev: 1116 $ +* $Date:: 2014-07-09 16:29:19 +0900#$ +* Description : RZ/A1H R7S72100 USB Sample Program +*******************************************************************************/ +#ifndef USB0_HOST_API_H +#define USB0_HOST_API_H + + +/******************************************************************************* +Typedef definitions +*******************************************************************************/ + + +/******************************************************************************* +Macro definitions +*******************************************************************************/ + + +/******************************************************************************* +Variable Externs +*******************************************************************************/ + + +/******************************************************************************* +Functions Prototypes +*******************************************************************************/ +void usb0_host_interrupt(uint32_t int_sense); +void usb0_host_dma_interrupt_d0fifo(uint32_t int_sense); +void usb0_host_dma_interrupt_d1fifo(uint32_t int_sense); + +uint16_t usb0_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode); +int32_t usb0_api_host_enumeration(uint16_t devadr); +int32_t usb0_api_host_detach(void); +int32_t usb0_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); +int32_t usb0_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); +int32_t usb0_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); +int32_t usb0_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor); +int32_t usb0_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table); +int32_t usb0_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table); +uint16_t usb0_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table); +int32_t usb0_api_host_data_count(uint16_t pipe, uint32_t *data_count); + +int32_t usb0_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); +int32_t usb0_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); +int32_t usb0_api_host_SetConfig(uint16_t devadr, uint16_t confignum); +int32_t usb0_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index); +int32_t usb0_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir); +uint16_t usb0_api_host_GetUsbDeviceState(void); + +void usb0_api_host_elt_4_4(void); +void usb0_api_host_elt_4_5(void); +void usb0_api_host_elt_4_6(void); +void usb0_api_host_elt_4_7(void); +void usb0_api_host_elt_4_8(void); +void usb0_api_host_elt_4_9(void); +void usb0_api_host_elt_get_desc(void); + +void usb0_host_EL_ModeInit(void); +void usb0_host_EL_SetUACT(void); +void usb0_host_EL_ClearUACT(void); +void usb0_host_EL_SetTESTMODE(uint16_t mode); +void usb0_host_EL_ClearNRDYSTS(uint16_t pipe); +uint16_t usb0_host_EL_GetINTSTS1(void); +void usb0_host_EL_UsbBusReset(void); +void usb0_host_EL_UsbAttach(void); +void usb0_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); +void usb0_host_EL_StatusStage(void); +void usb0_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table); +int32_t usb0_host_EL_UsbSuspend(void); +int32_t usb0_host_EL_UsbResume(void); + +#if 0 /* prototype in devdrv_usb_host_api.h */ +uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void); +uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void); +void Userdef_USB_usb0_host_attach(void); +void Userdef_USB_usb0_host_detach(void); +void Userdef_USB_usb0_host_delay_1ms(void); +void Userdef_USB_usb0_host_delay_xms(uint32_t msec); +void Userdef_USB_usb0_host_delay_10us(uint32_t usec); +void Userdef_USB_usb0_host_delay_500ns(void); +void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc); +uint32_t Userdef_USB_usb0_host_stop_dma0(void); +uint32_t Userdef_USB_usb0_host_stop_dma1(void); +#endif + +#endif /* USB0_HOST_API_H */ + +/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/inc/usb0_host_dmacdrv.h Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,139 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_dmacdrv.h
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Description : RZ/A1H R7S72100 USB Sample Program
+*******************************************************************************/
+#ifndef USB0_HOST_DMACDRV_H
+#define USB0_HOST_DMACDRV_H
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+typedef struct dmac_transinfo
+{
+ uint32_t src_addr; /* Transfer source address */
+ uint32_t dst_addr; /* Transfer destination address */
+ uint32_t count; /* Transfer byte count */
+ uint32_t src_size; /* Transfer source data size */
+ uint32_t dst_size; /* Transfer destination data size */
+ uint32_t saddr_dir; /* Transfer source address direction */
+ uint32_t daddr_dir; /* Transfer destination address direction */
+} dmac_transinfo_t;
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+/* ==== Transfer specification of the sample program ==== */
+#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
+#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
+
+/* ==== DMA modes ==== */
+#define DMAC_MODE_REGISTER (0) /* Register mode */
+#define DMAC_MODE_LINK (1) /* Link mode */
+
+/* ==== Transfer requests ==== */
+#define DMAC_REQ_MODE_EXT (0) /* External request */
+#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
+#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
+
+/* ==== DMAC transfer sizes ==== */
+#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
+#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
+#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
+#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
+#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
+#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
+#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
+#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
+
+/* ==== Address increment for transferring ==== */
+#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
+#define DMAC_TRANS_ADR_INC (0) /* Increment */
+
+/* ==== Method for detecting DMA request ==== */
+#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
+#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
+#define DMAC_REQ_DET_LOW (2) /* Low level detection */
+#define DMAC_REQ_DET_HIGH (3) /* High level detection */
+
+/* ==== Request Direction ==== */
+#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
+#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
+
+/* ==== Descriptors ==== */
+#define DMAC_DESC_HEADER (0) /* Header */
+#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
+#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
+#define DMAC_DESC_COUNT (3) /* Transaction Byte */
+#define DMAC_DESC_CHCFG (4) /* Channel Confg */
+#define DMAC_DESC_CHITVL (5) /* Channel Interval */
+#define DMAC_DESC_CHEXT (6) /* Channel Extension */
+#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
+
+/* ==== On-chip peripheral module requests ===== */
+typedef enum dmac_request_factor
+{
+ DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
+ DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
+ DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
+ DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
+ DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
+ DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
+ DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
+ DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
+} dmac_request_factor_t;
+
+
+/*******************************************************************************
+Variable Externs
+*******************************************************************************/
+
+
+/*******************************************************************************
+Functions Prototypes
+*******************************************************************************/
+void usb0_host_DMAC1_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction);
+int32_t usb0_host_DMAC1_Open(uint32_t req);
+void usb0_host_DMAC1_Close(uint32_t * remain);
+void usb0_host_DMAC1_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
+
+void usb0_host_DMAC2_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction);
+int32_t usb0_host_DMAC2_Open(uint32_t req);
+void usb0_host_DMAC2_Close(uint32_t * remain);
+void usb0_host_DMAC2_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
+
+#endif /* USB0_HOST_DMACDRV_H */
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/common/usb0_host_dataio.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,2835 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_dataio.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+static uint16_t g_usb0_host_mbw[(USB_HOST_MAX_PIPE_NO + 1)];
+
+static void usb0_host_start_receive_trns_c(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb0_host_start_receive_trns_d0(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb0_host_start_receive_trns_d1(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb0_host_start_receive_dma_d0(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb0_host_start_receive_dma_d1(uint16_t pipe, uint32_t size, uint8_t *data);
+static uint16_t usb0_host_read_dma_d0(uint16_t pipe);
+static uint16_t usb0_host_read_dma_d1(uint16_t pipe);
+static uint16_t usb0_host_write_dma_d0(uint16_t pipe);
+static uint16_t usb0_host_write_dma_d1(uint16_t pipe);
+
+static void usb0_host_read_c_fifo(uint16_t pipe, uint16_t count);
+static void usb0_host_write_c_fifo(uint16_t Pipe, uint16_t count);
+static void usb0_host_read_d0_fifo(uint16_t pipe, uint16_t count);
+static void usb0_host_write_d0_fifo(uint16_t pipe, uint16_t count);
+static void usb0_host_read_d1_fifo(uint16_t pipe, uint16_t count);
+static void usb0_host_write_d1_fifo(uint16_t pipe, uint16_t count);
+
+static void usb0_host_clear_transaction_counter(uint16_t pipe);
+static void usb0_host_set_transaction_counter(uint16_t pipe, uint32_t count);
+
+static uint32_t usb0_host_com_get_dmasize(uint32_t trncount, uint32_t dtptr);
+
+static uint16_t usb0_host_set_dfacc_d0(uint16_t mbw, uint32_t count);
+static uint16_t usb0_host_set_dfacc_d1(uint16_t mbw, uint32_t count);
+
+
+/*******************************************************************************
+* Function Name: usb0_host_start_send_transfer
+* Description : Starts the USB data communication using pipe specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data data Address
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_start_send_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t status;
+ uint16_t usefifo;
+ uint16_t mbw;
+
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ usb0_host_clear_bemp_sts(pipe);
+ usb0_host_clear_brdy_sts(pipe);
+ usb0_host_clear_nrdy_sts(pipe);
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+
+ usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ case USB_HOST_D0FIFO_DMA:
+ usefifo = USB_HOST_D0USE;
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ case USB_HOST_D1FIFO_DMA:
+ usefifo = USB_HOST_D1USE;
+ break;
+
+ default:
+ usefifo = USB_HOST_CUSE;
+ break;
+ };
+
+ usb0_host_set_curpipe(USB_HOST_PIPE0, usefifo, USB_HOST_NO, mbw);
+
+ usb0_host_clear_transaction_counter(pipe);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ status = usb0_host_write_buffer(pipe);
+
+ if (status != USB_HOST_FIFOERROR)
+ {
+ usb0_host_set_pid_buf(pipe);
+ }
+
+ return status;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_buffer
+* Description : Writes data in the buffer allocated in the pipe specified by
+* : the argument. The FIFO for using is set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_write_buffer (uint16_t pipe)
+{
+ uint16_t status;
+ uint16_t usefifo;
+
+ g_usb0_host_PipeIgnore[pipe] = 0;
+ usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ status = usb0_host_write_buffer_d0(pipe);
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ status = usb0_host_write_buffer_d1(pipe);
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ status = usb0_host_write_dma_d0(pipe);
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ status = usb0_host_write_dma_d1(pipe);
+ break;
+
+ default:
+ status = usb0_host_write_buffer_c(pipe);
+ break;
+ };
+
+ switch (status)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+ usb0_host_enable_brdy_int(pipe); /* Enable Ready Interrupt */
+ break;
+
+ case USB_HOST_WRITEEND: /* End of data write */
+ case USB_HOST_WRITESHRT: /* End of data write */
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+
+ usb0_host_clear_nrdy_sts(pipe);
+ usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+
+ /* for last transfer */
+ usb0_host_enable_bemp_int(pipe); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_WRITEDMA: /* DMA write */
+ usb0_host_clear_nrdy_sts(pipe);
+ usb0_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ usb0_host_disable_bemp_int(pipe); /* Disable Empty Interrupt */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_buffer_c
+* Description : Writes data in the buffer allocated in the pipe specified in
+* : the argument. Writes data by CPU transfer using CFIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_write_buffer_c (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_CFIFO_WRITE, mbw);
+ }
+ else
+ {
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
+ }
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb0_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb0_host_write_c_fifo(pipe, (uint16_t)count);
+
+ if (g_usb0_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb0_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB200.CFIFOCTR,
+ USB_CFIFOCTR_BVAL_SHIFT,
+ USB_CFIFOCTR_BVAL) == 0)
+ {
+ USB200.CFIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb0_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_buffer_d0
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by CPU transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_write_buffer_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb0_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb0_host_write_d0_fifo(pipe, (uint16_t)count);
+
+ if (g_usb0_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb0_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB200.D0FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb0_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_buffer_d1
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by CPU transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_write_buffer_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb0_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb0_host_write_d1_fifo(pipe, (uint16_t)count);
+
+ if (g_usb0_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb0_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB200.D1FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb0_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_dma_d0
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by DMA transfer using D0FIFO.
+* : The DMA-ch for using is specified by Userdef_USB_usb0_host_start_dma().
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND : Write end
+* : USB_HOST_WRITESHRT : short data
+* : USB_HOST_WRITING : Continue of data write
+* : USB_HOST_WRITEDMA : Write DMA
+* : USB_HOST_FIFOERROR : FIFO status
+*******************************************************************************/
+static uint16_t usb0_host_write_dma_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ count = g_usb0_host_data_count[pipe];
+
+ if (count != 0)
+ {
+ g_usb0_host_DmaPipe[USB_HOST_D0FIFO] = pipe;
+
+ if ((count % size) != 0)
+ {
+ g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 1;
+ }
+ else
+ {
+ g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 0;
+ }
+
+ dfacc = usb0_host_set_dfacc_d0(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_BUF2FIFO;
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
+
+ Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
+
+ usb0_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
+
+ RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+
+ g_usb0_host_data_count[pipe] = 0;
+ g_usb0_host_data_pointer[pipe] += count;
+
+ status = USB_HOST_WRITEDMA; /* DMA write */
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&USB200.D0FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL); /* Short Packet */
+ }
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_dma_d1
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by DMA transfer using D1FIFO.
+* : The DMA-ch for using is specified by Userdef_USB_usb0_host_start_dma().
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND : Write end
+* : USB_HOST_WRITESHRT : short data
+* : USB_HOST_WRITING : Continue of data write
+* : USB_HOST_WRITEDMA : Write DMA
+* : USB_HOST_FIFOERROR : FIFO status
+*******************************************************************************/
+static uint16_t usb0_host_write_dma_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ count = g_usb0_host_data_count[pipe];
+
+ if (count != 0)
+ {
+ g_usb0_host_DmaPipe[USB_HOST_D1FIFO] = pipe;
+
+ if ((count % size) != 0)
+ {
+ g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 1;
+ }
+ else
+ {
+ g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 0;
+ }
+
+ dfacc = usb0_host_set_dfacc_d1(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_BUF2FIFO;
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
+
+ Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
+
+ usb0_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw, dfacc);
+
+ RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+
+ g_usb0_host_data_count[pipe] = 0;
+ g_usb0_host_data_pointer[pipe] += count;
+
+ status = USB_HOST_WRITEDMA; /* DMA write */
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&USB200.D1FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL); /* Short Packet */
+ }
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_transfer
+* Description : Starts USB data reception using the pipe specified in the argument.
+* : The FIFO for using is set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+void usb0_host_start_receive_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t usefifo;
+
+ usb0_host_clear_bemp_sts(pipe);
+ usb0_host_clear_brdy_sts(pipe);
+ usb0_host_clear_nrdy_sts(pipe);
+
+ usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ usb0_host_start_receive_trns_d0(pipe, size, data);
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ usb0_host_start_receive_trns_d1(pipe, size, data);
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ usb0_host_start_receive_dma_d0(pipe, size, data);
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ usb0_host_start_receive_dma_d1(pipe, size, data);
+ break;
+
+ default:
+ usb0_host_start_receive_trns_c(pipe, size, data);
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_trns_c
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using CFIFO.
+* : When storing data in the buffer allocated in the pipe specified in the
+* : argument, BRDY interrupt is generated to read data
+* : in the interrupt.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_start_receive_trns_c (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ g_usb0_host_PipeDataSize[pipe] = size;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_CFIFO_READ, mbw);
+ USB200.CFIFOCTR = USB_HOST_BITBCLR;
+
+ usb0_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+
+ usb0_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_trns_d0
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, BRDY interrupt is generated to read data in the
+* : interrupt.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_start_receive_trns_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ g_usb0_host_PipeDataSize[pipe] = size;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ usb0_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+
+ usb0_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_trns_d1
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using D1FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, BRDY interrupt is generated to read data.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_start_receive_trns_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ g_usb0_host_PipeDataSize[pipe] = size;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ usb0_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+
+ usb0_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_dma_d0
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, delivered read request to DMAC to read data from
+* : the buffer by DMAC.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_start_receive_dma_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ g_usb0_host_PipeDataSize[pipe] = 0;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ usb0_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ usb0_host_read_dma(pipe);
+
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+ }
+ else
+ {
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+ }
+
+ usb0_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_start_receive_dma_d1
+* Description : Read data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, delivered read request to DMAC to read data from
+* : the buffer by DMAC.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_start_receive_dma_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_data_count[pipe] = size;
+ g_usb0_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ g_usb0_host_PipeDataSize[pipe] = 0;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb0_host_get_mbw(size, (uint32_t)data);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ usb0_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ usb0_host_read_dma(pipe);
+
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+ }
+ else
+ {
+ usb0_host_enable_nrdy_int(pipe);
+ usb0_host_enable_brdy_int(pipe);
+ }
+
+ usb0_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_buffer
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Uses FIF0 set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_read_buffer (uint16_t pipe)
+{
+ uint16_t status;
+
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
+ {
+ status = usb0_host_read_buffer_d0(pipe);
+ }
+ else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
+ {
+ status = usb0_host_read_buffer_d1(pipe);
+ }
+ else
+ {
+ status = usb0_host_read_buffer_c(pipe);
+ }
+
+ switch (status)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb0_host_disable_brdy_int(pipe);
+ g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#else
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+#endif
+ g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_buffer_c
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using CFIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_read_buffer_c (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb0_host_data_count[pipe];
+ }
+ else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb0_host_read_c_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb0_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_buffer_d0
+* Description : Reads data from the buffer allocated in the pipe specified in
+* : the argument.
+* : Reads data by CPU transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_read_buffer_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t pipebuf_size;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb0_host_data_count[pipe];
+ }
+ else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ else
+ {
+ pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb0_host_read_d0_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb0_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_buffer_d1
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by CPU transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_read_buffer_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t pipebuf_size;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb0_host_data_count[pipe];
+ }
+ else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) !=0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ else
+ {
+ pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb0_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb0_host_read_d1_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb0_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_dma
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by DMA transfer using D0FIFO or D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb0_host_read_dma (uint16_t pipe)
+{
+ uint16_t status;
+
+ g_usb0_host_PipeIgnore[pipe] = 0;
+
+ if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
+ {
+ status = usb0_host_read_dma_d0(pipe);
+ }
+ else
+ {
+ status = usb0_host_read_dma_d1(pipe);
+ }
+
+ switch (status)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READZERO: /* End of data read */
+ usb0_host_disable_brdy_int(pipe);
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb0_host_disable_brdy_int(pipe);
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
+ }
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ g_usb0_host_PipeDataSize[pipe] -= g_usb0_host_data_count[pipe];
+ }
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#else
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+#endif
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb0_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_dma_d0
+* Description : Writes data in the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+static uint16_t usb0_host_read_dma_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+ uint16_t pipebuf_size;
+
+ g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ count = g_usb0_host_data_count[pipe];
+ status = USB_HOST_READING;
+ }
+ else
+ {
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ count = g_usb0_host_data_count[pipe];
+ }
+ else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ else
+ {
+ pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear B_CLR */
+ status = USB_HOST_READZERO; /* Null Packet receive */
+ }
+ else
+ {
+ usb0_host_set_curpipe(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+ /* transaction counter No set */
+ /* FRDY = 1, DTLN = 0 -> BRDY */
+ }
+ }
+ else
+ {
+ dfacc = usb0_host_set_dfacc_d0(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb0_host_DmaPipe[USB_HOST_D0FIFO] = pipe; /* not use in read operation */
+ g_usb0_host_DmaBval[USB_HOST_D0FIFO] = 0; /* not use in read operation */
+
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_FIFO2BUF;
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
+ g_usb0_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
+
+ if (status == USB_HOST_READING)
+ {
+ g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSY;
+ }
+ else
+ {
+ g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSYEND;
+ }
+
+ Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
+
+ usb0_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
+
+ RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ g_usb0_host_data_count[pipe] -= count;
+ g_usb0_host_data_pointer[pipe] += count;
+ g_usb0_host_PipeDataSize[pipe] += count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_dma_d1
+* Description : Reads data from the buffer allocated in the pipe specified in
+* : the argument.
+* : Reads data by DMA transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+static uint16_t usb0_host_read_dma_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+ uint16_t pipebuf_size;
+
+ g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[pipe], (uint32_t)g_usb0_host_data_pointer[pipe]);
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ count = g_usb0_host_data_count[pipe];
+ status = USB_HOST_READING;
+ }
+ else
+ {
+ buffer = usb0_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb0_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ count = g_usb0_host_data_count[pipe];
+ }
+ else if (g_usb0_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ else
+ {
+ pipebuf_size = usb0_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ status = USB_HOST_READZERO; /* Null Packet receive */
+ }
+ else
+ {
+ usb0_host_set_curpipe(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+ /* transaction counter No set */
+ /* FRDY = 1, DTLN = 0 -> BRDY */
+ }
+ }
+ else
+ {
+ dfacc = usb0_host_set_dfacc_d1(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb0_host_DmaPipe[USB_HOST_D1FIFO] = pipe; /* not use in read operation */
+ g_usb0_host_DmaBval[USB_HOST_D1FIFO] = 0; /* not use in read operation */
+
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_FIFO2BUF;
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb0_host_data_pointer[pipe];
+ g_usb0_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
+
+ if (status == USB_HOST_READING)
+ {
+ g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSY;
+ }
+ else
+ {
+ g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSYEND;
+ }
+
+ Userdef_USB_usb0_host_start_dma(&g_usb0_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
+
+ usb0_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw, dfacc);
+
+ RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ g_usb0_host_data_count[pipe] -= count;
+ g_usb0_host_data_pointer[pipe] += count;
+ g_usb0_host_PipeDataSize[pipe] += count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_change_fifo_port
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument. After allocating FIF0, waits in the software
+* : till the corresponding pipe becomes ready.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* Return Value : USB_HOST_FIFOERROR ; Error
+* : Others ; CFIFOCTR/D0FIFOCTR/D1FIFOCTR Register Value
+*******************************************************************************/
+uint16_t usb0_host_change_fifo_port (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
+{
+ uint16_t buffer;
+ uint32_t loop;
+ volatile uint32_t loop2;
+
+ usb0_host_set_curpipe(pipe, fifosel, isel, mbw);
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB200.CFIFOCTR;
+ break;
+
+ case USB_HOST_D0USE:
+ case USB_HOST_D0DMA:
+ buffer = USB200.D0FIFOCTR;
+ break;
+
+ case USB_HOST_D1USE:
+ case USB_HOST_D1DMA:
+ buffer = USB200.D1FIFOCTR;
+ break;
+
+ default:
+ buffer = 0;
+ break;
+ }
+
+ if ((buffer & USB_HOST_BITFRDY) == USB_HOST_BITFRDY)
+ {
+ return buffer;
+ }
+
+ loop2 = 25;
+
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ return USB_HOST_FIFOERROR;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_curpipe
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_curpipe (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
+{
+ uint16_t buffer;
+ uint32_t loop;
+ volatile uint32_t loop2;
+
+ g_usb0_host_mbw[pipe] = mbw;
+
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB200.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
+ USB200.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(isel | pipe | mbw);
+ USB200.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D0USE:
+ buffer = USB200.D0FIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ USB200.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB200.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D1DMA:
+ case USB_HOST_D1USE:
+ buffer = USB200.D1FIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ USB200.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB200.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ /* Cautions !!!
+ * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
+ * For details, please look at the data sheet. */
+ loop2 = 100;
+
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_curpipe2
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument.(DFACC)
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* : uint16_t dfacc ; DFACC Access mode
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_curpipe2 (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc)
+{
+ uint16_t buffer;
+ uint32_t loop;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ uint32_t dummy;
+#endif
+ volatile uint32_t loop2;
+
+ g_usb0_host_mbw[pipe] = mbw;
+
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB200.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
+ USB200.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(isel | pipe | mbw);
+ USB200.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D0USE:
+ buffer = USB200.D0FIFOSEL;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+
+ if (dfacc != 0)
+ {
+ buffer |= (uint16_t)(USB_HOST_BITMBW_32);
+ }
+#else
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+#endif
+ USB200.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ if (dfacc != 0)
+ {
+ dummy = USB200.D0FIFO.UINT32;
+ }
+#endif
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB200.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D1DMA:
+ case USB_HOST_D1USE:
+ buffer = USB200.D1FIFOSEL;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+
+ if (dfacc != 0)
+ {
+ buffer |= (uint16_t)(USB_HOST_BITMBW_32);
+ }
+#else
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+#endif
+ USB200.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ if (dfacc != 0)
+ {
+ dummy = USB200.D1FIFO.UINT32;
+ loop = dummy; // avoid warning.
+ }
+#endif
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB200.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB200.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ /* Cautions !!!
+ * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
+ * For details, please look at the data sheet. */
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_c_fifo
+* Description : Writes data in CFIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_write_c_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB200.CFIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB200.CFIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB200.CFIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_c_fifo
+* Description : Reads data from CFIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_read_c_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb0_host_data_pointer[pipe] = USB200.CFIFO.UINT8[HH];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.CFIFO.UINT16[H];
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.CFIFO.UINT32;
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_d0_fifo
+* Description : Writes data in D0FIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_write_d0_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB200.D0FIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB200.D0FIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB200.D0FIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_d0_fifo
+* Description : Reads data from D0FIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating DOFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t Pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_read_d0_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb0_host_data_pointer[pipe] = USB200.D0FIFO.UINT8[HH];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.D0FIFO.UINT16[H];
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.D0FIFO.UINT32;
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_write_d1_fifo
+* Description : Writes data in D1FIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating D1FIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_write_d1_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB200.D1FIFO.UINT8[HH] = *g_usb0_host_data_pointer[pipe];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB200.D1FIFO.UINT16[H] = *((uint16_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB200.D1FIFO.UINT32 = *((uint32_t *)g_usb0_host_data_pointer[pipe]);
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_read_d1_fifo
+* Description : Reads data from D1FIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating D1FIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_read_d1_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb0_host_data_pointer[pipe] = USB200.D1FIFO.UINT8[HH];
+ g_usb0_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb0_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb0_host_data_pointer[pipe]) = USB200.D1FIFO.UINT16[H];
+ g_usb0_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb0_host_data_pointer[pipe]) = USB200.D1FIFO.UINT32;
+ g_usb0_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_com_get_dmasize
+* Description : Calculates access width of DMA transfer by the argument to
+ return as the Return Value.
+* Arguments : uint32_t trncount : transfer byte
+* : uint32_t dtptr : transfer data pointer
+* Return Value : DMA transfer size : 0 8bit
+* : : 1 16bit
+* : : 2 32bit
+*******************************************************************************/
+static uint32_t usb0_host_com_get_dmasize (uint32_t trncount, uint32_t dtptr)
+{
+ uint32_t size;
+
+ if (((trncount & 0x0001) != 0) || ((dtptr & 0x00000001) != 0))
+ {
+ /* When transfer byte count is odd */
+ /* or transfer data area is 8-bit alignment */
+ size = 0; /* 8bit */
+ }
+ else if (((trncount & 0x0003) != 0) || ((dtptr & 0x00000003) != 0))
+ {
+ /* When the transfer byte count is multiples of 2 */
+ /* or the transfer data area is 16-bit alignment */
+ size = 1; /* 16bit */
+ }
+ else
+ {
+ /* When the transfer byte count is multiples of 4 */
+ /* or the transfer data area is 32-bit alignment */
+ size = 2; /* 32bit */
+ }
+
+ return size;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_mbw
+* Description : Calculates access width of DMA to return the value set in MBW.
+* Arguments : uint32_t trncount : transfer byte
+* : uint32_t dtptr : transfer data pointer
+* Return Value : FIFO transfer size : USB_HOST_BITMBW_8 8bit
+* : : USB_HOST_BITMBW_16 16bit
+* : : USB_HOST_BITMBW_32 32bit
+*******************************************************************************/
+uint16_t usb0_host_get_mbw (uint32_t trncount, uint32_t dtptr)
+{
+ uint32_t size;
+ uint16_t mbw;
+
+ size = usb0_host_com_get_dmasize(trncount, dtptr);
+
+ if (size == 0)
+ {
+ /* 8bit */
+ mbw = USB_HOST_BITMBW_8;
+ }
+ else if (size == 1)
+ {
+ /* 16bit */
+ mbw = USB_HOST_BITMBW_16;
+ }
+ else
+ {
+ /* 32bit */
+ mbw = USB_HOST_BITMBW_32;
+ }
+
+ return mbw;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_transaction_counter
+* Description : Sets transaction counter by the argument(PIPEnTRN).
+* : Clears transaction before setting to enable transaction counter setting.
+* Arguments : uint16_t pipe ; Pipe number
+* : uint32_t bsize : Data transfer size
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_set_transaction_counter (uint16_t pipe, uint32_t bsize)
+{
+ uint16_t mxps;
+ uint16_t cnt;
+
+ if (bsize == 0)
+ {
+ return;
+ }
+
+ mxps = usb0_host_get_mxps(pipe); /* Max Packet Size */
+
+ if ((bsize % mxps) == 0)
+ {
+ cnt = (uint16_t)(bsize / mxps);
+ }
+ else
+ {
+ cnt = (uint16_t)((bsize / mxps) + 1);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE1TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE2TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE3TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE4TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE5TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB200.PIPE9TRN = cnt;
+ RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clear_transaction_counter
+* Description : Clears the transaction counter by the argument.
+* : After executing this function, the transaction counter is invalid.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clear_transaction_counter (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB200.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_stop_transfer
+* Description : Stops the USB transfer in the pipe specified by the argument.
+* : After stopping the USB transfer, clears the buffer allocated in
+* : the pipe.
+* : After executing this function, allocation in FIF0 becomes USB_HOST_PIPE0;
+* : invalid. After executing this function, BRDY/NRDY/BEMP interrupt
+* : in the corresponding pipe becomes invalid. Sequence bit is also
+* : cleared.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_stop_transfer (uint16_t pipe)
+{
+ uint16_t usefifo;
+ uint32_t remain;
+
+ usb0_host_set_pid_nak(pipe);
+
+ usefifo = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ usb0_host_clear_transaction_counter(pipe);
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ usb0_host_clear_transaction_counter(pipe);
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ remain = Userdef_USB_usb0_host_stop_dma0();
+ usb0_host_dma_stop_d0(pipe, remain);
+ usb0_host_clear_transaction_counter(pipe);
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ remain = Userdef_USB_usb0_host_stop_dma1();
+ usb0_host_dma_stop_d1(pipe, remain);
+ usb0_host_clear_transaction_counter(pipe);
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ default:
+ usb0_host_clear_transaction_counter(pipe);
+ USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+ }
+
+ /* Interrupt of pipe set is disabled */
+ usb0_host_disable_brdy_int(pipe);
+ usb0_host_disable_nrdy_int(pipe);
+ usb0_host_disable_bemp_int(pipe);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb0_host_aclrm(pipe);
+#endif
+ usb0_host_set_csclr(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_dfacc_d0
+* Description : Sets the DFACC setting value in D0FIFO using the transfer size.
+* Arguments : uint16_t mbw ; MBW
+* : uint16_t count ; data count
+* Return Value : DFACC Access mode
+*******************************************************************************/
+static uint16_t usb0_host_set_dfacc_d0 (uint16_t mbw, uint32_t count)
+{
+ uint16_t dfacc = 0;
+
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+#else
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ if ((count % 32) == 0)
+ {
+ /* 32byte transfer */
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 2,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 2;
+ }
+ else if ((count % 16) == 0)
+ {
+ /* 16byte transfer */
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 1,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 1;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+#endif
+
+ return dfacc;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_dfacc_d1
+* Description : Sets the DFACC setting value in D1FIFO using the transfer size.
+* Arguments : uint16_t mbw ; MBW
+* : uint16_t count ; data count
+* Return Value : DFACC Access mode
+*******************************************************************************/
+static uint16_t usb0_host_set_dfacc_d1 (uint16_t mbw, uint32_t count)
+{
+ uint16_t dfacc = 0;
+
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+#else
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ if ((count % 32) == 0)
+ {
+ /* 32byte transfer */
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 2,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 2;
+ }
+ else if ((count % 16) == 0)
+ {
+ /* 16byte transfer */
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 1,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 1;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB200.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+#endif
+
+ return dfacc;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/common/usb0_host_dma.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,355 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_dma.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+/* #include "usb0_host_dmacdrv.h" */
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+static void usb0_host_dmaint(uint16_t fifo);
+static void usb0_host_dmaint_buf2fifo(uint16_t pipe);
+static void usb0_host_dmaint_fifo2buf(uint16_t pipe);
+
+
+/*******************************************************************************
+* Function Name: usb0_host_dma_stop_d0
+* Description : D0FIFO DMA stop
+* Arguments : uint16_t pipe : pipe number
+* : uint32_t remain : transfer byte
+* Return Value : none
+*******************************************************************************/
+void usb0_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
+{
+ uint16_t dtln;
+ uint16_t dfacc;
+ uint16_t buffer;
+ uint16_t sds_b = 1;
+
+ dfacc = RZA_IO_RegRead_16(&USB200.D0FBCFG,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ if (dfacc == 2)
+ {
+ sds_b = 32;
+ }
+ else if (dfacc == 1)
+ {
+ sds_b = 16;
+ }
+ else
+ {
+ if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
+ {
+ sds_b = 4;
+ }
+ else if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
+ {
+ sds_b = 2;
+ }
+ else
+ {
+ sds_b = 1;
+ }
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ buffer = USB200.D0FIFOCTR;
+ dtln = (buffer & USB_HOST_BITDTLN);
+
+ if ((dtln % sds_b) != 0)
+ {
+ remain += (sds_b - (dtln % sds_b));
+ }
+ g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
+ g_usb0_host_data_count[pipe] = remain;
+ }
+ }
+
+ RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
+ 0,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dma_stop_d1
+* Description : D1FIFO DMA stop
+* Arguments : uint16_t pipe : pipe number
+* : uint32_t remain : transfer byte
+* Return Value : none
+*******************************************************************************/
+void usb0_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
+{
+ uint16_t dtln;
+ uint16_t dfacc;
+ uint16_t buffer;
+ uint16_t sds_b = 1;
+
+ dfacc = RZA_IO_RegRead_16(&USB200.D1FBCFG,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ if (dfacc == 2)
+ {
+ sds_b = 32;
+ }
+ else if (dfacc == 1)
+ {
+ sds_b = 16;
+ }
+ else
+ {
+ if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
+ {
+ sds_b = 4;
+ }
+ else if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
+ {
+ sds_b = 2;
+ }
+ else
+ {
+ sds_b = 1;
+ }
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ buffer = USB200.D1FIFOCTR;
+ dtln = (buffer & USB_HOST_BITDTLN);
+
+ if ((dtln % sds_b) != 0)
+ {
+ remain += (sds_b - (dtln % sds_b));
+ }
+ g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
+ g_usb0_host_data_count[pipe] = remain;
+ }
+ }
+
+ RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
+ 0,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dma_interrupt_d0fifo
+* Description : This function is DMA interrupt handler entry.
+* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
+* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
+* : specified by dma->fifo.
+* : Register this function as DMA complete interrupt.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb0_host_dma_interrupt_d0fifo (uint32_t int_sense)
+{
+ usb0_host_dmaint(USB_HOST_D0FIFO);
+ g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dma_interrupt_d1fifo
+* Description : This function is DMA interrupt handler entry.
+* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
+* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
+* : specified by dma->fifo.
+* : Register this function as DMA complete interrupt.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb0_host_dma_interrupt_d1fifo (uint32_t int_sense)
+{
+ usb0_host_dmaint(USB_HOST_D1FIFO);
+ g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dmaint
+* Description : This function is DMA transfer end interrupt
+* Arguments : uint16_t fifo ; fifo number
+* : ; USB_HOST_D0FIFO
+* : ; USB_HOST_D1FIFO
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_dmaint (uint16_t fifo)
+{
+ uint16_t pipe;
+
+ pipe = g_usb0_host_DmaPipe[fifo];
+
+ if (g_usb0_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
+ {
+ usb0_host_dmaint_buf2fifo(pipe);
+ }
+ else
+ {
+ usb0_host_dmaint_fifo2buf(pipe);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dmaint_fifo2buf
+* Description : Executes read completion from FIFO by DMAC.
+* Arguments : uint16_t pipe : pipe number
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_dmaint_fifo2buf (uint16_t pipe)
+{
+ uint32_t remain;
+ uint16_t useport;
+
+ if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ if (useport == USB_HOST_D0FIFO_DMA)
+ {
+ remain = Userdef_USB_usb0_host_stop_dma0();
+ usb0_host_dma_stop_d0(pipe, remain);
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ else
+ {
+ usb0_host_enable_brdy_int(pipe);
+ }
+ }
+ }
+ else
+ {
+ remain = Userdef_USB_usb0_host_stop_dma1();
+ usb0_host_dma_stop_d1(pipe, remain);
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ else
+ {
+ usb0_host_enable_brdy_int(pipe);
+ }
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_dmaint_buf2fifo
+* Description : Executes write completion in FIFO by DMAC.
+* Arguments : uint16_t pipe : pipe number
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_dmaint_buf2fifo (uint16_t pipe)
+{
+ uint16_t useport;
+ uint32_t remain;
+
+ useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ if (useport == USB_HOST_D0FIFO_DMA)
+ {
+ remain = Userdef_USB_usb0_host_stop_dma0();
+ usb0_host_dma_stop_d0(pipe, remain);
+
+ if (g_usb0_host_DmaBval[USB_HOST_D0FIFO] != 0)
+ {
+ RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL);
+ }
+ }
+ else
+ {
+ remain = Userdef_USB_usb0_host_stop_dma1();
+ usb0_host_dma_stop_d1(pipe, remain);
+
+ if (g_usb0_host_DmaBval[USB_HOST_D1FIFO] != 0)
+ {
+ RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL);
+ }
+ }
+
+ usb0_host_enable_bemp_int(pipe);
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/common/usb0_host_intrn.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,285 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_intrn.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#if(1) /* ohci_wrapp */
+#include "ohci_wrapp_RZ_A1_local.h"
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_brdy_int
+* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
+* : According to the pipe that interrupt is generated in,
+* : reads/writes buffer allocated in the pipe.
+* : This function is executed in the BRDY interrupt handler.
+* : This function clears BRDY interrupt status and BEMP interrupt
+* : status.
+* Arguments : uint16_t status ; BRDYSTS Register Value
+* : uint16_t int_enb ; BRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_brdy_int (uint16_t status, uint16_t int_enb)
+{
+ uint32_t int_sense = 0;
+ uint16_t pipe;
+ uint16_t pipebit;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ pipebit = g_usb0_host_bit_set[pipe];
+
+ if ((status & pipebit) && (int_enb & pipebit))
+ {
+ USB200.BRDYSTS = (uint16_t)~pipebit;
+ USB200.BEMPSTS = (uint16_t)~pipebit;
+
+ if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
+ {
+ if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
+ {
+ usb0_host_dma_interrupt_d0fifo(int_sense);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ usb0_host_read_dma(pipe);
+ usb0_host_disable_brdy_int(pipe);
+ }
+ else
+ {
+ USB200.D0FIFOCTR = USB_HOST_BITBCLR;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ }
+ else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
+ {
+ if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
+ {
+ usb0_host_dma_interrupt_d1fifo(int_sense);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ usb0_host_read_dma(pipe);
+ usb0_host_disable_brdy_int(pipe);
+ }
+ else
+ {
+ USB200.D1FIFOCTR = USB_HOST_BITBCLR;
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
+ {
+ usb0_host_read_buffer(pipe);
+ }
+ else
+ {
+ usb0_host_write_buffer(pipe);
+ }
+ }
+#if(1) /* ohci_wrapp */
+ switch (g_usb0_host_pipe_status[pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
+ break;
+ case USB_HOST_PIPE_NORES:
+ case USB_HOST_PIPE_STALL:
+ case USB_HOST_PIPE_ERROR:
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+ break;
+ default:
+ /* Do Nothing */
+ break;
+ }
+#endif
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_nrdy_int
+* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
+* : Checks NRDY interrupt cause by PID. When the cause if STALL,
+* : regards the pipe state as STALL and ends the processing.
+* : Then the cause is not STALL, increments the error count to
+* : communicate again. When the error count is 3, determines
+* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
+* : This function is executed in the NRDY interrupt handler.
+* : This function clears NRDY interrupt status.
+* Arguments : uint16_t status ; NRDYSTS Register Value
+* : uint16_t int_enb ; NRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_nrdy_int (uint16_t status, uint16_t int_enb)
+{
+ uint16_t pid;
+ uint16_t pipe;
+ uint16_t bitcheck;
+
+ bitcheck = (uint16_t)(status & int_enb);
+
+ USB200.NRDYSTS = (uint16_t)~status;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
+ {
+ if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
+ USB_SYSCFG_DCFM_SHIFT,
+ USB_SYSCFG_DCFM) == 1)
+ {
+ if (g_usb0_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
+ {
+ pid = usb0_host_get_pid(pipe);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_DEVICENOTRESPONDING);
+#else
+ g_usb0_host_PipeIgnore[pipe]++;
+
+ if (g_usb0_host_PipeIgnore[pipe] == 3)
+ {
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
+ }
+ else
+ {
+ usb0_host_set_pid_buf(pipe);
+ }
+#endif
+ }
+ }
+ }
+ else
+ {
+ /* USB Function */
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_bemp_int
+* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
+* Arguments : uint16_t status ; BEMPSTS Register Value
+* : uint16_t int_enb ; BEMPENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_bemp_int (uint16_t status, uint16_t int_enb)
+{
+ uint16_t pid;
+ uint16_t pipe;
+ uint16_t bitcheck;
+ uint16_t inbuf;
+
+ bitcheck = (uint16_t)(status & int_enb);
+
+ USB200.BEMPSTS = (uint16_t)~status;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
+ {
+ pid = usb0_host_get_pid(pipe);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+ inbuf = usb0_host_get_inbuf(pipe);
+
+ if (inbuf == 0)
+ {
+ usb0_host_disable_bemp_int(pipe);
+ usb0_host_set_pid_nak(pipe);
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
+#endif
+ }
+ }
+ }
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/common/usb0_host_lib.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,1580 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_lib.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#if(1) /* ohci_wrapp */
+#include "MBRZA1H.h" /* INTC Driver Header */
+#else
+#include "devdrv_intc.h" /* INTC Driver Header */
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_enable_brdy_int
+* Description : Enables BRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_enable_brdy_int (uint16_t pipe)
+{
+ /* enable brdy interrupt */
+ USB200.BRDYENB |= (uint16_t)g_usb0_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_disable_brdy_int
+* Description : Disables BRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After disabling BRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_disable_brdy_int (uint16_t pipe)
+{
+ /* disable brdy interrupt */
+ USB200.BRDYENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clear_brdy_sts
+* Description : Clear BRDY interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clear_brdy_sts (uint16_t pipe)
+{
+ /* clear brdy status */
+ USB200.BRDYSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_enable_bemp_int
+* Description : Enables BEMP interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BEMP, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_enable_bemp_int (uint16_t pipe)
+{
+ /* enable bemp interrupt */
+ USB200.BEMPENB |= (uint16_t)g_usb0_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_disable_bemp_int
+* Description : Disables BEMP interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BEMP, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_disable_bemp_int (uint16_t pipe)
+{
+ /* disable bemp interrupt */
+ USB200.BEMPENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clear_bemp_sts
+* Description : Clear BEMP interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clear_bemp_sts (uint16_t pipe)
+{
+ /* clear bemp status */
+ USB200.BEMPSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_enable_nrdy_int
+* Description : Enables NRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : NRDY. Enables NRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling NRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_enable_nrdy_int (uint16_t pipe)
+{
+ /* enable nrdy interrupt */
+ USB200.NRDYENB |= (uint16_t)g_usb0_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_disable_nrdy_int
+* Description : Disables NRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : NRDY. Disables NRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After disabling NRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_disable_nrdy_int (uint16_t pipe)
+{
+ /* disable nrdy interrupt */
+ USB200.NRDYENB &= (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clear_nrdy_sts
+* Description : Clear NRDY interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clear_nrdy_sts (uint16_t pipe)
+{
+ /* clear nrdy status */
+ USB200.NRDYSTS = (uint16_t)~(g_usb0_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_is_hispeed
+* Description : Returns the result of USB reset hand shake (RHST) as
+* : return value.
+* Arguments : none
+* Return Value : USB_HOST_HIGH_SPEED ; Hi-Speed
+* : USB_HOST_FULL_SPEED ; Full-Speed
+* : USB_HOST_LOW_SPEED ; Low-Speed
+* : USB_HOST_NON_SPEED ; error
+*******************************************************************************/
+uint16_t usb0_host_is_hispeed (void)
+{
+ uint16_t rhst;
+ uint16_t speed;
+
+ rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (rhst == USB_HOST_HSMODE)
+ {
+ speed = USB_HOST_HIGH_SPEED;
+ }
+ else if (rhst == USB_HOST_FSMODE)
+ {
+ speed = USB_HOST_FULL_SPEED;
+ }
+ else if (rhst == USB_HOST_LSMODE)
+ {
+ speed = USB_HOST_LOW_SPEED;
+ }
+ else
+ {
+ speed = USB_HOST_NON_SPEED;
+ }
+
+ return speed;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_is_hispeed_enable
+* Description : Returns the USB High-Speed connection enabled status as
+* : return value.
+* Arguments : none
+* Return Value : USB_HOST_YES : Hi-Speed Enable
+* : USB_HOST_NO : Hi-Speed Disable
+*******************************************************************************/
+uint16_t usb0_host_is_hispeed_enable (void)
+{
+ uint16_t ret;
+
+ ret = USB_HOST_NO;
+
+ if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE) == 1)
+ {
+ ret = USB_HOST_YES;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_pid_buf
+* Description : Enables communicaqtion in the pipe specified by the argument
+* : (BUF).
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_pid_buf (uint16_t pipe)
+{
+ uint16_t pid;
+
+ pid = usb0_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_STALL2)
+ {
+ usb0_host_set_pid_nak(pipe);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ USB_HOST_PID_BUF,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_pid_nak
+* Description : Disables communication (NAK) in the pipe specified by the argument.
+* : When the pipe status was enabling communication (BUF) before
+* : executing before executing this function, waits in the software
+* : until the pipe becomes ready after setting disabled.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_pid_nak (uint16_t pipe)
+{
+ uint16_t pid;
+ uint16_t pbusy;
+ uint32_t loop;
+
+ pid = usb0_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_STALL2)
+ {
+ usb0_host_set_pid_stall(pipe);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ USB_HOST_PID_NAK,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+
+ if (pid == USB_HOST_PID_BUF)
+ {
+ for (loop = 0; loop < 200; loop++)
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ pbusy = RZA_IO_RegRead_16(&USB200.DCPCTR,
+ USB_DCPCTR_PBUSY_SHIFT,
+ USB_DCPCTR_PBUSY);
+ break;
+
+ case USB_HOST_PIPE1:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE2:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE3:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE4:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE5:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE6:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE7:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE8:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE9:
+ pbusy = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
+ USB_PIPEnCTR_9_PBUSY_SHIFT,
+ USB_PIPEnCTR_9_PBUSY);
+ break;
+
+ default:
+ pbusy = 1;
+ break;
+ }
+
+ if (pbusy == 0)
+ {
+ break;
+ }
+
+ Userdef_USB_usb0_host_delay_500ns();
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_pid_stall
+* Description : Disables communication (STALL) in the pipe specified by the
+* : argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_pid_stall (uint16_t pipe)
+{
+ uint16_t pid;
+
+ pid = usb0_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_BUF)
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ USB_HOST_PID_STALL2,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+ }
+ else
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ USB_HOST_PID_STALL,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clear_pid_stall
+* Description : Disables communication (NAK) in the pipe specified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clear_pid_stall (uint16_t pipe)
+{
+ usb0_host_set_pid_nak(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_pid
+* Description : Returns the pipe state specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : PID
+*******************************************************************************/
+uint16_t usb0_host_get_pid (uint16_t pipe)
+{
+ uint16_t pid;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ pid = RZA_IO_RegRead_16(&USB200.DCPCTR,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ pid = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ pid = 0;
+ break;
+ }
+
+ return pid;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_csclr
+* Description : CSPLIT status clear setting of sprit transaction in specified
+* : pipe is performed.
+* : When SQSET bit or SQCLR bit, and SQSET bit or SQCLR bit
+* : in DCPCTR register are continuously changed (when the sequence
+* : toggle bit of data PID is continuously changed over two or more pipes),
+* : the access cycle with 120 ns and more than 5 cycle bus clock is necessary.
+* : Do not set both SQCLR bit and SQSET bit to 1 at the same time.
+* : In addition, both bits should be operated after PID is set to NAK.
+* : However, when it is set to the isochronous transfer as the transfer type
+* : (TYPE=11), writing in SQSET bit is disabled.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_csclr (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ 1,
+ USB_DCPCTR_CSCLR_SHIFT,
+ USB_DCPCTR_CSCLR);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_CSCLR_SHIFT,
+ USB_PIPEnCTR_9_CSCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_sqclr
+* Description : Sets the sequence bit of the pipe specified by the argument to
+* : DATA0.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_sqclr (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ 1,
+ USB_DCPCTR_SQCLR_SHIFT,
+ USB_DCPCTR_SQCLR);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_SQCLR_SHIFT,
+ USB_PIPEnCTR_9_SQCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_sqset
+* Description : Sets the sequence bit of the pipe specified by the argument to
+* : DATA1.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_sqset (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB200.DCPCTR,
+ 1,
+ USB_DCPCTR_SQSET_SHIFT,
+ USB_DCPCTR_SQSET);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_SQSET_SHIFT,
+ USB_PIPEnCTR_9_SQSET);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_sqmon
+* Description : Toggle bit of specified pipe is obtained
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : sqmon
+*******************************************************************************/
+uint16_t usb0_host_get_sqmon (uint16_t pipe)
+{
+ uint16_t sqmon;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ sqmon = RZA_IO_RegRead_16(&USB200.DCPCTR,
+ USB_DCPCTR_SQMON_SHIFT,
+ USB_DCPCTR_SQMON);
+ break;
+
+ case USB_HOST_PIPE1:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE2:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE3:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE4:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE5:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE6:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE6CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE7:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE7CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE8:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE8CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE9:
+ sqmon = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
+ USB_PIPEnCTR_9_SQMON_SHIFT,
+ USB_PIPEnCTR_9_SQMON);
+ break;
+
+ default:
+ sqmon = 0;
+ break;
+ }
+
+ return sqmon;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_aclrm
+* Description : The buffer of specified pipe is initialized
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb0_host_aclrm (uint16_t pipe)
+{
+ usb0_host_set_aclrm(pipe);
+ usb0_host_clr_aclrm(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_aclrm
+* Description : The auto buffer clear mode of specified pipe is enabled
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_aclrm (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_ACLRM_SHIFT,
+ USB_PIPEnCTR_9_ACLRM);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_clr_aclrm
+* Description : The auto buffer clear mode of specified pipe is enabled
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb0_host_clr_aclrm (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB200.PIPE1CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB200.PIPE2CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB200.PIPE3CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB200.PIPE4CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB200.PIPE5CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB200.PIPE6CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB200.PIPE7CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB200.PIPE8CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB200.PIPE9CTR,
+ 0,
+ USB_PIPEnCTR_9_ACLRM_SHIFT,
+ USB_PIPEnCTR_9_ACLRM);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_inbuf
+* Description : Returns INBUFM of the pipe specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : inbuf
+*******************************************************************************/
+uint16_t usb0_host_get_inbuf (uint16_t pipe)
+{
+ uint16_t inbuf;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE1:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE1CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE2:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE2CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE3:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE3CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE4:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE4CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE5:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE5CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE6:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE7:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE8:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE9:
+ inbuf = RZA_IO_RegRead_16(&USB200.PIPE9CTR,
+ USB_PIPEnCTR_9_INBUFM_SHIFT,
+ USB_PIPEnCTR_9_INBUFM);
+ break;
+
+ default:
+ inbuf = 0;
+ break;
+ }
+
+ return inbuf;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_setting_interrupt
+* Description : Sets the USB module interrupt level.
+* Arguments : uint8_t level ; interrupt level
+* Return Value : none
+*******************************************************************************/
+void usb0_host_setting_interrupt (uint8_t level)
+{
+#if(1) /* ohci_wrapp */
+ IRQn_Type d0fifo_dmaintid;
+ IRQn_Type d1fifo_dmaintid;
+
+ InterruptHandlerRegister(USBI0_IRQn, usb0_host_interrupt);
+ GIC_SetPriority(USBI0_IRQn, level);
+ GIC_EnableIRQ(USBI0_IRQn);
+
+ d0fifo_dmaintid = (IRQn_Type)Userdef_USB_usb0_host_d0fifo_dmaintid();
+
+ if (d0fifo_dmaintid != 0xFFFF)
+ {
+ InterruptHandlerRegister(d0fifo_dmaintid, usb0_host_dma_interrupt_d0fifo);
+ GIC_SetPriority(d0fifo_dmaintid, level);
+ GIC_EnableIRQ(d0fifo_dmaintid);
+ }
+
+ d1fifo_dmaintid = (IRQn_Type)Userdef_USB_usb0_host_d1fifo_dmaintid();
+
+ if (d1fifo_dmaintid != 0xFFFF)
+ {
+ InterruptHandlerRegister(d1fifo_dmaintid, usb0_host_dma_interrupt_d1fifo);
+ GIC_SetPriority(d1fifo_dmaintid, level);
+ GIC_EnableIRQ(d1fifo_dmaintid);
+ }
+#else
+ uint16_t d0fifo_dmaintid;
+ uint16_t d1fifo_dmaintid;
+
+ R_INTC_RegistIntFunc(INTC_ID_USBI0, usb0_host_interrupt);
+ R_INTC_SetPriority(INTC_ID_USBI0, level);
+ R_INTC_Enable(INTC_ID_USBI0);
+
+ d0fifo_dmaintid = Userdef_USB_usb0_host_d0fifo_dmaintid();
+
+ if (d0fifo_dmaintid != 0xFFFF)
+ {
+ R_INTC_RegistIntFunc(d0fifo_dmaintid, usb0_host_dma_interrupt_d0fifo);
+ R_INTC_SetPriority(d0fifo_dmaintid, level);
+ R_INTC_Enable(d0fifo_dmaintid);
+ }
+
+ d1fifo_dmaintid = Userdef_USB_usb0_host_d1fifo_dmaintid();
+
+ if (d1fifo_dmaintid != 0xFFFF)
+ {
+ R_INTC_RegistIntFunc(d1fifo_dmaintid, usb0_host_dma_interrupt_d1fifo);
+ R_INTC_SetPriority(d1fifo_dmaintid, level);
+ R_INTC_Enable(d1fifo_dmaintid);
+ }
+#endif
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_reset_module
+* Description : Initializes the USB module.
+* : Enables providing clock to the USB module.
+* : Sets USB bus wait register.
+* Arguments : uint16_t clockmode ; 48MHz ; USBHCLOCK_X1_48MHZ
+* : ; 12MHz ; USBHCLOCK_EXTAL_12MHZ
+* Return Value : none
+*******************************************************************************/
+void usb0_host_reset_module (uint16_t clockmode)
+{
+ if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
+ USB_SYSCFG_UPLLE_SHIFT,
+ USB_SYSCFG_UPLLE) == 1)
+ {
+ if ((USB200.SYSCFG0 & USB_HOST_BITUCKSEL) != clockmode)
+ {
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ USB200.SYSCFG0 = 0;
+ USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
+ Userdef_USB_usb0_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ Userdef_USB_usb0_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ USB200.SYSCFG0 = 0;
+ USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
+ Userdef_USB_usb0_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+
+ USB200.BUSWAIT = (uint16_t)(USB_HOST_BUSWAIT_05 & USB_HOST_BITBWAIT);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_buf_size
+* Description : Obtains pipe buffer size specified by the argument and
+* : maximum packet size of the USB device in use.
+* : When USB_HOST_PIPE0 is specified by the argument, obtains the maximum
+* : packet size of the USB device using the corresponding pipe.
+* : For the case that USB_HOST_PIPE0 is not assigned by the argument, when the
+* : corresponding pipe is in continuous transfer mode,
+* : obtains the buffer size allocated in the corresponcing pipe,
+* : when incontinuous transfer, obtains maximum packet size.
+* Arguments : uint16_t ; pipe Number
+* Return Value : Maximum packet size or buffer size
+*******************************************************************************/
+uint16_t usb0_host_get_buf_size (uint16_t pipe)
+{
+ uint16_t size;
+ uint16_t bufsize;
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ size = RZA_IO_RegRead_16(&USB200.DCPMAXP,
+ USB_DCPMAXP_MXPS_SHIFT,
+ USB_DCPMAXP_MXPS);
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_CNTMD_SHIFT, USB_PIPECFG_CNTMD) == 1)
+ {
+ bufsize = RZA_IO_RegRead_16(&g_usb0_host_pipebuf[pipe], USB_PIPEBUF_BUFSIZE_SHIFT, USB_PIPEBUF_BUFSIZE);
+ size = (uint16_t)((bufsize + 1) * USB_HOST_PIPExBUF);
+ }
+ else
+ {
+ size = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
+ }
+ }
+ return size;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_mxps
+* Description : Obtains maximum packet size of the USB device using the pipe
+* : specified by the argument.
+* Arguments : uint16_t ; Pipe Number
+* Return Value : Max Packet Size
+*******************************************************************************/
+uint16_t usb0_host_get_mxps (uint16_t pipe)
+{
+ uint16_t size;
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ size = RZA_IO_RegRead_16(&USB200.DCPMAXP,
+ USB_DCPMAXP_MXPS_SHIFT,
+ USB_DCPMAXP_MXPS);
+ }
+ else
+ {
+ size = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
+ }
+
+ return size;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/host/usb0_host_controlrw.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,434 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_controlrw.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_CtrlTransStart
+* Description : Executes USB control transfer.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* : uint8_t *Buf ; Data buffer
+* Return Value : DEVDRV_SUCCESS ; SUCCESS
+* : DEVDRV_ERROR ; ERROR
+*******************************************************************************/
+int32_t usb0_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
+ uint16_t Indx, uint16_t Len, uint8_t * Buf)
+{
+ if (g_usb0_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
+ {
+ RZA_IO_RegWrite_16(&USB200.SOFCFG,
+ 1,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.SOFCFG,
+ 0,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+
+ USB200.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb0_host_default_max_packet[devadr]);
+
+ if (g_usb0_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
+ {
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
+
+ if (Len == 0)
+ {
+ g_usb0_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
+ }
+ else
+ {
+ if ((Req & 0x0080) != 0)
+ {
+ g_usb0_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
+ }
+ else
+ {
+ g_usb0_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
+ }
+ }
+
+ g_usb0_host_SavReq = Req; /* save request */
+ g_usb0_host_SavVal = Val;
+ g_usb0_host_SavIndx = Indx;
+ g_usb0_host_SavLen = Len;
+ }
+ else
+ {
+ if ((g_usb0_host_SavReq != Req) || (g_usb0_host_SavVal != Val)
+ || (g_usb0_host_SavIndx != Indx) || (g_usb0_host_SavLen != Len))
+ {
+ return DEVDRV_ERROR;
+ }
+ }
+
+ switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ /* --------------- SETUP STAGE --------------- */
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
+ usb0_host_SetupStage(Req, Val, Indx, Len);
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_WRITE:
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
+ break;
+
+ case USB_HOST_MODE_READ:
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
+ break;
+
+ case USB_HOST_MODE_NO_DATA:
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ break;
+
+ default:
+ break;
+ }
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
+ if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
+ }
+ break;
+
+ /* --------------- DATA STAGE --------------- */
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
+ switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_WRITE:
+ usb0_host_CtrlWriteStart((uint32_t)Len, Buf);
+ break;
+
+ case USB_HOST_MODE_READ:
+ usb0_host_CtrlReadStart((uint32_t)Len, Buf);
+ break;
+
+ default:
+ break;
+ }
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
+ if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
+ usb0_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb0_host_set_pid_buf(USB_HOST_PIPE0);
+ }
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ break;
+
+ /* --------------- STATUS STAGE --------------- */
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
+ usb0_host_StatusStage();
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
+ usb0_host_set_pid_nak(USB_HOST_PIPE0);
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
+ if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
+ usb0_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb0_host_set_pid_buf(USB_HOST_PIPE0);
+ }
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ break;
+
+ default:
+ break;
+ }
+
+ if (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
+ {
+ RZA_IO_RegWrite_16(&USB200.SOFCFG,
+ 0,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_SetupStage
+* Description : Executes USB control transfer/set up stage.
+* Arguments : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* Return Value : none
+*******************************************************************************/
+void usb0_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
+{
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ USB200.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
+ USB200.USBREQ = Req;
+ USB200.USBVAL = Val;
+ USB200.USBINDX = Indx;
+ USB200.USBLENG = Len;
+ USB200.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_StatusStage
+* Description : Executes USB control transfer/status stage.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_StatusStage (void)
+{
+ uint8_t Buf1[16];
+
+ switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_READ:
+ usb0_host_CtrlWriteStart((uint32_t)0, (uint8_t *)&Buf1);
+ break;
+
+ case USB_HOST_MODE_WRITE:
+ usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
+ break;
+
+ case USB_HOST_MODE_NO_DATA:
+ usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_CtrlWriteStart
+* Description : Executes USB control transfer/data stage(write).
+* Arguments : uint32_t Bsize ; Data Size
+* : uint8_t *Table ; Data Table Address
+* Return Value : USB_HOST_WRITESHRT ; End of data write
+* : USB_HOST_WRITEEND ; End of data write (not null)
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_FIFOERROR ; FIFO access error
+*******************************************************************************/
+uint16_t usb0_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
+{
+ uint16_t EndFlag_K;
+ uint16_t mbw;
+
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
+ g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
+ g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
+
+ USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
+#if(1) /* ohci_wrapp */
+ Userdef_USB_usb0_host_delay_10us(3);
+#endif
+ RZA_IO_RegWrite_16(&USB200.DCPCFG,
+ 1,
+ USB_DCPCFG_DIR_SHIFT,
+ USB_DCPCFG_DIR);
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
+ USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+
+ usb0_host_clear_pid_stall(USB_HOST_PIPE0);
+ EndFlag_K = usb0_host_write_buffer_c(USB_HOST_PIPE0);
+ /* Host Control sequence */
+ switch (EndFlag_K)
+ {
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_WRITEEND: /* End of data write (not null) */
+ case USB_HOST_WRITING: /* Continue of data write */
+ usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ break;
+
+ default:
+ break;
+ }
+ usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
+ return (EndFlag_K); /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_CtrlReadStart
+* Description : Executes USB control transfer/data stage(read).
+* Arguments : uint32_t Bsize ; Data Size
+* : uint8_t *Table ; Data Table Address
+* Return Value : none
+*******************************************************************************/
+void usb0_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
+{
+ uint16_t mbw;
+
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
+ g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
+ g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
+
+ USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
+#if(1) /* ohci_wrapp */
+ Userdef_USB_usb0_host_delay_10us(3);
+#endif
+ RZA_IO_RegWrite_16(&USB200.DCPCFG,
+ 0,
+ USB_DCPCFG_DIR_SHIFT,
+ USB_DCPCFG_DIR);
+
+ mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
+ usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
+ USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+
+ usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb0_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
+ usb0_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/host/usb0_host_drv_api.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,889 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_drv_api.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb0_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_api_host_init
+* Description : Initializes USB module in the USB host mode.
+* : USB connection is executed when executing this function in
+* : the states that USB device isconnected to the USB port.
+* Arguments : uint8_t int_level : USB Module interrupt level
+* : USBU16 mode : USB_HOST_HIGH_SPEED
+* : USB_HOST_FULL_SPEED
+* : uint16_t clockmode : USB Clock mode
+* Return Value : USB detach or attach
+* : USB_HOST_ATTACH
+* : USB_HOST_DETACH
+*******************************************************************************/
+uint16_t usb0_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
+{
+ uint16_t connect;
+ volatile uint8_t dummy_buf;
+
+ CPG.STBCR7 &= 0xfd; /*The clock of USB0 modules is permitted */
+ dummy_buf = CPG.STBCR7; /* (Dummy read) */
+
+ g_usb0_host_SupportUsbDeviceSpeed = mode;
+
+ usb0_host_setting_interrupt(int_level);
+ usb0_host_reset_module(clockmode);
+
+ g_usb0_host_bchg_flag = USB_HOST_NO;
+ g_usb0_host_detach_flag = USB_HOST_NO;
+ g_usb0_host_attach_flag = USB_HOST_NO;
+
+ g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
+ g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
+
+ usb0_host_InitModule();
+
+ connect = usb0_host_CheckAttach();
+
+ if (connect == USB_HOST_ATTACH)
+ {
+ g_usb0_host_attach_flag = USB_HOST_YES;
+ }
+ else
+ {
+ usb0_host_UsbDetach2();
+ }
+
+ return connect;
+}
+
+#if(1) /* ohci_wrapp */
+#else
+/*******************************************************************************
+* Function Name: usb0_api_host_enumeration
+* Description : Initializes USB module in the USB host mode.
+* : USB connection is executed when executing this function in
+* : the states that USB device isconnected to the USB port.
+* Arguments : uint16_t devadr : device address
+* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
+* : DEVDRV_SUCCESS : device enumeration success
+* : DEVDRV_ERROR : device enumeration error
+*******************************************************************************/
+int32_t usb0_api_host_enumeration (uint16_t devadr)
+{
+ int32_t ret;
+ uint16_t driver_sts;
+
+ g_usb0_host_setUsbAddress = devadr;
+
+ while (1)
+ {
+ driver_sts = usb0_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ ret = DEVDRV_USBH_DETACH_ERR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_CONFIGURED)
+ {
+ ret = DEVDRV_SUCCESS;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_STALL)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+
+ if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ while (1)
+ {
+ driver_sts = usb0_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_detach
+* Description : USB detach routine
+* Arguments : none
+* Return Value : USB_HOST_DETACH : USB detach
+* : USB_HOST_ATTACH : USB attach
+* : DEVDRV_ERROR : error
+*******************************************************************************/
+int32_t usb0_api_host_detach (void)
+{
+ int32_t ret;
+ uint16_t driver_sts;
+
+ while (1)
+ {
+ driver_sts = usb0_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ ret = USB_HOST_DETACH;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_CONFIGURED)
+ {
+ ret = USB_HOST_ATTACH;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_STALL)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+
+ if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ while (1)
+ {
+ driver_sts = usb0_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_data_in
+* Description : Executes USB transfer as data-in in the argument specified pipe.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Pipe ; Pipe Number
+* : uint32_t Size ; Data Size
+* : uint8_t *data_buf ; Data data_buf Address
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
+{
+ int32_t ret;
+
+ if (Pipe == USB_HOST_PIPE0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
+ {
+ usb0_host_start_receive_transfer(Pipe, Size, data_buf);
+ }
+ else
+ {
+ return DEVDRV_ERROR; /* Now pipe is busy */
+ }
+
+ /* waiting for completing routine */
+ do
+ {
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+
+ } while (1);
+
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb0_host_pipe_status[Pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ usb0_host_stop_transfer(Pipe);
+
+ g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_data_out
+* Description : Executes USB transfer as data-out in the argument specified pipe.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Pipe ; Pipe Number
+* : uint32_t Size ; Data Size
+* : uint8_t *data_buf ; Data data_buf Address
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
+{
+ int32_t ret;
+
+ if (Pipe == USB_HOST_PIPE0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
+ {
+ usb0_host_start_send_transfer(Pipe, Size, data_buf);
+ }
+ else
+ {
+ return DEVDRV_ERROR; /* Now pipe is busy */
+ }
+
+ /* waiting for completing routine */
+ do
+ {
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+
+ } while (1);
+
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb0_host_pipe_status[Pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ usb0_host_stop_transfer(Pipe);
+
+ g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_control_transfer
+* Description : Executes USB control transfer.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* : uint8_t *buf ; Buffer
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_USBH_DETACH_ERR ; device detach
+* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
+* : DEVDRV_USBH_STALL ; STALL
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
+ uint16_t Len, uint8_t * Buf)
+{
+ int32_t ret;
+
+ do
+ {
+ ret = usb0_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
+
+ if (ret == DEVDRV_SUCCESS)
+ {
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
+ && (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+ }
+ else
+ {
+ return DEVDRV_ERROR;
+ }
+ } while (1);
+
+ if (g_usb0_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb0_host_pipe_status[USB_HOST_PIPE0])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_CTRL_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_set_endpoint
+* Description : Sets end point on the information specified in the argument.
+* Arguments : uint16_t devadr ; device address
+* : uint8_t *configdescriptor ; device configration descriptor
+* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
+{
+ uint16_t ret;
+ uint32_t end_point;
+ uint32_t offset;
+ uint32_t totalLength;
+ USB_HOST_CFG_PIPETBL_t * pipe_table;
+
+ /* End Point Search */
+ end_point = 0;
+ offset = configdescriptor[0];
+ totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
+
+ do
+ {
+ if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
+ {
+ pipe_table = &user_table[end_point];
+
+ if (pipe_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+
+ ret = usb0_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
+
+ if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
+ {
+ return DEVDRV_ERROR;
+ }
+
+ ++end_point;
+ }
+
+ /* Next End Point Search */
+ offset += configdescriptor[offset];
+
+ } while (offset < totalLength);
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_clear_endpoint
+* Description : Clears the pipe definition table specified in the argument.
+* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
+{
+ uint16_t pipe;
+
+ for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
+ {
+ if (user_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+ user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
+ user_table->pipe_max_pktsize = 0;
+ user_table->pipe_cycle = 0;
+
+ user_table++;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_api_host_clear_endpoint_pipe
+* Description : Clears the pipe definition table specified in the argument.
+* Arguments : uint16_t pipe_sel : Pipe Number
+* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
+{
+ uint16_t pipe;
+
+ for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
+ {
+ if (user_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+
+ if (user_table->pipe_number == pipe_sel)
+ {
+ user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
+ user_table->pipe_max_pktsize = 0;
+ user_table->pipe_cycle = 0;
+ break;
+ }
+
+ user_table++;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+#endif
+
+/*******************************************************************************
+* Function Name: usb0_api_host_SetEndpointTable
+* Description : Sets the end point on the information specified by the argument.
+* Arguments : uint16_t devadr : device address
+* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* : uint8_t *Table : Endpoint descriptor
+* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
+* : USB_HOST_DIR_H_OUT ; OUT endpoint
+* : USB_END_POINT_ERROR ; error
+*******************************************************************************/
+uint16_t usb0_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
+{
+ uint16_t PipeCfg;
+ uint16_t PipeMaxp;
+ uint16_t pipe_number;
+ uint16_t ret;
+ uint16_t ret_flag = 0; // avoid warning.
+
+ pipe_number = user_table->pipe_number;
+
+ if (Table[1] != USB_HOST_ENDPOINT_DESC)
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ switch (Table[3] & USB_HOST_EP_TYPE)
+ {
+ case USB_HOST_EP_CNTRL:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+
+ case USB_HOST_EP_ISO:
+ if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_ISO;
+ break;
+
+ case USB_HOST_EP_BULK:
+ if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_BULK;
+ break;
+
+ case USB_HOST_EP_INT:
+ if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_INTERRUPT;
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+
+ /* Set pipe configuration table */
+ if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
+ {
+ if (PipeCfg == USB_HOST_ISO)
+ {
+ /* Transfer Type is ISO*/
+ PipeCfg |= USB_HOST_DIR_H_IN;
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ case USB_HOST_D0USE:
+ case USB_HOST_D1USE:
+ case USB_HOST_D0DMA:
+ case USB_HOST_D1DMA:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+ }
+ else
+ {
+ /* Transfer Type is BULK or INT */
+ PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ case USB_HOST_D0USE:
+ case USB_HOST_D1USE:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D1DMA:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+#ifdef __USB_DMA_BFRE_ENABLE__
+ /* this routine cannnot be perfomred if read operation is executed in buffer size */
+ PipeCfg |= USB_HOST_BFREON;
+#endif
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+ }
+ ret = USB_HOST_PIPE_IN;
+ }
+ else /* OUT(send) */
+ {
+ if (PipeCfg == USB_HOST_ISO)
+ {
+ /* Transfer Type is ISO*/
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
+ }
+ else
+ {
+ /* Transfer Type is BULK or INT */
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+ }
+ PipeCfg |= USB_HOST_DIR_H_OUT;
+ ret = USB_HOST_PIPE_OUT;
+ }
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
+ break;
+
+ case USB_HOST_D0USE:
+ g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
+ break;
+
+ case USB_HOST_D1USE:
+ g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
+ break;
+
+ case USB_HOST_D0DMA:
+ g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
+ break;
+
+ case USB_HOST_D1DMA:
+ g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+
+ /* Endpoint number set */
+ PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
+ g_usb0_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
+
+ /* Max packet size set */
+ PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
+
+ if (PipeMaxp == 0u)
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ /* Set device address */
+ PipeMaxp |= (uint16_t)(devadr << 12);
+
+ user_table->pipe_cfg = PipeCfg;
+ user_table->pipe_max_pktsize = PipeMaxp;
+
+ usb0_host_resetEP(user_table);
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_resetEP
+* Description : Sets the end point on the information specified by the argument.
+* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
+{
+
+ uint16_t pipe;
+
+ /* Host pipe */
+ /* The pipe number of pipe definition table is obtained */
+ pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
+
+ /* FIFO port access pipe is set to initial value */
+ /* The connection with FIFO should be cut before setting the pipe */
+ if (RZA_IO_RegRead_16(&USB200.CFIFOSEL,
+ USB_CFIFOSEL_CURPIPE_SHIFT,
+ USB_CFIFOSEL_CURPIPE) == pipe)
+ {
+ usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ if (RZA_IO_RegRead_16(&USB200.D0FIFOSEL,
+ USB_DnFIFOSEL_CURPIPE_SHIFT,
+ USB_DnFIFOSEL_CURPIPE) == pipe)
+ {
+ usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ if (RZA_IO_RegRead_16(&USB200.D1FIFOSEL,
+ USB_DnFIFOSEL_CURPIPE_SHIFT,
+ USB_DnFIFOSEL_CURPIPE) == pipe)
+ {
+ usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ /* Interrupt of pipe set is disabled */
+ usb0_host_disable_brdy_int(pipe);
+ usb0_host_disable_nrdy_int(pipe);
+ usb0_host_disable_bemp_int(pipe);
+
+ /* Pipe to set is set to NAK */
+ usb0_host_set_pid_nak(pipe);
+
+ /* Pipe is set */
+ USB200.PIPESEL = pipe;
+
+ USB200.PIPECFG = tbl->pipe_cfg;
+ USB200.PIPEBUF = tbl->pipe_buf;
+ USB200.PIPEMAXP = tbl->pipe_max_pktsize;
+ USB200.PIPEPERI = tbl->pipe_cycle;
+
+ g_usb0_host_pipecfg[pipe] = tbl->pipe_cfg;
+ g_usb0_host_pipebuf[pipe] = tbl->pipe_buf;
+ g_usb0_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
+ g_usb0_host_pipeperi[pipe] = tbl->pipe_cycle;
+
+ /* Sequence bit clear */
+ usb0_host_set_sqclr(pipe);
+
+ usb0_host_aclrm(pipe);
+ usb0_host_set_csclr(pipe);
+
+ /* Pipe window selection is set to unused */
+ USB200.PIPESEL = USB_HOST_PIPE0;
+
+}
+
+#if(1) /* ohci_wrapp */
+#else
+/*******************************************************************************
+* Function Name: usb0_api_host_data_count
+* Description : Get g_usb0_host_data_count[pipe]
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t *data_count ; return g_usb0_data_count[pipe]
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb0_api_host_data_count (uint16_t pipe, uint32_t * data_count)
+{
+ if (pipe > USB_HOST_MAX_PIPE_NO)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ *data_count = g_usb0_host_PipeDataSize[pipe];
+
+ return DEVDRV_SUCCESS;
+}
+#endif
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/host/usb0_host_global.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,137 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_global.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+const uint16_t g_usb0_host_bit_set[16] =
+{
+ 0x0001, 0x0002, 0x0004, 0x0008,
+ 0x0010, 0x0020, 0x0040, 0x0080,
+ 0x0100, 0x0200, 0x0400, 0x0800,
+ 0x1000, 0x2000, 0x4000, 0x8000
+};
+
+uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
+uint8_t * g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
+
+uint16_t g_usb0_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb0_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb0_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
+uint32_t g_usb0_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
+
+USB_HOST_DMA_t g_usb0_host_DmaInfo[2];
+
+uint16_t g_usb0_host_DmaPipe[2];
+uint16_t g_usb0_host_DmaBval[2];
+uint16_t g_usb0_host_DmaStatus[2];
+
+uint16_t g_usb0_host_driver_state;
+uint16_t g_usb0_host_ConfigNum;
+uint16_t g_usb0_host_CmdStage;
+uint16_t g_usb0_host_bchg_flag;
+uint16_t g_usb0_host_detach_flag;
+uint16_t g_usb0_host_attach_flag;
+
+uint16_t g_usb0_host_UsbAddress;
+uint16_t g_usb0_host_setUsbAddress;
+uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
+uint16_t g_usb0_host_UsbDeviceSpeed;
+uint16_t g_usb0_host_SupportUsbDeviceSpeed;
+
+uint16_t g_usb0_host_SavReq;
+uint16_t g_usb0_host_SavVal;
+uint16_t g_usb0_host_SavIndx;
+uint16_t g_usb0_host_SavLen;
+
+uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_init_pipe_status
+* Description : Initialize pipe status.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_init_pipe_status (void)
+{
+ uint16_t loop;
+
+ g_usb0_host_ConfigNum = 0;
+
+ for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
+ {
+ g_usb0_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
+ g_usb0_host_PipeDataSize[loop] = 0;
+
+ /* pipe configuration in usb0_host_resetEP() */
+ g_usb0_host_pipecfg[loop] = 0;
+ g_usb0_host_pipebuf[loop] = 0;
+ g_usb0_host_pipemaxp[loop] = 0;
+ g_usb0_host_pipeperi[loop] = 0;
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/host/usb0_host_usbint.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,496 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_usbint.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#if(1) /* ohci_wrapp */
+#include "ohci_wrapp_RZ_A1_local.h"
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb0_host_interrupt1(void);
+static void usb0_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
+static void usb0_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
+static void usb0_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_interrupt
+* Description : Executes USB interrupt.
+* : Register this function in the USB interrupt handler.
+* : Set CFIF0 in the pipe set before the interrupt after executing
+* : this function.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb0_host_interrupt (uint32_t int_sense)
+{
+ uint16_t savepipe1;
+ uint16_t savepipe2;
+ uint16_t buffer;
+
+ savepipe1 = USB200.CFIFOSEL;
+ savepipe2 = USB200.PIPESEL;
+ usb0_host_interrupt1();
+
+ /* Control transmission changes ISEL within interruption processing. */
+ /* For this reason, write return of ISEL cannot be performed. */
+ buffer = USB200.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
+ USB200.CFIFOSEL = buffer;
+ USB200.PIPESEL = savepipe2;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_interrupt1
+* Description : Execue the USB interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_interrupt1 (void)
+{
+ uint16_t intsts0;
+ uint16_t intsts1;
+ uint16_t intenb0;
+ uint16_t intenb1;
+ uint16_t brdysts;
+ uint16_t nrdysts;
+ uint16_t bempsts;
+ uint16_t brdyenb;
+ uint16_t nrdyenb;
+ uint16_t bempenb;
+ volatile uint16_t dumy_sts;
+
+ intsts0 = USB200.INTSTS0;
+ intsts1 = USB200.INTSTS1;
+ intenb0 = USB200.INTENB0;
+ intenb1 = USB200.INTENB1;
+
+ if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
+ {
+ USB200.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+ g_usb0_host_bchg_flag = USB_HOST_YES;
+ }
+ else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
+ {
+ USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+#else
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+#endif
+ }
+ else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
+ {
+ USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#else
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
+#endif
+ }
+ else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
+ && ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
+ {
+ USB200.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+ g_usb0_host_detach_flag = USB_HOST_YES;
+
+ Userdef_USB_usb0_host_detach();
+
+ usb0_host_UsbDetach2();
+ }
+ else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
+ && ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
+ {
+ USB200.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+ g_usb0_host_attach_flag = USB_HOST_YES;
+
+ Userdef_USB_usb0_host_attach();
+
+ usb0_host_UsbAttach();
+ }
+ else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
+ {
+ brdysts = USB200.BRDYSTS;
+ nrdysts = USB200.NRDYSTS;
+ bempsts = USB200.BEMPSTS;
+ brdyenb = USB200.BRDYENB;
+ nrdyenb = USB200.NRDYENB;
+ bempenb = USB200.BEMPENB;
+
+ if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
+ {
+ usb0_host_BRDYInterrupt(brdysts, brdyenb);
+ }
+ else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
+ {
+ usb0_host_BEMPInterrupt(bempsts, bempenb);
+ }
+ else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
+ {
+ usb0_host_NRDYInterrupt(nrdysts, nrdyenb);
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* Three dummy read for clearing interrupt requests */
+ dumy_sts = USB200.INTSTS0;
+ dumy_sts = USB200.INTSTS1;
+
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_BRDYInterrupt
+* Description : Executes USB BRDY interrupt.
+* Arguments : uint16_t Status ; BRDYSTS Register Value
+* : uint16_t Int_enbl ; BRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t buffer;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB200.BRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
+
+#if(1) /* ohci_wrapp */
+ switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ USB200.CFIFOCTR = USB_HOST_BITBCLR;
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+#else
+ switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
+
+ switch (buffer)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ USB200.CFIFOCTR = USB_HOST_BITBCLR;
+ usb0_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+#endif
+ }
+ else
+ {
+ usb0_host_brdy_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB200.BRDYSTS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_NRDYInterrupt
+* Description : Executes USB NRDY interrupt.
+* Arguments : uint16_t Status ; NRDYSTS Register Value
+* : uint16_t Int_enbl ; NRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t pid;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB200.NRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
+ pid = usb0_host_get_pid(USB_HOST_PIPE0);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+ }
+ else if (pid == USB_HOST_PID_NAK)
+ {
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else
+ {
+ usb0_host_nrdy_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB200.NRDYSTS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_BEMPInterrupt
+* Description : Executes USB BEMP interrupt.
+* Arguments : uint16_t Status ; BEMPSTS Register Value
+* : uint16_t Int_enbl ; BEMPENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t buffer;
+ uint16_t pid;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB200.BEMPSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
+ pid = usb0_host_get_pid(USB_HOST_PIPE0);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
+#if(1) /* ohci_wrapp */
+ g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+#if(1) /* ohci_wrapp */
+ switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ case USB_HOST_WRITEEND: /* End of data write (zero-length) */
+ break;
+
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+#else
+ switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ case USB_HOST_WRITEEND: /* End of data write (zero-length) */
+ break;
+
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+#endif
+ }
+ }
+ else
+ {
+ usb0_host_bemp_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB200.BEMPSTS;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/host/usb0_host_usbsig.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,637 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_usbsig.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb0_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb0_host_EnableINT_Module(void);
+static void usb0_host_Enable_AttachINT(void);
+static void usb0_host_Disable_AttachINT(void);
+static void usb0_host_Disable_BchgINT(void);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb0_host_InitModule
+* Description : Initializes the USB module in USB host module.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_InitModule (void)
+{
+ uint16_t buf1;
+ uint16_t buf2;
+ uint16_t buf3;
+
+ usb0_host_init_pipe_status();
+
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 1,
+ USB_SYSCFG_DCFM_SHIFT,
+ USB_SYSCFG_DCFM); /* HOST mode */
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 1,
+ USB_SYSCFG_DRPD_SHIFT,
+ USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
+
+ do
+ {
+ buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb0_host_delay_xms(50);
+ buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb0_host_delay_xms(50);
+ buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+
+ } while ((buf1 != buf2) || (buf1 != buf3));
+
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 1,
+ USB_SYSCFG_USBE_SHIFT,
+ USB_SYSCFG_USBE);
+
+ USB200.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+ USB200.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+ USB200.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_CheckAttach
+* Description : Returns the USB device connection state.
+* Arguments : none
+* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
+* : ; USB_HOST_DETACH : not Attached
+*******************************************************************************/
+uint16_t usb0_host_CheckAttach (void)
+{
+ uint16_t buf1;
+ uint16_t buf2;
+ uint16_t buf3;
+ uint16_t rhst;
+
+ do
+ {
+ buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb0_host_delay_xms(50);
+ buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb0_host_delay_xms(50);
+ buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+
+ } while ((buf1 != buf2) || (buf1 != buf3));
+
+ rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (rhst == USB_HOST_UNDECID)
+ {
+ if (buf1 == USB_HOST_FS_JSTS)
+ {
+ if (g_usb0_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
+ {
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 1,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ }
+ return USB_HOST_ATTACH;
+ }
+ else if (buf1 == USB_HOST_LS_JSTS)
+ {
+ /* Low Speed Device */
+ RZA_IO_RegWrite_16(&USB200.SYSCFG0,
+ 0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ return USB_HOST_ATTACH;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
+ {
+ return USB_HOST_ATTACH;
+ }
+ else if (rhst == USB_HOST_LSMODE)
+ {
+ return USB_HOST_ATTACH;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ return USB_HOST_DETACH;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbAttach
+* Description : Connects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_UsbAttach (void)
+{
+ usb0_host_EnableINT_Module();
+ usb0_host_Disable_BchgINT();
+ usb0_host_Disable_AttachINT();
+ usb0_host_Enable_DetachINT();
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbDetach
+* Description : Disconnects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_UsbDetach (void)
+{
+ uint16_t pipe;
+ uint16_t devadr;
+
+ g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
+
+ /* Terminate all the pipes in which communications on port */
+ /* are currently carried out */
+ for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
+ {
+ if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
+ {
+ if (pipe == USB_HOST_PIPE0)
+ {
+ devadr = RZA_IO_RegRead_16(&USB200.DCPMAXP,
+ USB_DCPMAXP_DEVSEL_SHIFT,
+ USB_DCPMAXP_DEVSEL);
+ }
+ else
+ {
+ devadr = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
+ }
+
+ if (devadr == g_usb0_host_UsbAddress)
+ {
+ usb0_host_stop_transfer(pipe);
+ }
+
+ g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
+ }
+ }
+
+ g_usb0_host_ConfigNum = 0;
+ g_usb0_host_UsbAddress = 0;
+ g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
+
+ usb0_host_UsbDetach2();
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbDetach2
+* Description : Disconnects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_UsbDetach2 (void)
+{
+ usb0_host_Disable_DetachINT();
+ usb0_host_Disable_BchgINT();
+ usb0_host_Enable_AttachINT();
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbBusReset
+* Description : Issues the USB bus reset signal.
+* Arguments : none
+* Return Value : uint16_t ; RHST
+*******************************************************************************/
+uint16_t usb0_host_UsbBusReset (void)
+{
+ uint16_t buffer;
+ uint16_t loop;
+
+ RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
+ 1,
+ USB_DVSTCTR0_USBRST_SHIFT,
+ USB_DVSTCTR0_USBRST);
+ RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
+ 0,
+ USB_DVSTCTR0_UACT_SHIFT,
+ USB_DVSTCTR0_UACT);
+
+ Userdef_USB_usb0_host_delay_xms(50);
+
+ buffer = USB200.DVSTCTR0;
+ buffer &= (uint16_t)(~(USB_HOST_BITRST));
+ buffer |= USB_HOST_BITUACT;
+ USB200.DVSTCTR0 = buffer;
+
+ Userdef_USB_usb0_host_delay_xms(20);
+
+ for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
+ {
+ buffer = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (buffer == USB_HOST_HSPROC)
+ {
+ Userdef_USB_usb0_host_delay_xms(10);
+ }
+ else
+ {
+ break;
+ }
+ }
+
+ return buffer;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbResume
+* Description : Issues the USB resume signal.
+* Arguments : none
+* Return Value : int32_t ; DEVDRV_SUCCESS
+* : ; DEVDRV_ERROR
+*******************************************************************************/
+int32_t usb0_host_UsbResume (void)
+{
+ uint16_t buf;
+
+ if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
+ {
+ /* not SUSPEND */
+ return DEVDRV_ERROR;
+ }
+
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+ RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
+ 1,
+ USB_DVSTCTR0_RESUME_SHIFT,
+ USB_DVSTCTR0_RESUME);
+ Userdef_USB_usb0_host_delay_xms(20);
+
+ buf = USB200.DVSTCTR0;
+ buf &= (uint16_t)(~(USB_HOST_BITRESUME));
+ buf |= USB_HOST_BITUACT;
+ USB200.DVSTCTR0 = buf;
+
+ g_usb0_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_UsbSuspend
+* Description : Issues the USB suspend signal.
+* Arguments : none
+* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
+* : ; DEVDRV_ERROR :SUSPEND
+*******************************************************************************/
+int32_t usb0_host_UsbSuspend (void)
+{
+ uint16_t buf;
+
+ if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
+ {
+ /* SUSPEND */
+ return DEVDRV_ERROR;
+ }
+
+ RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
+ 0,
+ USB_DVSTCTR0_UACT_SHIFT,
+ USB_DVSTCTR0_UACT);
+
+ Userdef_USB_usb0_host_delay_xms(5);
+
+ buf = RZA_IO_RegRead_16(&USB200.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
+ {
+ usb0_host_UsbDetach();
+ }
+ else
+ {
+ g_usb0_host_driver_state |= USB_HOST_DRV_SUSPEND;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_Enable_DetachINT
+* Description : Enables the USB disconnection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_Enable_DetachINT (void)
+{
+ USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 1,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_Disable_DetachINT
+* Description : Disables the USB disconnection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_Disable_DetachINT (void)
+{
+ USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_Enable_AttachINT
+* Description : Enables the USB connection detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_Enable_AttachINT (void)
+{
+ USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 1,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_Disable_AttachINT
+* Description : Disables the USB connection detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_Disable_AttachINT (void)
+{
+ USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_Disable_BchgINT
+* Description : Disables the USB bus change detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_Disable_BchgINT (void)
+{
+ USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
+ RZA_IO_RegWrite_16(&USB200.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_set_devadd
+* Description : DEVADDn register is set by specified value
+* Arguments : uint16_t addr : Device address
+* : uint16_t *devadd : Set value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_set_devadd (uint16_t addr, uint16_t * devadd)
+{
+ uint16_t * ptr;
+ uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
+
+ switch (addr)
+ {
+ case USB_HOST_DEVICE_0:
+ ptr = (uint16_t *)&USB200.DEVADD0;
+ break;
+
+ case USB_HOST_DEVICE_1:
+ ptr = (uint16_t *)&USB200.DEVADD1;
+ break;
+
+ case USB_HOST_DEVICE_2:
+ ptr = (uint16_t *)&USB200.DEVADD2;
+ break;
+
+ case USB_HOST_DEVICE_3:
+ ptr = (uint16_t *)&USB200.DEVADD3;
+ break;
+
+ case USB_HOST_DEVICE_4:
+ ptr = (uint16_t *)&USB200.DEVADD4;
+ break;
+
+ case USB_HOST_DEVICE_5:
+ ptr = (uint16_t *)&USB200.DEVADD5;
+ break;
+
+ case USB_HOST_DEVICE_6:
+ ptr = (uint16_t *)&USB200.DEVADD6;
+ break;
+
+ case USB_HOST_DEVICE_7:
+ ptr = (uint16_t *)&USB200.DEVADD7;
+ break;
+
+ case USB_HOST_DEVICE_8:
+ ptr = (uint16_t *)&USB200.DEVADD8;
+ break;
+
+ case USB_HOST_DEVICE_9:
+ ptr = (uint16_t *)&USB200.DEVADD9;
+ break;
+
+ case USB_HOST_DEVICE_10:
+ ptr = (uint16_t *)&USB200.DEVADDA;
+ break;
+
+ default:
+ ret_flag = DEVDRV_FLAG_OFF;
+ break;
+ }
+
+ if (ret_flag == DEVDRV_FLAG_ON)
+ {
+ *ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_get_devadd
+* Description : DEVADDn register is obtained
+* Arguments : uint16_t addr : Device address
+* : uint16_t *devadd : USB_HOST_DEVADD register value
+* Return Value : none
+*******************************************************************************/
+void usb0_host_get_devadd (uint16_t addr, uint16_t * devadd)
+{
+ uint16_t * ptr;
+ uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
+
+ switch (addr)
+ {
+ case USB_HOST_DEVICE_0:
+ ptr = (uint16_t *)&USB200.DEVADD0;
+ break;
+
+ case USB_HOST_DEVICE_1:
+ ptr = (uint16_t *)&USB200.DEVADD1;
+ break;
+
+ case USB_HOST_DEVICE_2:
+ ptr = (uint16_t *)&USB200.DEVADD2;
+ break;
+
+ case USB_HOST_DEVICE_3:
+ ptr = (uint16_t *)&USB200.DEVADD3;
+ break;
+
+ case USB_HOST_DEVICE_4:
+ ptr = (uint16_t *)&USB200.DEVADD4;
+ break;
+
+ case USB_HOST_DEVICE_5:
+ ptr = (uint16_t *)&USB200.DEVADD5;
+ break;
+
+ case USB_HOST_DEVICE_6:
+ ptr = (uint16_t *)&USB200.DEVADD6;
+ break;
+
+ case USB_HOST_DEVICE_7:
+ ptr = (uint16_t *)&USB200.DEVADD7;
+ break;
+
+ case USB_HOST_DEVICE_8:
+ ptr = (uint16_t *)&USB200.DEVADD8;
+ break;
+
+ case USB_HOST_DEVICE_9:
+ ptr = (uint16_t *)&USB200.DEVADD9;
+ break;
+
+ case USB_HOST_DEVICE_10:
+ ptr = (uint16_t *)&USB200.DEVADDA;
+ break;
+
+ default:
+ ret_flag = DEVDRV_FLAG_OFF;
+ break;
+ }
+
+ if (ret_flag == DEVDRV_FLAG_ON)
+ {
+ *devadd = *ptr;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_EnableINT_Module
+* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
+* : Enables NRDY/BEMP interrupt in the pipe0.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb0_host_EnableINT_Module (void)
+{
+ uint16_t buf;
+
+ buf = USB200.INTENB0;
+ buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
+ USB200.INTENB0 = buf;
+
+ buf = USB200.INTENB1;
+ buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
+ USB200.INTENB1 = buf;
+
+ usb0_host_enable_nrdy_int(USB_HOST_PIPE0);
+ usb0_host_enable_bemp_int(USB_HOST_PIPE0);
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/userdef/usb0_host_dmacdrv.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,698 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_dmacdrv.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "r_typedefs.h"
+#include "iodefine.h"
+#include "rza_io_regrw.h"
+#include "usb0_host_dmacdrv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
+
+/* ==== Request setting information for on-chip peripheral module ==== */
+typedef enum dmac_peri_req_reg_type
+{
+ DMAC_REQ_MID,
+ DMAC_REQ_RID,
+ DMAC_REQ_AM,
+ DMAC_REQ_LVL,
+ DMAC_REQ_REQD
+} dmac_peri_req_reg_type_t;
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+/* ==== Prototype declaration ==== */
+
+/* ==== Global variable ==== */
+/* On-chip peripheral module request setting table */
+static const uint8_t usb0_host_dmac_peri_req_init_table[8][5] =
+{
+ /* MID,RID, AM,LVL,REQD */
+ { 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
+ { 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
+ { 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
+ { 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
+ { 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
+ { 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
+ { 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
+ { 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
+};
+
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC1_PeriReqInit
+* Description : Sets the register mode for DMA mode and the on-chip peripheral
+* : module request for transfer request for DMAC channel 1.
+* : Executes DMAC initial setting using the DMA information
+* : specified by the argument *trans_info and the enabled/disabled
+* : continuous transfer specified by the argument continuation.
+* : Registers DMAC channel 1 interrupt handler function and sets
+* : the interrupt priority level. Then enables transfer completion
+* : interrupt.
+* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
+* : : register
+* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
+* : uint32_t continuation : Set continuous transfer to be valid
+* : : after DMA transfer has been completed
+* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
+* : DMAC_SAMPLE_SINGLE : Do not execute continuous
+* : : transfer
+* : uint32_t request_factor : Factor for on-chip peripheral module
+* : : request
+* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
+* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
+* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
+* : :
+* : uint32_t req_direction : Setting value of CHCFG_n register
+* : : REQD bit
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC1_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction)
+{
+ /* ==== Register mode ==== */
+ if (DMAC_MODE_REGISTER == dmamode)
+ {
+ /* ==== Next0 register set ==== */
+ DMAC1.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
+ DMAC1.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
+ DMAC1.N0TB_n = trans_info->count; /* Total transfer byte count */
+
+ /* DAD : Transfer destination address counting direction */
+ /* SAD : Transfer source address counting direction */
+ /* DDS : Transfer destination transfer size */
+ /* SDS : Transfer source transfer size */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ trans_info->daddr_dir,
+ DMAC1_CHCFG_n_DAD_SHIFT,
+ DMAC1_CHCFG_n_DAD);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ trans_info->saddr_dir,
+ DMAC1_CHCFG_n_SAD_SHIFT,
+ DMAC1_CHCFG_n_SAD);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ trans_info->dst_size,
+ DMAC1_CHCFG_n_DDS_SHIFT,
+ DMAC1_CHCFG_n_DDS);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ trans_info->src_size,
+ DMAC1_CHCFG_n_SDS_SHIFT,
+ DMAC1_CHCFG_n_SDS);
+
+ /* DMS : Register mode */
+ /* RSEL : Select Next0 register set */
+ /* SBE : No discharge of buffer data when aborted */
+ /* DEM : No DMA interrupt mask */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_DMS_SHIFT,
+ DMAC1_CHCFG_n_DMS);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_RSEL_SHIFT,
+ DMAC1_CHCFG_n_RSEL);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_SBE_SHIFT,
+ DMAC1_CHCFG_n_SBE);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_DEM_SHIFT,
+ DMAC1_CHCFG_n_DEM);
+
+ /* ---- Continuous transfer ---- */
+ if (DMAC_SAMPLE_CONTINUATION == continuation)
+ {
+ /* REN : Execute continuous transfer */
+ /* RSW : Change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 1,
+ DMAC1_CHCFG_n_REN_SHIFT,
+ DMAC1_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 1,
+ DMAC1_CHCFG_n_RSW_SHIFT,
+ DMAC1_CHCFG_n_RSW);
+ }
+ /* ---- Single transfer ---- */
+ else
+ {
+ /* REN : Do not execute continuous transfer */
+ /* RSW : Do not change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_REN_SHIFT,
+ DMAC1_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_RSW_SHIFT,
+ DMAC1_CHCFG_n_RSW);
+ }
+
+ /* TM : Single transfer */
+ /* SEL : Channel setting */
+ /* HIEN, LOEN : On-chip peripheral module request */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_TM_SHIFT,
+ DMAC1_CHCFG_n_TM);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 1,
+ DMAC1_CHCFG_n_SEL_SHIFT,
+ DMAC1_CHCFG_n_SEL);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 1,
+ DMAC1_CHCFG_n_HIEN_SHIFT,
+ DMAC1_CHCFG_n_HIEN);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ 0,
+ DMAC1_CHCFG_n_LOEN_SHIFT,
+ DMAC1_CHCFG_n_LOEN);
+
+ /* ---- Set factor by specified on-chip peripheral module request ---- */
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
+ DMAC1_CHCFG_n_AM_SHIFT,
+ DMAC1_CHCFG_n_AM);
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
+ DMAC1_CHCFG_n_LVL_SHIFT,
+ DMAC1_CHCFG_n_LVL);
+ if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
+ {
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
+ DMAC1_CHCFG_n_REQD_SHIFT,
+ DMAC1_CHCFG_n_REQD);
+ }
+ else
+ {
+ RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
+ req_direction,
+ DMAC1_CHCFG_n_REQD_SHIFT,
+ DMAC1_CHCFG_n_REQD);
+ }
+ RZA_IO_RegWrite_32(&DMAC01.DMARS,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
+ DMAC01_DMARS_CH1_RID_SHIFT,
+ DMAC01_DMARS_CH1_RID);
+ RZA_IO_RegWrite_32(&DMAC01.DMARS,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
+ DMAC01_DMARS_CH1_MID_SHIFT,
+ DMAC01_DMARS_CH1_MID);
+
+ /* PR : Round robin mode */
+ RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
+ 1,
+ DMAC07_DCTRL_0_7_PR_SHIFT,
+ DMAC07_DCTRL_0_7_PR);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC1_Open
+* Description : Enables DMAC channel 1 transfer.
+* Arguments : uint32_t req : DMAC request mode
+* Return Value : 0 : Succeeded in enabling DMA transfer
+* : -1 : Failed to enable DMA transfer (due to DMA operation)
+*******************************************************************************/
+int32_t usb0_host_DMAC1_Open (uint32_t req)
+{
+ int32_t ret;
+ volatile uint8_t dummy;
+
+ /* Transferable? */
+ if ((0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
+ DMAC1_CHSTAT_n_EN_SHIFT,
+ DMAC1_CHSTAT_n_EN)) &&
+ (0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
+ DMAC1_CHSTAT_n_TACT_SHIFT,
+ DMAC1_CHSTAT_n_TACT)))
+ {
+ /* Clear Channel Status Register */
+ RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
+ 1,
+ DMAC1_CHCTRL_n_SWRST_SHIFT,
+ DMAC1_CHCTRL_n_SWRST);
+ dummy = RZA_IO_RegRead_32(&DMAC1.CHCTRL_n,
+ DMAC1_CHCTRL_n_SWRST_SHIFT,
+ DMAC1_CHCTRL_n_SWRST);
+ /* Enable DMA transfer */
+ RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
+ 1,
+ DMAC1_CHCTRL_n_SETEN_SHIFT,
+ DMAC1_CHCTRL_n_SETEN);
+
+ /* ---- Request by software ---- */
+ if (DMAC_REQ_MODE_SOFT == req)
+ {
+ /* DMA transfer Request by software */
+ RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
+ 1,
+ DMAC1_CHCTRL_n_STG_SHIFT,
+ DMAC1_CHCTRL_n_STG);
+ }
+
+ ret = 0;
+ }
+ else
+ {
+ ret = -1;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC1_Close
+* Description : Aborts DMAC channel 1 transfer. Returns the remaining transfer
+* : byte count at the time of DMA transfer abort to the argument
+* : *remain.
+* Arguments : uint32_t * remain : Remaining transfer byte count when
+* : : DMA transfer is aborted
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC1_Close (uint32_t * remain)
+{
+
+ /* ==== Abort transfer ==== */
+ RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
+ 1,
+ DMAC1_CHCTRL_n_CLREN_SHIFT,
+ DMAC1_CHCTRL_n_CLREN);
+
+ while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
+ DMAC1_CHSTAT_n_TACT_SHIFT,
+ DMAC1_CHSTAT_n_TACT))
+ {
+ /* Loop until transfer is aborted */
+ }
+
+ while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
+ DMAC1_CHSTAT_n_EN_SHIFT,
+ DMAC1_CHSTAT_n_EN))
+ {
+ /* Loop until 0 is set in EN before checking the remaining transfer byte count */
+ }
+ /* ==== Obtain remaining transfer byte count ==== */
+ *remain = DMAC1.CRTB_n;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC1_Load_Set
+* Description : Sets the transfer source address, transfer destination
+* : address, and total transfer byte count respectively
+* : specified by the argument src_addr, dst_addr, and count to
+* : DMAC channel 1 as DMA transfer information.
+* : Sets the register set selected by the CHCFG_n register
+* : RSEL bit from the Next0 or Next1 register set.
+* : This function should be called when DMA transfer of DMAC
+* : channel 1 is aboted.
+* Arguments : uint32_t src_addr : Transfer source address
+* : uint32_t dst_addr : Transfer destination address
+* : uint32_t count : Total transfer byte count
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC1_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
+{
+ uint8_t reg_set;
+
+ /* Obtain register set in use */
+ reg_set = RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
+ DMAC1_CHSTAT_n_SR_SHIFT,
+ DMAC1_CHSTAT_n_SR);
+
+ /* ==== Load ==== */
+ if (0 == reg_set)
+ {
+ /* ---- Next0 Register Set ---- */
+ DMAC1.N0SA_n = src_addr; /* Start address of transfer source */
+ DMAC1.N0DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC1.N0TB_n = count; /* Total transfer byte count */
+ }
+ else
+ {
+ /* ---- Next1 Register Set ---- */
+ DMAC1.N1SA_n = src_addr; /* Start address of transfer source */
+ DMAC1.N1DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC1.N1TB_n = count; /* Total transfer byte count */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC2_PeriReqInit
+* Description : Sets the register mode for DMA mode and the on-chip peripheral
+* : module request for transfer request for DMAC channel 2.
+* : Executes DMAC initial setting using the DMA information
+* : specified by the argument *trans_info and the enabled/disabled
+* : continuous transfer specified by the argument continuation.
+* : Registers DMAC channel 2 interrupt handler function and sets
+* : the interrupt priority level. Then enables transfer completion
+* : interrupt.
+* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
+* : : register
+* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
+* : uint32_t continuation : Set continuous transfer to be valid
+* : : after DMA transfer has been completed
+* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
+* : DMAC_SAMPLE_SINGLE : Do not execute continuous
+* : : transfer
+* : uint32_t request_factor : Factor for on-chip peripheral module
+* : : request
+* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
+* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
+* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
+* : :
+* : uint32_t req_direction : Setting value of CHCFG_n register
+* : : REQD bit
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC2_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction)
+{
+ /* ==== Register mode ==== */
+ if (DMAC_MODE_REGISTER == dmamode)
+ {
+ /* ==== Next0 register set ==== */
+ DMAC2.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
+ DMAC2.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
+ DMAC2.N0TB_n = trans_info->count; /* Total transfer byte count */
+
+ /* DAD : Transfer destination address counting direction */
+ /* SAD : Transfer source address counting direction */
+ /* DDS : Transfer destination transfer size */
+ /* SDS : Transfer source transfer size */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ trans_info->daddr_dir,
+ DMAC2_CHCFG_n_DAD_SHIFT,
+ DMAC2_CHCFG_n_DAD);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ trans_info->saddr_dir,
+ DMAC2_CHCFG_n_SAD_SHIFT,
+ DMAC2_CHCFG_n_SAD);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ trans_info->dst_size,
+ DMAC2_CHCFG_n_DDS_SHIFT,
+ DMAC2_CHCFG_n_DDS);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ trans_info->src_size,
+ DMAC2_CHCFG_n_SDS_SHIFT,
+ DMAC2_CHCFG_n_SDS);
+
+ /* DMS : Register mode */
+ /* RSEL : Select Next0 register set */
+ /* SBE : No discharge of buffer data when aborted */
+ /* DEM : No DMA interrupt mask */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_DMS_SHIFT,
+ DMAC2_CHCFG_n_DMS);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_RSEL_SHIFT,
+ DMAC2_CHCFG_n_RSEL);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_SBE_SHIFT,
+ DMAC2_CHCFG_n_SBE);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_DEM_SHIFT,
+ DMAC2_CHCFG_n_DEM);
+
+ /* ---- Continuous transfer ---- */
+ if (DMAC_SAMPLE_CONTINUATION == continuation)
+ {
+ /* REN : Execute continuous transfer */
+ /* RSW : Change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 1,
+ DMAC2_CHCFG_n_REN_SHIFT,
+ DMAC2_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 1,
+ DMAC2_CHCFG_n_RSW_SHIFT,
+ DMAC2_CHCFG_n_RSW);
+ }
+ /* ---- Single transfer ---- */
+ else
+ {
+ /* REN : Do not execute continuous transfer */
+ /* RSW : Do not change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_REN_SHIFT,
+ DMAC2_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_RSW_SHIFT,
+ DMAC2_CHCFG_n_RSW);
+ }
+
+ /* TM : Single transfer */
+ /* SEL : Channel setting */
+ /* HIEN, LOEN : On-chip peripheral module request */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_TM_SHIFT,
+ DMAC2_CHCFG_n_TM);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 2,
+ DMAC2_CHCFG_n_SEL_SHIFT,
+ DMAC2_CHCFG_n_SEL);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 1,
+ DMAC2_CHCFG_n_HIEN_SHIFT,
+ DMAC2_CHCFG_n_HIEN);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ 0,
+ DMAC2_CHCFG_n_LOEN_SHIFT,
+ DMAC2_CHCFG_n_LOEN);
+
+ /* ---- Set factor by specified on-chip peripheral module request ---- */
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
+ DMAC2_CHCFG_n_AM_SHIFT,
+ DMAC2_CHCFG_n_AM);
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
+ DMAC2_CHCFG_n_LVL_SHIFT,
+ DMAC2_CHCFG_n_LVL);
+ if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
+ {
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
+ DMAC2_CHCFG_n_REQD_SHIFT,
+ DMAC2_CHCFG_n_REQD);
+ }
+ else
+ {
+ RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
+ req_direction,
+ DMAC2_CHCFG_n_REQD_SHIFT,
+ DMAC2_CHCFG_n_REQD);
+ }
+ RZA_IO_RegWrite_32(&DMAC23.DMARS,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
+ DMAC23_DMARS_CH2_RID_SHIFT,
+ DMAC23_DMARS_CH2_RID);
+ RZA_IO_RegWrite_32(&DMAC23.DMARS,
+ usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
+ DMAC23_DMARS_CH2_MID_SHIFT,
+ DMAC23_DMARS_CH2_MID);
+
+ /* PR : Round robin mode */
+ RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
+ 1,
+ DMAC07_DCTRL_0_7_PR_SHIFT,
+ DMAC07_DCTRL_0_7_PR);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC2_Open
+* Description : Enables DMAC channel 2 transfer.
+* Arguments : uint32_t req : DMAC request mode
+* Return Value : 0 : Succeeded in enabling DMA transfer
+* : -1 : Failed to enable DMA transfer (due to DMA operation)
+*******************************************************************************/
+int32_t usb0_host_DMAC2_Open (uint32_t req)
+{
+ int32_t ret;
+ volatile uint8_t dummy;
+
+ /* Transferable? */
+ if ((0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
+ DMAC2_CHSTAT_n_EN_SHIFT,
+ DMAC2_CHSTAT_n_EN)) &&
+ (0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
+ DMAC2_CHSTAT_n_TACT_SHIFT,
+ DMAC2_CHSTAT_n_TACT)))
+ {
+ /* Clear Channel Status Register */
+ RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
+ 1,
+ DMAC2_CHCTRL_n_SWRST_SHIFT,
+ DMAC2_CHCTRL_n_SWRST);
+ dummy = RZA_IO_RegRead_32(&DMAC2.CHCTRL_n,
+ DMAC2_CHCTRL_n_SWRST_SHIFT,
+ DMAC2_CHCTRL_n_SWRST);
+ /* Enable DMA transfer */
+ RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
+ 1,
+ DMAC2_CHCTRL_n_SETEN_SHIFT,
+ DMAC2_CHCTRL_n_SETEN);
+
+ /* ---- Request by software ---- */
+ if (DMAC_REQ_MODE_SOFT == req)
+ {
+ /* DMA transfer Request by software */
+ RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
+ 1,
+ DMAC2_CHCTRL_n_STG_SHIFT,
+ DMAC2_CHCTRL_n_STG);
+ }
+
+ ret = 0;
+ }
+ else
+ {
+ ret = -1;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC2_Close
+* Description : Aborts DMAC channel 2 transfer. Returns the remaining transfer
+* : byte count at the time of DMA transfer abort to the argument
+* : *remain.
+* Arguments : uint32_t * remain : Remaining transfer byte count when
+* : : DMA transfer is aborted
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC2_Close (uint32_t * remain)
+{
+
+ /* ==== Abort transfer ==== */
+ RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
+ 1,
+ DMAC2_CHCTRL_n_CLREN_SHIFT,
+ DMAC2_CHCTRL_n_CLREN);
+
+ while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
+ DMAC2_CHSTAT_n_TACT_SHIFT,
+ DMAC2_CHSTAT_n_TACT))
+ {
+ /* Loop until transfer is aborted */
+ }
+
+ while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
+ DMAC2_CHSTAT_n_EN_SHIFT,
+ DMAC2_CHSTAT_n_EN))
+ {
+ /* Loop until 0 is set in EN before checking the remaining transfer byte count */
+ }
+ /* ==== Obtain remaining transfer byte count ==== */
+ *remain = DMAC2.CRTB_n;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_DMAC2_Load_Set
+* Description : Sets the transfer source address, transfer destination
+* : address, and total transfer byte count respectively
+* : specified by the argument src_addr, dst_addr, and count to
+* : DMAC channel 2 as DMA transfer information.
+* : Sets the register set selected by the CHCFG_n register
+* : RSEL bit from the Next0 or Next1 register set.
+* : This function should be called when DMA transfer of DMAC
+* : channel 2 is aboted.
+* Arguments : uint32_t src_addr : Transfer source address
+* : uint32_t dst_addr : Transfer destination address
+* : uint32_t count : Total transfer byte count
+* Return Value : none
+*******************************************************************************/
+void usb0_host_DMAC2_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
+{
+ uint8_t reg_set;
+
+ /* Obtain register set in use */
+ reg_set = RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
+ DMAC2_CHSTAT_n_SR_SHIFT,
+ DMAC2_CHSTAT_n_SR);
+
+ /* ==== Load ==== */
+ if (0 == reg_set)
+ {
+ /* ---- Next0 Register Set ---- */
+ DMAC2.N0SA_n = src_addr; /* Start address of transfer source */
+ DMAC2.N0DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC2.N0TB_n = count; /* Total transfer byte count */
+ }
+ else
+ {
+ /* ---- Next1 Register Set ---- */
+ DMAC2.N1SA_n = src_addr; /* Start address of transfer source */
+ DMAC2.N1DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC2.N1TB_n = count; /* Total transfer byte count */
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb0/src/userdef/usb0_host_userdef.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,778 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb0_host_userdef.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include <stdio.h>
+#include "cmsis_os.h"
+#include "r_typedefs.h"
+#include "iodefine.h"
+#include "devdrv_usb_host_api.h"
+#include "usb0_host.h"
+#include "MBRZA1H.h" /* INTC Driver Header */
+#include "usb0_host_dmacdrv.h"
+#include "ohci_wrapp_RZ_A1_local.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+#define DUMMY_ACCESS OSTM0CNT
+
+/* #define CACHE_WRITEBACK */
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+extern int32_t io_cwb(unsigned long start, unsigned long end);
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb0_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
+static void usb0_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
+static void Userdef_USB_usb0_host_delay_10us_2(void);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_d0fifo_dmaintid
+* Description : get D0FIFO DMA Interrupt ID
+* Arguments : none
+* Return Value : D0FIFO DMA Interrupt ID
+*******************************************************************************/
+uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
+{
+#if(1) /* ohci_wrapp */
+ return 0xFFFF;
+#else
+ return DMAINT1_IRQn;
+#endif
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_d1fifo_dmaintid
+* Description : get D1FIFO DMA Interrupt ID
+* Arguments : none
+* Return Value : D1FIFO DMA Interrupt ID
+*******************************************************************************/
+uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid (void)
+{
+#if(1) /* ohci_wrapp */
+ return 0xFFFF;
+#else
+ return DMAINT2_IRQn;
+#endif
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_attach
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_attach (void)
+{
+// printf("\n");
+// printf("channel 0 attach device\n");
+// printf("\n");
+ ohciwrapp_loc_Connect(1);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_detach
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_detach (void)
+{
+// printf("\n");
+// printf("channel 0 detach device\n");
+// printf("\n");
+ ohciwrapp_loc_Connect(0);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_delay_1ms
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_delay_1ms (void)
+{
+ osDelay(1);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_delay_xms
+* Description : Wait for the software in the period of time specified by the
+* : argument.
+* : Alter this function according to the user's system.
+* Arguments : uint32_t msec ; Wait Time (msec)
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_delay_xms (uint32_t msec)
+{
+ osDelay(msec);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_delay_10us
+* Description : Waits for software for the period specified by the argument.
+* : Alter this function according to the user's system.
+* Arguments : uint32_t usec ; Wait Time(x 10usec)
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_delay_10us (uint32_t usec)
+{
+ volatile int i;
+
+ /* Wait 10us (Please change for your MCU) */
+ for (i = 0; i < usec; ++i)
+ {
+ Userdef_USB_usb0_host_delay_10us_2();
+ }
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_delay_10us_2
+* Description : Waits for software for the period specified by the argument.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+static void Userdef_USB_usb0_host_delay_10us_2 (void)
+{
+ volatile int i;
+ volatile unsigned long tmp;
+
+ /* Wait 1us (Please change for your MCU) */
+ for (i = 0; i < 14; ++i)
+ {
+ tmp = DUMMY_ACCESS;
+ }
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_delay_500ns
+* Description : Wait for software for 500ns.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_delay_500ns (void)
+{
+ volatile int i;
+ volatile unsigned long tmp;
+
+ /* Wait 500ns (Please change for your MCU) */
+ /* Wait 500ns I clock 266MHz */
+ tmp = DUMMY_ACCESS;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_start_dma
+* Description : Enables DMA transfer on the information specified by the argument.
+* : Set DMAC register by this function to enable DMA transfer.
+* : After executing this function, USB module is set to start DMA
+* : transfer. DMA transfer should not wait for DMA transfer complete.
+* Arguments : USB_HOST_DMA_t *dma : DMA parameter
+* : typedef struct{
+* : uint32_t fifo; FIFO for using
+* : uint32_t buffer; Start address of transfer source/destination
+* : uint32_t bytes; Transfer size(Byte)
+* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
+* : uint32_t size; DMA transfer size
+* : } USB_HOST_DMA_t;
+* : uint16_t dfacc ; 0 : cycle steal mode
+* : 1 : 16byte continuous mode
+* : 2 : 32byte continuous mode
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
+{
+ uint32_t trncount;
+ uint32_t src;
+ uint32_t dst;
+ uint32_t size;
+ uint32_t dir;
+#ifdef CACHE_WRITEBACK
+ uint32_t ptr;
+#endif
+
+ trncount = dma->bytes;
+ dir = dma->dir;
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ /* DxFIFO determination */
+ dst = dma->buffer;
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ size = dma->size;
+
+ if (size == 0)
+ {
+ src += 3; /* byte access */
+ }
+ else if (size == 1)
+ {
+ src += 2; /* short access */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+#else
+ size = dma->size;
+
+ if (size == 2)
+ {
+ /* 32bit access */
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFOB0);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFOB0);
+ }
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFOB0);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFOB0);
+ }
+ }
+ else
+ {
+ /* normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ }
+ }
+ else if (size == 1)
+ {
+ /* 16bit access */
+ dfacc = 0; /* force normal access */
+
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ src += 2; /* short access */
+ }
+ else
+ {
+ /* 8bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ src += 3; /* byte access */
+ }
+#endif
+ }
+ else
+ {
+ /* DxFIFO determination */
+ src = dma->buffer;
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ size = dma->size;
+
+ if (size == 0)
+ {
+ dst += 3; /* byte access */
+ }
+ else if (size == 1)
+ {
+ dst += 2; /* short access */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+#else
+ size = dma->size;
+ if (size == 2)
+ {
+ /* 32bit access */
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFOB0);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFOB0);
+ }
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFOB0);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFOB0);
+ }
+ }
+ else
+ {
+ /* normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ }
+ }
+ else if (size == 1)
+ {
+ /* 16bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ dst += 2; /* short access */
+ }
+ else
+ {
+ /* 8bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB200.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB200.D1FIFO.UINT32);
+ }
+ dst += 3; /* byte access */
+ }
+#endif
+ }
+
+#ifdef CACHE_WRITEBACK
+ ptr = (uint32_t)dma->buffer;
+ if ((ptr & 0x20000000ul) == 0)
+ {
+ io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
+ }
+#endif
+
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ usb0_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
+ }
+ else
+ {
+ usb0_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_enable_dmac0
+* Description : Enables DMA transfer on the information specified by the argument.
+* Arguments : uint32_t src : src address
+* : uint32_t dst : dst address
+* : uint32_t count : transfer byte
+* : uint32_t size : transfer size
+* : uint32_t dir : direction
+* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
+* : uint16_t dfacc : 0 : normal access
+* : : 1 : 16byte access
+* : : 2 : 32byte access
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
+{
+ dmac_transinfo_t trans_info;
+ uint32_t request_factor = 0;
+ int32_t ret;
+
+ /* ==== Variable setting for DMAC initialization ==== */
+ trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
+ trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
+ trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+#else
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
+ }
+ else
+ {
+ /* normal access */
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+ }
+#endif
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ request_factor = DMAC_REQ_USB0_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
+ }
+ else if (dir == USB_HOST_BUF2FIFO)
+ {
+ request_factor = DMAC_REQ_USB0_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* ==== DMAC initialization ==== */
+ usb0_host_DMAC1_PeriReqInit((const dmac_transinfo_t *)&trans_info,
+ DMAC_MODE_REGISTER,
+ DMAC_SAMPLE_SINGLE,
+ request_factor,
+ 0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC1_PeriReqInit() */
+
+ /* ==== DMAC startup ==== */
+ ret = usb0_host_DMAC1_Open(DMAC_REQ_MODE_PERI);
+
+ if (ret != 0)
+ {
+// printf("DMAC1 Open error!!\n");
+ }
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: usb0_host_enable_dmac1
+* Description : Enables DMA transfer on the information specified by the argument.
+* Arguments : uint32_t src : src address
+* : uint32_t dst : dst address
+* : uint32_t count : transfer byte
+* : uint32_t size : transfer size
+* : uint32_t dir : direction
+* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
+* : uint16_t dfacc : 0 : normal access
+* : : 1 : 16byte access
+* : : 2 : 32byte access
+* Return Value : none
+*******************************************************************************/
+static void usb0_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
+{
+ dmac_transinfo_t trans_info;
+ uint32_t request_factor = 0;
+ int32_t ret;
+
+ /* ==== Variable setting for DMAC initialization ==== */
+ trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
+ trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
+ trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+#else
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
+ }
+ else
+ {
+ /* normal access */
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+ }
+#endif
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ request_factor =DMAC_REQ_USB0_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
+ }
+ else if (dir == USB_HOST_BUF2FIFO)
+ {
+ request_factor =DMAC_REQ_USB0_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* ==== DMAC initialization ==== */
+ usb0_host_DMAC2_PeriReqInit((const dmac_transinfo_t *)&trans_info,
+ DMAC_MODE_REGISTER,
+ DMAC_SAMPLE_SINGLE,
+ request_factor,
+ 0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC2_PeriReqInit() */
+
+ /* ==== DMAC startup ==== */
+ ret = usb0_host_DMAC2_Open(DMAC_REQ_MODE_PERI);
+
+ if (ret != 0)
+ {
+// printf("DMAC2 Open error!!\n");
+ }
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_stop_dma0
+* Description : Disables DMA transfer.
+* Arguments : none
+* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
+* : regarding to the bus width.
+* Notice : This function should be executed to DMAC executed at the time
+* : of specification of D0_FIF0_DMA in dma->fifo.
+*******************************************************************************/
+uint32_t Userdef_USB_usb0_host_stop_dma0 (void)
+{
+ uint32_t remain;
+
+ /* ==== DMAC release ==== */
+ usb0_host_DMAC1_Close(&remain);
+
+ return remain;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_stop_dma1
+* Description : Disables DMA transfer.
+* : This function should be executed to DMAC executed at the time
+* : of specification of D1_FIF0_DMA in dma->fifo.
+* Arguments : none
+* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
+* : regarding to the bus width.
+*******************************************************************************/
+uint32_t Userdef_USB_usb0_host_stop_dma1 (void)
+{
+ uint32_t remain;
+
+ /* ==== DMAC release ==== */
+ usb0_host_DMAC2_Close(&remain);
+
+ return remain;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_notice
+* Description : Notice of USER
+* Arguments : const char *format
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_notice (const char * format)
+{
+// printf(format);
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb0_host_user_rdy
+* Description : This function notify a user and wait for trigger
+* Arguments : const char *format
+* : uint16_t data
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb0_host_user_rdy (const char * format, uint16_t data)
+{
+// printf(format, data);
+ getchar();
+
+ return;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/inc/usb1_host.h Tue Mar 31 16:15:42 2015 +0100 @@ -0,0 +1,156 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. +*******************************************************************************/ +/******************************************************************************* +* File Name : usb1_host.h +* $Rev: 1116 $ +* $Date:: 2014-07-09 16:29:19 +0900#$ +* Description : RZ/A1H R7S72100 USB Sample Program +*******************************************************************************/ +#ifndef USB1_HOST_H +#define USB1_HOST_H + +/******************************************************************************* +Includes <System Includes> , "Project Includes" +*******************************************************************************/ +#include "devdrv_usb_host_api.h" +#include "usb_host.h" + +/******************************************************************************* +Imported global variables and functions (from other files) +*******************************************************************************/ +extern const uint16_t g_usb1_host_bit_set[]; +extern uint32_t g_usb1_host_data_count[USB_HOST_MAX_PIPE_NO + 1]; +extern uint8_t *g_usb1_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1]; + +extern uint16_t g_usb1_host_PipeIgnore[]; +extern uint16_t g_usb1_host_PipeTbl[]; +extern uint16_t g_usb1_host_pipe_status[]; +extern uint32_t g_usb1_host_PipeDataSize[]; + +extern USB_HOST_DMA_t g_usb1_host_DmaInfo[]; +extern uint16_t g_usb1_host_DmaPipe[]; +extern uint16_t g_usb1_host_DmaBval[]; +extern uint16_t g_usb1_host_DmaStatus[]; + +extern uint16_t g_usb1_host_driver_state; +extern uint16_t g_usb1_host_ConfigNum; +extern uint16_t g_usb1_host_CmdStage; +extern uint16_t g_usb1_host_bchg_flag; +extern uint16_t g_usb1_host_detach_flag; +extern uint16_t g_usb1_host_attach_flag; + +extern uint16_t g_usb1_host_UsbAddress; +extern uint16_t g_usb1_host_setUsbAddress; +extern uint16_t g_usb1_host_default_max_packet[USB_HOST_MAX_DEVICE + 1]; +extern uint16_t g_usb1_host_UsbDeviceSpeed; +extern uint16_t g_usb1_host_SupportUsbDeviceSpeed; + +extern uint16_t g_usb1_host_SavReq; +extern uint16_t g_usb1_host_SavVal; +extern uint16_t g_usb1_host_SavIndx; +extern uint16_t g_usb1_host_SavLen; + +extern uint16_t g_usb1_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb1_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb1_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1]; +extern uint16_t g_usb1_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1]; + +/******************************************************************************* +Functions Prototypes +*******************************************************************************/ +/* ==== common ==== */ +void usb1_host_dma_stop_d0(uint16_t pipe, uint32_t remain); +void usb1_host_dma_stop_d1(uint16_t pipe, uint32_t remain); +uint16_t usb1_host_is_hispeed(void); +uint16_t usb1_host_is_hispeed_enable(void); +uint16_t usb1_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data); +uint16_t usb1_host_write_buffer(uint16_t pipe); +uint16_t usb1_host_write_buffer_c(uint16_t pipe); +uint16_t usb1_host_write_buffer_d0(uint16_t pipe); +uint16_t usb1_host_write_buffer_d1(uint16_t pipe); +void usb1_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data); +uint16_t usb1_host_read_buffer(uint16_t pipe); +uint16_t usb1_host_read_buffer_c(uint16_t pipe); +uint16_t usb1_host_read_buffer_d0(uint16_t pipe); +uint16_t usb1_host_read_buffer_d1(uint16_t pipe); +uint16_t usb1_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); +void usb1_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw); +void usb1_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc); +uint16_t usb1_host_get_mbw(uint32_t trncount, uint32_t dtptr); +uint16_t usb1_host_read_dma(uint16_t pipe); +void usb1_host_stop_transfer(uint16_t pipe); +void usb1_host_brdy_int(uint16_t status, uint16_t int_enb); +void usb1_host_nrdy_int(uint16_t status, uint16_t int_enb); +void usb1_host_bemp_int(uint16_t status, uint16_t int_enb); +void usb1_host_setting_interrupt(uint8_t level); +void usb1_host_reset_module(uint16_t clockmode); +uint16_t usb1_host_get_buf_size(uint16_t pipe); +uint16_t usb1_host_get_mxps(uint16_t pipe); +void usb1_host_enable_brdy_int(uint16_t pipe); +void usb1_host_disable_brdy_int(uint16_t pipe); +void usb1_host_clear_brdy_sts(uint16_t pipe); +void usb1_host_enable_bemp_int(uint16_t pipe); +void usb1_host_disable_bemp_int(uint16_t pipe); +void usb1_host_clear_bemp_sts(uint16_t pipe); +void usb1_host_enable_nrdy_int(uint16_t pipe); +void usb1_host_disable_nrdy_int(uint16_t pipe); +void usb1_host_clear_nrdy_sts(uint16_t pipe); +void usb1_host_set_pid_buf(uint16_t pipe); +void usb1_host_set_pid_nak(uint16_t pipe); +void usb1_host_set_pid_stall(uint16_t pipe); +void usb1_host_clear_pid_stall(uint16_t pipe); +uint16_t usb1_host_get_pid(uint16_t pipe); +void usb1_host_set_sqclr(uint16_t pipe); +void usb1_host_set_sqset(uint16_t pipe); +void usb1_host_set_csclr(uint16_t pipe); +void usb1_host_aclrm(uint16_t pipe); +void usb1_host_set_aclrm(uint16_t pipe); +void usb1_host_clr_aclrm(uint16_t pipe); +uint16_t usb1_host_get_sqmon(uint16_t pipe); +uint16_t usb1_host_get_inbuf(uint16_t pipe); + +/* ==== host ==== */ +void usb1_host_init_pipe_status(void); +int32_t usb1_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); +void usb1_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); +void usb1_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table); +uint16_t usb1_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table); +void usb1_host_StatusStage(void); +void usb1_host_get_devadd(uint16_t addr, uint16_t *devadd); +void usb1_host_set_devadd(uint16_t addr, uint16_t *devadd); +void usb1_host_InitModule(void); +uint16_t usb1_host_CheckAttach(void); +void usb1_host_UsbDetach(void); +void usb1_host_UsbDetach2(void); +void usb1_host_UsbAttach(void); +uint16_t usb1_host_UsbBusReset(void); +int32_t usb1_host_UsbResume(void); +int32_t usb1_host_UsbSuspend(void); +void usb1_host_Enable_DetachINT(void); +void usb1_host_Disable_DetachINT(void); +void usb1_host_UsbStateManager(void); + + +#endif /* USB1_HOST_H */ + +/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/inc/usb1_host_api.h Tue Mar 31 16:15:42 2015 +0100 @@ -0,0 +1,112 @@ +/******************************************************************************* +* DISCLAIMER +* This software is supplied by Renesas Electronics Corporation and is only +* intended for use with Renesas products. No other uses are authorized. This +* software is owned by Renesas Electronics Corporation and is protected under +* all applicable laws, including copyright laws. +* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING +* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT +* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE +* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. +* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS +* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE +* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR +* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE +* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +* Renesas reserves the right, without notice, to make changes to this software +* and to discontinue the availability of this software. By using this software, +* you agree to the additional terms and conditions found by accessing the +* following link: +* http://www.renesas.com/disclaimer +* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved. +*******************************************************************************/ +/******************************************************************************* +* File Name : usb1_host_api.h +* $Rev: 1116 $ +* $Date:: 2014-07-09 16:29:19 +0900#$ +* Description : RZ/A1H R7S72100 USB Sample Program +*******************************************************************************/ +#ifndef USB1_HOST_API_H +#define USB1_HOST_API_H + + +/******************************************************************************* +Typedef definitions +*******************************************************************************/ + + +/******************************************************************************* +Macro definitions +*******************************************************************************/ + + +/******************************************************************************* +Variable Externs +*******************************************************************************/ + + +/******************************************************************************* +Functions Prototypes +*******************************************************************************/ +void usb1_host_interrupt(uint32_t int_sense); +void usb1_host_dma_interrupt_d0fifo(uint32_t int_sense); +void usb1_host_dma_interrupt_d1fifo(uint32_t int_sense); + +uint16_t usb1_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode); +int32_t usb1_api_host_enumeration(uint16_t devadr); +int32_t usb1_api_host_detach(void); +int32_t usb1_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); +int32_t usb1_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf); +int32_t usb1_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf); +int32_t usb1_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor); +int32_t usb1_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table); +int32_t usb1_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table); +uint16_t usb1_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *Table); +int32_t usb1_api_host_data_count(uint16_t pipe, uint32_t *data_count); + +int32_t usb1_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); +int32_t usb1_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf); +int32_t usb1_api_host_SetConfig(uint16_t devadr, uint16_t confignum); +int32_t usb1_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index); +int32_t usb1_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir); +uint16_t usb1_api_host_GetUsbDeviceState(void); + +void usb1_api_host_elt_4_4(void); +void usb1_api_host_elt_4_5(void); +void usb1_api_host_elt_4_6(void); +void usb1_api_host_elt_4_7(void); +void usb1_api_host_elt_4_8(void); +void usb1_api_host_elt_4_9(void); +void usb1_api_host_elt_get_desc(void); + +void usb1_host_EL_ModeInit(void); +void usb1_host_EL_SetUACT(void); +void usb1_host_EL_ClearUACT(void); +void usb1_host_EL_SetTESTMODE(uint16_t mode); +void usb1_host_EL_ClearNRDYSTS(uint16_t pipe); +uint16_t usb1_host_EL_GetINTSTS1(void); +void usb1_host_EL_UsbBusReset(void); +void usb1_host_EL_UsbAttach(void); +void usb1_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len); +void usb1_host_EL_StatusStage(void); +void usb1_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table); +int32_t usb1_host_EL_UsbSuspend(void); +int32_t usb1_host_EL_UsbResume(void); + +#if 0 /* prototype in devdrv_usb_host_api.h */ +uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid(void); +uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid(void); +void Userdef_USB_usb1_host_attach(void); +void Userdef_USB_usb1_host_detach(void); +void Userdef_USB_usb1_host_delay_1ms(void); +void Userdef_USB_usb1_host_delay_xms(uint32_t msec); +void Userdef_USB_usb1_host_delay_10us(uint32_t usec); +void Userdef_USB_usb1_host_delay_500ns(void); +void Userdef_USB_usb1_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc); +uint32_t Userdef_USB_usb1_host_stop_dma0(void); +uint32_t Userdef_USB_usb1_host_stop_dma1(void); +#endif + +#endif /* USB1_HOST_API_H */ + +/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/inc/usb1_host_dmacdrv.h Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,139 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_dmacdrv.h
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Description : RZ/A1H R7S72100 USB Sample Program
+*******************************************************************************/
+#ifndef USB1_HOST_DMACDRV_H
+#define USB1_HOST_DMACDRV_H
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+typedef struct dmac_transinfo
+{
+ uint32_t src_addr; /* Transfer source address */
+ uint32_t dst_addr; /* Transfer destination address */
+ uint32_t count; /* Transfer byte count */
+ uint32_t src_size; /* Transfer source data size */
+ uint32_t dst_size; /* Transfer destination data size */
+ uint32_t saddr_dir; /* Transfer source address direction */
+ uint32_t daddr_dir; /* Transfer destination address direction */
+} dmac_transinfo_t;
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+/* ==== Transfer specification of the sample program ==== */
+#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
+#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
+
+/* ==== DMA modes ==== */
+#define DMAC_MODE_REGISTER (0) /* Register mode */
+#define DMAC_MODE_LINK (1) /* Link mode */
+
+/* ==== Transfer requests ==== */
+#define DMAC_REQ_MODE_EXT (0) /* External request */
+#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
+#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
+
+/* ==== DMAC transfer sizes ==== */
+#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
+#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
+#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
+#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
+#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
+#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
+#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
+#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
+
+/* ==== Address increment for transferring ==== */
+#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
+#define DMAC_TRANS_ADR_INC (0) /* Increment */
+
+/* ==== Method for detecting DMA request ==== */
+#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
+#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
+#define DMAC_REQ_DET_LOW (2) /* Low level detection */
+#define DMAC_REQ_DET_HIGH (3) /* High level detection */
+
+/* ==== Request Direction ==== */
+#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
+#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
+
+/* ==== Descriptors ==== */
+#define DMAC_DESC_HEADER (0) /* Header */
+#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
+#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
+#define DMAC_DESC_COUNT (3) /* Transaction Byte */
+#define DMAC_DESC_CHCFG (4) /* Channel Confg */
+#define DMAC_DESC_CHITVL (5) /* Channel Interval */
+#define DMAC_DESC_CHEXT (6) /* Channel Extension */
+#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
+
+/* ==== On-chip peripheral module requests ===== */
+typedef enum dmac_request_factor
+{
+ DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
+ DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
+ DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
+ DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
+ DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
+ DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
+ DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
+ DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
+} dmac_request_factor_t;
+
+
+/*******************************************************************************
+Variable Externs
+*******************************************************************************/
+
+
+/*******************************************************************************
+Functions Prototypes
+*******************************************************************************/
+void usb1_host_DMAC3_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction);
+int32_t usb1_host_DMAC3_Open(uint32_t req);
+void usb1_host_DMAC3_Close(uint32_t *remain);
+void usb1_host_DMAC3_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
+
+void usb1_host_DMAC4_PeriReqInit(const dmac_transinfo_t *trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction);
+int32_t usb1_host_DMAC4_Open(uint32_t req);
+void usb1_host_DMAC4_Close(uint32_t *remain);
+void usb1_host_DMAC4_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
+
+#endif /* USB1_HOST_DMACDRV_H */
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/common/usb1_host_dataio.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,2835 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_dataio.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+static uint16_t g_usb1_host_mbw[(USB_HOST_MAX_PIPE_NO + 1)];
+
+static void usb1_host_start_receive_trns_c(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb1_host_start_receive_trns_d0(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb1_host_start_receive_trns_d1(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb1_host_start_receive_dma_d0(uint16_t pipe, uint32_t size, uint8_t *data);
+static void usb1_host_start_receive_dma_d1(uint16_t pipe, uint32_t size, uint8_t *data);
+static uint16_t usb1_host_read_dma_d0(uint16_t pipe);
+static uint16_t usb1_host_read_dma_d1(uint16_t pipe);
+static uint16_t usb1_host_write_dma_d0(uint16_t pipe);
+static uint16_t usb1_host_write_dma_d1(uint16_t pipe);
+
+static void usb1_host_read_c_fifo(uint16_t pipe, uint16_t count);
+static void usb1_host_write_c_fifo(uint16_t Pipe, uint16_t count);
+static void usb1_host_read_d0_fifo(uint16_t pipe, uint16_t count);
+static void usb1_host_write_d0_fifo(uint16_t pipe, uint16_t count);
+static void usb1_host_read_d1_fifo(uint16_t pipe, uint16_t count);
+static void usb1_host_write_d1_fifo(uint16_t pipe, uint16_t count);
+
+static void usb1_host_clear_transaction_counter(uint16_t pipe);
+static void usb1_host_set_transaction_counter(uint16_t pipe, uint32_t count);
+
+static uint32_t usb1_host_com_get_dmasize(uint32_t trncount, uint32_t dtptr);
+
+static uint16_t usb1_host_set_dfacc_d0(uint16_t mbw, uint32_t count);
+static uint16_t usb1_host_set_dfacc_d1(uint16_t mbw, uint32_t count);
+
+
+/*******************************************************************************
+* Function Name: usb1_host_start_send_transfer
+* Description : Starts the USB data communication using pipe specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data data Address
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_start_send_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t status;
+ uint16_t usefifo;
+ uint16_t mbw;
+
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ usb1_host_clear_bemp_sts(pipe);
+ usb1_host_clear_brdy_sts(pipe);
+ usb1_host_clear_nrdy_sts(pipe);
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+
+ usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ case USB_HOST_D0FIFO_DMA:
+ usefifo = USB_HOST_D0USE;
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ case USB_HOST_D1FIFO_DMA:
+ usefifo = USB_HOST_D1USE;
+ break;
+
+ default:
+ usefifo = USB_HOST_CUSE;
+ break;
+ };
+
+ usb1_host_set_curpipe(USB_HOST_PIPE0, usefifo, USB_HOST_NO, mbw);
+
+ usb1_host_clear_transaction_counter(pipe);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ status = usb1_host_write_buffer(pipe);
+
+ if (status != USB_HOST_FIFOERROR)
+ {
+ usb1_host_set_pid_buf(pipe);
+ }
+
+ return status;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_buffer
+* Description : Writes data in the buffer allocated in the pipe specified by
+* : the argument. The FIFO for using is set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_write_buffer (uint16_t pipe)
+{
+ uint16_t status;
+ uint16_t usefifo;
+
+ g_usb1_host_PipeIgnore[pipe] = 0;
+ usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ status = usb1_host_write_buffer_d0(pipe);
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ status = usb1_host_write_buffer_d1(pipe);
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ status = usb1_host_write_dma_d0(pipe);
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ status = usb1_host_write_dma_d1(pipe);
+ break;
+
+ default:
+ status = usb1_host_write_buffer_c(pipe);
+ break;
+ };
+
+ switch (status)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+ usb1_host_enable_brdy_int(pipe); /* Enable Ready Interrupt */
+ break;
+
+ case USB_HOST_WRITEEND: /* End of data write */
+ case USB_HOST_WRITESHRT: /* End of data write */
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+
+ usb1_host_clear_nrdy_sts(pipe);
+ usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+
+ /* for last transfer */
+ usb1_host_enable_bemp_int(pipe); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_WRITEDMA: /* DMA write */
+ usb1_host_clear_nrdy_sts(pipe);
+ usb1_host_enable_nrdy_int(pipe); /* Error (NORES or STALL) */
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ usb1_host_disable_bemp_int(pipe); /* Disable Empty Interrupt */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_buffer_c
+* Description : Writes data in the buffer allocated in the pipe specified in
+* : the argument. Writes data by CPU transfer using CFIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_write_buffer_c (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_CFIFO_WRITE, mbw);
+ }
+ else
+ {
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
+ }
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb1_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb1_host_write_c_fifo(pipe, (uint16_t)count);
+
+ if (g_usb1_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb1_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB201.CFIFOCTR,
+ USB_CFIFOCTR_BVAL_SHIFT,
+ USB_CFIFOCTR_BVAL) == 0)
+ {
+ USB201.CFIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb1_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_buffer_d0
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by CPU transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_write_buffer_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb1_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb1_host_write_d0_fifo(pipe, (uint16_t)count);
+
+ if (g_usb1_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb1_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB201.D0FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb1_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_buffer_d1
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by CPU transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND ; Write end
+* : USB_HOST_WRITESHRT ; short data
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_WRITEDMA ; Write DMA
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_write_buffer_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] <= (uint32_t)size)
+ {
+ status = USB_HOST_WRITEEND; /* write continues */
+ count = g_usb1_host_data_count[pipe];
+
+ if (count == 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Null Packet is end of write */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+ }
+ else
+ {
+ status = USB_HOST_WRITING; /* write continues */
+ count = (uint32_t)size;
+ }
+
+ usb1_host_write_d1_fifo(pipe, (uint16_t)count);
+
+ if (g_usb1_host_data_count[pipe] < (uint32_t)size)
+ {
+ g_usb1_host_data_count[pipe] = 0;
+
+ if (RZA_IO_RegRead_16(&USB201.D1FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBVAL; /* Short Packet */
+ }
+ }
+ else
+ {
+ g_usb1_host_data_count[pipe] -= count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_dma_d0
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by DMA transfer using D0FIFO.
+* : The DMA-ch for using is specified by Userdef_USB_usb1_host_start_dma().
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND : Write end
+* : USB_HOST_WRITESHRT : short data
+* : USB_HOST_WRITING : Continue of data write
+* : USB_HOST_WRITEDMA : Write DMA
+* : USB_HOST_FIFOERROR : FIFO status
+*******************************************************************************/
+static uint16_t usb1_host_write_dma_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ count = g_usb1_host_data_count[pipe];
+
+ if (count != 0)
+ {
+ g_usb1_host_DmaPipe[USB_HOST_D0FIFO] = pipe;
+
+ if ((count % size) != 0)
+ {
+ g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 1;
+ }
+ else
+ {
+ g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 0;
+ }
+
+ dfacc = usb1_host_set_dfacc_d0(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_BUF2FIFO;
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
+
+ Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
+
+ usb1_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw, dfacc);
+
+ RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+
+ g_usb1_host_data_count[pipe] = 0;
+ g_usb1_host_data_pointer[pipe] += count;
+
+ status = USB_HOST_WRITEDMA; /* DMA write */
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&USB201.D0FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ RZA_IO_RegWrite_16(&USB201.D0FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL); /* Short Packet */
+ }
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_dma_d1
+* Description : Writes data in the buffer allocated in the pipe specified in the argument.
+* : Writes data by DMA transfer using D1FIFO.
+* : The DMA-ch for using is specified by Userdef_USB_usb1_host_start_dma().
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_WRITEEND : Write end
+* : USB_HOST_WRITESHRT : short data
+* : USB_HOST_WRITING : Continue of data write
+* : USB_HOST_WRITEDMA : Write DMA
+* : USB_HOST_FIFOERROR : FIFO status
+*******************************************************************************/
+static uint16_t usb1_host_write_dma_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint16_t size;
+ uint16_t buffer;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ count = g_usb1_host_data_count[pipe];
+
+ if (count != 0)
+ {
+ g_usb1_host_DmaPipe[USB_HOST_D1FIFO] = pipe;
+
+ if ((count % size) != 0)
+ {
+ g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 1;
+ }
+ else
+ {
+ g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 0;
+ }
+
+ dfacc = usb1_host_set_dfacc_d1(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_BUF2FIFO;
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
+
+ Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
+
+ usb1_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw , dfacc);
+
+ RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+
+ g_usb1_host_data_count[pipe] = 0;
+ g_usb1_host_data_pointer[pipe] += count;
+
+ status = USB_HOST_WRITEDMA; /* DMA write */
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&USB201.D1FIFOCTR,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL) == 0)
+ {
+ RZA_IO_RegWrite_16(&USB201.D1FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL); /* Short Packet */
+ }
+ status = USB_HOST_WRITESHRT; /* Short Packet is end of write */
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_transfer
+* Description : Starts USB data reception using the pipe specified in the argument.
+* : The FIFO for using is set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+void usb1_host_start_receive_transfer (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t usefifo;
+
+ usb1_host_clear_bemp_sts(pipe);
+ usb1_host_clear_brdy_sts(pipe);
+ usb1_host_clear_nrdy_sts(pipe);
+
+ usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ usb1_host_start_receive_trns_d0(pipe, size, data);
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ usb1_host_start_receive_trns_d1(pipe, size, data);
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ usb1_host_start_receive_dma_d0(pipe, size, data);
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ usb1_host_start_receive_dma_d1(pipe, size, data);
+ break;
+
+ default:
+ usb1_host_start_receive_trns_c(pipe, size, data);
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_trns_c
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using CFIFO.
+* : When storing data in the buffer allocated in the pipe specified in the
+* : argument, BRDY interrupt is generated to read data
+* : in the interrupt.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_start_receive_trns_c (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ g_usb1_host_PipeDataSize[pipe] = size;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_CFIFO_READ, mbw);
+ USB201.CFIFOCTR = USB_HOST_BITBCLR;
+
+ usb1_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+
+ usb1_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_trns_d0
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, BRDY interrupt is generated to read data in the
+* : interrupt.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_start_receive_trns_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ g_usb1_host_PipeDataSize[pipe] = size;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ usb1_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+
+ usb1_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_trns_d1
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using D1FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, BRDY interrupt is generated to read data.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_start_receive_trns_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ g_usb1_host_PipeDataSize[pipe] = size;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ usb1_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+
+ usb1_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_dma_d0
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, delivered read request to DMAC to read data from
+* : the buffer by DMAC.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_start_receive_dma_d0 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ g_usb1_host_PipeDataSize[pipe] = 0;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ usb1_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ usb1_host_read_dma(pipe);
+
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+ }
+ else
+ {
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+ }
+
+ usb1_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_start_receive_dma_d1
+* Description : Read data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* : This function does not read data from the buffer.
+* : When storing data in the buffer allocated in the pipe specified
+* : in the argument, delivered read request to DMAC to read data from
+* : the buffer by DMAC.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t size ; Data Size
+* : uint8_t *data ; Data Address
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_start_receive_dma_d1 (uint16_t pipe, uint32_t size, uint8_t * data)
+{
+ uint16_t mbw;
+
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_data_count[pipe] = size;
+ g_usb1_host_data_pointer[pipe] = (uint8_t *)data;
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ g_usb1_host_PipeDataSize[pipe] = 0;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_WAIT;
+
+ mbw = usb1_host_get_mbw(size, (uint32_t)data);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ usb1_host_set_transaction_counter(pipe, size);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ usb1_host_read_dma(pipe);
+
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+ }
+ else
+ {
+ usb1_host_enable_nrdy_int(pipe);
+ usb1_host_enable_brdy_int(pipe);
+ }
+
+ usb1_host_set_pid_buf(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_buffer
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Uses FIF0 set in the pipe definition table.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_read_buffer (uint16_t pipe)
+{
+ uint16_t status;
+
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
+ {
+ status = usb1_host_read_buffer_d0(pipe);
+ }
+ else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
+ {
+ status = usb1_host_read_buffer_d1(pipe);
+ }
+ else
+ {
+ status = usb1_host_read_buffer_c(pipe);
+ }
+
+ switch (status)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb1_host_disable_brdy_int(pipe);
+ g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_USE)
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_USE)
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#else
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+#endif
+ g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_buffer_c
+* Description : Reads data from the buffer allocated in the pipe specified in the argument.
+* : Reads data by CPU transfer using CFIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_read_buffer_c (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_CUSE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb1_host_data_count[pipe];
+ }
+ else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb1_host_read_c_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb1_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_buffer_d0
+* Description : Reads data from the buffer allocated in the pipe specified in
+* : the argument.
+* : Reads data by CPU transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_read_buffer_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t pipebuf_size;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb1_host_data_count[pipe];
+ }
+ else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ else
+ {
+ pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb1_host_read_d0_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb1_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_buffer_d1
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by CPU transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_read_buffer_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t pipebuf_size;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1USE, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = g_usb1_host_data_count[pipe];
+ }
+ else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) !=0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ else
+ {
+ pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ usb1_host_set_pid_nak(pipe); /* Set NAK */
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ }
+ else
+ {
+ usb1_host_read_d1_fifo(pipe, (uint16_t)count);
+ }
+
+ g_usb1_host_data_count[pipe] -= count;
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_dma
+* Description : Reads data from the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by DMA transfer using D0FIFO or D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+uint16_t usb1_host_read_dma (uint16_t pipe)
+{
+ uint16_t status;
+
+ g_usb1_host_PipeIgnore[pipe] = 0;
+
+ if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
+ {
+ status = usb1_host_read_dma_d0(pipe);
+ }
+ else
+ {
+ status = usb1_host_read_dma_d1(pipe);
+ }
+
+ switch (status)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READZERO: /* End of data read */
+ usb1_host_disable_brdy_int(pipe);
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb1_host_disable_brdy_int(pipe);
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
+ }
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ g_usb1_host_PipeDataSize[pipe] -= g_usb1_host_data_count[pipe];
+ }
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#else
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+#endif
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access status */
+ default:
+ usb1_host_disable_brdy_int(pipe); /* Disable Ready Interrupt */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_ERROR;
+ break;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_dma_d0
+* Description : Writes data in the buffer allocated in the pipe specified
+* : in the argument.
+* : Reads data by DMA transfer using D0FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+static uint16_t usb1_host_read_dma_d0 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+ uint16_t pipebuf_size;
+
+ g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ count = g_usb1_host_data_count[pipe];
+ status = USB_HOST_READING;
+ }
+ else
+ {
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ count = g_usb1_host_data_count[pipe];
+ }
+ else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ else
+ {
+ pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ status = USB_HOST_READZERO; /* Null Packet receive */
+ }
+ else
+ {
+ usb1_host_set_curpipe(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw);
+ /* transaction counter No set */
+ /* FRDY = 1, DTLN = 0 -> BRDY */
+ }
+ }
+ else
+ {
+ dfacc = usb1_host_set_dfacc_d0(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb1_host_DmaPipe[USB_HOST_D0FIFO] = pipe; /* not use in read operation */
+ g_usb1_host_DmaBval[USB_HOST_D0FIFO] = 0; /* not use in read operation */
+
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].fifo = USB_HOST_D0FIFO_DMA;
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].dir = USB_HOST_FIFO2BUF;
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
+ g_usb1_host_DmaInfo[USB_HOST_D0FIFO].bytes = count;
+
+ if (status == USB_HOST_READING)
+ {
+ g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSY;
+ }
+ else
+ {
+ g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_BUSYEND;
+ }
+
+ Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D0FIFO], dfacc);
+
+ usb1_host_set_curpipe2(pipe, USB_HOST_D0DMA, USB_HOST_NO, mbw , dfacc);
+
+ RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ g_usb1_host_data_count[pipe] -= count;
+ g_usb1_host_data_pointer[pipe] += count;
+ g_usb1_host_PipeDataSize[pipe] += count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_dma_d1
+* Description : Reads data from the buffer allocated in the pipe specified in
+* : the argument.
+* : Reads data by DMA transfer using D1FIFO.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : USB_HOST_READEND ; Read end
+* : USB_HOST_READSHRT ; short data
+* : USB_HOST_READZERO ; zero data
+* : USB_HOST_READING ; Continue of data read
+* : USB_HOST_READOVER ; buffer over
+* : USB_HOST_FIFOERROR ; FIFO status
+*******************************************************************************/
+static uint16_t usb1_host_read_dma_d1 (uint16_t pipe)
+{
+ uint32_t count;
+ uint32_t dtln;
+ uint16_t buffer;
+ uint16_t mxps;
+ uint16_t status;
+ uint16_t mbw;
+ uint16_t dfacc = 0;
+ uint16_t pipebuf_size;
+
+ g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[pipe], (uint32_t)g_usb1_host_data_pointer[pipe]);
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ count = g_usb1_host_data_count[pipe];
+ status = USB_HOST_READING;
+ }
+ else
+ {
+ buffer = usb1_host_change_fifo_port(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+
+ if (buffer == USB_HOST_FIFOERROR) /* FIFO access status */
+ {
+ return USB_HOST_FIFOERROR;
+ }
+
+ dtln = (uint32_t)(buffer & USB_HOST_BITDTLN);
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if (g_usb1_host_data_count[pipe] < dtln) /* Buffer Over ? */
+ {
+ status = USB_HOST_READOVER;
+ count = g_usb1_host_data_count[pipe];
+ }
+ else if (g_usb1_host_data_count[pipe] == dtln) /* just Receive Size */
+ {
+ status = USB_HOST_READEND;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ else /* continue Receive data */
+ {
+ status = USB_HOST_READING;
+ count = dtln;
+
+ if (count == 0)
+ {
+ status = USB_HOST_READSHRT; /* Null Packet receive */
+ }
+
+ if ((count % mxps) != 0)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ else
+ {
+ pipebuf_size = usb1_host_get_buf_size(pipe); /* Data buffer size */
+
+ if (count != pipebuf_size)
+ {
+ status = USB_HOST_READSHRT; /* Short Packet receive */
+ }
+ }
+ }
+ }
+
+ if (count == 0) /* 0 length packet */
+ {
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Clear BCLR */
+ status = USB_HOST_READZERO; /* Null Packet receive */
+ }
+ else
+ {
+ usb1_host_set_curpipe(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw);
+ /* transaction counter No set */
+ /* FRDY = 1, DTLN = 0 -> BRDY */
+ }
+ }
+ else
+ {
+ dfacc = usb1_host_set_dfacc_d1(mbw, count);
+
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 2; /* 32bit transfer */
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 1; /* 16bit transfer */
+ }
+ else
+ {
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size = 0; /* 8bit transfer */
+ }
+
+ g_usb1_host_DmaPipe[USB_HOST_D1FIFO] = pipe; /* not use in read operation */
+ g_usb1_host_DmaBval[USB_HOST_D1FIFO] = 0; /* not use in read operation */
+
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].fifo = USB_HOST_D1FIFO_DMA;
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].dir = USB_HOST_FIFO2BUF;
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].buffer = (uint32_t)g_usb1_host_data_pointer[pipe];
+ g_usb1_host_DmaInfo[USB_HOST_D1FIFO].bytes = count;
+
+ if (status == USB_HOST_READING)
+ {
+ g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSY;
+ }
+ else
+ {
+ g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_BUSYEND;
+ }
+
+ Userdef_USB_usb1_host_start_dma(&g_usb1_host_DmaInfo[USB_HOST_D1FIFO], dfacc);
+
+ usb1_host_set_curpipe2(pipe, USB_HOST_D1DMA, USB_HOST_NO, mbw , dfacc);
+
+ RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
+ 1,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ g_usb1_host_data_count[pipe] -= count;
+ g_usb1_host_data_pointer[pipe] += count;
+ g_usb1_host_PipeDataSize[pipe] += count;
+ }
+
+ return status; /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_change_fifo_port
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument. After allocating FIF0, waits in the software
+* : till the corresponding pipe becomes ready.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* Return Value : USB_HOST_FIFOERROR ; Error
+* : Others ; CFIFOCTR/D0FIFOCTR/D1FIFOCTR Register Value
+*******************************************************************************/
+uint16_t usb1_host_change_fifo_port (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
+{
+ uint16_t buffer;
+ uint32_t loop;
+ volatile uint32_t loop2;
+
+ usb1_host_set_curpipe(pipe, fifosel, isel, mbw);
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB201.CFIFOCTR;
+ break;
+
+ case USB_HOST_D0USE:
+ case USB_HOST_D0DMA:
+ buffer = USB201.D0FIFOCTR;
+ break;
+
+ case USB_HOST_D1USE:
+ case USB_HOST_D1DMA:
+ buffer = USB201.D1FIFOCTR;
+ break;
+
+ default:
+ buffer = 0;
+ break;
+ }
+
+ if ((buffer & USB_HOST_BITFRDY) == USB_HOST_BITFRDY)
+ {
+ return buffer;
+ }
+
+ loop2 = 25;
+
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ return USB_HOST_FIFOERROR;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_curpipe
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_curpipe (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw)
+{
+ uint16_t buffer;
+ uint32_t loop;
+ volatile uint32_t loop2;
+
+ g_usb1_host_mbw[pipe] = mbw;
+
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB201.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
+ USB201.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(isel | pipe | mbw);
+ USB201.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D0USE:
+ buffer = USB201.D0FIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ USB201.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB201.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D1DMA:
+ case USB_HOST_D1USE:
+ buffer = USB201.D1FIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ USB201.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB201.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ /* Cautions !!!
+ * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
+ * For details, please look at the data sheet. */
+ loop2 = 100;
+
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_curpipe2
+* Description : Allocates FIF0 specified by the argument in the pipe assigned
+* : by the argument.(DFACC)
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t fifosel ; Select FIFO
+* : uint16_t isel ; FIFO Access Direction
+* : uint16_t mbw ; FIFO Port Access Bit Width
+* : uint16_t dfacc ; DFACC Access mode
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_curpipe2 (uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc)
+{
+ uint16_t buffer;
+ uint32_t loop;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ uint32_t dummy;
+#endif
+ volatile uint32_t loop2;
+
+ g_usb1_host_mbw[pipe] = mbw;
+
+ switch (fifosel)
+ {
+ case USB_HOST_CUSE:
+ buffer = USB201.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(~isel & USB_HOST_BITISEL);
+ USB201.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+ buffer &= (uint16_t)~(USB_HOST_BITISEL | USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(isel | pipe | mbw);
+ USB201.CFIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.CFIFOSEL & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE))
+ == (buffer & (USB_HOST_BITISEL | USB_HOST_BITCURPIPE)))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D0USE:
+ buffer = USB201.D0FIFOSEL;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+
+ if (dfacc != 0)
+ {
+ buffer |= (uint16_t)(USB_HOST_BITMBW_32);
+ }
+#else
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+#endif
+ USB201.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ if (dfacc != 0)
+ {
+ dummy = USB201.D0FIFO.UINT32;
+ }
+#endif
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB201.D0FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D0FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ case USB_HOST_D1DMA:
+ case USB_HOST_D1USE:
+ buffer = USB201.D1FIFOSEL;
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+
+ if (dfacc != 0)
+ {
+ buffer |= (uint16_t)(USB_HOST_BITMBW_32);
+ }
+#else
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+#endif
+ USB201.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+
+#ifdef __USB_HOST_DF_ACC_ENABLE__
+ if (dfacc != 0)
+ {
+ dummy = USB201.D1FIFO.UINT32;
+ loop = dummy; // avoid warning.
+ }
+#endif
+
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE | USB_HOST_BITMBW);
+ buffer |= (uint16_t)(pipe | mbw);
+ USB201.D1FIFOSEL = buffer;
+
+ for (loop = 0; loop < 4; loop++)
+ {
+ if ((USB201.D1FIFOSEL & USB_HOST_BITCURPIPE) == (buffer & USB_HOST_BITCURPIPE))
+ {
+ break;
+ }
+
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+ }
+ break;
+
+ default:
+ break;
+ }
+
+ /* Cautions !!!
+ * Depending on the external bus speed of CPU, you may need to wait for 450ns here.
+ * For details, please look at the data sheet. */
+ loop2 = 100;
+ while (loop2-- > 0)
+ {
+ /* wait */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_c_fifo
+* Description : Writes data in CFIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_write_c_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB201.CFIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB201.CFIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB201.CFIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_c_fifo
+* Description : Reads data from CFIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_read_c_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb1_host_data_pointer[pipe] = USB201.CFIFO.UINT8[HH];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.CFIFO.UINT16[H];
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.CFIFO.UINT32;
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_d0_fifo
+* Description : Writes data in D0FIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating CFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_write_d0_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB201.D0FIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB201.D0FIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB201.D0FIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_d0_fifo
+* Description : Reads data from D0FIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating DOFIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb0_host_mbw[].
+* Arguments : uint16_t Pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_read_d0_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb1_host_data_pointer[pipe] = USB201.D0FIFO.UINT8[HH];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.D0FIFO.UINT16[H];
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.D0FIFO.UINT32;
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_write_d1_fifo
+* Description : Writes data in D1FIFO.
+* : Writes data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating D1FIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_write_d1_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ USB201.D1FIFO.UINT8[HH] = *g_usb1_host_data_pointer[pipe];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)(count / 2); even; --even)
+ {
+ USB201.D1FIFO.UINT16[H] = *((uint16_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)(count / 4); even; --even)
+ {
+ USB201.D1FIFO.UINT32 = *((uint32_t *)g_usb1_host_data_pointer[pipe]);
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_read_d1_fifo
+* Description : Reads data from D1FIFO.
+* : Reads data by BYTE/WORD/LONG according to access size
+* : to the pipe specified by the arguments.
+* : Before executing this function, allocating D1FIF0 in the specified pipe
+* : should be completed.
+* : Before executing this function, access size to the specified pipe
+* : should be fixed and set in g_usb1_host_mbw[].
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint16_t count ; Data Size(Byte)
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_read_d1_fifo (uint16_t pipe, uint16_t count)
+{
+ uint16_t even;
+
+ if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_8)
+ {
+ for (even = count; even; --even)
+ {
+ *g_usb1_host_data_pointer[pipe] = USB201.D1FIFO.UINT8[HH];
+ g_usb1_host_data_pointer[pipe] += 1;
+ }
+ }
+ else if (g_usb1_host_mbw[pipe] == USB_HOST_BITMBW_16)
+ {
+ for (even = (uint16_t)((count + 1) / 2); even; --even)
+ {
+ *((uint16_t *)g_usb1_host_data_pointer[pipe]) = USB201.D1FIFO.UINT16[H];
+ g_usb1_host_data_pointer[pipe] += 2;
+ }
+ }
+ else
+ {
+ for (even = (uint16_t)((count + 3) / 4); even; --even)
+ {
+ *((uint32_t *)g_usb1_host_data_pointer[pipe]) = USB201.D1FIFO.UINT32;
+ g_usb1_host_data_pointer[pipe] += 4;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_com_get_dmasize
+* Description : Calculates access width of DMA transfer by the argument to
+ return as the Return Value.
+* Arguments : uint32_t trncount : transfer byte
+* : uint32_t dtptr : transfer data pointer
+* Return Value : DMA transfer size : 0 8bit
+* : : 1 16bit
+* : : 2 32bit
+*******************************************************************************/
+static uint32_t usb1_host_com_get_dmasize (uint32_t trncount, uint32_t dtptr)
+{
+ uint32_t size;
+
+ if (((trncount & 0x0001) != 0) || ((dtptr & 0x00000001) != 0))
+ {
+ /* When transfer byte count is odd */
+ /* or transfer data area is 8-bit alignment */
+ size = 0; /* 8bit */
+ }
+ else if (((trncount & 0x0003) != 0) || ((dtptr & 0x00000003) != 0))
+ {
+ /* When the transfer byte count is multiples of 2 */
+ /* or the transfer data area is 16-bit alignment */
+ size = 1; /* 16bit */
+ }
+ else
+ {
+ /* When the transfer byte count is multiples of 4 */
+ /* or the transfer data area is 32-bit alignment */
+ size = 2; /* 32bit */
+ }
+
+ return size;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_mbw
+* Description : Calculates access width of DMA to return the value set in MBW.
+* Arguments : uint32_t trncount : transfer byte
+* : uint32_t dtptr : transfer data pointer
+* Return Value : FIFO transfer size : USB_HOST_BITMBW_8 8bit
+* : : USB_HOST_BITMBW_16 16bit
+* : : USB_HOST_BITMBW_32 32bit
+*******************************************************************************/
+uint16_t usb1_host_get_mbw (uint32_t trncount, uint32_t dtptr)
+{
+ uint32_t size;
+ uint16_t mbw;
+
+ size = usb1_host_com_get_dmasize(trncount, dtptr);
+
+ if (size == 0)
+ {
+ /* 8bit */
+ mbw = USB_HOST_BITMBW_8;
+ }
+ else if (size == 1)
+ {
+ /* 16bit */
+ mbw = USB_HOST_BITMBW_16;
+ }
+ else
+ {
+ /* 32bit */
+ mbw = USB_HOST_BITMBW_32;
+ }
+
+ return mbw;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_transaction_counter
+* Description : Sets transaction counter by the argument(PIPEnTRN).
+* : Clears transaction before setting to enable transaction counter setting.
+* Arguments : uint16_t pipe ; Pipe number
+* : uint32_t bsize : Data transfer size
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_set_transaction_counter (uint16_t pipe, uint32_t bsize)
+{
+ uint16_t mxps;
+ uint16_t cnt;
+
+ if (bsize == 0)
+ {
+ return;
+ }
+
+ mxps = usb1_host_get_mxps(pipe); /* Max Packet Size */
+
+ if ((bsize % mxps) == 0)
+ {
+ cnt = (uint16_t)(bsize / mxps);
+ }
+ else
+ {
+ cnt = (uint16_t)((bsize / mxps) + 1);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE1TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE2TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE3TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE4TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE5TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ USB201.PIPE9TRN = cnt;
+ RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clear_transaction_counter
+* Description : Clears the transaction counter by the argument.
+* : After executing this function, the transaction counter is invalid.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clear_transaction_counter (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE1TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE2TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE3TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE4TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE5TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
+ 0,
+ USB_PIPEnTRE_TRENB_SHIFT,
+ USB_PIPEnTRE_TRENB);
+ RZA_IO_RegWrite_16(&USB201.PIPE9TRE,
+ 1,
+ USB_PIPEnTRE_TRCLR_SHIFT,
+ USB_PIPEnTRE_TRCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_stop_transfer
+* Description : Stops the USB transfer in the pipe specified by the argument.
+* : After stopping the USB transfer, clears the buffer allocated in
+* : the pipe.
+* : After executing this function, allocation in FIF0 becomes USB_HOST_PIPE0;
+* : invalid. After executing this function, BRDY/NRDY/BEMP interrupt
+* : in the corresponding pipe becomes invalid. Sequence bit is also
+* : cleared.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_stop_transfer (uint16_t pipe)
+{
+ uint16_t usefifo;
+ uint32_t remain;
+
+ usb1_host_set_pid_nak(pipe);
+
+ usefifo = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ switch (usefifo)
+ {
+ case USB_HOST_D0FIFO_USE:
+ usb1_host_clear_transaction_counter(pipe);
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D1FIFO_USE:
+ usb1_host_clear_transaction_counter(pipe);
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D0FIFO_DMA:
+ remain = Userdef_USB_usb1_host_stop_dma0();
+ usb1_host_dma_stop_d0(pipe, remain);
+ usb1_host_clear_transaction_counter(pipe);
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ case USB_HOST_D1FIFO_DMA:
+ remain = Userdef_USB_usb1_host_stop_dma1();
+ usb1_host_dma_stop_d1(pipe, remain);
+ usb1_host_clear_transaction_counter(pipe);
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+
+ default:
+ usb1_host_clear_transaction_counter(pipe);
+ USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+ break;
+ }
+
+ /* Interrupt of pipe set is disabled */
+ usb1_host_disable_brdy_int(pipe);
+ usb1_host_disable_nrdy_int(pipe);
+ usb1_host_disable_bemp_int(pipe);
+
+#if(1) /* ohci_wrapp */
+#else
+ usb1_host_aclrm(pipe);
+#endif
+ usb1_host_set_csclr(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_dfacc_d0
+* Description : Sets the DFACC setting value in D0FIFO using the transfer size.
+* Arguments : uint16_t mbw ; MBW
+* : uint16_t count ; data count
+* Return Value : DFACC Access mode
+*******************************************************************************/
+static uint16_t usb1_host_set_dfacc_d0 (uint16_t mbw, uint32_t count)
+{
+ uint16_t dfacc = 0;
+
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+#else
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ if ((count % 32) == 0)
+ {
+ /* 32byte transfer */
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 2,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 2;
+ }
+ else if ((count % 16) == 0)
+ {
+ /* 16byte transfer */
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 1,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 1;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D0FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+#endif
+
+ return dfacc;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_dfacc_d1
+* Description : Sets the DFACC setting value in D0FIFO using the transfer size.
+* Arguments : uint16_t mbw ; MBW
+* : uint16_t count ; data count
+* Return Value : DFACC Access mode
+*******************************************************************************/
+static uint16_t usb1_host_set_dfacc_d1 (uint16_t mbw, uint32_t count)
+{
+ uint16_t dfacc = 0;
+
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+#else
+ if (mbw == USB_HOST_BITMBW_32)
+ {
+ if ((count % 32) == 0)
+ {
+ /* 32byte transfer */
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 2,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 2;
+ }
+ else if ((count % 16) == 0)
+ {
+ /* 16byte transfer */
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 1,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 1;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ }
+ else if (mbw == USB_HOST_BITMBW_16)
+ {
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ RZA_IO_RegWrite_16(&USB201.D1FBCFG,
+ 0,
+ USB_DnFBCFG_TENDE_SHIFT,
+ USB_DnFBCFG_TENDE);
+ dfacc = 0;
+ }
+#endif
+
+ return dfacc;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/common/usb1_host_dma.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,355 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_dma.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+/* #include "usb1_host_dmacdrv.h" */
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+static void usb1_host_dmaint(uint16_t fifo);
+static void usb1_host_dmaint_buf2fifo(uint16_t pipe);
+static void usb1_host_dmaint_fifo2buf(uint16_t pipe);
+
+
+/*******************************************************************************
+* Function Name: usb1_host_dma_stop_d0
+* Description : D0FIFO DMA stop
+* Arguments : uint16_t pipe : pipe number
+* : uint32_t remain : transfer byte
+* Return Value : none
+*******************************************************************************/
+void usb1_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
+{
+ uint16_t dtln;
+ uint16_t dfacc;
+ uint16_t buffer;
+ uint16_t sds_b = 1;
+
+ dfacc = RZA_IO_RegRead_16(&USB201.D0FBCFG,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ if (dfacc == 2)
+ {
+ sds_b = 32;
+ }
+ else if (dfacc == 1)
+ {
+ sds_b = 16;
+ }
+ else
+ {
+ if (g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
+ {
+ sds_b = 4;
+ }
+ else if (g_usb1_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
+ {
+ sds_b = 2;
+ }
+ else
+ {
+ sds_b = 1;
+ }
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ buffer = USB201.D0FIFOCTR;
+ dtln = (buffer & USB_HOST_BITDTLN);
+
+ if ((dtln % sds_b) != 0)
+ {
+ remain += (sds_b - (dtln % sds_b));
+ }
+ g_usb1_host_PipeDataSize[pipe] = (g_usb1_host_data_count[pipe] - remain);
+ g_usb1_host_data_count[pipe] = remain;
+ }
+ }
+
+ RZA_IO_RegWrite_16(&USB201.D0FIFOSEL,
+ 0,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dma_stop_d1
+* Description : D1FIFO DMA stop
+* Arguments : uint16_t pipe : pipe number
+* : uint32_t remain : transfer byte
+* Return Value : none
+*******************************************************************************/
+void usb1_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
+{
+ uint16_t dtln;
+ uint16_t dfacc;
+ uint16_t buffer;
+ uint16_t sds_b = 1;
+
+ dfacc = RZA_IO_RegRead_16(&USB201.D1FBCFG,
+ USB_DnFBCFG_DFACC_SHIFT,
+ USB_DnFBCFG_DFACC);
+ if (dfacc == 2)
+ {
+ sds_b = 32;
+ }
+ else if (dfacc == 1)
+ {
+ sds_b = 16;
+ }
+ else
+ {
+ if (g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
+ {
+ sds_b = 4;
+ }
+ else if (g_usb1_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
+ {
+ sds_b = 2;
+ }
+ else
+ {
+ sds_b = 1;
+ }
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
+ {
+ if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ buffer = USB201.D1FIFOCTR;
+ dtln = (buffer & USB_HOST_BITDTLN);
+
+ if ((dtln % sds_b) != 0)
+ {
+ remain += (sds_b - (dtln % sds_b));
+ }
+ g_usb1_host_PipeDataSize[pipe] = (g_usb1_host_data_count[pipe] - remain);
+ g_usb1_host_data_count[pipe] = remain;
+ }
+ }
+
+ RZA_IO_RegWrite_16(&USB201.D1FIFOSEL,
+ 0,
+ USB_DnFIFOSEL_DREQE_SHIFT,
+ USB_DnFIFOSEL_DREQE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dma_interrupt_d0fifo
+* Description : This function is DMA interrupt handler entry.
+* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
+* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
+* : specified by dma->fifo.
+* : Register this function as DMA complete interrupt.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb1_host_dma_interrupt_d0fifo (uint32_t int_sense)
+{
+ usb1_host_dmaint(USB_HOST_D0FIFO);
+ g_usb1_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dma_interrupt_d1fifo
+* Description : This function is DMA interrupt handler entry.
+* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
+* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
+* : specified by dma->fifo.
+* : Register this function as DMA complete interrupt.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb1_host_dma_interrupt_d1fifo (uint32_t int_sense)
+{
+ usb1_host_dmaint(USB_HOST_D1FIFO);
+ g_usb1_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dmaint
+* Description : This function is DMA transfer end interrupt
+* Arguments : uint16_t fifo ; fifo number
+* : ; USB_HOST_D0FIFO
+* : ; USB_HOST_D1FIFO
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_dmaint (uint16_t fifo)
+{
+ uint16_t pipe;
+
+ pipe = g_usb1_host_DmaPipe[fifo];
+
+ if (g_usb1_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
+ {
+ usb1_host_dmaint_buf2fifo(pipe);
+ }
+ else
+ {
+ usb1_host_dmaint_fifo2buf(pipe);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dmaint_fifo2buf
+* Description : Executes read completion from FIFO by DMAC.
+* Arguments : uint16_t pipe : pipe number
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_dmaint_fifo2buf (uint16_t pipe)
+{
+ uint32_t remain;
+ uint16_t useport;
+
+ if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
+ {
+ useport = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ if (useport == USB_HOST_D0FIFO_DMA)
+ {
+ remain = Userdef_USB_usb1_host_stop_dma0();
+ usb1_host_dma_stop_d0(pipe, remain);
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ if (g_usb1_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ else
+ {
+ usb1_host_enable_brdy_int(pipe);
+ }
+ }
+ }
+ else
+ {
+ remain = Userdef_USB_usb1_host_stop_dma1();
+ usb1_host_dma_stop_d1(pipe, remain);
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ if (g_usb1_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ else
+ {
+ usb1_host_enable_brdy_int(pipe);
+ }
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_dmaint_buf2fifo
+* Description : Executes write completion in FIFO by DMAC.
+* Arguments : uint16_t pipe : pipe number
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_dmaint_buf2fifo (uint16_t pipe)
+{
+ uint16_t useport;
+ uint32_t remain;
+
+ useport = (uint16_t)(g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
+
+ if (useport == USB_HOST_D0FIFO_DMA)
+ {
+ remain = Userdef_USB_usb1_host_stop_dma0();
+ usb1_host_dma_stop_d0(pipe, remain);
+
+ if (g_usb1_host_DmaBval[USB_HOST_D0FIFO] != 0)
+ {
+ RZA_IO_RegWrite_16(&USB201.D0FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL);
+ }
+ }
+ else
+ {
+ remain = Userdef_USB_usb1_host_stop_dma1();
+ usb1_host_dma_stop_d1(pipe, remain);
+
+ if (g_usb1_host_DmaBval[USB_HOST_D1FIFO] != 0)
+ {
+ RZA_IO_RegWrite_16(&USB201.D1FIFOCTR,
+ 1,
+ USB_DnFIFOCTR_BVAL_SHIFT,
+ USB_DnFIFOCTR_BVAL);
+ }
+ }
+
+ usb1_host_enable_bemp_int(pipe);
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/common/usb1_host_intrn.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,285 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_intrn.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#if(1) /* ohci_wrapp */
+#include "ohci_wrapp_RZ_A1_local.h"
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_brdy_int
+* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
+* : According to the pipe that interrupt is generated in,
+* : reads/writes buffer allocated in the pipe.
+* : This function is executed in the BRDY interrupt handler.
+* : This function clears BRDY interrupt status and BEMP interrupt
+* : status.
+* Arguments : uint16_t status ; BRDYSTS Register Value
+* : uint16_t int_enb ; BRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_brdy_int (uint16_t status, uint16_t int_enb)
+{
+ uint32_t int_sense = 0;
+ uint16_t pipe;
+ uint16_t pipebit;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ pipebit = g_usb1_host_bit_set[pipe];
+
+ if ((status & pipebit) && (int_enb & pipebit))
+ {
+ USB201.BRDYSTS = (uint16_t)~pipebit;
+ USB201.BEMPSTS = (uint16_t)~pipebit;
+
+ if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
+ {
+ if (g_usb1_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
+ {
+ usb1_host_dma_interrupt_d0fifo(int_sense);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ usb1_host_read_dma(pipe);
+ usb1_host_disable_brdy_int(pipe);
+ }
+ else
+ {
+ USB201.D0FIFOCTR = USB_HOST_BITBCLR;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ }
+ else if ((g_usb1_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
+ {
+ if (g_usb1_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
+ {
+ usb1_host_dma_interrupt_d1fifo(int_sense);
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
+ {
+ usb1_host_read_dma(pipe);
+ usb1_host_disable_brdy_int(pipe);
+ }
+ else
+ {
+ USB201.D1FIFOCTR = USB_HOST_BITBCLR;
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+ }
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
+ {
+ usb1_host_read_buffer(pipe);
+ }
+ else
+ {
+ usb1_host_write_buffer(pipe);
+ }
+ }
+#if(1) /* ohci_wrapp */
+ switch (g_usb1_host_pipe_status[pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
+ break;
+ case USB_HOST_PIPE_NORES:
+ case USB_HOST_PIPE_STALL:
+ case USB_HOST_PIPE_ERROR:
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+ break;
+ default:
+ /* Do Nothing */
+ break;
+ }
+#endif
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_nrdy_int
+* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
+* : Checks NRDY interrupt cause by PID. When the cause if STALL,
+* : regards the pipe state as STALL and ends the processing.
+* : Then the cause is not STALL, increments the error count to
+* : communicate again. When the error count is 3, determines
+* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
+* : This function is executed in the NRDY interrupt handler.
+* : This function clears NRDY interrupt status.
+* Arguments : uint16_t status ; NRDYSTS Register Value
+* : uint16_t int_enb ; NRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_nrdy_int (uint16_t status, uint16_t int_enb)
+{
+ uint16_t pid;
+ uint16_t pipe;
+ uint16_t bitcheck;
+
+ bitcheck = (uint16_t)(status & int_enb);
+
+ USB201.NRDYSTS = (uint16_t)~status;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ if ((bitcheck&g_usb1_host_bit_set[pipe]) == g_usb1_host_bit_set[pipe])
+ {
+ if (RZA_IO_RegRead_16(&USB201.SYSCFG0,
+ USB_SYSCFG_DCFM_SHIFT,
+ USB_SYSCFG_DCFM) == 1)
+ {
+ if (g_usb1_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
+ {
+ pid = usb1_host_get_pid(pipe);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_DEVICENOTRESPONDING);
+#else
+ g_usb1_host_PipeIgnore[pipe]++;
+
+ if (g_usb1_host_PipeIgnore[pipe] == 3)
+ {
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
+ }
+ else
+ {
+ usb1_host_set_pid_buf(pipe);
+ }
+#endif
+ }
+ }
+ }
+ else
+ {
+ /* USB Function */
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_bemp_int
+* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
+* Arguments : uint16_t status ; BEMPSTS Register Value
+* : uint16_t int_enb ; BEMPENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_bemp_int (uint16_t status, uint16_t int_enb)
+{
+ uint16_t pid;
+ uint16_t pipe;
+ uint16_t bitcheck;
+ uint16_t inbuf;
+
+ bitcheck = (uint16_t)(status & int_enb);
+
+ USB201.BEMPSTS = (uint16_t)~status;
+
+ for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
+ {
+ if ((bitcheck&g_usb1_host_bit_set[pipe]) == g_usb1_host_bit_set[pipe])
+ {
+ pid = usb1_host_get_pid(pipe);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+ inbuf = usb1_host_get_inbuf(pipe);
+
+ if (inbuf == 0)
+ {
+ usb1_host_disable_bemp_int(pipe);
+ usb1_host_set_pid_nak(pipe);
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
+#endif
+ }
+ }
+ }
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/common/usb1_host_lib.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,1598 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_lib.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#if(1) /* ohci_wrapp */
+#include "MBRZA1H.h" /* INTC Driver Header */
+#else
+#include "devdrv_intc.h" /* INTC Driver Header */
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_enable_brdy_int
+* Description : Enables BRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_enable_brdy_int (uint16_t pipe)
+{
+ /* enable brdy interrupt */
+ USB201.BRDYENB |= (uint16_t)g_usb1_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_disable_brdy_int
+* Description : Disables BRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : BRDY. Enables BRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After disabling BRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_disable_brdy_int (uint16_t pipe)
+{
+ /* disable brdy interrupt */
+ USB201.BRDYENB &= (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clear_brdy_sts
+* Description : Clear BRDY interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clear_brdy_sts (uint16_t pipe)
+{
+ /* clear brdy status */
+ USB201.BRDYSTS = (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_enable_bemp_int
+* Description : Enables BEMP interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BEMP, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_enable_bemp_int (uint16_t pipe)
+{
+ /* enable bemp interrupt */
+ USB201.BEMPENB |= (uint16_t)g_usb1_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_disable_bemp_int
+* Description : Disables BEMP interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : BEMP. Enables BEMP interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling BEMP, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_disable_bemp_int (uint16_t pipe)
+{
+ /* disable bemp interrupt */
+ USB201.BEMPENB &= (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clear_bemp_sts
+* Description : Clear BEMP interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clear_bemp_sts (uint16_t pipe)
+{
+ /* clear bemp status */
+ USB201.BEMPSTS = (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_enable_nrdy_int
+* Description : Enables NRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before enabling
+* : NRDY. Enables NRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After enabling NRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_enable_nrdy_int (uint16_t pipe)
+{
+ /* enable nrdy interrupt */
+ USB201.NRDYENB |= (uint16_t)g_usb1_host_bit_set[pipe];
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_disable_nrdy_int
+* Description : Disables NRDY interrupt in the pipe spceified by the argument.
+* : Disables BEMP/NRDY/BRDY interrupts in all pipes before disabling
+* : NRDY. Disables NRDY interrupt in the pipe specified by the argument
+* : in the disabled status. After disabling NRDY, recover all
+* : BEMP/NRDY/BRDY disabled/enabled status.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_disable_nrdy_int (uint16_t pipe)
+{
+ /* disable nrdy interrupt */
+ USB201.NRDYENB &= (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clear_nrdy_sts
+* Description : Clear NRDY interrupt status in the pipe spceified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clear_nrdy_sts (uint16_t pipe)
+{
+ /* clear nrdy status */
+ USB201.NRDYSTS = (uint16_t)~(g_usb1_host_bit_set[pipe]);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_is_hispeed
+* Description : Returns the result of USB reset hand shake (RHST) as
+* : return value.
+* Arguments : none
+* Return Value : USB_HOST_HIGH_SPEED ; Hi-Speed
+* : USB_HOST_FULL_SPEED ; Full-Speed
+* : USB_HOST_LOW_SPEED ; Low-Speed
+* : USB_HOST_NON_SPEED ; error
+*******************************************************************************/
+uint16_t usb1_host_is_hispeed (void)
+{
+ uint16_t rhst;
+ uint16_t speed;
+
+ rhst = RZA_IO_RegRead_16(&USB201.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (rhst == USB_HOST_HSMODE)
+ {
+ speed = USB_HOST_HIGH_SPEED;
+ }
+ else if (rhst == USB_HOST_FSMODE)
+ {
+ speed = USB_HOST_FULL_SPEED;
+ }
+ else if (rhst == USB_HOST_LSMODE)
+ {
+ speed = USB_HOST_LOW_SPEED;
+ }
+ else
+ {
+ speed = USB_HOST_NON_SPEED;
+ }
+
+ return speed;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_is_hispeed_enable
+* Description : Returns the USB High-Speed connection enabled status as
+* : return value.
+* Arguments : none
+* Return Value : USB_HOST_YES : Hi-Speed Enable
+* : USB_HOST_NO : Hi-Speed Disable
+*******************************************************************************/
+uint16_t usb1_host_is_hispeed_enable (void)
+{
+ uint16_t ret;
+
+ ret = USB_HOST_NO;
+
+ if (RZA_IO_RegRead_16(&USB201.SYSCFG0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE) == 1)
+ {
+ ret = USB_HOST_YES;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_pid_buf
+* Description : Enables communicaqtion in the pipe specified by the argument
+* : (BUF).
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_pid_buf (uint16_t pipe)
+{
+ uint16_t pid;
+
+ pid = usb1_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_STALL2)
+ {
+ usb1_host_set_pid_nak(pipe);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ USB_HOST_PID_BUF,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ USB_HOST_PID_BUF,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_pid_nak
+* Description : Disables communication (NAK) in the pipe specified by the argument.
+* : When the pipe status was enabling communication (BUF) before
+* : executing before executing this function, waits in the software
+* : until the pipe becomes ready after setting disabled.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_pid_nak (uint16_t pipe)
+{
+ uint16_t pid;
+ uint16_t pbusy;
+ uint32_t loop;
+
+ pid = usb1_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_STALL2)
+ {
+ usb1_host_set_pid_stall(pipe);
+ }
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ USB_HOST_PID_NAK,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ USB_HOST_PID_NAK,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+
+ if (pid == USB_HOST_PID_BUF)
+ {
+ for (loop = 0; loop < 200; loop++)
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ pbusy = RZA_IO_RegRead_16(&USB201.DCPCTR,
+ USB_DCPCTR_PBUSY_SHIFT,
+ USB_DCPCTR_PBUSY);
+ break;
+
+ case USB_HOST_PIPE1:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE1CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE2:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE2CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE3:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE3CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE4:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE4CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE5:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE5CTR,
+ USB_PIPEnCTR_1_5_PBUSY_SHIFT,
+ USB_PIPEnCTR_1_5_PBUSY);
+ break;
+
+ case USB_HOST_PIPE6:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE6CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE7:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE7CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE8:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE8CTR,
+ USB_PIPEnCTR_6_8_PBUSY_SHIFT,
+ USB_PIPEnCTR_6_8_PBUSY);
+ break;
+
+ case USB_HOST_PIPE9:
+ pbusy = RZA_IO_RegRead_16(&USB201.PIPE9CTR,
+ USB_PIPEnCTR_9_PBUSY_SHIFT,
+ USB_PIPEnCTR_9_PBUSY);
+ break;
+
+ default:
+ pbusy = 1;
+ break;
+ }
+
+ if (pbusy == 0)
+ {
+ break;
+ }
+
+ Userdef_USB_usb1_host_delay_500ns();
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_pid_stall
+* Description : Disables communication (STALL) in the pipe specified by the
+* : argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_pid_stall (uint16_t pipe)
+{
+ uint16_t pid;
+
+ pid = usb1_host_get_pid(pipe);
+
+ if (pid == USB_HOST_PID_BUF)
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ USB_HOST_PID_STALL2,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ USB_HOST_PID_STALL2,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+ }
+ else
+ {
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ USB_HOST_PID_STALL,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ USB_HOST_PID_STALL,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ break;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clear_pid_stall
+* Description : Disables communication (NAK) in the pipe specified by the argument.
+* Arguments : uint16_t pipe ; pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clear_pid_stall (uint16_t pipe)
+{
+ usb1_host_set_pid_nak(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_pid
+* Description : Returns the pipe state specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : PID
+*******************************************************************************/
+uint16_t usb1_host_get_pid (uint16_t pipe)
+{
+ uint16_t pid;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ pid = RZA_IO_RegRead_16(&USB201.DCPCTR,
+ USB_DCPCTR_PID_SHIFT,
+ USB_DCPCTR_PID);
+ break;
+
+ case USB_HOST_PIPE1:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE1CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE2:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE2CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE3:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE3CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE4:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE4CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE5:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE5CTR,
+ USB_PIPEnCTR_1_5_PID_SHIFT,
+ USB_PIPEnCTR_1_5_PID);
+ break;
+
+ case USB_HOST_PIPE6:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE6CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE7:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE7CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE8:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE8CTR,
+ USB_PIPEnCTR_6_8_PID_SHIFT,
+ USB_PIPEnCTR_6_8_PID);
+ break;
+
+ case USB_HOST_PIPE9:
+ pid = RZA_IO_RegRead_16(&USB201.PIPE9CTR,
+ USB_PIPEnCTR_9_PID_SHIFT,
+ USB_PIPEnCTR_9_PID);
+ break;
+
+ default:
+ pid = 0;
+ break;
+ }
+
+ return pid;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_csclr
+* Description : CSPLIT status clear setting of sprit transaction in specified
+* : pipe is performed.
+* : When SQSET bit or SQCLR bit, and SQSET bit or SQCLR bit
+* : in DCPCTR register are continuously changed (when the sequence
+* : toggle bit of data PID is continuously changed over two or more pipes),
+* : the access cycle with 120 ns and more than 5 cycle bus clock is necessary.
+* : Do not set both SQCLR bit and SQSET bit to 1 at the same time.
+* : In addition, both bits should be operated after PID is set to NAK.
+* : However, when it is set to the isochronous transfer as the transfer type
+* : (TYPE=11), writing in SQSET bit is disabled.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_csclr (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ 1,
+ USB_DCPCTR_CSCLR_SHIFT,
+ USB_DCPCTR_CSCLR);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_CSCLR_SHIFT,
+ USB_PIPEnCTR_1_5_CSCLR);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_CSCLR_SHIFT,
+ USB_PIPEnCTR_6_8_CSCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_CSCLR_SHIFT,
+ USB_PIPEnCTR_9_CSCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_sqclr
+* Description : Sets the sequence bit of the pipe specified by the argument to
+* : DATA0.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_sqclr (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ 1,
+ USB_DCPCTR_SQCLR_SHIFT,
+ USB_DCPCTR_SQCLR);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQCLR_SHIFT,
+ USB_PIPEnCTR_1_5_SQCLR);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQCLR_SHIFT,
+ USB_PIPEnCTR_6_8_SQCLR);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_SQCLR_SHIFT,
+ USB_PIPEnCTR_9_SQCLR);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_sqset
+* Description : Sets the sequence bit of the pipe specified by the argument to
+* : DATA1.
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_sqset (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ RZA_IO_RegWrite_16(&USB201.DCPCTR,
+ 1,
+ USB_DCPCTR_SQSET_SHIFT,
+ USB_DCPCTR_SQSET);
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_SQSET_SHIFT,
+ USB_PIPEnCTR_1_5_SQSET);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_SQSET_SHIFT,
+ USB_PIPEnCTR_6_8_SQSET);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_SQSET_SHIFT,
+ USB_PIPEnCTR_9_SQSET);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_sqmon
+* Description : Toggle bit of specified pipe is obtained
+* Arguments : uint16_t pipe ; Pipe number
+* Return Value : sqmon
+*******************************************************************************/
+uint16_t usb1_host_get_sqmon (uint16_t pipe)
+{
+ uint16_t sqmon;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ sqmon = RZA_IO_RegRead_16(&USB201.DCPCTR,
+ USB_DCPCTR_SQMON_SHIFT,
+ USB_DCPCTR_SQMON);
+ break;
+
+ case USB_HOST_PIPE1:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE1CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE2:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE2CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE3:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE3CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE4:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE4CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE5:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE5CTR,
+ USB_PIPEnCTR_1_5_SQMON_SHIFT,
+ USB_PIPEnCTR_1_5_SQMON);
+ break;
+
+ case USB_HOST_PIPE6:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE6CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE7:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE7CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE8:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE8CTR,
+ USB_PIPEnCTR_6_8_SQMON_SHIFT,
+ USB_PIPEnCTR_6_8_SQMON);
+ break;
+
+ case USB_HOST_PIPE9:
+ sqmon = RZA_IO_RegRead_16(&USB201.PIPE9CTR,
+ USB_PIPEnCTR_9_SQMON_SHIFT,
+ USB_PIPEnCTR_9_SQMON);
+ break;
+
+ default:
+ sqmon = 0;
+ break;
+ }
+
+ return sqmon;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_aclrm
+* Description : The buffer of specified pipe is initialized
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb1_host_aclrm (uint16_t pipe)
+{
+ usb1_host_set_aclrm(pipe);
+ usb1_host_clr_aclrm(pipe);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_aclrm
+* Description : The auto buffer clear mode of specified pipe is enabled
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_aclrm (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ 1,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ 1,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ 1,
+ USB_PIPEnCTR_9_ACLRM_SHIFT,
+ USB_PIPEnCTR_9_ACLRM);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_clr_aclrm
+* Description : The auto buffer clear mode of specified pipe is enabled
+* Arguments : uint16_t pipe : Pipe
+* Return Value : none
+*******************************************************************************/
+void usb1_host_clr_aclrm (uint16_t pipe)
+{
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ break;
+
+ case USB_HOST_PIPE1:
+ RZA_IO_RegWrite_16(&USB201.PIPE1CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE2:
+ RZA_IO_RegWrite_16(&USB201.PIPE2CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE3:
+ RZA_IO_RegWrite_16(&USB201.PIPE3CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE4:
+ RZA_IO_RegWrite_16(&USB201.PIPE4CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE5:
+ RZA_IO_RegWrite_16(&USB201.PIPE5CTR,
+ 0,
+ USB_PIPEnCTR_1_5_ACLRM_SHIFT,
+ USB_PIPEnCTR_1_5_ACLRM);
+ break;
+
+ case USB_HOST_PIPE6:
+ RZA_IO_RegWrite_16(&USB201.PIPE6CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE7:
+ RZA_IO_RegWrite_16(&USB201.PIPE7CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE8:
+ RZA_IO_RegWrite_16(&USB201.PIPE8CTR,
+ 0,
+ USB_PIPEnCTR_6_8_ACLRM_SHIFT,
+ USB_PIPEnCTR_6_8_ACLRM);
+ break;
+
+ case USB_HOST_PIPE9:
+ RZA_IO_RegWrite_16(&USB201.PIPE9CTR,
+ 0,
+ USB_PIPEnCTR_9_ACLRM_SHIFT,
+ USB_PIPEnCTR_9_ACLRM);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_inbuf
+* Description : Returns INBUFM of the pipe specified by the argument.
+* Arguments : uint16_t pipe ; Pipe Number
+* Return Value : inbuf
+*******************************************************************************/
+uint16_t usb1_host_get_inbuf (uint16_t pipe)
+{
+ uint16_t inbuf;
+
+ switch (pipe)
+ {
+ case USB_HOST_PIPE0:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE1:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE1CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE2:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE2CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE3:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE3CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE4:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE4CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE5:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE5CTR,
+ USB_PIPEnCTR_1_5_INBUFM_SHIFT,
+ USB_PIPEnCTR_1_5_INBUFM);
+ break;
+
+ case USB_HOST_PIPE6:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE7:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE8:
+ inbuf = 0;
+ break;
+
+ case USB_HOST_PIPE9:
+ inbuf = RZA_IO_RegRead_16(&USB201.PIPE9CTR,
+ USB_PIPEnCTR_9_INBUFM_SHIFT,
+ USB_PIPEnCTR_9_INBUFM);
+ break;
+
+ default:
+ inbuf = 0;
+ break;
+ }
+
+ return inbuf;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_setting_interrupt
+* Description : Sets the USB module interrupt level.
+* Arguments : uint8_t level ; interrupt level
+* Return Value : none
+*******************************************************************************/
+void usb1_host_setting_interrupt (uint8_t level)
+{
+#if(1) /* ohci_wrapp */
+ IRQn_Type d0fifo_dmaintid;
+ IRQn_Type d1fifo_dmaintid;
+
+ InterruptHandlerRegister(USBI1_IRQn, usb1_host_interrupt);
+ GIC_SetPriority(USBI1_IRQn, level);
+ GIC_EnableIRQ(USBI1_IRQn);
+
+ d0fifo_dmaintid = (IRQn_Type)Userdef_USB_usb1_host_d0fifo_dmaintid();
+
+ if (d0fifo_dmaintid != 0xFFFF)
+ {
+ InterruptHandlerRegister(d0fifo_dmaintid, usb1_host_dma_interrupt_d0fifo);
+ GIC_SetPriority(d0fifo_dmaintid, level);
+ GIC_EnableIRQ(d0fifo_dmaintid);
+ }
+
+ d1fifo_dmaintid = (IRQn_Type)Userdef_USB_usb1_host_d1fifo_dmaintid();
+
+ if (d1fifo_dmaintid != 0xFFFF)
+ {
+ InterruptHandlerRegister(d1fifo_dmaintid, usb1_host_dma_interrupt_d1fifo);
+ GIC_SetPriority(d1fifo_dmaintid, level);
+ GIC_EnableIRQ(d1fifo_dmaintid);
+ }
+#else
+ uint16_t d0fifo_dmaintid;
+ uint16_t d1fifo_dmaintid;
+
+ R_INTC_RegistIntFunc(INTC_ID_USBI1, usb1_host_interrupt);
+ R_INTC_SetPriority(INTC_ID_USBI1, level);
+ R_INTC_Enable(INTC_ID_USBI1);
+
+ d0fifo_dmaintid = Userdef_USB_usb1_host_d0fifo_dmaintid();
+
+ if (d0fifo_dmaintid != 0xFFFF)
+ {
+ R_INTC_RegistIntFunc(d0fifo_dmaintid, usb1_host_dma_interrupt_d0fifo);
+ R_INTC_SetPriority(d0fifo_dmaintid, level);
+ R_INTC_Enable(d0fifo_dmaintid);
+ }
+
+ d1fifo_dmaintid = Userdef_USB_usb1_host_d1fifo_dmaintid();
+
+ if (d1fifo_dmaintid != 0xFFFF)
+ {
+ R_INTC_RegistIntFunc(d1fifo_dmaintid, usb1_host_dma_interrupt_d1fifo);
+ R_INTC_SetPriority(d1fifo_dmaintid, level);
+ R_INTC_Enable(d1fifo_dmaintid);
+ }
+#endif
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_reset_module
+* Description : Initializes the USB module.
+* : Enables providing clock to the USB module.
+* : Sets USB bus wait register.
+* Arguments : uint16_t clockmode ; 48MHz ; USBHCLOCK_X1_48MHZ
+* : ; 12MHz ; USBHCLOCK_EXTAL_12MHZ
+* Return Value : none
+*******************************************************************************/
+void usb1_host_reset_module (uint16_t clockmode)
+{
+ if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
+ USB_SYSCFG_UPLLE_SHIFT,
+ USB_SYSCFG_UPLLE) == 1)
+ {
+ if ((USB200.SYSCFG0 & USB_HOST_BITUCKSEL) != clockmode)
+ {
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ USB201.SYSCFG0 = 0;
+ USB200.SYSCFG0 = 0;
+ USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
+ Userdef_USB_usb1_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ Userdef_USB_usb1_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 0,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ USB201.SYSCFG0 = 0;
+ USB200.SYSCFG0 = 0;
+ USB200.SYSCFG0 = (USB_HOST_BITUPLLE | clockmode);
+ Userdef_USB_usb1_host_delay_xms(1);
+ RZA_IO_RegWrite_16(&USB200.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ RZA_IO_RegWrite_16(&USB201.SUSPMODE,
+ 1,
+ USB_SUSPMODE_SUSPM_SHIFT,
+ USB_SUSPMODE_SUSPM);
+ }
+
+ USB201.BUSWAIT = (uint16_t)(USB_HOST_BUSWAIT_05 & USB_HOST_BITBWAIT);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_buf_size
+* Description : Obtains pipe buffer size specified by the argument and
+* : maximum packet size of the USB device in use.
+* : When USB_HOST_PIPE0 is specified by the argument, obtains the maximum
+* : packet size of the USB device using the corresponding pipe.
+* : For the case that USB_HOST_PIPE0 is not assigned by the argument, when the
+* : corresponding pipe is in continuous transfer mode,
+* : obtains the buffer size allocated in the corresponcing pipe,
+* : when incontinuous transfer, obtains maximum packet size.
+* Arguments : uint16_t ; pipe Number
+* Return Value : Maximum packet size or buffer size
+*******************************************************************************/
+uint16_t usb1_host_get_buf_size (uint16_t pipe)
+{
+ uint16_t size;
+ uint16_t bufsize;
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ size = RZA_IO_RegRead_16(&USB201.DCPMAXP,
+ USB_DCPMAXP_MXPS_SHIFT,
+ USB_DCPMAXP_MXPS);
+ }
+ else
+ {
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[pipe], USB_PIPECFG_CNTMD_SHIFT, USB_PIPECFG_CNTMD) == 1)
+ {
+ bufsize = RZA_IO_RegRead_16(&g_usb1_host_pipebuf[pipe], USB_PIPEBUF_BUFSIZE_SHIFT, USB_PIPEBUF_BUFSIZE);
+ size = (uint16_t)((bufsize + 1) * USB_HOST_PIPExBUF);
+ }
+ else
+ {
+ size = RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
+ }
+ }
+ return size;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_mxps
+* Description : Obtains maximum packet size of the USB device using the pipe
+* : specified by the argument.
+* Arguments : uint16_t ; Pipe Number
+* Return Value : Max Packet Size
+*******************************************************************************/
+uint16_t usb1_host_get_mxps (uint16_t pipe)
+{
+ uint16_t size;
+
+ if (pipe == USB_HOST_PIPE0)
+ {
+ size = RZA_IO_RegRead_16(&USB201.DCPMAXP,
+ USB_DCPMAXP_MXPS_SHIFT,
+ USB_DCPMAXP_MXPS);
+ }
+ else
+ {
+ size = RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[pipe], USB_PIPEMAXP_MXPS_SHIFT, USB_PIPEMAXP_MXPS);
+ }
+
+ return size;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_controlrw.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,434 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_controlrw.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_CtrlTransStart
+* Description : Executes USB control transfer.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* : uint8_t *Buf ; Data buffer
+* Return Value : DEVDRV_SUCCESS ; SUCCESS
+* : DEVDRV_ERROR ; ERROR
+*******************************************************************************/
+int32_t usb1_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
+ uint16_t Indx, uint16_t Len, uint8_t * Buf)
+{
+ if (g_usb1_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
+ {
+ RZA_IO_RegWrite_16(&USB201.SOFCFG,
+ 1,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.SOFCFG,
+ 0,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+
+ USB201.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb1_host_default_max_packet[devadr]);
+
+ if (g_usb1_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
+ {
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ g_usb1_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
+
+ if (Len == 0)
+ {
+ g_usb1_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
+ }
+ else
+ {
+ if ((Req & 0x0080) != 0)
+ {
+ g_usb1_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
+ }
+ else
+ {
+ g_usb1_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
+ }
+ }
+
+ g_usb1_host_SavReq = Req; /* save request */
+ g_usb1_host_SavVal = Val;
+ g_usb1_host_SavIndx = Indx;
+ g_usb1_host_SavLen = Len;
+ }
+ else
+ {
+ if ((g_usb1_host_SavReq != Req) || (g_usb1_host_SavVal != Val)
+ || (g_usb1_host_SavIndx != Indx) || (g_usb1_host_SavLen != Len))
+ {
+ return DEVDRV_ERROR;
+ }
+ }
+
+ switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ /* --------------- SETUP STAGE --------------- */
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
+ usb1_host_SetupStage(Req, Val, Indx, Len);
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_WRITE:
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
+ break;
+
+ case USB_HOST_MODE_READ:
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_DATA;
+ break;
+
+ case USB_HOST_MODE_NO_DATA:
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ break;
+
+ default:
+ break;
+ }
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
+ if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
+ }
+ break;
+
+ /* --------------- DATA STAGE --------------- */
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
+ switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_WRITE:
+ usb1_host_CtrlWriteStart((uint32_t)Len, Buf);
+ break;
+
+ case USB_HOST_MODE_READ:
+ usb1_host_CtrlReadStart((uint32_t)Len, Buf);
+ break;
+
+ default:
+ break;
+ }
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
+ if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
+ usb1_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb1_host_set_pid_buf(USB_HOST_PIPE0);
+ }
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ break;
+
+ /* --------------- STATUS STAGE --------------- */
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
+ usb1_host_StatusStage();
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ /* do nothing */
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
+ usb1_host_set_pid_nak(USB_HOST_PIPE0);
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
+ if (g_usb1_host_PipeIgnore[USB_HOST_PIPE0] == 3)
+ {
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ }
+ else
+ {
+ g_usb1_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
+ usb1_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb1_host_set_pid_buf(USB_HOST_PIPE0);
+ }
+ break;
+
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ break;
+
+ default:
+ break;
+ }
+
+ if (g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
+ {
+ RZA_IO_RegWrite_16(&USB201.SOFCFG,
+ 0,
+ USB_SOFCFG_TRNENSEL_SHIFT,
+ USB_SOFCFG_TRNENSEL);
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_SetupStage
+* Description : Executes USB control transfer/set up stage.
+* Arguments : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* Return Value : none
+*******************************************************************************/
+void usb1_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
+{
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ USB201.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
+ USB201.USBREQ = Req;
+ USB201.USBVAL = Val;
+ USB201.USBINDX = Indx;
+ USB201.USBLENG = Len;
+ USB201.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_StatusStage
+* Description : Executes USB control transfer/status stage.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_StatusStage (void)
+{
+ uint8_t Buf1[16];
+
+ switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD)))
+ {
+ case USB_HOST_MODE_READ:
+ usb1_host_CtrlWriteStart((uint32_t)0, (uint8_t*)&Buf1);
+ break;
+
+ case USB_HOST_MODE_WRITE:
+ usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
+ break;
+
+ case USB_HOST_MODE_NO_DATA:
+ usb1_host_CtrlReadStart((uint32_t)0, (uint8_t*)&Buf1);
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_CtrlWriteStart
+* Description : Executes USB control transfer/data stage(write).
+* Arguments : uint32_t Bsize ; Data Size
+* : uint8_t *Table ; Data Table Address
+* Return Value : USB_HOST_WRITESHRT ; End of data write
+* : USB_HOST_WRITEEND ; End of data write (not null)
+* : USB_HOST_WRITING ; Continue of data write
+* : USB_HOST_FIFOERROR ; FIFO access error
+*******************************************************************************/
+uint16_t usb1_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
+{
+ uint16_t EndFlag_K;
+ uint16_t mbw;
+
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ usb1_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
+ g_usb1_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
+ g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
+
+ USB201.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
+#if(1) /* ohci_wrapp */
+ Userdef_USB_usb1_host_delay_10us(3);
+#endif
+ RZA_IO_RegWrite_16(&USB201.DCPCFG,
+ 1,
+ USB_DCPCFG_DIR_SHIFT,
+ USB_DCPCFG_DIR);
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
+ USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+
+ usb1_host_clear_pid_stall(USB_HOST_PIPE0);
+ EndFlag_K = usb1_host_write_buffer_c(USB_HOST_PIPE0);
+ /* Host Control sequence */
+ switch (EndFlag_K)
+ {
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb1_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_WRITEEND: /* End of data write (not null) */
+ case USB_HOST_WRITING: /* Continue of data write */
+ usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb1_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ break;
+
+ default:
+ break;
+ }
+ usb1_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
+ return (EndFlag_K); /* End or Err or Continue */
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_CtrlReadStart
+* Description : Executes USB control transfer/data stage(read).
+* Arguments : uint32_t Bsize ; Data Size
+* : uint8_t *Table ; Data Table Address
+* Return Value : none
+*******************************************************************************/
+void usb1_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
+{
+ uint16_t mbw;
+
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DOING;
+
+ usb1_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
+ g_usb1_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
+ g_usb1_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
+
+ USB201.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
+#if(1) /* ohci_wrapp */
+ Userdef_USB_usb1_host_delay_10us(3);
+#endif
+ RZA_IO_RegWrite_16(&USB201.DCPCFG,
+ 0,
+ USB_DCPCFG_DIR_SHIFT,
+ USB_DCPCFG_DIR);
+
+ mbw = usb1_host_get_mbw(g_usb1_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb1_host_data_pointer[USB_HOST_PIPE0]);
+ usb1_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
+ USB201.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
+
+ usb1_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
+ usb1_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
+ usb1_host_clear_pid_stall(USB_HOST_PIPE0);
+ usb1_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_drv_api.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,889 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_drv_api.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb1_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_api_host_init
+* Description : Initializes USB module in the USB host mode.
+* : USB connection is executed when executing this function in
+* : the states that USB device isconnected to the USB port.
+* Arguments : uint8_t int_level : USB Module interrupt level
+* : USBU16 mode : USB_HOST_HIGH_SPEED
+* : USB_HOST_FULL_SPEED
+* : uint16_t clockmode : USB Clock mode
+* Return Value : USB detach or attach
+* : USB_HOST_ATTACH
+* : USB_HOST_DETACH
+*******************************************************************************/
+uint16_t usb1_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
+{
+ uint16_t connect;
+ volatile uint8_t dummy_buf;
+
+ CPG.STBCR7 &= 0xfc; /*The clock of USB0/1 modules is permitted */
+ dummy_buf = CPG.STBCR7; /* (Dummy read) */
+
+ g_usb1_host_SupportUsbDeviceSpeed = mode;
+
+ usb1_host_setting_interrupt(int_level);
+ usb1_host_reset_module(clockmode);
+
+ g_usb1_host_bchg_flag = USB_HOST_NO;
+ g_usb1_host_detach_flag = USB_HOST_NO;
+ g_usb1_host_attach_flag = USB_HOST_NO;
+
+ g_usb1_host_driver_state = USB_HOST_DRV_DETACHED;
+ g_usb1_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
+
+ usb1_host_InitModule();
+
+ connect = usb1_host_CheckAttach();
+
+ if (connect == USB_HOST_ATTACH)
+ {
+ g_usb1_host_attach_flag = USB_HOST_YES;
+ }
+ else
+ {
+ usb1_host_UsbDetach2();
+ }
+
+ return connect;
+}
+
+#if(1) /* ohci_wrapp */
+#else
+/*******************************************************************************
+* Function Name: usb1_api_host_enumeration
+* Description : Initializes USB module in the USB host mode.
+* : USB connection is executed when executing this function in
+* : the states that USB device isconnected to the USB port.
+* Arguments : uint16_t devadr : device address
+* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
+* : DEVDRV_SUCCESS : device enumeration success
+* : DEVDRV_ERROR : device enumeration error
+*******************************************************************************/
+int32_t usb1_api_host_enumeration (uint16_t devadr)
+{
+ int32_t ret;
+ uint16_t driver_sts;
+
+ g_usb1_host_setUsbAddress = devadr;
+
+ while (1)
+ {
+ driver_sts = usb1_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ ret = DEVDRV_USBH_DETACH_ERR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_CONFIGURED)
+ {
+ ret = DEVDRV_SUCCESS;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_STALL)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+
+ if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ while (1)
+ {
+ driver_sts = usb1_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_detach
+* Description : USB detach routine
+* Arguments : none
+* Return Value : USB_HOST_DETACH : USB detach
+* : USB_HOST_ATTACH : USB attach
+* : DEVDRV_ERROR : error
+*******************************************************************************/
+int32_t usb1_api_host_detach (void)
+{
+ int32_t ret;
+ uint16_t driver_sts;
+
+ while (1)
+ {
+ driver_sts = usb1_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ ret = USB_HOST_DETACH;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_CONFIGURED)
+ {
+ ret = USB_HOST_ATTACH;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_STALL)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ ret = DEVDRV_ERROR;
+ break;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+
+ if (driver_sts == USB_HOST_DRV_NORES)
+ {
+ while (1)
+ {
+ driver_sts = usb1_api_host_GetUsbDeviceState();
+
+ if (driver_sts == USB_HOST_DRV_DETACHED)
+ {
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_data_in
+* Description : Executes USB transfer as data-in in the argument specified pipe.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Pipe ; Pipe Number
+* : uint32_t Size ; Data Size
+* : uint8_t *data_buf ; Data data_buf Address
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
+{
+ int32_t ret;
+
+ if (Pipe == USB_HOST_PIPE0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (g_usb1_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
+ {
+ usb1_host_start_receive_transfer(Pipe, Size, data_buf);
+ }
+ else
+ {
+ return DEVDRV_ERROR; /* Now pipe is busy */
+ }
+
+ /* waiting for completing routine */
+ do
+ {
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+
+ } while (1);
+
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb1_host_pipe_status[Pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ usb1_host_stop_transfer(Pipe);
+
+ g_usb1_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_data_out
+* Description : Executes USB transfer as data-out in the argument specified pipe.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Pipe ; Pipe Number
+* : uint32_t Size ; Data Size
+* : uint8_t *data_buf ; Data data_buf Address
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
+{
+ int32_t ret;
+
+ if (Pipe == USB_HOST_PIPE0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (RZA_IO_RegRead_16(&g_usb1_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ if (g_usb1_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
+ {
+ usb1_host_start_send_transfer(Pipe, Size, data_buf);
+ }
+ else
+ {
+ return DEVDRV_ERROR; /* Now pipe is busy */
+ }
+
+ /* waiting for completing routine */
+ do
+ {
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb1_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+
+ } while (1);
+
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb1_host_pipe_status[Pipe])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ usb1_host_stop_transfer(Pipe);
+
+ g_usb1_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_control_transfer
+* Description : Executes USB control transfer.
+* Arguments : uint16_t devadr ; device address
+* : uint16_t Req ; bmRequestType & bRequest
+* : uint16_t Val ; wValue
+* : uint16_t Indx ; wIndex
+* : uint16_t Len ; wLength
+* : uint8_t *buf ; Buffer
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_USBH_DETACH_ERR ; device detach
+* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
+* : DEVDRV_USBH_STALL ; STALL
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
+ uint16_t Len, uint8_t * Buf)
+{
+ int32_t ret;
+
+ do
+ {
+ ret = usb1_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
+
+ if (ret == DEVDRV_SUCCESS)
+ {
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ break;
+ }
+
+ if ((g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
+ && (g_usb1_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
+ {
+ break;
+ }
+ }
+ else
+ {
+ return DEVDRV_ERROR;
+ }
+ } while (1);
+
+ if (g_usb1_host_detach_flag == USB_HOST_YES)
+ {
+ return DEVDRV_USBH_DETACH_ERR;
+ }
+
+ switch (g_usb1_host_pipe_status[USB_HOST_PIPE0])
+ {
+ case USB_HOST_PIPE_DONE:
+ ret = DEVDRV_SUCCESS;
+ break;
+
+ case USB_HOST_PIPE_STALL:
+ ret = DEVDRV_USBH_STALL;
+ break;
+
+ case USB_HOST_PIPE_NORES:
+ ret = DEVDRV_USBH_CTRL_COM_ERR;
+ break;
+
+ default:
+ ret = DEVDRV_ERROR;
+ break;
+ }
+
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_set_endpoint
+* Description : Sets end point on the information specified in the argument.
+* Arguments : uint16_t devadr ; device address
+* : uint8_t *configdescriptor ; device configration descriptor
+* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
+{
+ uint16_t ret;
+ uint32_t end_point;
+ uint32_t offset;
+ uint32_t totalLength;
+ USB_HOST_CFG_PIPETBL_t * pipe_table;
+
+ /* End Point Search */
+ end_point = 0;
+ offset = configdescriptor[0];
+ totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
+
+ do
+ {
+ if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
+ {
+ pipe_table = &user_table[end_point];
+
+ if (pipe_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+
+ ret = usb1_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
+
+ if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
+ {
+ return DEVDRV_ERROR;
+ }
+
+ ++end_point;
+ }
+
+ /* Next End Point Search */
+ offset += configdescriptor[offset];
+
+ } while (offset < totalLength);
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_clear_endpoint
+* Description : Clears the pipe definition table specified in the argument.
+* Arguments : uint16_t pipe_sel : Pipe Number
+* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
+{
+ uint16_t pipe;
+
+ for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
+ {
+ if (user_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+ user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
+ user_table->pipe_max_pktsize = 0;
+ user_table->pipe_cycle = 0;
+
+ user_table++;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_api_host_clear_endpoint_pipe
+* Description : Clears the pipe definition table specified in the argument.
+* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
+{
+ uint16_t pipe;
+
+ for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
+ {
+ if (user_table->pipe_number == 0xffff)
+ {
+ break;
+ }
+
+ if (user_table->pipe_number == pipe_sel)
+ {
+ user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
+ user_table->pipe_max_pktsize = 0;
+ user_table->pipe_cycle = 0;
+ break;
+ }
+
+ user_table++;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+#endif
+
+/*******************************************************************************
+* Function Name: usb1_api_host_SetEndpointTable
+* Description : Sets the end point on the information specified by the argument.
+* Arguments : uint16_t devadr : device address
+* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
+* : uint8_t *Table : Endpoint descriptor
+* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
+* : USB_HOST_DIR_H_OUT ; OUT endpoint
+* : USB_END_POINT_ERROR ; error
+*******************************************************************************/
+uint16_t usb1_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
+{
+ uint16_t PipeCfg;
+ uint16_t PipeMaxp;
+ uint16_t pipe_number;
+ uint16_t ret;
+ uint16_t ret_flag = 0; // avoid warning.
+
+ pipe_number = user_table->pipe_number;
+
+ if (Table[1] != USB_HOST_ENDPOINT_DESC)
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ switch (Table[3] & USB_HOST_EP_TYPE)
+ {
+ case USB_HOST_EP_CNTRL:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+
+ case USB_HOST_EP_ISO:
+ if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_ISO;
+ break;
+
+ case USB_HOST_EP_BULK:
+ if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_BULK;
+ break;
+
+ case USB_HOST_EP_INT:
+ if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ PipeCfg = USB_HOST_INTERRUPT;
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+
+ /* Set pipe configuration table */
+ if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
+ {
+ if (PipeCfg == USB_HOST_ISO)
+ {
+ /* Transfer Type is ISO*/
+ PipeCfg |= USB_HOST_DIR_H_IN;
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ case USB_HOST_D0USE:
+ case USB_HOST_D1USE:
+ case USB_HOST_D0DMA:
+ case USB_HOST_D1DMA:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+ }
+ else
+ {
+ /* Transfer Type is BULK or INT */
+ PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ case USB_HOST_D0USE:
+ case USB_HOST_D1USE:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+ break;
+
+ case USB_HOST_D0DMA:
+ case USB_HOST_D1DMA:
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+#ifdef __USB_DMA_BFRE_ENABLE__
+ /* this routine cannnot be perfomred if read operation is executed in buffer size */
+ PipeCfg |= USB_HOST_BFREON;
+#endif
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+ }
+ ret = USB_HOST_PIPE_IN;
+ }
+ else /* OUT(send) */
+ {
+ if (PipeCfg == USB_HOST_ISO)
+ {
+ /* Transfer Type is ISO*/
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
+ }
+ else
+ {
+ /* Transfer Type is BULK or INT */
+ PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
+ }
+ PipeCfg |= USB_HOST_DIR_H_OUT;
+ ret = USB_HOST_PIPE_OUT;
+ }
+
+ switch (user_table->fifo_port)
+ {
+ case USB_HOST_CUSE:
+ g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
+ break;
+
+ case USB_HOST_D0USE:
+ g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
+ break;
+
+ case USB_HOST_D1USE:
+ g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
+ break;
+
+ case USB_HOST_D0DMA:
+ g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
+ break;
+
+ case USB_HOST_D1DMA:
+ g_usb1_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
+ break;
+
+ default:
+ ret_flag = USB_END_POINT_ERROR;
+ break;
+ }
+
+ if (ret_flag == USB_END_POINT_ERROR)
+ {
+ return ret_flag;
+ }
+
+ /* Endpoint number set */
+ PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
+ g_usb1_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
+
+ /* Max packet size set */
+ PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
+
+ if (PipeMaxp == 0u)
+ {
+ return USB_END_POINT_ERROR;
+ }
+
+ /* Set device address */
+ PipeMaxp |= (uint16_t)(devadr << 12);
+
+ user_table->pipe_cfg = PipeCfg;
+ user_table->pipe_max_pktsize = PipeMaxp;
+
+ usb1_host_resetEP(user_table);
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_resetEP
+* Description : Sets the end point on the information specified by the argument.
+* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
+{
+
+ uint16_t pipe;
+
+ /* Host pipe */
+ /* The pipe number of pipe definition table is obtained */
+ pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
+
+ /* FIFO port access pipe is set to initial value */
+ /* The connection with FIFO should be cut before setting the pipe */
+ if (RZA_IO_RegRead_16(&USB201.CFIFOSEL,
+ USB_CFIFOSEL_CURPIPE_SHIFT,
+ USB_CFIFOSEL_CURPIPE) == pipe)
+ {
+ usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ if (RZA_IO_RegRead_16(&USB201.D0FIFOSEL,
+ USB_DnFIFOSEL_CURPIPE_SHIFT,
+ USB_DnFIFOSEL_CURPIPE) == pipe)
+ {
+ usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ if (RZA_IO_RegRead_16(&USB201.D1FIFOSEL,
+ USB_DnFIFOSEL_CURPIPE_SHIFT,
+ USB_DnFIFOSEL_CURPIPE) == pipe)
+ {
+ usb1_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
+ }
+
+ /* Interrupt of pipe set is disabled */
+ usb1_host_disable_brdy_int(pipe);
+ usb1_host_disable_nrdy_int(pipe);
+ usb1_host_disable_bemp_int(pipe);
+
+ /* Pipe to set is set to NAK */
+ usb1_host_set_pid_nak(pipe);
+
+ /* Pipe is set */
+ USB201.PIPESEL = pipe;
+
+ USB201.PIPECFG = tbl->pipe_cfg;
+ USB201.PIPEBUF = tbl->pipe_buf;
+ USB201.PIPEMAXP = tbl->pipe_max_pktsize;
+ USB201.PIPEPERI = tbl->pipe_cycle;
+
+ g_usb1_host_pipecfg[pipe] = tbl->pipe_cfg;
+ g_usb1_host_pipebuf[pipe] = tbl->pipe_buf;
+ g_usb1_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
+ g_usb1_host_pipeperi[pipe] = tbl->pipe_cycle;
+
+ /* Sequence bit clear */
+ usb1_host_set_sqclr(pipe);
+
+ usb1_host_aclrm(pipe);
+ usb1_host_set_csclr(pipe);
+
+ /* Pipe window selection is set to unused */
+ USB201.PIPESEL = USB_HOST_PIPE0;
+
+}
+
+#if(1) /* ohci_wrapp */
+#else
+/*******************************************************************************
+* Function Name: usb1_api_host_data_count
+* Description : Get g_usb0_host_data_count[pipe]
+* Arguments : uint16_t pipe ; Pipe Number
+* : uint32_t *data_count ; return g_usb0_data_count[pipe]
+* Return Value : DEVDRV_SUCCESS ; success
+* : DEVDRV_ERROR ; error
+*******************************************************************************/
+int32_t usb1_api_host_data_count (uint16_t pipe, uint32_t * data_count)
+{
+ if (pipe > USB_HOST_MAX_PIPE_NO)
+ {
+ return DEVDRV_ERROR;
+ }
+
+ *data_count = g_usb1_host_PipeDataSize[pipe];
+
+ return DEVDRV_SUCCESS;
+}
+#endif
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_global.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,137 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_global.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+const uint16_t g_usb1_host_bit_set[16] =
+{
+ 0x0001, 0x0002, 0x0004, 0x0008,
+ 0x0010, 0x0020, 0x0040, 0x0080,
+ 0x0100, 0x0200, 0x0400, 0x0800,
+ 0x1000, 0x2000, 0x4000, 0x8000
+};
+
+uint32_t g_usb1_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
+uint8_t * g_usb1_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
+
+uint16_t g_usb1_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb1_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb1_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
+uint32_t g_usb1_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
+
+USB_HOST_DMA_t g_usb1_host_DmaInfo[2];
+
+uint16_t g_usb1_host_DmaPipe[2];
+uint16_t g_usb1_host_DmaBval[2];
+uint16_t g_usb1_host_DmaStatus[2];
+
+uint16_t g_usb1_host_driver_state;
+uint16_t g_usb1_host_ConfigNum;
+uint16_t g_usb1_host_CmdStage;
+uint16_t g_usb1_host_bchg_flag;
+uint16_t g_usb1_host_detach_flag;
+uint16_t g_usb1_host_attach_flag;
+
+uint16_t g_usb1_host_UsbAddress;
+uint16_t g_usb1_host_setUsbAddress;
+uint16_t g_usb1_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
+uint16_t g_usb1_host_UsbDeviceSpeed;
+uint16_t g_usb1_host_SupportUsbDeviceSpeed;
+
+uint16_t g_usb1_host_SavReq;
+uint16_t g_usb1_host_SavVal;
+uint16_t g_usb1_host_SavIndx;
+uint16_t g_usb1_host_SavLen;
+
+uint16_t g_usb1_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb1_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb1_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
+uint16_t g_usb1_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_init_pipe_status
+* Description : Initialize pipe status.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_init_pipe_status (void)
+{
+ uint16_t loop;
+
+ g_usb1_host_ConfigNum = 0;
+
+ for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
+ {
+ g_usb1_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
+ g_usb1_host_PipeDataSize[loop] = 0;
+
+ /* pipe configuration in usb1_host_resetEP() */
+ g_usb1_host_pipecfg[loop] = 0;
+ g_usb1_host_pipebuf[loop] = 0;
+ g_usb1_host_pipemaxp[loop] = 0;
+ g_usb1_host_pipeperi[loop] = 0;
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_usbint.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,497 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_usbint.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#if(1) /* ohci_wrapp */
+#include "ohci_wrapp_RZ_A1_local.h"
+#endif
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb1_host_interrupt1(void);
+static void usb1_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
+static void usb1_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
+static void usb1_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_interrupt
+* Description : Executes USB interrupt.
+* : Register this function in the USB interrupt handler.
+* : Set CFIF0 in the pipe set before the interrupt after executing
+* : this function.
+* Arguments : uint32_t int_sense ; Interrupts detection mode
+* : ; INTC_LEVEL_SENSITIVE : Level sense
+* : ; INTC_EDGE_TRIGGER : Edge trigger
+* Return Value : none
+*******************************************************************************/
+void usb1_host_interrupt (uint32_t int_sense)
+{
+ uint16_t savepipe1;
+ uint16_t savepipe2;
+ uint16_t buffer;
+
+ savepipe1 = USB201.CFIFOSEL;
+ savepipe2 = USB201.PIPESEL;
+ usb1_host_interrupt1();
+
+ /* Control transmission changes ISEL within interruption processing. */
+ /* For this reason, write return of ISEL cannot be performed. */
+ buffer = USB201.CFIFOSEL;
+ buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
+ buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
+ USB201.CFIFOSEL = buffer;
+ USB201.PIPESEL = savepipe2;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_interrupt1
+* Description : Execue the USB interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_interrupt1 (void)
+{
+ uint16_t intsts0;
+ uint16_t intsts1;
+ uint16_t intenb0;
+ uint16_t intenb1;
+ uint16_t brdysts;
+ uint16_t nrdysts;
+ uint16_t bempsts;
+ uint16_t brdyenb;
+ uint16_t nrdyenb;
+ uint16_t bempenb;
+ volatile uint16_t dumy_sts;
+
+ intsts0 = USB201.INTSTS0;
+ intsts1 = USB201.INTSTS1;
+ intenb0 = USB201.INTENB0;
+ intenb1 = USB201.INTENB1;
+
+ if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
+ {
+ USB201.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+ g_usb1_host_bchg_flag = USB_HOST_YES;
+ }
+ else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
+ {
+ USB201.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
+#if(1) /* ohci_wrapp */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+#else
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+#endif
+ }
+ else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
+ {
+ USB201.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#else
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_NORES;
+#endif
+ }
+ else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
+ && ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
+ {
+ USB201.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+ g_usb1_host_detach_flag = USB_HOST_YES;
+
+ Userdef_USB_usb1_host_detach();
+
+ usb1_host_UsbDetach2();
+ }
+ else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
+ && ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
+ {
+ USB201.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+ g_usb1_host_attach_flag = USB_HOST_YES;
+
+ Userdef_USB_usb1_host_attach();
+
+ usb1_host_UsbAttach();
+ }
+ else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
+ {
+ brdysts = USB201.BRDYSTS;
+ nrdysts = USB201.NRDYSTS;
+ bempsts = USB201.BEMPSTS;
+ brdyenb = USB201.BRDYENB;
+ nrdyenb = USB201.NRDYENB;
+ bempenb = USB201.BEMPENB;
+
+ if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
+ {
+ usb1_host_BRDYInterrupt(brdysts, brdyenb);
+ }
+ else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
+ {
+ usb1_host_BEMPInterrupt(bempsts, bempenb);
+ }
+ else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
+ {
+ usb1_host_NRDYInterrupt(nrdysts, nrdyenb);
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* Three dummy read for clearing interrupt requests */
+ dumy_sts = USB201.INTSTS0;
+ dumy_sts = USB201.INTSTS1;
+
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_BRDYInterrupt
+* Description : Executes USB BRDY interrupt.
+* Arguments : uint16_t Status ; BRDYSTS Register Value
+* : uint16_t Int_enbl ; BRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t buffer;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB201.BRDYSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
+
+#if(1) /* ohci_wrapp */
+ switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ USB201.CFIFOCTR = USB_HOST_BITBCLR;
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+#else
+ switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb1_host_read_buffer_c(USB_HOST_PIPE0);
+
+ switch (buffer)
+ {
+ case USB_HOST_READING: /* Continue of data read */
+ break;
+
+ case USB_HOST_READEND: /* End of data read */
+ case USB_HOST_READSHRT: /* End of data read */
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case USB_HOST_READOVER: /* buffer over */
+ USB201.CFIFOCTR = USB_HOST_BITBCLR;
+ usb1_host_disable_brdy_int(USB_HOST_PIPE0);
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ break;
+ }
+#endif
+ }
+ else
+ {
+ usb1_host_brdy_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB201.BRDYSTS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_NRDYInterrupt
+* Description : Executes USB NRDY interrupt.
+* Arguments : uint16_t Status ; NRDYSTS Register Value
+* : uint16_t Int_enbl ; NRDYENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t pid;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB201.NRDYSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
+ pid = usb1_host_get_pid(USB_HOST_PIPE0);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_STALL;
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+
+ }
+ else if (pid == USB_HOST_PID_NAK)
+ {
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_NORES;
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else
+ {
+ usb1_host_nrdy_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB201.NRDYSTS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_BEMPInterrupt
+* Description : Executes USB BEMP interrupt.
+* Arguments : uint16_t Status ; BEMPSTS Register Value
+* : uint16_t Int_enbl ; BEMPENB Register Value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
+{
+ uint16_t buffer;
+ uint16_t pid;
+ volatile uint16_t dumy_sts;
+
+ if ((Status & g_usb1_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb1_host_bit_set[USB_HOST_PIPE0]))
+ {
+ USB201.BEMPSTS = (uint16_t)~g_usb1_host_bit_set[USB_HOST_PIPE0];
+ pid = usb1_host_get_pid(USB_HOST_PIPE0);
+
+ if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
+ {
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_STALL;
+#if(1) /* ohci_wrapp */
+ g_usb1_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
+#endif
+ }
+ else
+ {
+#if(1) /* ohci_wrapp */
+ switch ((g_usb1_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb1_host_write_buffer(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ case USB_HOST_WRITEEND: /* End of data write (zero-length) */
+ break;
+
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+#else
+ switch ((g_usb1_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
+ {
+ case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_DONE;
+ break;
+
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
+ buffer = usb1_host_write_buffer(USB_HOST_PIPE0);
+ switch (buffer)
+ {
+ case USB_HOST_WRITING: /* Continue of data write */
+ case USB_HOST_WRITEEND: /* End of data write (zero-length) */
+ break;
+
+ case USB_HOST_WRITESHRT: /* End of data write */
+ g_usb1_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_STAGE_STATUS;
+ break;
+
+ case USB_HOST_FIFOERROR: /* FIFO access error */
+ default:
+ break;
+ }
+ break;
+
+ case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
+ g_usb1_host_CmdStage &= (~USB_HOST_CMD_FIELD);
+ g_usb1_host_CmdStage |= USB_HOST_CMD_IDLE;
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+#endif
+ }
+ }
+ else
+ {
+ usb1_host_bemp_int(Status, Int_enbl);
+ }
+
+ /* Three dummy reads for clearing interrupt requests */
+ dumy_sts = USB201.BEMPSTS;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/host/usb1_host_usbsig.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,637 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_usbsig.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "usb1_host.h"
+#include "dev_drv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb1_host_EnableINT_Module(void);
+static void usb1_host_Enable_AttachINT(void);
+static void usb1_host_Disable_AttachINT(void);
+static void usb1_host_Disable_BchgINT(void);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: usb1_host_InitModule
+* Description : Initializes the USB module in USB host module.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_InitModule (void)
+{
+ uint16_t buf1;
+ uint16_t buf2;
+ uint16_t buf3;
+
+ usb1_host_init_pipe_status();
+
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 1,
+ USB_SYSCFG_DCFM_SHIFT,
+ USB_SYSCFG_DCFM); /* HOST mode */
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 1,
+ USB_SYSCFG_DRPD_SHIFT,
+ USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
+
+ do
+ {
+ buf1 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb1_host_delay_xms(50);
+ buf2 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb1_host_delay_xms(50);
+ buf3 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+
+ } while ((buf1 != buf2) || (buf1 != buf3));
+
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 1,
+ USB_SYSCFG_USBE_SHIFT,
+ USB_SYSCFG_USBE);
+
+ USB201.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+ USB201.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+ USB201.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_CheckAttach
+* Description : Returns the USB device connection state.
+* Arguments : none
+* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
+* : ; USB_HOST_DETACH : not Attached
+*******************************************************************************/
+uint16_t usb1_host_CheckAttach (void)
+{
+ uint16_t buf1;
+ uint16_t buf2;
+ uint16_t buf3;
+ uint16_t rhst;
+
+ do
+ {
+ buf1 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb1_host_delay_xms(50);
+ buf2 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ Userdef_USB_usb1_host_delay_xms(50);
+ buf3 = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+
+ } while ((buf1 != buf2) || (buf1 != buf3));
+
+ rhst = RZA_IO_RegRead_16(&USB201.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (rhst == USB_HOST_UNDECID)
+ {
+ if (buf1 == USB_HOST_FS_JSTS)
+ {
+ if (g_usb1_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
+ {
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 1,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ }
+ else
+ {
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ }
+ return USB_HOST_ATTACH;
+ }
+ else if (buf1 == USB_HOST_LS_JSTS)
+ {
+ /* Low Speed Device */
+ RZA_IO_RegWrite_16(&USB201.SYSCFG0,
+ 0,
+ USB_SYSCFG_HSE_SHIFT,
+ USB_SYSCFG_HSE);
+ return USB_HOST_ATTACH;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+ }
+ else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
+ {
+ return USB_HOST_ATTACH;
+ }
+ else if (rhst == USB_HOST_LSMODE)
+ {
+ return USB_HOST_ATTACH;
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ return USB_HOST_DETACH;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbAttach
+* Description : Connects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_UsbAttach (void)
+{
+ usb1_host_EnableINT_Module();
+ usb1_host_Disable_BchgINT();
+ usb1_host_Disable_AttachINT();
+ usb1_host_Enable_DetachINT();
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbDetach
+* Description : Disconnects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_UsbDetach (void)
+{
+ uint16_t pipe;
+ uint16_t devadr;
+
+ g_usb1_host_driver_state = USB_HOST_DRV_DETACHED;
+
+ /* Terminate all the pipes in which communications on port */
+ /* are currently carried out */
+ for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
+ {
+ if (g_usb1_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
+ {
+ if (pipe == USB_HOST_PIPE0)
+ {
+ devadr = RZA_IO_RegRead_16(&USB201.DCPMAXP,
+ USB_DCPMAXP_DEVSEL_SHIFT,
+ USB_DCPMAXP_DEVSEL);
+ }
+ else
+ {
+ devadr = RZA_IO_RegRead_16(&g_usb1_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
+ }
+
+ if (devadr == g_usb1_host_UsbAddress)
+ {
+ usb1_host_stop_transfer(pipe);
+ }
+
+ g_usb1_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
+ }
+ }
+
+ g_usb1_host_ConfigNum = 0;
+ g_usb1_host_UsbAddress = 0;
+ g_usb1_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
+
+ usb1_host_UsbDetach2();
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbDetach2
+* Description : Disconnects the USB device.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_UsbDetach2 (void)
+{
+ usb1_host_Disable_DetachINT();
+ usb1_host_Disable_BchgINT();
+ usb1_host_Enable_AttachINT();
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbBusReset
+* Description : Issues the USB bus reset signal.
+* Arguments : none
+* Return Value : uint16_t ; RHST
+*******************************************************************************/
+uint16_t usb1_host_UsbBusReset (void)
+{
+ uint16_t buffer;
+ uint16_t loop;
+
+ RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
+ 1,
+ USB_DVSTCTR0_USBRST_SHIFT,
+ USB_DVSTCTR0_USBRST);
+ RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
+ 0,
+ USB_DVSTCTR0_UACT_SHIFT,
+ USB_DVSTCTR0_UACT);
+
+ Userdef_USB_usb1_host_delay_xms(50);
+
+ buffer = USB201.DVSTCTR0;
+ buffer &= (uint16_t)(~(USB_HOST_BITRST));
+ buffer |= USB_HOST_BITUACT;
+ USB201.DVSTCTR0 = buffer;
+
+ Userdef_USB_usb1_host_delay_xms(20);
+
+ for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
+ {
+ buffer = RZA_IO_RegRead_16(&USB201.DVSTCTR0,
+ USB_DVSTCTR0_RHST_SHIFT,
+ USB_DVSTCTR0_RHST);
+ if (buffer == USB_HOST_HSPROC)
+ {
+ Userdef_USB_usb1_host_delay_xms(10);
+ }
+ else
+ {
+ break;
+ }
+ }
+
+ return buffer;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbResume
+* Description : Issues the USB resume signal.
+* Arguments : none
+* Return Value : int32_t ; DEVDRV_SUCCESS
+* : ; DEVDRV_ERROR
+*******************************************************************************/
+int32_t usb1_host_UsbResume (void)
+{
+ uint16_t buf;
+
+ if ((g_usb1_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
+ {
+ /* not SUSPEND */
+ return DEVDRV_ERROR;
+ }
+
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+ RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
+ 1,
+ USB_DVSTCTR0_RESUME_SHIFT,
+ USB_DVSTCTR0_RESUME);
+ Userdef_USB_usb1_host_delay_xms(20);
+
+ buf = USB201.DVSTCTR0;
+ buf &= (uint16_t)(~(USB_HOST_BITRESUME));
+ buf |= USB_HOST_BITUACT;
+ USB201.DVSTCTR0 = buf;
+
+ g_usb1_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_UsbSuspend
+* Description : Issues the USB suspend signal.
+* Arguments : none
+* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
+* : ; DEVDRV_ERROR :SUSPEND
+*******************************************************************************/
+int32_t usb1_host_UsbSuspend (void)
+{
+ uint16_t buf;
+
+ if ((g_usb1_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
+ {
+ /* SUSPEND */
+ return DEVDRV_ERROR;
+ }
+
+ RZA_IO_RegWrite_16(&USB201.DVSTCTR0,
+ 0,
+ USB_DVSTCTR0_UACT_SHIFT,
+ USB_DVSTCTR0_UACT);
+
+ Userdef_USB_usb1_host_delay_xms(5);
+
+ buf = RZA_IO_RegRead_16(&USB201.SYSSTS0,
+ USB_SYSSTS0_LNST_SHIFT,
+ USB_SYSSTS0_LNST);
+ if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
+ {
+ usb1_host_UsbDetach();
+ }
+ else
+ {
+ g_usb1_host_driver_state |= USB_HOST_DRV_SUSPEND;
+ }
+
+ return DEVDRV_SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_Enable_DetachINT
+* Description : Enables the USB disconnection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_Enable_DetachINT (void)
+{
+ USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 1,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_Disable_DetachINT
+* Description : Disables the USB disconnection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_Disable_DetachINT (void)
+{
+ USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_DTCHE_SHIFT,
+ USB_INTENB1_DTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_Enable_AttachINT
+* Description : Enables the USB connection detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_Enable_AttachINT (void)
+{
+ USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 1,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_Disable_AttachINT
+* Description : Disables the USB connection detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_Disable_AttachINT (void)
+{
+ USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_ATTCHE_SHIFT,
+ USB_INTENB1_ATTCHE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_Disable_BchgINT
+* Description : Disables the USB bus change detection interrupt.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_Disable_BchgINT (void)
+{
+ USB201.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
+ RZA_IO_RegWrite_16(&USB201.INTENB1,
+ 0,
+ USB_INTENB1_BCHGE_SHIFT,
+ USB_INTENB1_BCHGE);
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_set_devadd
+* Description : DEVADDn register is set by specified value
+* Arguments : uint16_t addr : Device address
+* : uint16_t *devadd : Set value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_set_devadd (uint16_t addr, uint16_t * devadd)
+{
+ uint16_t * ptr;
+ uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
+
+ switch (addr)
+ {
+ case USB_HOST_DEVICE_0:
+ ptr = (uint16_t *)&USB201.DEVADD0;
+ break;
+
+ case USB_HOST_DEVICE_1:
+ ptr = (uint16_t *)&USB201.DEVADD1;
+ break;
+
+ case USB_HOST_DEVICE_2:
+ ptr = (uint16_t *)&USB201.DEVADD2;
+ break;
+
+ case USB_HOST_DEVICE_3:
+ ptr = (uint16_t *)&USB201.DEVADD3;
+ break;
+
+ case USB_HOST_DEVICE_4:
+ ptr = (uint16_t *)&USB201.DEVADD4;
+ break;
+
+ case USB_HOST_DEVICE_5:
+ ptr = (uint16_t *)&USB201.DEVADD5;
+ break;
+
+ case USB_HOST_DEVICE_6:
+ ptr = (uint16_t *)&USB201.DEVADD6;
+ break;
+
+ case USB_HOST_DEVICE_7:
+ ptr = (uint16_t *)&USB201.DEVADD7;
+ break;
+
+ case USB_HOST_DEVICE_8:
+ ptr = (uint16_t *)&USB201.DEVADD8;
+ break;
+
+ case USB_HOST_DEVICE_9:
+ ptr = (uint16_t *)&USB201.DEVADD9;
+ break;
+
+ case USB_HOST_DEVICE_10:
+ ptr = (uint16_t *)&USB201.DEVADDA;
+ break;
+
+ default:
+ ret_flag = DEVDRV_FLAG_OFF;
+ break;
+ }
+
+ if (ret_flag == DEVDRV_FLAG_ON)
+ {
+ *ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_get_devadd
+* Description : DEVADDn register is obtained
+* Arguments : uint16_t addr : Device address
+* : uint16_t *devadd : USB_HOST_DEVADD register value
+* Return Value : none
+*******************************************************************************/
+void usb1_host_get_devadd (uint16_t addr, uint16_t * devadd)
+{
+ uint16_t * ptr;
+ uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
+
+ switch (addr)
+ {
+ case USB_HOST_DEVICE_0:
+ ptr = (uint16_t *)&USB201.DEVADD0;
+ break;
+
+ case USB_HOST_DEVICE_1:
+ ptr = (uint16_t *)&USB201.DEVADD1;
+ break;
+
+ case USB_HOST_DEVICE_2:
+ ptr = (uint16_t *)&USB201.DEVADD2;
+ break;
+
+ case USB_HOST_DEVICE_3:
+ ptr = (uint16_t *)&USB201.DEVADD3;
+ break;
+
+ case USB_HOST_DEVICE_4:
+ ptr = (uint16_t *)&USB201.DEVADD4;
+ break;
+
+ case USB_HOST_DEVICE_5:
+ ptr = (uint16_t *)&USB201.DEVADD5;
+ break;
+
+ case USB_HOST_DEVICE_6:
+ ptr = (uint16_t *)&USB201.DEVADD6;
+ break;
+
+ case USB_HOST_DEVICE_7:
+ ptr = (uint16_t *)&USB201.DEVADD7;
+ break;
+
+ case USB_HOST_DEVICE_8:
+ ptr = (uint16_t *)&USB201.DEVADD8;
+ break;
+
+ case USB_HOST_DEVICE_9:
+ ptr = (uint16_t *)&USB201.DEVADD9;
+ break;
+
+ case USB_HOST_DEVICE_10:
+ ptr = (uint16_t *)&USB201.DEVADDA;
+ break;
+
+ default:
+ ret_flag = DEVDRV_FLAG_OFF;
+ break;
+ }
+
+ if (ret_flag == DEVDRV_FLAG_ON)
+ {
+ *devadd = *ptr;
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_EnableINT_Module
+* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
+* : Enables NRDY/BEMP interrupt in the pipe0.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void usb1_host_EnableINT_Module (void)
+{
+ uint16_t buf;
+
+ buf = USB201.INTENB0;
+ buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
+ USB201.INTENB0 = buf;
+
+ buf = USB201.INTENB1;
+ buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
+ USB201.INTENB1 = buf;
+
+ usb1_host_enable_nrdy_int(USB_HOST_PIPE0);
+ usb1_host_enable_bemp_int(USB_HOST_PIPE0);
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/userdef/usb1_host_dmacdrv.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,698 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_dmacdrv.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include "r_typedefs.h"
+#include "iodefine.h"
+#include "rza_io_regrw.h"
+#include "usb1_host_dmacdrv.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
+
+/* ==== Request setting information for on-chip peripheral module ==== */
+typedef enum dmac_peri_req_reg_type
+{
+ DMAC_REQ_MID,
+ DMAC_REQ_RID,
+ DMAC_REQ_AM,
+ DMAC_REQ_LVL,
+ DMAC_REQ_REQD
+} dmac_peri_req_reg_type_t;
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+/* ==== Prototype declaration ==== */
+
+/* ==== Global variable ==== */
+/* On-chip peripheral module request setting table */
+static const uint8_t usb1_host_dmac_peri_req_init_table[8][5] =
+{
+ /* MID,RID, AM,LVL,REQD */
+ { 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
+ { 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
+ { 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
+ { 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
+ { 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
+ { 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
+ { 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
+ { 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
+};
+
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC3_PeriReqInit
+* Description : Sets the register mode for DMA mode and the on-chip peripheral
+* : module request for transfer request for DMAC channel 3.
+* : Executes DMAC initial setting using the DMA information
+* : specified by the argument *trans_info and the enabled/disabled
+* : continuous transfer specified by the argument continuation.
+* : Registers DMAC channel 3 interrupt handler function and sets
+* : the interrupt priority level. Then enables transfer completion
+* : interrupt.
+* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
+* : : register
+* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
+* : uint32_t continuation : Set continuous transfer to be valid
+* : : after DMA transfer has been completed
+* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
+* : DMAC_SAMPLE_SINGLE : Do not execute continuous
+* : : transfer
+* : uint32_t request_factor : Factor for on-chip peripheral module
+* : : request
+* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
+* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
+* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
+* : :
+* : uint32_t req_direction : Setting value of CHCFG_n register
+* : : REQD bit
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC3_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction)
+{
+ /* ==== Register mode ==== */
+ if (DMAC_MODE_REGISTER == dmamode)
+ {
+ /* ==== Next0 register set ==== */
+ DMAC3.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
+ DMAC3.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
+ DMAC3.N0TB_n = trans_info->count; /* Total transfer byte count */
+
+ /* DAD : Transfer destination address counting direction */
+ /* SAD : Transfer source address counting direction */
+ /* DDS : Transfer destination transfer size */
+ /* SDS : Transfer source transfer size */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ trans_info->daddr_dir,
+ DMAC3_CHCFG_n_DAD_SHIFT,
+ DMAC3_CHCFG_n_DAD);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ trans_info->saddr_dir,
+ DMAC3_CHCFG_n_SAD_SHIFT,
+ DMAC3_CHCFG_n_SAD);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ trans_info->dst_size,
+ DMAC3_CHCFG_n_DDS_SHIFT,
+ DMAC3_CHCFG_n_DDS);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ trans_info->src_size,
+ DMAC3_CHCFG_n_SDS_SHIFT,
+ DMAC3_CHCFG_n_SDS);
+
+ /* DMS : Register mode */
+ /* RSEL : Select Next0 register set */
+ /* SBE : No discharge of buffer data when aborted */
+ /* DEM : No DMA interrupt mask */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_DMS_SHIFT,
+ DMAC3_CHCFG_n_DMS);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_RSEL_SHIFT,
+ DMAC3_CHCFG_n_RSEL);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_SBE_SHIFT,
+ DMAC3_CHCFG_n_SBE);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_DEM_SHIFT,
+ DMAC3_CHCFG_n_DEM);
+
+ /* ---- Continuous transfer ---- */
+ if (DMAC_SAMPLE_CONTINUATION == continuation)
+ {
+ /* REN : Execute continuous transfer */
+ /* RSW : Change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 1,
+ DMAC3_CHCFG_n_REN_SHIFT,
+ DMAC3_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 1,
+ DMAC3_CHCFG_n_RSW_SHIFT,
+ DMAC3_CHCFG_n_RSW);
+ }
+ /* ---- Single transfer ---- */
+ else
+ {
+ /* REN : Do not execute continuous transfer */
+ /* RSW : Do not change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_REN_SHIFT,
+ DMAC3_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_RSW_SHIFT,
+ DMAC3_CHCFG_n_RSW);
+ }
+
+ /* TM : Single transfer */
+ /* SEL : Channel setting */
+ /* HIEN, LOEN : On-chip peripheral module request */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_TM_SHIFT,
+ DMAC3_CHCFG_n_TM);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 3,
+ DMAC3_CHCFG_n_SEL_SHIFT,
+ DMAC3_CHCFG_n_SEL);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 1,
+ DMAC3_CHCFG_n_HIEN_SHIFT,
+ DMAC3_CHCFG_n_HIEN);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ 0,
+ DMAC3_CHCFG_n_LOEN_SHIFT,
+ DMAC3_CHCFG_n_LOEN);
+
+ /* ---- Set factor by specified on-chip peripheral module request ---- */
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
+ DMAC3_CHCFG_n_AM_SHIFT,
+ DMAC3_CHCFG_n_AM);
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
+ DMAC3_CHCFG_n_LVL_SHIFT,
+ DMAC3_CHCFG_n_LVL);
+ if (usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
+ {
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
+ DMAC3_CHCFG_n_REQD_SHIFT,
+ DMAC3_CHCFG_n_REQD);
+ }
+ else
+ {
+ RZA_IO_RegWrite_32(&DMAC3.CHCFG_n,
+ req_direction,
+ DMAC3_CHCFG_n_REQD_SHIFT,
+ DMAC3_CHCFG_n_REQD);
+ }
+ RZA_IO_RegWrite_32(&DMAC23.DMARS,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
+ DMAC23_DMARS_CH3_RID_SHIFT,
+ DMAC23_DMARS_CH3_RID);
+ RZA_IO_RegWrite_32(&DMAC23.DMARS,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
+ DMAC23_DMARS_CH3_MID_SHIFT,
+ DMAC23_DMARS_CH3_MID);
+
+ /* PR : Round robin mode */
+ RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
+ 1,
+ DMAC07_DCTRL_0_7_PR_SHIFT,
+ DMAC07_DCTRL_0_7_PR);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC3_Open
+* Description : Enables DMAC channel 3 transfer.
+* Arguments : uint32_t req : DMAC request mode
+* Return Value : 0 : Succeeded in enabling DMA transfer
+* : -1 : Failed to enable DMA transfer (due to DMA operation)
+*******************************************************************************/
+int32_t usb1_host_DMAC3_Open (uint32_t req)
+{
+ int32_t ret;
+ volatile uint8_t dummy;
+
+ /* Transferable? */
+ if ((0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
+ DMAC3_CHSTAT_n_EN_SHIFT,
+ DMAC3_CHSTAT_n_EN)) &&
+ (0 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
+ DMAC3_CHSTAT_n_TACT_SHIFT,
+ DMAC3_CHSTAT_n_TACT)))
+ {
+ /* Clear Channel Status Register */
+ RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
+ 1,
+ DMAC3_CHCTRL_n_SWRST_SHIFT,
+ DMAC3_CHCTRL_n_SWRST);
+ dummy = RZA_IO_RegRead_32(&DMAC3.CHCTRL_n,
+ DMAC3_CHCTRL_n_SWRST_SHIFT,
+ DMAC3_CHCTRL_n_SWRST);
+ /* Enable DMA transfer */
+ RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
+ 1,
+ DMAC3_CHCTRL_n_SETEN_SHIFT,
+ DMAC3_CHCTRL_n_SETEN);
+
+ /* ---- Request by software ---- */
+ if (DMAC_REQ_MODE_SOFT == req)
+ {
+ /* DMA transfer Request by software */
+ RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
+ 1,
+ DMAC3_CHCTRL_n_STG_SHIFT,
+ DMAC3_CHCTRL_n_STG);
+ }
+
+ ret = 0;
+ }
+ else
+ {
+ ret = -1;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC3_Close
+* Description : Aborts DMAC channel 3 transfer. Returns the remaining transfer
+* : byte count at the time of DMA transfer abort to the argument
+* : *remain.
+* Arguments : uint32_t * remain : Remaining transfer byte count when
+* : : DMA transfer is aborted
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC3_Close (uint32_t * remain)
+{
+
+ /* ==== Abort transfer ==== */
+ RZA_IO_RegWrite_32(&DMAC3.CHCTRL_n,
+ 1,
+ DMAC3_CHCTRL_n_CLREN_SHIFT,
+ DMAC3_CHCTRL_n_CLREN);
+
+ while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
+ DMAC3_CHSTAT_n_TACT_SHIFT,
+ DMAC3_CHSTAT_n_TACT))
+ {
+ /* Loop until transfer is aborted */
+ }
+
+ while (1 == RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
+ DMAC3_CHSTAT_n_EN_SHIFT,
+ DMAC3_CHSTAT_n_EN))
+ {
+ /* Loop until 0 is set in EN before checking the remaining transfer byte count */
+ }
+ /* ==== Obtain remaining transfer byte count ==== */
+ *remain = DMAC3.CRTB_n;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC3_Load_Set
+* Description : Sets the transfer source address, transfer destination
+* : address, and total transfer byte count respectively
+* : specified by the argument src_addr, dst_addr, and count to
+* : DMAC channel 3 as DMA transfer information.
+* : Sets the register set selected by the CHCFG_n register
+* : RSEL bit from the Next0 or Next1 register set.
+* : This function should be called when DMA transfer of DMAC
+* : channel 3 is aboted.
+* Arguments : uint32_t src_addr : Transfer source address
+* : uint32_t dst_addr : Transfer destination address
+* : uint32_t count : Total transfer byte count
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC3_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
+{
+ uint8_t reg_set;
+
+ /* Obtain register set in use */
+ reg_set = RZA_IO_RegRead_32(&DMAC3.CHSTAT_n,
+ DMAC3_CHSTAT_n_SR_SHIFT,
+ DMAC3_CHSTAT_n_SR);
+
+ /* ==== Load ==== */
+ if (0 == reg_set)
+ {
+ /* ---- Next0 Register Set ---- */
+ DMAC3.N0SA_n = src_addr; /* Start address of transfer source */
+ DMAC3.N0DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC3.N0TB_n = count; /* Total transfer byte count */
+ }
+ else
+ {
+ /* ---- Next1 Register Set ---- */
+ DMAC3.N1SA_n = src_addr; /* Start address of transfer source */
+ DMAC3.N1DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC3.N1TB_n = count; /* Total transfer byte count */
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC4_PeriReqInit
+* Description : Sets the register mode for DMA mode and the on-chip peripheral
+* : module request for transfer request for DMAC channel 4.
+* : Executes DMAC initial setting using the DMA information
+* : specified by the argument *trans_info and the enabled/disabled
+* : continuous transfer specified by the argument continuation.
+* : Registers DMAC channel 4 interrupt handler function and sets
+* : the interrupt priority level. Then enables transfer completion
+* : interrupt.
+* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
+* : : register
+* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
+* : uint32_t continuation : Set continuous transfer to be valid
+* : : after DMA transfer has been completed
+* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
+* : DMAC_SAMPLE_SINGLE : Do not execute continuous
+* : : transfer
+* : uint32_t request_factor : Factor for on-chip peripheral module
+* : : request
+* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
+* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
+* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
+* : :
+* : uint32_t req_direction : Setting value of CHCFG_n register
+* : : REQD bit
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC4_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
+ uint32_t request_factor, uint32_t req_direction)
+{
+ /* ==== Register mode ==== */
+ if (DMAC_MODE_REGISTER == dmamode)
+ {
+ /* ==== Next0 register set ==== */
+ DMAC4.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
+ DMAC4.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
+ DMAC4.N0TB_n = trans_info->count; /* Total transfer byte count */
+
+ /* DAD : Transfer destination address counting direction */
+ /* SAD : Transfer source address counting direction */
+ /* DDS : Transfer destination transfer size */
+ /* SDS : Transfer source transfer size */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ trans_info->daddr_dir,
+ DMAC4_CHCFG_n_DAD_SHIFT,
+ DMAC4_CHCFG_n_DAD);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ trans_info->saddr_dir,
+ DMAC4_CHCFG_n_SAD_SHIFT,
+ DMAC4_CHCFG_n_SAD);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ trans_info->dst_size,
+ DMAC4_CHCFG_n_DDS_SHIFT,
+ DMAC4_CHCFG_n_DDS);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ trans_info->src_size,
+ DMAC4_CHCFG_n_SDS_SHIFT,
+ DMAC4_CHCFG_n_SDS);
+
+ /* DMS : Register mode */
+ /* RSEL : Select Next0 register set */
+ /* SBE : No discharge of buffer data when aborted */
+ /* DEM : No DMA interrupt mask */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_DMS_SHIFT,
+ DMAC4_CHCFG_n_DMS);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_RSEL_SHIFT,
+ DMAC4_CHCFG_n_RSEL);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_SBE_SHIFT,
+ DMAC4_CHCFG_n_SBE);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_DEM_SHIFT,
+ DMAC4_CHCFG_n_DEM);
+
+ /* ---- Continuous transfer ---- */
+ if (DMAC_SAMPLE_CONTINUATION == continuation)
+ {
+ /* REN : Execute continuous transfer */
+ /* RSW : Change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 1,
+ DMAC4_CHCFG_n_REN_SHIFT,
+ DMAC4_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 1,
+ DMAC4_CHCFG_n_RSW_SHIFT,
+ DMAC4_CHCFG_n_RSW);
+ }
+ /* ---- Single transfer ---- */
+ else
+ {
+ /* REN : Do not execute continuous transfer */
+ /* RSW : Do not change register set when DMA transfer is completed. */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_REN_SHIFT,
+ DMAC4_CHCFG_n_REN);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_RSW_SHIFT,
+ DMAC4_CHCFG_n_RSW);
+ }
+
+ /* TM : Single transfer */
+ /* SEL : Channel setting */
+ /* HIEN, LOEN : On-chip peripheral module request */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_TM_SHIFT,
+ DMAC4_CHCFG_n_TM);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 4,
+ DMAC4_CHCFG_n_SEL_SHIFT,
+ DMAC4_CHCFG_n_SEL);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 1,
+ DMAC4_CHCFG_n_HIEN_SHIFT,
+ DMAC4_CHCFG_n_HIEN);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ 0,
+ DMAC4_CHCFG_n_LOEN_SHIFT,
+ DMAC4_CHCFG_n_LOEN);
+
+ /* ---- Set factor by specified on-chip peripheral module request ---- */
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
+ DMAC4_CHCFG_n_AM_SHIFT,
+ DMAC4_CHCFG_n_AM);
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
+ DMAC4_CHCFG_n_LVL_SHIFT,
+ DMAC4_CHCFG_n_LVL);
+ if (usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
+ {
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
+ DMAC4_CHCFG_n_REQD_SHIFT,
+ DMAC4_CHCFG_n_REQD);
+ }
+ else
+ {
+ RZA_IO_RegWrite_32(&DMAC4.CHCFG_n,
+ req_direction,
+ DMAC4_CHCFG_n_REQD_SHIFT,
+ DMAC4_CHCFG_n_REQD);
+ }
+ RZA_IO_RegWrite_32(&DMAC45.DMARS,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
+ DMAC45_DMARS_CH4_RID_SHIFT,
+ DMAC45_DMARS_CH4_RID);
+ RZA_IO_RegWrite_32(&DMAC45.DMARS,
+ usb1_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
+ DMAC45_DMARS_CH4_MID_SHIFT,
+ DMAC45_DMARS_CH4_MID);
+
+ /* PR : Round robin mode */
+ RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
+ 1,
+ DMAC07_DCTRL_0_7_PR_SHIFT,
+ DMAC07_DCTRL_0_7_PR);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC4_Open
+* Description : Enables DMAC channel 4 transfer.
+* Arguments : uint32_t req : DMAC request mode
+* Return Value : 0 : Succeeded in enabling DMA transfer
+* : -1 : Failed to enable DMA transfer (due to DMA operation)
+*******************************************************************************/
+int32_t usb1_host_DMAC4_Open (uint32_t req)
+{
+ int32_t ret;
+ volatile uint8_t dummy;
+
+ /* Transferable? */
+ if ((0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
+ DMAC4_CHSTAT_n_EN_SHIFT,
+ DMAC4_CHSTAT_n_EN)) &&
+ (0 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
+ DMAC4_CHSTAT_n_TACT_SHIFT,
+ DMAC4_CHSTAT_n_TACT)))
+ {
+ /* Clear Channel Status Register */
+ RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
+ 1,
+ DMAC4_CHCTRL_n_SWRST_SHIFT,
+ DMAC4_CHCTRL_n_SWRST);
+ dummy = RZA_IO_RegRead_32(&DMAC4.CHCTRL_n,
+ DMAC4_CHCTRL_n_SWRST_SHIFT,
+ DMAC4_CHCTRL_n_SWRST);
+ /* Enable DMA transfer */
+ RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
+ 1,
+ DMAC4_CHCTRL_n_SETEN_SHIFT,
+ DMAC4_CHCTRL_n_SETEN);
+
+ /* ---- Request by software ---- */
+ if (DMAC_REQ_MODE_SOFT == req)
+ {
+ /* DMA transfer Request by software */
+ RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
+ 1,
+ DMAC4_CHCTRL_n_STG_SHIFT,
+ DMAC4_CHCTRL_n_STG);
+ }
+
+ ret = 0;
+ }
+ else
+ {
+ ret = -1;
+ }
+
+ return ret;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC4_Close
+* Description : Aborts DMAC channel 4 transfer. Returns the remaining transfer
+* : byte count at the time of DMA transfer abort to the argument
+* : *remain.
+* Arguments : uint32_t * remain : Remaining transfer byte count when
+* : : DMA transfer is aborted
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC4_Close (uint32_t * remain)
+{
+
+ /* ==== Abort transfer ==== */
+ RZA_IO_RegWrite_32(&DMAC4.CHCTRL_n,
+ 1,
+ DMAC4_CHCTRL_n_CLREN_SHIFT,
+ DMAC4_CHCTRL_n_CLREN);
+
+ while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
+ DMAC4_CHSTAT_n_TACT_SHIFT,
+ DMAC4_CHSTAT_n_TACT))
+ {
+ /* Loop until transfer is aborted */
+ }
+
+ while (1 == RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
+ DMAC4_CHSTAT_n_EN_SHIFT,
+ DMAC4_CHSTAT_n_EN))
+ {
+ /* Loop until 0 is set in EN before checking the remaining transfer byte count */
+ }
+ /* ==== Obtain remaining transfer byte count ==== */
+ *remain = DMAC4.CRTB_n;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_DMAC4_Load_Set
+* Description : Sets the transfer source address, transfer destination
+* : address, and total transfer byte count respectively
+* : specified by the argument src_addr, dst_addr, and count to
+* : DMAC channel 4 as DMA transfer information.
+* : Sets the register set selected by the CHCFG_n register
+* : RSEL bit from the Next0 or Next1 register set.
+* : This function should be called when DMA transfer of DMAC
+* : channel 4 is aboted.
+* Arguments : uint32_t src_addr : Transfer source address
+* : uint32_t dst_addr : Transfer destination address
+* : uint32_t count : Total transfer byte count
+* Return Value : none
+*******************************************************************************/
+void usb1_host_DMAC4_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
+{
+ uint8_t reg_set;
+
+ /* Obtain register set in use */
+ reg_set = RZA_IO_RegRead_32(&DMAC4.CHSTAT_n,
+ DMAC4_CHSTAT_n_SR_SHIFT,
+ DMAC4_CHSTAT_n_SR);
+
+ /* ==== Load ==== */
+ if (0 == reg_set)
+ {
+ /* ---- Next0 Register Set ---- */
+ DMAC4.N0SA_n = src_addr; /* Start address of transfer source */
+ DMAC4.N0DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC4.N0TB_n = count; /* Total transfer byte count */
+ }
+ else
+ {
+ /* ---- Next1 Register Set ---- */
+ DMAC4.N1SA_n = src_addr; /* Start address of transfer source */
+ DMAC4.N1DA_n = dst_addr; /* Start address of transfer destination */
+ DMAC4.N1TB_n = count; /* Total transfer byte count */
+ }
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb1/src/userdef/usb1_host_userdef.c Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,778 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+/*******************************************************************************
+* File Name : usb1_host_userdef.c
+* $Rev: 1116 $
+* $Date:: 2014-07-09 16:29:19 +0900#$
+* Device(s) : RZ/A1H
+* Tool-Chain :
+* OS : None
+* H/W Platform :
+* Description : RZ/A1H R7S72100 USB Sample Program
+* Operation :
+* Limitations :
+*******************************************************************************/
+
+
+/*******************************************************************************
+Includes <System Includes> , "Project Includes"
+*******************************************************************************/
+#include <stdio.h>
+#include "cmsis_os.h"
+#include "r_typedefs.h"
+#include "iodefine.h"
+#include "devdrv_usb_host_api.h"
+#include "usb1_host.h"
+#include "MBRZA1H.h" /* INTC Driver Header */
+#include "usb1_host_dmacdrv.h"
+#include "ohci_wrapp_RZ_A1_local.h"
+
+
+/*******************************************************************************
+Typedef definitions
+*******************************************************************************/
+
+
+/*******************************************************************************
+Macro definitions
+*******************************************************************************/
+#define DUMMY_ACCESS OSTM0CNT
+
+/* #define CACHE_WRITEBACK */
+
+
+/*******************************************************************************
+Imported global variables and functions (from other files)
+*******************************************************************************/
+extern int32_t io_cwb(unsigned long start, unsigned long end);
+
+
+/*******************************************************************************
+Exported global variables and functions (to be accessed by other files)
+*******************************************************************************/
+static void usb1_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
+static void usb1_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
+static void Userdef_USB_usb1_host_delay_10us_2(void);
+
+
+/*******************************************************************************
+Private global variables and functions
+*******************************************************************************/
+
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_d0fifo_dmaintid
+* Description : get D0FIFO DMA Interrupt ID
+* Arguments : none
+* Return Value : D0FIFO DMA Interrupt ID
+*******************************************************************************/
+uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid (void)
+{
+#if(1) /* ohci_wrapp */
+ return 0xFFFF;
+#else
+ return DMAINT1_IRQn;
+#endif
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_d1fifo_dmaintid
+* Description : get D1FIFO DMA Interrupt ID
+* Arguments : none
+* Return Value : D1FIFO DMA Interrupt ID
+*******************************************************************************/
+uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid (void)
+{
+#if(1) /* ohci_wrapp */
+ return 0xFFFF;
+#else
+ return DMAINT2_IRQn;
+#endif
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_attach
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_attach (void)
+{
+// printf("\n");
+// printf("channel 1 attach device\n");
+// printf("\n");
+ ohciwrapp_loc_Connect(1);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_detach
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_detach (void)
+{
+// printf("\n");
+// printf("channel 1 detach device\n");
+// printf("\n");
+ ohciwrapp_loc_Connect(0);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_delay_1ms
+* Description : Wait for the software of 1ms.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_delay_1ms (void)
+{
+ osDelay(1);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_delay_xms
+* Description : Wait for the software in the period of time specified by the
+* : argument.
+* : Alter this function according to the user's system.
+* Arguments : uint32_t msec ; Wait Time (msec)
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_delay_xms (uint32_t msec)
+{
+ osDelay(msec);
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_delay_10us
+* Description : Waits for software for the period specified by the argument.
+* : Alter this function according to the user's system.
+* Arguments : uint32_t usec ; Wait Time(x 10usec)
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_delay_10us (uint32_t usec)
+{
+ volatile int i;
+
+ /* Wait 10us (Please change for your MCU) */
+ for (i = 0; i < usec; ++i)
+ {
+ Userdef_USB_usb1_host_delay_10us_2();
+ }
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_delay_10us_2
+* Description : Waits for software for the period specified by the argument.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+static void Userdef_USB_usb1_host_delay_10us_2 (void)
+{
+ volatile int i;
+ volatile unsigned long tmp;
+
+ /* Wait 1us (Please change for your MCU) */
+ for (i = 0; i < 14; ++i)
+ {
+ tmp = DUMMY_ACCESS;
+ }
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_delay_500ns
+* Description : Wait for software for 500ns.
+* : Alter this function according to the user's system.
+* Arguments : none
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_delay_500ns (void)
+{
+ volatile int i;
+ volatile unsigned long tmp;
+
+ /* Wait 500ns (Please change for your MCU) */
+ /* Wait 500ns I clock 266MHz */
+ tmp = DUMMY_ACCESS;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_start_dma
+* Description : Enables DMA transfer on the information specified by the argument.
+* : Set DMAC register by this function to enable DMA transfer.
+* : After executing this function, USB module is set to start DMA
+* : transfer. DMA transfer should not wait for DMA transfer complete.
+* Arguments : USB_HOST_DMA_t *dma : DMA parameter
+* : typedef struct{
+* : uint32_t fifo; FIFO for using
+* : uint32_t buffer; Start address of transfer source/destination
+* : uint32_t bytes; Transfer size(Byte)
+* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
+* : uint32_t size; DMA transfer size
+* : } USB_HOST_DMA_t;
+* : uint16_t dfacc ; 0 : cycle steal mode
+* : 1 : 16byte continuous mode
+* : 2 : 32byte continuous mode
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
+{
+ uint32_t trncount;
+ uint32_t src;
+ uint32_t dst;
+ uint32_t size;
+ uint32_t dir;
+#ifdef CACHE_WRITEBACK
+ uint32_t ptr;
+#endif
+
+ trncount = dma->bytes;
+ dir = dma->dir;
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ /* DxFIFO determination */
+ dst = dma->buffer;
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ size = dma->size;
+
+ if (size == 0)
+ {
+ src += 3; /* byte access */
+ }
+ else if (size == 1)
+ {
+ src += 2; /* short access */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+#else
+ size = dma->size;
+
+ if (size == 2)
+ {
+ /* 32bit access */
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFOB0);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFOB0);
+ }
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFOB0);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFOB0);
+ }
+ }
+ else
+ {
+ /* normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ }
+ }
+ else if (size == 1)
+ {
+ /* 16bit access */
+ dfacc = 0; /* force normal access */
+
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ src += 2; /* short access */
+ }
+ else
+ {
+ /* 8bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ src = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ src = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ src += 3; /* byte access */
+ }
+#endif
+ }
+ else
+ {
+ /* DxFIFO determination */
+ src = dma->buffer;
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ size = dma->size;
+
+ if (size == 0)
+ {
+ dst += 3; /* byte access */
+ }
+ else if (size == 1)
+ {
+ dst += 2; /* short access */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+#else
+ size = dma->size;
+ if (size == 2)
+ {
+ /* 32bit access */
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFOB0);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFOB0);
+ }
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFOB0);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFOB0);
+ }
+ }
+ else
+ {
+ /* normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ }
+ }
+ else if (size == 1)
+ {
+ /* 16bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ dst += 2; /* short access */
+ }
+ else
+ {
+ /* 8bit access */
+ dfacc = 0; /* force normal access */
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ dst = (uint32_t)(&USB201.D0FIFO.UINT32);
+ }
+ else
+ {
+ dst = (uint32_t)(&USB201.D1FIFO.UINT32);
+ }
+ dst += 3; /* byte access */
+ }
+#endif
+ }
+
+#ifdef CACHE_WRITEBACK
+ ptr = (uint32_t)dma->buffer;
+ if ((ptr & 0x20000000ul) == 0)
+ {
+ io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
+ }
+#endif
+
+ if (dma->fifo == USB_HOST_D0FIFO_DMA)
+ {
+ usb1_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
+ }
+ else
+ {
+ usb1_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
+ }
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_enable_dmac0
+* Description : Enables DMA transfer on the information specified by the argument.
+* Arguments : uint32_t src : src address
+* : uint32_t dst : dst address
+* : uint32_t count : transfer byte
+* : uint32_t size : transfer size
+* : uint32_t dir : direction
+* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
+* : uint16_t dfacc : 0 : normal access
+* : : 1 : 16byte access
+* : : 2 : 32byte access
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
+{
+ dmac_transinfo_t trans_info;
+ uint32_t request_factor = 0;
+ int32_t ret;
+
+ /* ==== Variable setting for DMAC initialization ==== */
+ trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
+ trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
+ trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+#else
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
+ }
+ else
+ {
+ /* normal access */
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+ }
+#endif
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ request_factor = DMAC_REQ_USB1_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
+ }
+ else if (dir == USB_HOST_BUF2FIFO)
+ {
+ request_factor = DMAC_REQ_USB1_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* ==== DMAC initialization ==== */
+ usb1_host_DMAC3_PeriReqInit((const dmac_transinfo_t *)&trans_info,
+ DMAC_MODE_REGISTER,
+ DMAC_SAMPLE_SINGLE,
+ request_factor,
+ 0); /* Don't care DMAC_REQ_REQD is setting in usb1_host_DMAC3_PeriReqInit() */
+
+ /* ==== DMAC startup ==== */
+ ret = usb1_host_DMAC3_Open(DMAC_REQ_MODE_PERI);
+
+ if (ret != 0)
+ {
+// printf("DMAC3 Open error!!\n");
+ }
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: usb1_host_enable_dmac1
+* Description : Enables DMA transfer on the information specified by the argument.
+* Arguments : uint32_t src : src address
+* : uint32_t dst : dst address
+* : uint32_t count : transfer byte
+* : uint32_t size : transfer size
+* : uint32_t dir : direction
+* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
+* : uint16_t dfacc : 0 : normal access
+* : : 1 : 16byte access
+* : : 2 : 32byte access
+* Return Value : none
+*******************************************************************************/
+static void usb1_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
+ uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
+{
+ dmac_transinfo_t trans_info;
+ uint32_t request_factor = 0;
+ int32_t ret;
+
+ /* ==== Variable setting for DMAC initialization ==== */
+ trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
+ trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
+ trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
+#ifndef __USB_HOST_DF_ACC_ENABLE__
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+#else
+ if (dfacc == 2)
+ {
+ /* 32byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
+ }
+ else if (dfacc == 1)
+ {
+ /* 16byte access */
+ trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
+ }
+ else
+ {
+ /* normal access */
+ if (size == 0)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
+ }
+ else if (size == 1)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
+ }
+ else if (size == 2)
+ {
+ trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
+ trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
+ }
+ else
+ {
+// printf("size error!!\n");
+ }
+ }
+#endif
+
+ if (dir == USB_HOST_FIFO2BUF)
+ {
+ request_factor =DMAC_REQ_USB1_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
+ }
+ else if (dir == USB_HOST_BUF2FIFO)
+ {
+ request_factor =DMAC_REQ_USB1_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
+ trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
+ trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
+ }
+ else
+ {
+ /* Do Nothing */
+ }
+
+ /* ==== DMAC initialization ==== */
+ usb1_host_DMAC4_PeriReqInit((const dmac_transinfo_t *)&trans_info,
+ DMAC_MODE_REGISTER,
+ DMAC_SAMPLE_SINGLE,
+ request_factor,
+ 0); /* Don't care DMAC_REQ_REQD is setting in usb1_host_DMAC4_PeriReqInit() */
+
+ /* ==== DMAC startup ==== */
+ ret = usb1_host_DMAC4_Open(DMAC_REQ_MODE_PERI);
+
+ if (ret != 0)
+ {
+// printf("DMAC4 Open error!!\n");
+ }
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_stop_dma0
+* Description : Disables DMA transfer.
+* Arguments : none
+* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
+* : regarding to the bus width.
+* Notice : This function should be executed to DMAC executed at the time
+* : of specification of D0_FIF0_DMA in dma->fifo.
+*******************************************************************************/
+uint32_t Userdef_USB_usb1_host_stop_dma0 (void)
+{
+ uint32_t remain;
+
+ /* ==== DMAC release ==== */
+ usb1_host_DMAC3_Close(&remain);
+
+ return remain;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_stop_dma1
+* Description : Disables DMA transfer.
+* : This function should be executed to DMAC executed at the time
+* : of specification of D1_FIF0_DMA in dma->fifo.
+* Arguments : none
+* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
+* : regarding to the bus width.
+*******************************************************************************/
+uint32_t Userdef_USB_usb1_host_stop_dma1 (void)
+{
+ uint32_t remain;
+
+ /* ==== DMAC release ==== */
+ usb1_host_DMAC4_Close(&remain);
+
+ return remain;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_notice
+* Description : Notice of USER
+* Arguments : const char *format
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_notice (const char * format)
+{
+// printf(format);
+
+ return;
+}
+
+/*******************************************************************************
+* Function Name: Userdef_USB_usb1_host_user_rdy
+* Description : This function notify a user and wait for trigger
+* Arguments : const char *format
+* : uint16_t data
+* Return Value : none
+*******************************************************************************/
+void Userdef_USB_usb1_host_user_rdy (const char * format, uint16_t data)
+{
+// printf(format, data);
+ getchar();
+
+ return;
+}
+
+/* End of File */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/usb_host_setting.h Tue Mar 31 16:15:42 2015 +0100
@@ -0,0 +1,100 @@
+/*******************************************************************************
+* DISCLAIMER
+* This software is supplied by Renesas Electronics Corporation and is only
+* intended for use with Renesas products. No other uses are authorized. This
+* software is owned by Renesas Electronics Corporation and is protected under
+* all applicable laws, including copyright laws.
+* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
+* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
+* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
+* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
+* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
+* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
+* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
+* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+* Renesas reserves the right, without notice, to make changes to this software
+* and to discontinue the availability of this software. By using this software,
+* you agree to the additional terms and conditions found by accessing the
+* following link:
+* http://www.renesas.com/disclaimer
+* Copyright (C) 2014 - 2015 Renesas Electronics Corporation. All rights reserved.
+*******************************************************************************/
+
+#ifndef USB_HOST_SETTING_H
+#define USB_HOST_SETTING_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_HOST_CH 0
+#define USB_HOST_HISPEED 1
+
+#define INT_TRANS_MAX_NUM 4 /* min:1 max:4 */
+#define ISO_TRANS_MAX_NUM 0 /* min:0 max:2 */
+
+#if (USB_HOST_CH == 0)
+#include "usb0_host.h"
+#define USB20X USB200
+#define USBIXUSBIX USBI0_IRQn
+#define g_usbx_host_SupportUsbDeviceSpeed g_usb0_host_SupportUsbDeviceSpeed
+#define g_usbx_host_UsbDeviceSpeed g_usb0_host_UsbDeviceSpeed
+#define g_usbx_host_CmdStage g_usb0_host_CmdStage
+#define g_usbx_host_pipe_status g_usb0_host_pipe_status
+#define g_usbx_host_data_pointer g_usb0_host_data_pointer
+#define g_usbx_host_data_count g_usb0_host_data_count
+#define usbx_api_host_init usb0_api_host_init
+#define usbx_host_UsbBusReset usb0_host_UsbBusReset
+#define usbx_host_get_devadd usb0_host_get_devadd
+#define usbx_host_set_devadd usb0_host_set_devadd
+#define usbx_host_SetupStage usb0_host_SetupStage
+#define usbx_host_CtrlWriteStart usb0_host_CtrlWriteStart
+#define usbx_host_CtrlReadStart usb0_host_CtrlReadStart
+#define usbx_api_host_SetEndpointTable usb0_api_host_SetEndpointTable
+#define usbx_host_start_send_transfer usb0_host_start_send_transfer
+#define usbx_host_start_receive_transfer usb0_host_start_receive_transfer
+#define usbx_host_stop_transfer usb0_host_stop_transfer
+#define usbx_host_set_sqclr usb0_host_set_sqclr
+#define usbx_host_set_sqset usb0_host_set_sqset
+#define usbx_host_CheckAttach usb0_host_CheckAttach
+#define usbx_host_UsbDetach usb0_host_UsbDetach
+#define usbx_host_UsbAttach usb0_host_UsbAttach
+#define usbx_host_init_pipe_status usb0_host_init_pipe_status
+#define usbx_host_get_sqmon usb0_host_get_sqmon
+#else
+#include "usb1_host.h"
+#define USB20X USB201
+#define USBIXUSBIX USBI1_IRQn
+#define g_usbx_host_SupportUsbDeviceSpeed g_usb1_host_SupportUsbDeviceSpeed
+#define g_usbx_host_UsbDeviceSpeed g_usb1_host_UsbDeviceSpeed
+#define g_usbx_host_CmdStage g_usb1_host_CmdStage
+#define g_usbx_host_pipe_status g_usb1_host_pipe_status
+#define g_usbx_host_data_pointer g_usb1_host_data_pointer
+#define g_usbx_host_data_count g_usb1_host_data_count
+#define usbx_api_host_init usb1_api_host_init
+#define usbx_host_UsbBusReset usb1_host_UsbBusReset
+#define usbx_host_get_devadd usb1_host_get_devadd
+#define usbx_host_set_devadd usb1_host_set_devadd
+#define usbx_host_SetupStage usb1_host_SetupStage
+#define usbx_host_CtrlWriteStart usb1_host_CtrlWriteStart
+#define usbx_host_CtrlReadStart usb1_host_CtrlReadStart
+#define usbx_api_host_SetEndpointTable usb1_api_host_SetEndpointTable
+#define usbx_host_start_send_transfer usb1_host_start_send_transfer
+#define usbx_host_start_receive_transfer usb1_host_start_receive_transfer
+#define usbx_host_stop_transfer usb1_host_stop_transfer
+#define usbx_host_set_sqclr usb1_host_set_sqclr
+#define usbx_host_set_sqset usb1_host_set_sqset
+#define usbx_host_CheckAttach usb1_host_CheckAttach
+#define usbx_host_UsbDetach usb1_host_UsbDetach
+#define usbx_host_UsbAttach usb1_host_UsbAttach
+#define usbx_host_init_pipe_status usb1_host_init_pipe_status
+#define usbx_host_get_sqmon usb1_host_get_sqmon
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* USB_HOST_SETTING_H */
--- a/USBHost/USBHALHost_RZ_A1.cpp Fri Feb 27 10:01:08 2015 +0000
+++ b/USBHost/USBHALHost_RZ_A1.cpp Tue Mar 31 16:15:42 2015 +0100
@@ -47,7 +47,7 @@
}
void USBHALHost::init() {
- ohciwrapp_init(&_usbisr, 1);
+ ohciwrapp_init(&_usbisr);
ohciwrapp_reg_w(OHCI_REG_CONTROL, 1); // HARDWARE RESET
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, 0); // Initialize Control list head to Zero
@@ -266,9 +266,6 @@
usb_hcca->DoneHead = 0;
}
- // wait 200ms to avoid bounce
- wait_ms(200);
-
deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
if (int_status & OR_INTR_STATUS_WDH) {