Rotork Research Team / Mbed 2 deprecated HHH_MOTOR_TRAP_Polled_TFM

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Dependencies:   mbed

Fork of HHH_MOTOR_TRAP_Polled_TFM by Simon Truelove

PWM.cpp@1:a8b0806fba3f, 2018-11-22 (annotated)

Committer:
ConfigArray
Date:
Thu Nov 22 10:55:50 2018 +0000
Revision:
1:a8b0806fba3f
Child:
3:79e1b4b7c555
New naming convention, sorting short circuit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ConfigArray 1:a8b0806fba3f 1 #include "mbed.h"
ConfigArray 1:a8b0806fba3f 2 #include "Adafruit_SSD1306.h"
ConfigArray 1:a8b0806fba3f 3 #include "math.h"
ConfigArray 1:a8b0806fba3f 4 #include "Defines.h"
ConfigArray 1:a8b0806fba3f 5 #include "OLED.h"
ConfigArray 1:a8b0806fba3f 6 #include "PWM.h"
ConfigArray 1:a8b0806fba3f 7 #include <string>
ConfigArray 1:a8b0806fba3f 8
ConfigArray 1:a8b0806fba3f 9 #define PWMPRESCALE (12-1)
ConfigArray 1:a8b0806fba3f 10 #define PWM 200
ConfigArray 1:a8b0806fba3f 11
ConfigArray 1:a8b0806fba3f 12 void InitPWM(void)
ConfigArray 1:a8b0806fba3f 13 {
ConfigArray 1:a8b0806fba3f 14 LPC_PINCON->PINSEL4 = (1<<0)|(1<<0)|(1<<2)|(1<<4)|(1<<6)|(1<<8)|(1<<10); //set up the pins to be PWM outputs '01 01 01 0101 01' is pwm mode put onto Mbed pins 26,25,24,23.
ConfigArray 1:a8b0806fba3f 15 LPC_PINCON->PINMODE2 |= (2<<0)|(2<<2)||(2<<4)|(2<<6)|(2<<8)|(2<<10)|(2<<12)|(2<<14)|(2<<16)|(2<<18)|(2<<20)|(2<<22)|(2<<24)|(2<<26)|(2<<28); // no pull ups //no pull ups/pull downs on PIN1
ConfigArray 1:a8b0806fba3f 16 LPC_PWM1->MCR = (1<<0)|(1<<1); //Generate interrupt on mathc, also Reset PWM timer counter on PWM1_MR0 match : match control register
ConfigArray 1:a8b0806fba3f 17
ConfigArray 1:a8b0806fba3f 18 LPC_PWM1->PR = PWMPRESCALE; //1 micro-second resolution (24 ticks to pclk)
ConfigArray 1:a8b0806fba3f 19 LPC_PWM1->MR0 = 100; //80 1\2 uS ticks to match = 40uS period for 25kHz. output goes high every time TCNT matches
ConfigArray 1:a8b0806fba3f 20
ConfigArray 1:a8b0806fba3f 21 LPC_PWM1->MR1 = 1; //1us - default pulse duration i.e. width. changed by analgo in. output goes low everytime TCN matched
ConfigArray 1:a8b0806fba3f 22 LPC_PWM1->MR2 = 1; //match comapre registers for the 4 PWM channels
ConfigArray 1:a8b0806fba3f 23 LPC_PWM1->MR3 = 1;
ConfigArray 1:a8b0806fba3f 24 LPC_PWM1->MR4 = 1;
ConfigArray 1:a8b0806fba3f 25 LPC_PWM1->MR5 = 1;
ConfigArray 1:a8b0806fba3f 26 LPC_PWM1->MR6 = 1;
ConfigArray 1:a8b0806fba3f 27
ConfigArray 1:a8b0806fba3f 28 LPC_PWM1->LER = (1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 29 LPC_PWM1->TCR = (1<<1); //Reset PWM timer counter & prescale counter : timer control register
ConfigArray 1:a8b0806fba3f 30 LPC_PWM1->TCR = (1<<0) | (1<<3); //Enable counters and enter PWM Mode, **PWM Generation goes active now**
ConfigArray 1:a8b0806fba3f 31 NVIC_EnableIRQ(PWM1_IRQn);
ConfigArray 1:a8b0806fba3f 32
ConfigArray 1:a8b0806fba3f 33 }
ConfigArray 1:a8b0806fba3f 34
ConfigArray 1:a8b0806fba3f 35
ConfigArray 1:a8b0806fba3f 36
ConfigArray 1:a8b0806fba3f 37
ConfigArray 1:a8b0806fba3f 38
ConfigArray 1:a8b0806fba3f 39
ConfigArray 1:a8b0806fba3f 40 void EnablePWM(unsigned char PWMChannel)
ConfigArray 1:a8b0806fba3f 41 {
ConfigArray 1:a8b0806fba3f 42 switch(PWMChannel)
ConfigArray 1:a8b0806fba3f 43 {
ConfigArray 1:a8b0806fba3f 44 case 1: LPC_PWM1->PCR |= (1<<9); break; //pin 20
ConfigArray 1:a8b0806fba3f 45 case 2: LPC_PWM1->PCR |= (1<<10); break;
ConfigArray 1:a8b0806fba3f 46 case 3: LPC_PWM1->PCR |= (1<<11); break;
ConfigArray 1:a8b0806fba3f 47
ConfigArray 1:a8b0806fba3f 48 case 4: LPC_PWM1->PCR |= (1<<12); break;
ConfigArray 1:a8b0806fba3f 49 case 5: LPC_PWM1->PCR |= (1<<13); break;
ConfigArray 1:a8b0806fba3f 50 case 6: LPC_PWM1->PCR |= (1<<14); break; //pin 26
ConfigArray 1:a8b0806fba3f 51 }
ConfigArray 1:a8b0806fba3f 52 }
ConfigArray 1:a8b0806fba3f 53
ConfigArray 1:a8b0806fba3f 54
ConfigArray 1:a8b0806fba3f 55
ConfigArray 1:a8b0806fba3f 56 void DisablePWM(unsigned char PWMChannel)
ConfigArray 1:a8b0806fba3f 57 {
ConfigArray 1:a8b0806fba3f 58 switch(PWMChannel)
ConfigArray 1:a8b0806fba3f 59 {
ConfigArray 1:a8b0806fba3f 60 case 1:
ConfigArray 1:a8b0806fba3f 61 LPC_PWM1->MR1 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 62 LPC_PWM1->LER = (1<<1); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 63 wait(0.002); //wait for LER to take affect
ConfigArray 1:a8b0806fba3f 64 LPC_PWM1->PCR &= 0xfdff; break; //disable the PWM channel - it stops low, PCR is pulse width control register- enables PWM channels
ConfigArray 1:a8b0806fba3f 65
ConfigArray 1:a8b0806fba3f 66 case 2:
ConfigArray 1:a8b0806fba3f 67 LPC_PWM1->MR2 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 68 LPC_PWM1->LER = (1<<2); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 69 wait(0.002);
ConfigArray 1:a8b0806fba3f 70 LPC_PWM1->PCR &= 0xfbff; break; //bits 9,10,11 and 12 enable PWM 1,2,3,4.
ConfigArray 1:a8b0806fba3f 71
ConfigArray 1:a8b0806fba3f 72 case 3:
ConfigArray 1:a8b0806fba3f 73 LPC_PWM1->MR3 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 74 LPC_PWM1->LER = (1<<3); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 75 wait(0.002);
ConfigArray 1:a8b0806fba3f 76 LPC_PWM1->PCR &= 0xf7ff; break; //clear all of these bits
ConfigArray 1:a8b0806fba3f 77
ConfigArray 1:a8b0806fba3f 78 case 4:
ConfigArray 1:a8b0806fba3f 79 LPC_PWM1->MR4 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 80 LPC_PWM1->LER = (1<<4); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 81 wait(0.002);
ConfigArray 1:a8b0806fba3f 82 LPC_PWM1->PCR &= 0xefff; break;
ConfigArray 1:a8b0806fba3f 83
ConfigArray 1:a8b0806fba3f 84 case 5:
ConfigArray 1:a8b0806fba3f 85 LPC_PWM1->MR5 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 86 LPC_PWM1->LER = (1<<5); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 87 wait(0.002);
ConfigArray 1:a8b0806fba3f 88 LPC_PWM1->PCR &= 0xDfff; break;
ConfigArray 1:a8b0806fba3f 89
ConfigArray 1:a8b0806fba3f 90 case 6:
ConfigArray 1:a8b0806fba3f 91 LPC_PWM1->MR6 = 0; //set duty to zero - ensures safe turn off
ConfigArray 1:a8b0806fba3f 92 LPC_PWM1->LER = (1<<6); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 93 wait(0.002);
ConfigArray 1:a8b0806fba3f 94 LPC_PWM1->PCR &= 0xBfff; break;
ConfigArray 1:a8b0806fba3f 95 }
ConfigArray 1:a8b0806fba3f 96 }
ConfigArray 1:a8b0806fba3f 97
ConfigArray 1:a8b0806fba3f 98
ConfigArray 1:a8b0806fba3f 99
ConfigArray 1:a8b0806fba3f 100 void SetPWM(int a,int b,int c,int d,int e,int f)
ConfigArray 1:a8b0806fba3f 101 {
ConfigArray 1:a8b0806fba3f 102 LPC_PWM1->MR1 = a; //1us - default pulse duration i.e. width. changed by analgo in
ConfigArray 1:a8b0806fba3f 103 LPC_PWM1->MR2 = b; //match comapre registers for the 4 PWM channels
ConfigArray 1:a8b0806fba3f 104 LPC_PWM1->MR3 = c;
ConfigArray 1:a8b0806fba3f 105 LPC_PWM1->MR4 = d;
ConfigArray 1:a8b0806fba3f 106 LPC_PWM1->MR5 = e;
ConfigArray 1:a8b0806fba3f 107 LPC_PWM1->MR6 = f;
ConfigArray 1:a8b0806fba3f 108 LPC_PWM1->LER = (1<<0)|(1<<1)|(1<<2)|(1<<3)|(1<<4)|(1<<5)|(1<<6); //update values in MR0 and MR1: latch enabe register
ConfigArray 1:a8b0806fba3f 109 }
ConfigArray 1:a8b0806fba3f 110
ConfigArray 1:a8b0806fba3f 111
ConfigArray 1:a8b0806fba3f 112
ConfigArray 1:a8b0806fba3f 113
ConfigArray 1:a8b0806fba3f 114
ConfigArray 1:a8b0806fba3f 115
ConfigArray 1:a8b0806fba3f 116