Diff: beacon.h

Revision:

3:0931a8800543

Parent:

0:e91ee0e99213

--- a/beacon.h	Thu Apr 09 15:12:12 2015 +0000
+++ b/beacon.h	Wed May 13 06:19:25 2015 +0000
@@ -1,5 +1,108 @@
 #include "mbed.h"
 
+
+ 
+#define TIMES 20
+#define RX_DATA 240      //in bytes
+#define TX_DATA 240      //in bytes
+
 void writereg(uint8_t reg,uint8_t val);
 uint8_t readreg(uint8_t reg);
+void clearTxBuf();
+void clearRxBuf();
+int setFrequency(float,float);
+void init_beacon();
 void FUNC_BEA();
+
+#define RF22_MAX_MESSAGE_LEN 255
+// These values we set for FIFO thresholds
+#define RF22_TXFFAEM_THRESHOLD 4
+#define RF22_RXFFAFULL_THRESHOLD 55
+
+// Register names
+#define RF22_REG_00_DEVICE_TYPE                         0x00
+#define RF22_REG_02_DEVICE_STATUS                       0x02
+#define RF22_REG_03_INTERRUPT_STATUS1                   0x03
+#define RF22_REG_04_INTERRUPT_STATUS2                   0x04
+#define RF22_REG_07_OPERATING_MODE1                     0x07
+#define RF22_REG_08_OPERATING_MODE2                     0x08
+#define RF22_REG_09_OSCILLATOR_LOAD_CAPACITANCE         0x09
+#define RF22_REG_0B_GPIO_CONFIGURATION0                 0x0b
+#define RF22_REG_0C_GPIO_CONFIGURATION1                 0x0c
+#define RF22_REG_0D_GPIO_CONFIGURATION2                 0x0d
+#define RF22_REG_1C_IF_FILTER_BANDWIDTH                 0x1c
+#define RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE   0x1f
+#define RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE    0x20
+#define RF22_REG_21_CLOCK_RECOVERY_OFFSET2              0x21
+#define RF22_REG_22_CLOCK_RECOVERY_OFFSET1              0x22
+#define RF22_REG_23_CLOCK_RECOVERY_OFFSET0              0x23
+#define RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1    0x24
+#define RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0    0x25
+#define RF22_REG_26_RSSI                                0x26
+#define RF22_REG_27_RSSI_THRESHOLD                      0x27
+#define RF22_REG_28_ANTENNA_DIVERSITY1                  0x28
+#define RF22_REG_29_ANTENNA_DIVERSITY2                  0x29
+#define RF22_REG_2A_AFC_LIMITER                         0x2a
+#define RF22_REG_2B_AFC_CORRECTION_READ                 0x2b
+#define RF22_REG_2C_OOK_COUNTER_VALUE_1                 0x2c
+#define RF22_REG_2D_OOK_COUNTER_VALUE_2                 0x2d
+#define RF22_REG_2E_SLICER_PEAK_HOLD                    0x2e
+#define RF22_REG_30_DATA_ACCESS_CONTROL                 0x30
+#define RF22_REG_31_EZMAC_STATUS                        0x31
+#define RF22_REG_32_HEADER_CONTROL1                     0x32
+#define RF22_REG_33_HEADER_CONTROL2                     0x33
+#define RF22_REG_34_PREAMBLE_LENGTH                     0x34
+#define RF22_REG_35_PREAMBLE_DETECTION_CONTROL1         0x35
+#define RF22_REG_36_SYNC_WORD3                          0x36
+#define RF22_REG_37_SYNC_WORD2                          0x37
+#define RF22_REG_38_SYNC_WORD1                          0x38
+#define RF22_REG_39_SYNC_WORD0                          0x39
+#define RF22_REG_3A_TRANSMIT_HEADER3                    0x3a
+#define RF22_REG_3B_TRANSMIT_HEADER2                    0x3b
+#define RF22_REG_3C_TRANSMIT_HEADER1                    0x3c
+#define RF22_REG_3D_TRANSMIT_HEADER0                    0x3d
+#define RF22_REG_3E_PACKET_LENGTH                       0x3e
+#define RF22_REG_3F_CHECK_HEADER3                       0x3f
+#define RF22_REG_40_CHECK_HEADER2                       0x40
+#define RF22_REG_41_CHECK_HEADER1                       0x41
+#define RF22_REG_42_CHECK_HEADER0                       0x42
+#define RF22_REG_43_HEADER_ENABLE3                      0x43
+#define RF22_REG_44_HEADER_ENABLE2                      0x44
+#define RF22_REG_45_HEADER_ENABLE1                      0x45
+#define RF22_REG_46_HEADER_ENABLE0                      0x46
+#define RF22_REG_47_RECEIVED_HEADER3                    0x47
+#define RF22_REG_48_RECEIVED_HEADER2                    0x48
+#define RF22_REG_49_RECEIVED_HEADER1                    0x49
+#define RF22_REG_4A_RECEIVED_HEADER0                    0x4a
+#define RF22_REG_4B_RECEIVED_PACKET_LENGTH              0x4b
+#define RF22_REG_58                                     0x58
+#define RF22_REG_60_CHANNEL_FILTER_COEFFICIENT_ADDRESS  0x60
+#define RF22_REG_61_CHANNEL_FILTER_COEFFICIENT_VALUE    0x61
+#define RF22_REG_62_CRYSTAL_OSCILLATOR_POR_CONTROL      0x62
+#define RF22_REG_63_RC_OSCILLATOR_COARSE_CALIBRATION    0x63
+#define RF22_REG_64_RC_OSCILLATOR_FINE_CALIBRATION      0x64
+#define RF22_REG_65_LDO_CONTROL_OVERRIDE                0x65
+#define RF22_REG_66_LDO_LEVEL_SETTINGS                  0x66
+#define RF22_REG_67_DELTA_SIGMA_ADC_TUNING1             0x67
+#define RF22_REG_68_DELTA_SIGMA_ADC_TUNING2             0x68
+#define RF22_REG_69_AGC_OVERRIDE1                       0x69
+#define RF22_REG_6A_AGC_OVERRIDE2                       0x6a
+#define RF22_REG_6B_GFSK_FIR_FILTER_COEFFICIENT_ADDRESS 0x6b
+#define RF22_REG_6C_GFSK_FIR_FILTER_COEFFICIENT_VALUE   0x6c
+#define RF22_REG_6D_TX_POWER                            0x6d
+#define RF22_REG_6E_TX_DATA_RATE1                       0x6e
+#define RF22_REG_6F_TX_DATA_RATE0                       0x6f
+#define RF22_REG_70_MODULATION_CONTROL1                 0x70
+#define RF22_REG_71_MODULATION_CONTROL2                 0x71
+#define RF22_REG_72_FREQUENCY_DEVIATION                 0x72
+#define RF22_REG_73_FREQUENCY_OFFSET1                   0x73
+#define RF22_REG_74_FREQUENCY_OFFSET2                   0x74
+#define RF22_REG_75_FREQUENCY_BAND_SELECT               0x75
+#define RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1          0x76
+#define RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0          0x77
+#define RF22_REG_79_FREQUENCY_HOPPING_CHANNEL_SELECT    0x79
+#define RF22_REG_7A_FREQUENCY_HOPPING_STEP_SIZE         0x7a
+#define RF22_REG_7C_TX_FIFO_CONTROL1                    0x7c
+#define RF22_REG_7D_TX_FIFO_CONTROL2                    0x7d
+#define RF22_REG_7E_RX_FIFO_CONTROL                     0x7e
+#define RF22_REG_7F_FIFO_ACCESS                         0x7f
\ No newline at end of file