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Dependencies: FreescaleIAP mbed-rtos mbed
Fork of workinQM_5thJan_azad by
Diff: ACS.cpp
- Revision:
- 39:670133e7ffd8
- Parent:
- 20:949d13045431
- Child:
- 40:c2538d97e78b
- Child:
- 45:b5bd48ffbb67
- Child:
- 49:61c9f28332ba
diff -r 76f2b8735501 -r 670133e7ffd8 ACS.cpp --- a/ACS.cpp Mon Jul 04 04:29:59 2016 +0000 +++ b/ACS.cpp Tue Jul 05 13:44:15 2016 +0000 @@ -5,6 +5,7 @@ #include "pni.h" //pni header file #include "pin_config.h" +#include "configuration.h" #include "ACS.h" #include "EPS.h" /*variables will get get updated value from FLash @@ -20,16 +21,16 @@ extern uint8_t ACS_STATUS; extern uint8_t ACS_DETUMBLING_ALGO_TYPE;////// -extern DigitalOut ATS1_SW_ENABLE; // enable of att sens2 switch -extern DigitalOut ATS2_SW_ENABLE; // enable of att sens switch +extern DigitalInOut ATS1_SW_ENABLE; // enable of att sens2 switch +extern DigitalInOut ATS2_SW_ENABLE; // enable of att sens switch extern uint8_t ACS_ATS_ENABLE; extern uint8_t ACS_DATA_ACQ_ENABLE; extern uint8_t ACS_STATE; -DigitalOut phase_TR_x(PIN27); // PHASE pin for x-torquerod -DigitalOut phase_TR_y(PIN28); // PHASE pin for y-torquerod -DigitalOut phase_TR_z(PIN86); // PHASE pin for z-torquerod +DigitalInOut phase_TR_x(PIN27); // PHASE pin for x-torquerod +DigitalInOut phase_TR_y(PIN28); // PHASE pin for y-torquerod +DigitalInOut phase_TR_z(PIN86); // PHASE pin for z-torquerod extern PwmOut PWM1; //x //Functions used to generate PWM signal extern PwmOut PWM2; //y @@ -68,6 +69,7 @@ uint8_t jm_mms[9]; uint8_t bb_mms[3]; uint8_t singularity_flag=0; +uint8_t B_SCZ_ANGLE = 0x00; uint8_t ACS_MAG_TIME_DELAY;// = 65; uint8_t ACS_DEMAG_TIME_DELAY;// = 65; @@ -436,7 +438,9 @@ int ack; int CONFIG_UPLOAD() -{ +{ + uint8_t value; + cmd[0]=RESETREQ; cmd[1]=BIT_RESREQ; i2c.write(SLAVE_ADDR,cmd,2); //When 0x01 is written in reset request register Emulates a hard power down/power up @@ -444,16 +448,105 @@ //Verify magic number + + cmd[0]=SENTRALSTATUS; + i2c.write(SLAVE_ADDR,cmd,1); + i2c.read(SLAVE_ADDR_READ,&store,1); + value = (uint8_t)store; + + if(value & 0x02) + { + printf("Sentral already has eeprom firmware loaded.\n"); + } + /* Write value 0x01 to the ResetReq register, address 0x9B. This will result + in a hard reset of the Sentral. This is unnecessary if the prior event was + a Reset. */ + if(!(value & 0x08)) + { + printf("CPU is not in standby, issuing a shutdown request.\n"); + //i2c_write(I2C_SLAVE_ADDR, 0x34, data, 1); + cmd[0]=HOST_CTRL; //0x00 is written in HOST CONTROL register to shut down + cmd[1]=0x00; + i2c.write(SLAVE_ADDR,cmd,2); + + int cnt=0; + do { + cmd[0]=SENTRALSTATUS; + i2c.write(SLAVE_ADDR,cmd,1); + i2c.read(SLAVE_ADDR_READ,&store,1); + value = (uint8_t)store; + wait_ms(100); + cnt++; + } while((!(value & 0x08))&&(cnt<4)); + + if(cnt==4) + { + return 0; + } + } + cmd[0]=HOST_CTRL; //0x02 is written in HOST CONTROL register to enable upload cmd[1]=BIT_HOST_UPLD_ENB; i2c.write(SLAVE_ADDR,cmd,2); wait_ms(20); - cmd[0]=UPLOAD_ADDR; //0x02 is written in HOST CONTROL register to enable upload + cmd[0]=UPLOAD_ADDR; //0x0000 is written in RAM register to enable upload cmd[1]=0x0000; i2c.write(SLAVE_ADDR,cmd,3); - wait_ms(20); - + wait_ms(100); + + printf("Uploading data...\n"); + + #define TRASACTION_SIZE 3 + + + for(int i = 0; i < EEPROMTextLength; i += TRASACTION_SIZE * 4) + { + + char* data = new char[TRASACTION_SIZE * 4]; + data[0]=0x96; + for(int j = 0; j < TRASACTION_SIZE; j++) + { + data[j * 4 + 1] = configdata[i + j * 4 + 3]; + data[j * 4 + 2] = configdata[i + j * 4 + 2]; + data[j * 4 + 3] = configdata[i + j * 4 + 1]; + data[j * 4 + 4] = configdata[i + j * 4 + 0]; + } + + if(EEPROMTextLength < (i + (TRASACTION_SIZE * 4))) + { + uint32_t bytes = EEPROMTextLength - i; + i2c.write(SLAVE_ADDR,data,bytes+1); + } + + else + { + /* Write the Configuration File to Sentral’s program RAM. The file is sent + one byte at a time, using the UploadData register, register address 0x96. */ + i2c.write(SLAVE_ADDR,data,13); + } + delete data; + } + + char crc[4]; + cmd[0]=0x97; + i2c.write(SLAVE_ADDR,cmd,1); + i2c.read(SLAVE_ADDR_READ,crc,4); + value = (uint8_t)store; + + uint32_t actualCRC = ((uint32_t)crc[0] << 0) | ((uint32_t)crc[1] << 8) | ((uint32_t)crc[2] << 16) | ((uint32_t)crc[3] << 24); + + if(actualCRC != EEPROMTextCRC) + { + pc_acs.printf("Program crc (0x%.8X) does not match CRC reported by Sentral (0x%0.8X)\n", EEPROMTextCRC, actualCRC); + return 0; + } + else + { + pc_acs.printf("Firmware Upload Complete.\n"); + return 1; + } + cmd[0]=HOST_CTRL; //0x00 is written in HOST CONTROL register to free upload cmd[1]=0x00; i2c.write(SLAVE_ADDR,cmd,2); @@ -1051,7 +1144,7 @@ return 2; } - pc_acs.printf("Reading data success.\n \r"); + //pc_acs.printf("Reading data success.\n \r"); return 3; }