master

Dependencies:   mbed

Fork of ESE350-Whack-a-Mole by Eric Berdinis

Committer:
jfields
Date:
Tue Oct 20 00:17:13 2015 +0000
Revision:
1:7fae8b781c61
Parent:
0:ddc820578cb0
master

Who changed what in which revision?

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mlab4 0:ddc820578cb0 1 /* mbed MRF24J40 (IEEE 802.15.4 tranceiver) Library
mlab4 0:ddc820578cb0 2 * Copyright (c) 2011 Jeroen Hilgers
mlab4 0:ddc820578cb0 3 *
mlab4 0:ddc820578cb0 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
mlab4 0:ddc820578cb0 5 * of this software and associated documentation files (the "Software"), to deal
mlab4 0:ddc820578cb0 6 * in the Software without restriction, including without limitation the rights
mlab4 0:ddc820578cb0 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
mlab4 0:ddc820578cb0 8 * copies of the Software, and to permit persons to whom the Software is
mlab4 0:ddc820578cb0 9 * furnished to do so, subject to the following conditions:
mlab4 0:ddc820578cb0 10 *
mlab4 0:ddc820578cb0 11 * The above copyright notice and this permission notice shall be included in
mlab4 0:ddc820578cb0 12 * all copies or substantial portions of the Software.
mlab4 0:ddc820578cb0 13 *
mlab4 0:ddc820578cb0 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
mlab4 0:ddc820578cb0 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
mlab4 0:ddc820578cb0 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
mlab4 0:ddc820578cb0 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
mlab4 0:ddc820578cb0 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mlab4 0:ddc820578cb0 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
mlab4 0:ddc820578cb0 20 * THE SOFTWARE.
mlab4 0:ddc820578cb0 21 */
mlab4 0:ddc820578cb0 22
mlab4 0:ddc820578cb0 23 #include "MRF24J40.h"
mlab4 0:ddc820578cb0 24
mlab4 0:ddc820578cb0 25 // MRF20J40 Short address control register mapping.
mlab4 0:ddc820578cb0 26 #define RXMCR 0x00
mlab4 0:ddc820578cb0 27 #define PANIDL 0x01
mlab4 0:ddc820578cb0 28 #define PANIDH 0x02
mlab4 0:ddc820578cb0 29 #define SADRL 0x03
mlab4 0:ddc820578cb0 30 #define SADRH 0x04
mlab4 0:ddc820578cb0 31 #define EADR0 0x05
mlab4 0:ddc820578cb0 32 #define EADR1 0x06
mlab4 0:ddc820578cb0 33 #define EADR2 0x07
mlab4 0:ddc820578cb0 34 #define EADR3 0x08
mlab4 0:ddc820578cb0 35 #define EADR4 0x09
mlab4 0:ddc820578cb0 36 #define EADR5 0x0a
mlab4 0:ddc820578cb0 37 #define EADR6 0x0b
mlab4 0:ddc820578cb0 38 #define EADR7 0x0c
mlab4 0:ddc820578cb0 39 #define RXFLUSH 0x0d
mlab4 0:ddc820578cb0 40
mlab4 0:ddc820578cb0 41 #define TXNMTRIG 0x1b
mlab4 0:ddc820578cb0 42 #define TXSR 0x24
mlab4 0:ddc820578cb0 43
mlab4 0:ddc820578cb0 44 #define ISRSTS 0x31
mlab4 0:ddc820578cb0 45 #define INTMSK 0x32
mlab4 0:ddc820578cb0 46 #define GPIO 0x33
mlab4 0:ddc820578cb0 47 #define TRISGPIO 0x34
mlab4 0:ddc820578cb0 48
mlab4 0:ddc820578cb0 49 #define RFCTL 0x36
mlab4 0:ddc820578cb0 50
mlab4 0:ddc820578cb0 51 #define BBREG2 0x3A
mlab4 0:ddc820578cb0 52
mlab4 0:ddc820578cb0 53 #define BBREG6 0x3E
mlab4 0:ddc820578cb0 54 #define RSSITHCCA 0x3F
mlab4 0:ddc820578cb0 55
mlab4 0:ddc820578cb0 56 // MRF20J40 Long address control register mapping.
mlab4 0:ddc820578cb0 57 #define RFCTRL0 0x200
mlab4 0:ddc820578cb0 58
mlab4 0:ddc820578cb0 59 #define RFCTRL2 0x202
mlab4 0:ddc820578cb0 60 #define RFCTRL3 0x203
mlab4 0:ddc820578cb0 61
mlab4 0:ddc820578cb0 62 #define RFCTRL6 0x206
mlab4 0:ddc820578cb0 63 #define RFCTRL7 0x207
mlab4 0:ddc820578cb0 64 #define RFCTRL8 0x208
mlab4 0:ddc820578cb0 65
mlab4 0:ddc820578cb0 66 #define CLKINTCR 0x211
mlab4 0:ddc820578cb0 67 #define CLCCTRL 0x220
mlab4 0:ddc820578cb0 68
mlab4 0:ddc820578cb0 69 MRF24J40::MRF24J40(PinName mosi, PinName miso, PinName sck, PinName cs, PinName reset) ://, PinName irq, PinName wake) :
mlab4 0:ddc820578cb0 70 mSpi(mosi, miso, sck), // mosi, miso, sclk
mlab4 0:ddc820578cb0 71 mCs(cs),
mlab4 0:ddc820578cb0 72 mReset(reset)
mlab4 0:ddc820578cb0 73 // mIrq(irq),
mlab4 0:ddc820578cb0 74 // mWake(wake)
mlab4 0:ddc820578cb0 75 {
mlab4 0:ddc820578cb0 76 mSpi.format(8, 0); // 8 bits, cpol=0; cpha=0
mlab4 0:ddc820578cb0 77 mSpi.frequency(500000);
mlab4 0:ddc820578cb0 78 Reset();
mlab4 0:ddc820578cb0 79 }
mlab4 0:ddc820578cb0 80
mlab4 0:ddc820578cb0 81 /*
mlab4 0:ddc820578cb0 82 void MRF24J40::DebugDump(Serial &ser)
mlab4 0:ddc820578cb0 83 {
mlab4 0:ddc820578cb0 84 ser.printf("MRF24J40 registers:\r");
mlab4 0:ddc820578cb0 85 ser.printf("RXMCR=0x%X\r", MrfReadShort(RXMCR));
mlab4 0:ddc820578cb0 86 ser.printf("RXFLUSH=0x%X\r", MrfReadShort(RXFLUSH));
mlab4 0:ddc820578cb0 87 ser.printf("TXNMTRIG=0x%X\r", MrfReadShort(TXNMTRIG));
mlab4 0:ddc820578cb0 88 ser.printf("TXSR=0x%X\r", MrfReadShort(TXSR));
mlab4 0:ddc820578cb0 89 ser.printf("ISRSTS=0x%X\r", MrfReadShort(ISRSTS));
mlab4 0:ddc820578cb0 90 ser.printf("INTMSK=0x%X\r", MrfReadShort(INTMSK));
mlab4 0:ddc820578cb0 91 ser.printf("GPIO=0x%X\r", MrfReadShort(GPIO));
mlab4 0:ddc820578cb0 92 ser.printf("TRISGPIO=0x%X\r", MrfReadShort(TRISGPIO));
mlab4 0:ddc820578cb0 93 ser.printf("RFCTL=0x%X\r", MrfReadShort(RFCTL));
mlab4 0:ddc820578cb0 94 ser.printf("BBREG2=0x%X\r", MrfReadShort(BBREG2));
mlab4 0:ddc820578cb0 95 ser.printf("BBREG6=0x%X\r", MrfReadShort(BBREG6));
mlab4 0:ddc820578cb0 96 ser.printf("RSSITHCCA=0x%X\r", MrfReadShort(RSSITHCCA));
mlab4 0:ddc820578cb0 97
mlab4 0:ddc820578cb0 98
mlab4 0:ddc820578cb0 99 ser.printf("RFCTRL0=0x%X\r", MrfReadLong(RFCTRL0));
mlab4 0:ddc820578cb0 100 ser.printf("RFCTRL2=0x%X\r", MrfReadLong(RFCTRL2));
mlab4 0:ddc820578cb0 101 ser.printf("RFCTRL3=0x%X\r", MrfReadLong(RFCTRL3));
mlab4 0:ddc820578cb0 102 ser.printf("RFCTRL6=0x%X\r", MrfReadLong(RFCTRL6));
mlab4 0:ddc820578cb0 103 ser.printf("RFCTRL7=0x%X\r", MrfReadLong(RFCTRL7));
mlab4 0:ddc820578cb0 104 ser.printf("RFCTRL8=0x%X\r", MrfReadLong(RFCTRL8));
mlab4 0:ddc820578cb0 105 ser.printf("CLKINTCR=0x%X\r", MrfReadLong(CLKINTCR));
mlab4 0:ddc820578cb0 106 ser.printf("CLCCTRL=0x%X\r", MrfReadLong(CLCCTRL));
mlab4 0:ddc820578cb0 107 ser.printf("\r");
mlab4 0:ddc820578cb0 108 }
mlab4 0:ddc820578cb0 109 */
mlab4 0:ddc820578cb0 110
mlab4 0:ddc820578cb0 111 void MRF24J40::Reset(void)
mlab4 0:ddc820578cb0 112 {
mlab4 0:ddc820578cb0 113 mCs = 1;
mlab4 0:ddc820578cb0 114 // Pulse hardware reset.
mlab4 0:ddc820578cb0 115 mReset = 0;
mlab4 0:ddc820578cb0 116 wait_us(100);
mlab4 0:ddc820578cb0 117 mReset = 1;
mlab4 0:ddc820578cb0 118 wait_us(100);
mlab4 0:ddc820578cb0 119
mlab4 0:ddc820578cb0 120 // Reset RF module.
mlab4 0:ddc820578cb0 121 WriteShort(RFCTL, 0x04);
mlab4 0:ddc820578cb0 122 WriteShort(RFCTL, 0x00);
mlab4 0:ddc820578cb0 123
mlab4 0:ddc820578cb0 124 WriteShort(RFCTL, 0x00);
mlab4 0:ddc820578cb0 125
mlab4 0:ddc820578cb0 126 WriteShort(PANIDL, 0xAA);
mlab4 0:ddc820578cb0 127 WriteShort(PANIDH, 0xAA);
mlab4 0:ddc820578cb0 128 WriteShort(SADRL, 0xAA);
mlab4 0:ddc820578cb0 129 WriteShort(SADRH, 0xAA);
mlab4 0:ddc820578cb0 130
mlab4 0:ddc820578cb0 131 // Flush RX fifo.
mlab4 0:ddc820578cb0 132 WriteShort(RXFLUSH, 0x01);
mlab4 0:ddc820578cb0 133
mlab4 0:ddc820578cb0 134 // Write MAC addresses here. We don't care.
mlab4 0:ddc820578cb0 135
mlab4 0:ddc820578cb0 136 WriteLong(RFCTRL2, 0x80); // Enable RF PLL.
mlab4 0:ddc820578cb0 137
mlab4 0:ddc820578cb0 138 WriteLong(RFCTRL3, 0x00); // Full power.
mlab4 0:ddc820578cb0 139 WriteLong(RFCTRL6, 0x80); // Enable TX filter (recommended)
mlab4 0:ddc820578cb0 140 WriteLong(RFCTRL8, 0x10); // Enhanced VCO (recommended)
mlab4 0:ddc820578cb0 141
mlab4 0:ddc820578cb0 142 WriteShort(BBREG2,0x78); // Clear Channel Assesment use carrier sense.
mlab4 0:ddc820578cb0 143 WriteShort(BBREG6,0x40); // Calculate RSSI for Rx packet.
mlab4 0:ddc820578cb0 144 WriteShort(RSSITHCCA,0x00);// RSSI threshold for CCA.
mlab4 0:ddc820578cb0 145
mlab4 0:ddc820578cb0 146 WriteLong(RFCTRL0, 0x00); // Channel 11.
mlab4 0:ddc820578cb0 147
mlab4 0:ddc820578cb0 148 WriteShort(RXMCR, 0x01); // Don't check address upon reception.
mlab4 0:ddc820578cb0 149 // MrfWriteShort(RXMCR, 0x00); // Check address upon reception.
mlab4 0:ddc820578cb0 150
mlab4 0:ddc820578cb0 151 // Reset RF module with new settings.
mlab4 0:ddc820578cb0 152 WriteShort(RFCTL, 0x04);
mlab4 0:ddc820578cb0 153 WriteShort(RFCTL, 0x00);
mlab4 0:ddc820578cb0 154 }
mlab4 0:ddc820578cb0 155
mlab4 0:ddc820578cb0 156 void MRF24J40::Send(uint8_t *data, uint8_t length)
mlab4 0:ddc820578cb0 157 {
mlab4 0:ddc820578cb0 158 uint8_t i;
mlab4 0:ddc820578cb0 159
mlab4 0:ddc820578cb0 160 WriteLong(0x000, 0); // No addresses in header.
mlab4 0:ddc820578cb0 161 WriteLong(0x001, length); // 11 bytes
mlab4 0:ddc820578cb0 162 for(i=0; i<length; i++)
mlab4 0:ddc820578cb0 163 WriteLong(0x002+i, data[i]);
mlab4 0:ddc820578cb0 164
mlab4 0:ddc820578cb0 165 WriteShort(TXNMTRIG, 0x01);
mlab4 0:ddc820578cb0 166 }
mlab4 0:ddc820578cb0 167
mlab4 0:ddc820578cb0 168 uint8_t MRF24J40::Receive(uint8_t *data, uint8_t maxLength)
mlab4 0:ddc820578cb0 169 {
mlab4 0:ddc820578cb0 170 uint8_t i, length;
mlab4 0:ddc820578cb0 171 uint8_t lqi, rssi;
mlab4 0:ddc820578cb0 172
mlab4 0:ddc820578cb0 173 if(ReadShort(ISRSTS)& 0x08)
mlab4 0:ddc820578cb0 174 {
mlab4 0:ddc820578cb0 175 length = ReadLong(0x300);
mlab4 0:ddc820578cb0 176 lqi = ReadLong(0x301 + length);
mlab4 0:ddc820578cb0 177 rssi = ReadLong(0x302 + length);
mlab4 0:ddc820578cb0 178 for(i=0; i<length; i++)
mlab4 0:ddc820578cb0 179 if(i<maxLength)
mlab4 0:ddc820578cb0 180 *data++ = ReadLong(0x301 + (uint16_t)i);
mlab4 0:ddc820578cb0 181 else
mlab4 0:ddc820578cb0 182 ReadLong(0x301 + (uint16_t)i);
mlab4 0:ddc820578cb0 183 if(length < maxLength)
mlab4 0:ddc820578cb0 184 return length;
mlab4 0:ddc820578cb0 185 }
mlab4 0:ddc820578cb0 186 return 0;
mlab4 0:ddc820578cb0 187 }
mlab4 0:ddc820578cb0 188
mlab4 0:ddc820578cb0 189 uint8_t MRF24J40::ReadShort (uint8_t address)
mlab4 0:ddc820578cb0 190 {
mlab4 0:ddc820578cb0 191 uint8_t value;
mlab4 0:ddc820578cb0 192 mCs = 0;
mlab4 0:ddc820578cb0 193 wait_us(1);
mlab4 0:ddc820578cb0 194 mSpi.write((address<<1) & 0x7E);
mlab4 0:ddc820578cb0 195 wait_us(1);
mlab4 0:ddc820578cb0 196 value = mSpi.write(0xFF);
mlab4 0:ddc820578cb0 197 wait_us(1);
mlab4 0:ddc820578cb0 198 mCs = 1;
mlab4 0:ddc820578cb0 199 wait_us(1);
mlab4 0:ddc820578cb0 200 return value;
mlab4 0:ddc820578cb0 201 }
mlab4 0:ddc820578cb0 202
mlab4 0:ddc820578cb0 203 void MRF24J40::WriteShort (uint8_t address, uint8_t data)
mlab4 0:ddc820578cb0 204 {
mlab4 0:ddc820578cb0 205 mCs = 0;
mlab4 0:ddc820578cb0 206 wait_us(1);
mlab4 0:ddc820578cb0 207 mSpi.write(((address<<1) & 0x7E) | 0x01);
mlab4 0:ddc820578cb0 208 wait_us(1);
mlab4 0:ddc820578cb0 209 mSpi.write(data);
mlab4 0:ddc820578cb0 210 wait_us(1);
mlab4 0:ddc820578cb0 211 mCs = 1;
mlab4 0:ddc820578cb0 212 wait_us(1);
mlab4 0:ddc820578cb0 213 }
mlab4 0:ddc820578cb0 214
mlab4 0:ddc820578cb0 215 uint8_t MRF24J40::ReadLong (uint16_t address)
mlab4 0:ddc820578cb0 216 {
mlab4 0:ddc820578cb0 217 uint8_t value;
mlab4 0:ddc820578cb0 218 mCs = 0;
mlab4 0:ddc820578cb0 219 wait_us(1);
mlab4 0:ddc820578cb0 220 mSpi.write((address>>3) | 0x80);
mlab4 0:ddc820578cb0 221 wait_us(1);
mlab4 0:ddc820578cb0 222 mSpi.write((address<<5) & 0xE0);
mlab4 0:ddc820578cb0 223 wait_us(1);
mlab4 0:ddc820578cb0 224 value = mSpi.write(0xFF);
mlab4 0:ddc820578cb0 225 wait_us(1);
mlab4 0:ddc820578cb0 226 mCs = 1;
mlab4 0:ddc820578cb0 227 wait_us(1);
mlab4 0:ddc820578cb0 228 return value;
mlab4 0:ddc820578cb0 229 }
mlab4 0:ddc820578cb0 230
mlab4 0:ddc820578cb0 231 void MRF24J40::WriteLong (uint16_t address, uint8_t data)
mlab4 0:ddc820578cb0 232 {
mlab4 0:ddc820578cb0 233 mCs = 0;
mlab4 0:ddc820578cb0 234 wait_us(1);
mlab4 0:ddc820578cb0 235 mSpi.write((address>>3) | 0x80);
mlab4 0:ddc820578cb0 236 wait_us(1);
mlab4 0:ddc820578cb0 237 mSpi.write(((address<<5) & 0xE0) | 0x10);
mlab4 0:ddc820578cb0 238 wait_us(1);
mlab4 0:ddc820578cb0 239 mSpi.write(data);
mlab4 0:ddc820578cb0 240 wait_us(1);
mlab4 0:ddc820578cb0 241 mCs = 1;
mlab4 0:ddc820578cb0 242 wait_us(1);
mlab4 0:ddc820578cb0 243 }
mlab4 0:ddc820578cb0 244
mlab4 0:ddc820578cb0 245 void MRF24J40::SetChannel(uint8_t channel)
mlab4 0:ddc820578cb0 246 {
mlab4 0:ddc820578cb0 247 WriteLong(RFCTRL0, (channel & 0x0F)<<4 | 0x03); // Set channel, leave RFOPT bits at recommended
mlab4 0:ddc820578cb0 248
mlab4 0:ddc820578cb0 249 //Reset the board by first writing a 4 to RFCTL, then writing a 0
mlab4 0:ddc820578cb0 250 WriteShort(RFCTL, 0x04);
mlab4 0:ddc820578cb0 251 WriteShort(RFCTL, 0x00);
mlab4 0:ddc820578cb0 252 wait(0.5);
mlab4 0:ddc820578cb0 253 }