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targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_idac.c@161:2cc1468da177, 2017-03-30 (annotated)

Committer:
<>
Date:
Thu Mar 30 13:45:57 2017 +0100
Revision:
161:2cc1468da177
Parent:
150:02e0a0aed4ec
Child:
179:b0033dcd6934
This updates the lib to the mbed lib v139

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_idac.c
<> 144:ef7eb2e8f9f7 3 * @brief Current Digital to Analog Converter (IDAC) peripheral API
<> 161:2cc1468da177 4 * @version 5.1.2
<> 144:ef7eb2e8f9f7 5 *******************************************************************************
<> 144:ef7eb2e8f9f7 6 * @section License
<> 150:02e0a0aed4ec 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 8 *******************************************************************************
<> 144:ef7eb2e8f9f7 9 *
<> 144:ef7eb2e8f9f7 10 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 11 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 12 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 15 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 16 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 17 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 18 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 21 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 22 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 23 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 24 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 25 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 26 *
<> 144:ef7eb2e8f9f7 27 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 28 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 29 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 30 *
<> 144:ef7eb2e8f9f7 31 ******************************************************************************/
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include "em_idac.h"
<> 144:ef7eb2e8f9f7 34 #if defined(IDAC_COUNT) && (IDAC_COUNT > 0)
<> 144:ef7eb2e8f9f7 35 #include "em_cmu.h"
<> 144:ef7eb2e8f9f7 36 #include "em_assert.h"
<> 144:ef7eb2e8f9f7 37 #include "em_bus.h"
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 /***************************************************************************//**
<> 150:02e0a0aed4ec 40 * @addtogroup emlib
<> 144:ef7eb2e8f9f7 41 * @{
<> 144:ef7eb2e8f9f7 42 ******************************************************************************/
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 45 * @addtogroup IDAC
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 ******************************************************************************/
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
<> 144:ef7eb2e8f9f7 50 /* Fix for errata IDAC_E101 - IDAC output current degradation */
<> 161:2cc1468da177 51 #if defined(_SILICON_LABS_32B_SERIES_0) \
<> 161:2cc1468da177 52 && (defined(_EFM32_ZERO_FAMILY) || defined(_EFM32_HAPPY_FAMILY))
<> 144:ef7eb2e8f9f7 53 #define ERRATA_FIX_IDAC_E101_EN
<> 144:ef7eb2e8f9f7 54 #endif
<> 144:ef7eb2e8f9f7 55 /** @endcond */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /*******************************************************************************
<> 144:ef7eb2e8f9f7 58 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 59 ******************************************************************************/
<> 150:02e0a0aed4ec 60
<> 150:02e0a0aed4ec 61
<> 144:ef7eb2e8f9f7 62 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 63 * @brief
<> 144:ef7eb2e8f9f7 64 * Initialize IDAC.
<> 144:ef7eb2e8f9f7 65 *
<> 144:ef7eb2e8f9f7 66 * @details
<> 144:ef7eb2e8f9f7 67 * Initializes IDAC according to the initialization structure parameter, and
<> 144:ef7eb2e8f9f7 68 * sets the default calibration value stored in the DEVINFO structure.
<> 144:ef7eb2e8f9f7 69 *
<> 144:ef7eb2e8f9f7 70 * @note
<> 144:ef7eb2e8f9f7 71 * This function will disable the IDAC prior to configuration.
<> 144:ef7eb2e8f9f7 72 *
<> 144:ef7eb2e8f9f7 73 * @param[in] idac
<> 144:ef7eb2e8f9f7 74 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 75 *
<> 144:ef7eb2e8f9f7 76 * @param[in] init
<> 144:ef7eb2e8f9f7 77 * Pointer to IDAC initialization structure.
<> 144:ef7eb2e8f9f7 78 ******************************************************************************/
<> 144:ef7eb2e8f9f7 79 void IDAC_Init(IDAC_TypeDef *idac, const IDAC_Init_TypeDef *init)
<> 144:ef7eb2e8f9f7 80 {
<> 144:ef7eb2e8f9f7 81 uint32_t tmp;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 tmp = (uint32_t)(init->prsSel);
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 tmp |= init->outMode;
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 if (init->enable)
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 tmp |= IDAC_CTRL_EN;
<> 144:ef7eb2e8f9f7 92 }
<> 144:ef7eb2e8f9f7 93 if (init->prsEnable)
<> 144:ef7eb2e8f9f7 94 {
<> 150:02e0a0aed4ec 95 #if defined(_IDAC_CTRL_OUTENPRS_MASK)
<> 144:ef7eb2e8f9f7 96 tmp |= IDAC_CTRL_OUTENPRS;
<> 150:02e0a0aed4ec 97 #else
<> 150:02e0a0aed4ec 98 tmp |= IDAC_CTRL_APORTOUTENPRS;
<> 150:02e0a0aed4ec 99 #endif
<> 144:ef7eb2e8f9f7 100 }
<> 144:ef7eb2e8f9f7 101 if (init->sinkEnable)
<> 144:ef7eb2e8f9f7 102 {
<> 144:ef7eb2e8f9f7 103 tmp |= IDAC_CTRL_CURSINK;
<> 144:ef7eb2e8f9f7 104 }
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 idac->CTRL = tmp;
<> 144:ef7eb2e8f9f7 107 }
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 111 * @brief
<> 144:ef7eb2e8f9f7 112 * Enable/disable IDAC.
<> 144:ef7eb2e8f9f7 113 *
<> 144:ef7eb2e8f9f7 114 * @param[in] idac
<> 144:ef7eb2e8f9f7 115 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 116 *
<> 144:ef7eb2e8f9f7 117 * @param[in] enable
<> 144:ef7eb2e8f9f7 118 * true to enable IDAC, false to disable.
<> 144:ef7eb2e8f9f7 119 ******************************************************************************/
<> 144:ef7eb2e8f9f7 120 void IDAC_Enable(IDAC_TypeDef *idac, bool enable)
<> 144:ef7eb2e8f9f7 121 {
<> 144:ef7eb2e8f9f7 122 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 150:02e0a0aed4ec 123 BUS_RegBitWrite(&idac->CTRL, _IDAC_CTRL_EN_SHIFT, enable);
<> 144:ef7eb2e8f9f7 124 }
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 128 * @brief
<> 144:ef7eb2e8f9f7 129 * Reset IDAC to same state as after a HW reset.
<> 144:ef7eb2e8f9f7 130 *
<> 144:ef7eb2e8f9f7 131 * @param[in] idac
<> 144:ef7eb2e8f9f7 132 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 133 ******************************************************************************/
<> 144:ef7eb2e8f9f7 134 void IDAC_Reset(IDAC_TypeDef *idac)
<> 144:ef7eb2e8f9f7 135 {
<> 144:ef7eb2e8f9f7 136 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 #if defined(ERRATA_FIX_IDAC_E101_EN)
<> 144:ef7eb2e8f9f7 139 /* Fix for errata IDAC_E101 - IDAC output current degradation:
<> 144:ef7eb2e8f9f7 140 Instead of disabling it we will put it in it's lowest power state (50 nA)
<> 144:ef7eb2e8f9f7 141 to avoid degradation over time */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /* Make sure IDAC is enabled with disabled output */
<> 144:ef7eb2e8f9f7 144 idac->CTRL = _IDAC_CTRL_RESETVALUE | IDAC_CTRL_EN;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /* Set lowest current (50 nA) */
<> 144:ef7eb2e8f9f7 147 idac->CURPROG = IDAC_CURPROG_RANGESEL_RANGE0 |
<> 144:ef7eb2e8f9f7 148 (0x0 << _IDAC_CURPROG_STEPSEL_SHIFT);
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Enable duty-cycling for all energy modes */
<> 144:ef7eb2e8f9f7 151 idac->DUTYCONFIG = IDAC_DUTYCONFIG_DUTYCYCLEEN;
<> 144:ef7eb2e8f9f7 152 #else
<> 144:ef7eb2e8f9f7 153 idac->CTRL = _IDAC_CTRL_RESETVALUE;
<> 144:ef7eb2e8f9f7 154 idac->CURPROG = _IDAC_CURPROG_RESETVALUE;
<> 144:ef7eb2e8f9f7 155 idac->DUTYCONFIG = _IDAC_DUTYCONFIG_RESETVALUE;
<> 144:ef7eb2e8f9f7 156 #endif
<> 144:ef7eb2e8f9f7 157 #if defined ( _IDAC_CAL_MASK )
<> 144:ef7eb2e8f9f7 158 idac->CAL = _IDAC_CAL_RESETVALUE;
<> 144:ef7eb2e8f9f7 159 #endif
<> 144:ef7eb2e8f9f7 160 }
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 164 * @brief
<> 144:ef7eb2e8f9f7 165 * Enable/disable Minimal Output Transition mode.
<> 144:ef7eb2e8f9f7 166 *
<> 144:ef7eb2e8f9f7 167 * @param[in] idac
<> 144:ef7eb2e8f9f7 168 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 169 *
<> 144:ef7eb2e8f9f7 170 * @param[in] enable
<> 144:ef7eb2e8f9f7 171 * true to enable Minimal Output Transition mode, false to disable.
<> 144:ef7eb2e8f9f7 172 ******************************************************************************/
<> 144:ef7eb2e8f9f7 173 void IDAC_MinimalOutputTransitionMode(IDAC_TypeDef *idac, bool enable)
<> 144:ef7eb2e8f9f7 174 {
<> 144:ef7eb2e8f9f7 175 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 150:02e0a0aed4ec 176 BUS_RegBitWrite(&idac->CTRL, _IDAC_CTRL_MINOUTTRANS_SHIFT, enable);
<> 144:ef7eb2e8f9f7 177 }
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 181 * @brief
<> 144:ef7eb2e8f9f7 182 * Set the current range of the IDAC output.
<> 144:ef7eb2e8f9f7 183 *
<> 144:ef7eb2e8f9f7 184 * @details
<> 144:ef7eb2e8f9f7 185 * This function sets the current range of the IDAC output. The function
<> 144:ef7eb2e8f9f7 186 * also updates the IDAC calibration register (IDAC_CAL) with the default
<> 150:02e0a0aed4ec 187 * calibration value from DEVINFO (factory calibration) corresponding to the
<> 144:ef7eb2e8f9f7 188 * specified range.
<> 144:ef7eb2e8f9f7 189 *
<> 144:ef7eb2e8f9f7 190 * @param[in] idac
<> 144:ef7eb2e8f9f7 191 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 192 *
<> 144:ef7eb2e8f9f7 193 * @param[in] range
<> 144:ef7eb2e8f9f7 194 * Current range value.
<> 144:ef7eb2e8f9f7 195 ******************************************************************************/
<> 144:ef7eb2e8f9f7 196 void IDAC_RangeSet(IDAC_TypeDef *idac, const IDAC_Range_TypeDef range)
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 uint32_t tmp;
<> 144:ef7eb2e8f9f7 199 #if defined( _IDAC_CURPROG_TUNING_MASK )
<> 144:ef7eb2e8f9f7 200 uint32_t diCal0;
<> 144:ef7eb2e8f9f7 201 uint32_t diCal1;
<> 144:ef7eb2e8f9f7 202 #endif
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 144:ef7eb2e8f9f7 205 EFM_ASSERT(((uint32_t)range >> _IDAC_CURPROG_RANGESEL_SHIFT)
<> 144:ef7eb2e8f9f7 206 <= (_IDAC_CURPROG_RANGESEL_MASK >> _IDAC_CURPROG_RANGESEL_SHIFT));
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 #if defined ( _IDAC_CAL_MASK )
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* Load proper calibration data depending on selected range */
<> 144:ef7eb2e8f9f7 211 switch ((IDAC_Range_TypeDef)range)
<> 144:ef7eb2e8f9f7 212 {
<> 144:ef7eb2e8f9f7 213 case idacCurrentRange0:
<> 144:ef7eb2e8f9f7 214 idac->CAL = (DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE0_MASK)
<> 144:ef7eb2e8f9f7 215 >> _DEVINFO_IDAC0CAL0_RANGE0_SHIFT;
<> 144:ef7eb2e8f9f7 216 break;
<> 144:ef7eb2e8f9f7 217 case idacCurrentRange1:
<> 144:ef7eb2e8f9f7 218 idac->CAL = (DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE1_MASK)
<> 144:ef7eb2e8f9f7 219 >> _DEVINFO_IDAC0CAL0_RANGE1_SHIFT;
<> 144:ef7eb2e8f9f7 220 break;
<> 144:ef7eb2e8f9f7 221 case idacCurrentRange2:
<> 144:ef7eb2e8f9f7 222 idac->CAL = (DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE2_MASK)
<> 144:ef7eb2e8f9f7 223 >> _DEVINFO_IDAC0CAL0_RANGE2_SHIFT;
<> 144:ef7eb2e8f9f7 224 break;
<> 144:ef7eb2e8f9f7 225 case idacCurrentRange3:
<> 144:ef7eb2e8f9f7 226 idac->CAL = (DEVINFO->IDAC0CAL0 & _DEVINFO_IDAC0CAL0_RANGE3_MASK)
<> 144:ef7eb2e8f9f7 227 >> _DEVINFO_IDAC0CAL0_RANGE3_SHIFT;
<> 144:ef7eb2e8f9f7 228 break;
<> 144:ef7eb2e8f9f7 229 }
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 tmp = idac->CURPROG & ~_IDAC_CURPROG_RANGESEL_MASK;
<> 144:ef7eb2e8f9f7 232 tmp |= (uint32_t)range;
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 #elif defined( _IDAC_CURPROG_TUNING_MASK )
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /* Load calibration data depending on selected range and sink/source mode */
<> 144:ef7eb2e8f9f7 237 /* TUNING (calibration) field in CURPROG register. */
<> 150:02e0a0aed4ec 238 EFM_ASSERT(idac == IDAC0);
<> 150:02e0a0aed4ec 239 diCal0 = DEVINFO->IDAC0CAL0;
<> 150:02e0a0aed4ec 240 diCal1 = DEVINFO->IDAC0CAL1;
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 tmp = idac->CURPROG & ~(_IDAC_CURPROG_TUNING_MASK
<> 144:ef7eb2e8f9f7 243 | _IDAC_CURPROG_RANGESEL_MASK);
<> 144:ef7eb2e8f9f7 244 if (idac->CTRL & IDAC_CTRL_CURSINK)
<> 144:ef7eb2e8f9f7 245 {
<> 144:ef7eb2e8f9f7 246 switch (range)
<> 144:ef7eb2e8f9f7 247 {
<> 144:ef7eb2e8f9f7 248 case idacCurrentRange0:
<> 144:ef7eb2e8f9f7 249 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE0TUNING_MASK)
<> 144:ef7eb2e8f9f7 250 >> _DEVINFO_IDAC0CAL1_SINKRANGE0TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 251 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 252 break;
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 case idacCurrentRange1:
<> 144:ef7eb2e8f9f7 255 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE1TUNING_MASK)
<> 144:ef7eb2e8f9f7 256 >> _DEVINFO_IDAC0CAL1_SINKRANGE1TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 257 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 258 break;
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 case idacCurrentRange2:
<> 144:ef7eb2e8f9f7 261 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE2TUNING_MASK)
<> 144:ef7eb2e8f9f7 262 >> _DEVINFO_IDAC0CAL1_SINKRANGE2TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 263 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 264 break;
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 case idacCurrentRange3:
<> 144:ef7eb2e8f9f7 267 tmp |= ((diCal1 & _DEVINFO_IDAC0CAL1_SINKRANGE3TUNING_MASK)
<> 144:ef7eb2e8f9f7 268 >> _DEVINFO_IDAC0CAL1_SINKRANGE3TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 269 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 270 break;
<> 144:ef7eb2e8f9f7 271 }
<> 144:ef7eb2e8f9f7 272 }
<> 144:ef7eb2e8f9f7 273 else
<> 144:ef7eb2e8f9f7 274 {
<> 144:ef7eb2e8f9f7 275 switch (range)
<> 144:ef7eb2e8f9f7 276 {
<> 144:ef7eb2e8f9f7 277 case idacCurrentRange0:
<> 144:ef7eb2e8f9f7 278 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE0TUNING_MASK)
<> 144:ef7eb2e8f9f7 279 >> _DEVINFO_IDAC0CAL0_SOURCERANGE0TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 280 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 281 break;
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 case idacCurrentRange1:
<> 144:ef7eb2e8f9f7 284 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE1TUNING_MASK)
<> 144:ef7eb2e8f9f7 285 >> _DEVINFO_IDAC0CAL0_SOURCERANGE1TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 286 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 287 break;
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 case idacCurrentRange2:
<> 144:ef7eb2e8f9f7 290 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE2TUNING_MASK)
<> 144:ef7eb2e8f9f7 291 >> _DEVINFO_IDAC0CAL0_SOURCERANGE2TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 292 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 293 break;
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 case idacCurrentRange3:
<> 144:ef7eb2e8f9f7 296 tmp |= ((diCal0 & _DEVINFO_IDAC0CAL0_SOURCERANGE3TUNING_MASK)
<> 144:ef7eb2e8f9f7 297 >> _DEVINFO_IDAC0CAL0_SOURCERANGE3TUNING_SHIFT)
<> 144:ef7eb2e8f9f7 298 << _IDAC_CURPROG_TUNING_SHIFT;
<> 144:ef7eb2e8f9f7 299 break;
<> 144:ef7eb2e8f9f7 300 }
<> 144:ef7eb2e8f9f7 301 }
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 tmp |= (uint32_t)range;
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 #else
<> 144:ef7eb2e8f9f7 306 #warning "IDAC calibration register definition unknown."
<> 144:ef7eb2e8f9f7 307 #endif
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 idac->CURPROG = tmp;
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 314 * @brief
<> 144:ef7eb2e8f9f7 315 * Set the current step of the IDAC output.
<> 144:ef7eb2e8f9f7 316 *
<> 144:ef7eb2e8f9f7 317 * @param[in] idac
<> 144:ef7eb2e8f9f7 318 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 319 *
<> 144:ef7eb2e8f9f7 320 * @param[in] step
<> 144:ef7eb2e8f9f7 321 * Step value for IDAC output. Valid range is 0-31.
<> 144:ef7eb2e8f9f7 322 ******************************************************************************/
<> 144:ef7eb2e8f9f7 323 void IDAC_StepSet(IDAC_TypeDef *idac, const uint32_t step)
<> 144:ef7eb2e8f9f7 324 {
<> 144:ef7eb2e8f9f7 325 uint32_t tmp;
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 144:ef7eb2e8f9f7 328 EFM_ASSERT(step <= (_IDAC_CURPROG_STEPSEL_MASK >> _IDAC_CURPROG_STEPSEL_SHIFT));
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 tmp = idac->CURPROG & ~_IDAC_CURPROG_STEPSEL_MASK;
<> 144:ef7eb2e8f9f7 331 tmp |= step << _IDAC_CURPROG_STEPSEL_SHIFT;
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 idac->CURPROG = tmp;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 338 * @brief
<> 144:ef7eb2e8f9f7 339 * Enable/disable the IDAC OUT pin.
<> 144:ef7eb2e8f9f7 340 *
<> 144:ef7eb2e8f9f7 341 * @param[in] idac
<> 144:ef7eb2e8f9f7 342 * Pointer to IDAC peripheral register block.
<> 144:ef7eb2e8f9f7 343 *
<> 144:ef7eb2e8f9f7 344 * @param[in] enable
<> 144:ef7eb2e8f9f7 345 * true to enable the IDAC OUT pin, false to disable.
<> 144:ef7eb2e8f9f7 346 ******************************************************************************/
<> 144:ef7eb2e8f9f7 347 void IDAC_OutEnable(IDAC_TypeDef *idac, bool enable)
<> 144:ef7eb2e8f9f7 348 {
<> 144:ef7eb2e8f9f7 349 EFM_ASSERT(IDAC_REF_VALID(idac));
<> 150:02e0a0aed4ec 350 #if defined(_IDAC_CTRL_OUTEN_MASK)
<> 150:02e0a0aed4ec 351 BUS_RegBitWrite(&idac->CTRL, _IDAC_CTRL_OUTEN_SHIFT, enable);
<> 150:02e0a0aed4ec 352 #else
<> 150:02e0a0aed4ec 353 BUS_RegBitWrite(&idac->CTRL, _IDAC_CTRL_APORTOUTEN_SHIFT, enable);
<> 150:02e0a0aed4ec 354 #endif
<> 144:ef7eb2e8f9f7 355 }
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /** @} (end addtogroup IDAC) */
<> 150:02e0a0aed4ec 359 /** @} (end addtogroup emlib) */
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 #endif /* defined(IDAC_COUNT) && (IDAC_COUNT > 0) */