Diff: targets/TARGET_NUVOTON/TARGET_NUC472/analogin_api.c

Revision:

153:fa9ff456f731

Parent:

149:156823d33999

Child:

161:2cc1468da177

--- a/targets/TARGET_NUVOTON/TARGET_NUC472/analogin_api.c	Thu Dec 15 11:48:27 2016 +0000
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/analogin_api.c	Tue Dec 20 17:27:56 2016 +0000
@@ -23,60 +23,26 @@
 #include "PeripheralPins.h"
 #include "nu_modutil.h"
 
-struct nu_adc_var {
-    uint32_t    en_msk;
-};
-
-static struct nu_adc_var adc0_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc1_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc2_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc3_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc4_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc5_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc6_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc7_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc8_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc9_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc10_var = {
-    .en_msk = 0
-};
-static struct nu_adc_var adc11_var = {
-    .en_msk = 0
-};
+static uint32_t eadc_modinit_mask = 0;
 
 static const struct nu_modinit_s adc_modinit_tab[] = {
-    {ADC_0_0, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc0_var},
-    {ADC_0_1, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc1_var},
-    {ADC_0_2, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc2_var},
-    {ADC_0_3, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc3_var},
-    {ADC_0_4, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc4_var},
-    {ADC_0_5, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc5_var},
-    {ADC_0_6, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc6_var},
-    {ADC_0_7, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc7_var},
-    {ADC_0_8, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc8_var},
-    {ADC_0_9, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc9_var},
-    {ADC_0_10, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc10_var},
-    {ADC_0_11, ADC_MODULE, CLK_CLKSEL1_ADCSEL_HIRC, CLK_CLKDIV0_ADC(1), ADC_RST, ADC_IRQn, &adc11_var}
+    {ADC_0_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_0_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    
+    {ADC_1_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
+    {ADC_1_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}
 };
 
 void analogin_init(analogin_t *obj, PinName pin)
@@ -88,8 +54,10 @@
     MBED_ASSERT(modinit != NULL);
     MBED_ASSERT(modinit->modname == obj->adc);
     
+    EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
+    
     // NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
-    if (! ((struct nu_adc_var *) modinit->var)->en_msk) {
+    if (! eadc_modinit_mask) {
         // Reset this module if no channel enabled
         SYS_ResetModule(modinit->rsetidx);
         
@@ -98,33 +66,29 @@
         // Enable clock of paired channels
         CLK_EnableModuleClock(modinit->clkidx);
         
-        // Power on ADC
-        ADC_POWER_ON(ADC);
+        // Make EADC_module ready to convert
+        EADC_Open(eadc_base, 0);
     }
     
-    ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj->adc);
     uint32_t chn =  NU_MODSUBINDEX(obj->adc);
     
     // Wire pinout
     pinmap_pinout(pin, PinMap_ADC);
     
-    // Enable channel 0
-    ADC_Open(adc_base,
-        ADC_INPUT_MODE_SINGLE_END,
-        ADC_OPERATION_MODE_SINGLE,
-        1 << chn);  // ADC_CH_0_MASK~ADC_CH_11_MASK
+    // Configure the sample module Nmod for analog input channel Nch and software trigger source
+    EADC_ConfigSampleModule(eadc_base, chn, EADC_SOFTWARE_TRIGGER, chn % 8);
     
-    ((struct nu_adc_var *) modinit->var)->en_msk |= 1 << chn;
+    eadc_modinit_mask |= 1 << chn;
 }
 
 uint16_t analogin_read_u16(analogin_t *obj)
 {
-    ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj->adc);
+    EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
     uint32_t chn =  NU_MODSUBINDEX(obj->adc);
     
-    ADC_START_CONV(adc_base);
-    while (adc_base->CTL & ADC_CTL_SWTRG_Msk);
-    uint16_t conv_res_12 = ADC_GET_CONVERSION_DATA(adc_base, chn);
+    EADC_START_CONV(eadc_base, 1 << chn);
+    while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << chn) != (1 << chn));
+    uint16_t conv_res_12 = EADC_GET_CONV_DATA(eadc_base, chn);
     // Just 12 bits are effective. Convert to 16 bits.
     // conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0
     // conv_res_16: b11b10b9b8 b7b6b5b4 b3b2b1b0 b11b10b9b8