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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flexcan.h@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
Child:
175:af195413fb11
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30 #ifndef _FSL_FLEXCAN_H_
<> 154:37f96f9d4de2 31 #define _FSL_FLEXCAN_H_
<> 154:37f96f9d4de2 32
<> 154:37f96f9d4de2 33 #include "fsl_common.h"
<> 154:37f96f9d4de2 34
<> 154:37f96f9d4de2 35 /*!
<> 154:37f96f9d4de2 36 * @addtogroup flexcan_driver
<> 154:37f96f9d4de2 37 * @{
<> 154:37f96f9d4de2 38 */
<> 154:37f96f9d4de2 39
<> 154:37f96f9d4de2 40
<> 154:37f96f9d4de2 41 /******************************************************************************
<> 154:37f96f9d4de2 42 * Definitions
<> 154:37f96f9d4de2 43 *****************************************************************************/
<> 154:37f96f9d4de2 44
<> 154:37f96f9d4de2 45 /*! @name Driver version */
<> 154:37f96f9d4de2 46 /*@{*/
<> 154:37f96f9d4de2 47 /*! @brief FlexCAN driver version 2.1.0. */
<> 154:37f96f9d4de2 48 #define FLEXCAN_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
<> 154:37f96f9d4de2 49 /*@}*/
<> 154:37f96f9d4de2 50
<> 154:37f96f9d4de2 51 /*! @brief FlexCAN Frame ID helper macro. */
<> 154:37f96f9d4de2 52 #define FLEXCAN_ID_STD(id) \
<> 154:37f96f9d4de2 53 (((uint32_t)(((uint32_t)(id)) << CAN_ID_STD_SHIFT)) & CAN_ID_STD_MASK) /*!< Standard Frame ID helper macro. */
<> 154:37f96f9d4de2 54 #define FLEXCAN_ID_EXT(id) \
<> 154:37f96f9d4de2 55 (((uint32_t)(((uint32_t)(id)) << CAN_ID_EXT_SHIFT)) & \
<> 154:37f96f9d4de2 56 (CAN_ID_EXT_MASK | CAN_ID_STD_MASK)) /*!< Extend Frame ID helper macro. */
<> 154:37f96f9d4de2 57
<> 154:37f96f9d4de2 58 /*! @brief FlexCAN Rx Message Buffer Mask helper macro. */
<> 154:37f96f9d4de2 59 #define FLEXCAN_RX_MB_STD_MASK(id, rtr, ide) \
<> 154:37f96f9d4de2 60 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 61 FLEXCAN_ID_STD(id)) /*!< Standard Rx Message Buffer Mask helper macro. */
<> 154:37f96f9d4de2 62 #define FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide) \
<> 154:37f96f9d4de2 63 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 64 FLEXCAN_ID_EXT(id)) /*!< Extend Rx Message Buffer Mask helper macro. */
<> 154:37f96f9d4de2 65
<> 154:37f96f9d4de2 66 /*! @brief FlexCAN Rx FIFO Mask helper macro. */
<> 154:37f96f9d4de2 67 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) \
<> 154:37f96f9d4de2 68 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 69 (FLEXCAN_ID_STD(id) << 1)) /*!< Standard Rx FIFO Mask helper macro Type A helper macro. */
<> 154:37f96f9d4de2 70 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide) \
<> 154:37f96f9d4de2 71 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 72 (FLEXCAN_ID_STD(id) << 16)) /*!< Standard Rx FIFO Mask helper macro Type B upper part helper macro. */
<> 154:37f96f9d4de2 73 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide) \
<> 154:37f96f9d4de2 74 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
<> 154:37f96f9d4de2 75 FLEXCAN_ID_STD(id)) /*!< Standard Rx FIFO Mask helper macro Type B lower part helper macro. */
<> 154:37f96f9d4de2 76 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id) \
<> 154:37f96f9d4de2 77 ((FLEXCAN_ID_STD(id) & 0x7F8) << 21) /*!< Standard Rx FIFO Mask helper macro Type C upper part helper macro. */
<> 154:37f96f9d4de2 78 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id) \
<> 154:37f96f9d4de2 79 ((FLEXCAN_ID_STD(id) & 0x7F8) << 13) /*!< Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro. \
<> 154:37f96f9d4de2 80 */
<> 154:37f96f9d4de2 81 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id) \
<> 154:37f96f9d4de2 82 ((FLEXCAN_ID_STD(id) & 0x7F8) << 5) /*!< Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
<> 154:37f96f9d4de2 83 #define FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) \
<> 154:37f96f9d4de2 84 ((FLEXCAN_ID_STD(id) & 0x7F8) >> 3) /*!< Standard Rx FIFO Mask helper macro Type C lower part helper macro. */
<> 154:37f96f9d4de2 85 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) \
<> 154:37f96f9d4de2 86 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 87 (FLEXCAN_ID_EXT(id) << 1)) /*!< Extend Rx FIFO Mask helper macro Type A helper macro. */
<> 154:37f96f9d4de2 88 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide) \
<> 154:37f96f9d4de2 89 (((uint32_t)((uint32_t)(rtr) << 31) | (uint32_t)((uint32_t)(ide) << 30)) | \
<> 154:37f96f9d4de2 90 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) << 1)) /*!< Extend Rx FIFO Mask helper macro Type B upper part helper macro. */
<> 154:37f96f9d4de2 91 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide) \
<> 154:37f96f9d4de2 92 (((uint32_t)((uint32_t)(rtr) << 15) | (uint32_t)((uint32_t)(ide) << 14)) | \
<> 154:37f96f9d4de2 93 ((FLEXCAN_ID_EXT(id) & 0x1FFF8000) >> \
<> 154:37f96f9d4de2 94 15)) /*!< Extend Rx FIFO Mask helper macro Type B lower part helper macro. */
<> 154:37f96f9d4de2 95 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) \
<> 154:37f96f9d4de2 96 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) << 3) /*!< Extend Rx FIFO Mask helper macro Type C upper part helper macro. */
<> 154:37f96f9d4de2 97 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id) \
<> 154:37f96f9d4de2 98 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \
<> 154:37f96f9d4de2 99 5) /*!< Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro. */
<> 154:37f96f9d4de2 100 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id) \
<> 154:37f96f9d4de2 101 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> \
<> 154:37f96f9d4de2 102 13) /*!< Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro. */
<> 154:37f96f9d4de2 103 #define FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) \
<> 154:37f96f9d4de2 104 ((FLEXCAN_ID_EXT(id) & 0x1FE00000) >> 21) /*!< Extend Rx FIFO Mask helper macro Type C lower part helper macro. */
<> 154:37f96f9d4de2 105
<> 154:37f96f9d4de2 106 /*! @brief FlexCAN Rx FIFO Filter helper macro. */
<> 154:37f96f9d4de2 107 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide) \
<> 154:37f96f9d4de2 108 FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type A helper macro. */
<> 154:37f96f9d4de2 109 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide) \
<> 154:37f96f9d4de2 110 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH( \
<> 154:37f96f9d4de2 111 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B upper part helper macro. */
<> 154:37f96f9d4de2 112 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide) \
<> 154:37f96f9d4de2 113 FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW( \
<> 154:37f96f9d4de2 114 id, rtr, ide) /*!< Standard Rx FIFO Filter helper macro Type B lower part helper macro. */
<> 154:37f96f9d4de2 115 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id) \
<> 154:37f96f9d4de2 116 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH( \
<> 154:37f96f9d4de2 117 id) /*!< Standard Rx FIFO Filter helper macro Type C upper part helper macro. */
<> 154:37f96f9d4de2 118 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id) \
<> 154:37f96f9d4de2 119 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH( \
<> 154:37f96f9d4de2 120 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro. */
<> 154:37f96f9d4de2 121 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id) \
<> 154:37f96f9d4de2 122 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW( \
<> 154:37f96f9d4de2 123 id) /*!< Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro. */
<> 154:37f96f9d4de2 124 #define FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id) \
<> 154:37f96f9d4de2 125 FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id) /*!< Standard Rx FIFO Filter helper macro Type C lower part helper macro. \
<> 154:37f96f9d4de2 126 */
<> 154:37f96f9d4de2 127 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide) \
<> 154:37f96f9d4de2 128 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type A helper macro. */
<> 154:37f96f9d4de2 129 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide) \
<> 154:37f96f9d4de2 130 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH( \
<> 154:37f96f9d4de2 131 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B upper part helper macro. */
<> 154:37f96f9d4de2 132 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide) \
<> 154:37f96f9d4de2 133 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW( \
<> 154:37f96f9d4de2 134 id, rtr, ide) /*!< Extend Rx FIFO Filter helper macro Type B lower part helper macro. */
<> 154:37f96f9d4de2 135 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id) \
<> 154:37f96f9d4de2 136 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id) /*!< Extend Rx FIFO Filter helper macro Type C upper part helper macro. \
<> 154:37f96f9d4de2 137 */
<> 154:37f96f9d4de2 138 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id) \
<> 154:37f96f9d4de2 139 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH( \
<> 154:37f96f9d4de2 140 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro. */
<> 154:37f96f9d4de2 141 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id) \
<> 154:37f96f9d4de2 142 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW( \
<> 154:37f96f9d4de2 143 id) /*!< Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro. */
<> 154:37f96f9d4de2 144 #define FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id) \
<> 154:37f96f9d4de2 145 FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id) /*!< Extend Rx FIFO Filter helper macro Type C lower part helper macro. */
<> 154:37f96f9d4de2 146
<> 154:37f96f9d4de2 147 /*! @brief FlexCAN transfer status. */
<> 154:37f96f9d4de2 148 enum _flexcan_status
<> 154:37f96f9d4de2 149 {
<> 154:37f96f9d4de2 150 kStatus_FLEXCAN_TxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 0), /*!< Tx Message Buffer is Busy. */
<> 154:37f96f9d4de2 151 kStatus_FLEXCAN_TxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 1), /*!< Tx Message Buffer is Idle. */
<> 154:37f96f9d4de2 152 kStatus_FLEXCAN_TxSwitchToRx = MAKE_STATUS(
<> 154:37f96f9d4de2 153 kStatusGroup_FLEXCAN, 2), /*!< Remote Message is send out and Message buffer changed to Receive one. */
<> 154:37f96f9d4de2 154 kStatus_FLEXCAN_RxBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 3), /*!< Rx Message Buffer is Busy. */
<> 154:37f96f9d4de2 155 kStatus_FLEXCAN_RxIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 4), /*!< Rx Message Buffer is Idle. */
<> 154:37f96f9d4de2 156 kStatus_FLEXCAN_RxOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 5), /*!< Rx Message Buffer is Overflowed. */
<> 154:37f96f9d4de2 157 kStatus_FLEXCAN_RxFifoBusy = MAKE_STATUS(kStatusGroup_FLEXCAN, 6), /*!< Rx Message FIFO is Busy. */
<> 154:37f96f9d4de2 158 kStatus_FLEXCAN_RxFifoIdle = MAKE_STATUS(kStatusGroup_FLEXCAN, 7), /*!< Rx Message FIFO is Idle. */
<> 154:37f96f9d4de2 159 kStatus_FLEXCAN_RxFifoOverflow = MAKE_STATUS(kStatusGroup_FLEXCAN, 8), /*!< Rx Message FIFO is overflowed. */
<> 154:37f96f9d4de2 160 kStatus_FLEXCAN_RxFifoWarning = MAKE_STATUS(kStatusGroup_FLEXCAN, 0), /*!< Rx Message FIFO is almost overflowed. */
<> 154:37f96f9d4de2 161 kStatus_FLEXCAN_ErrorStatus = MAKE_STATUS(kStatusGroup_FLEXCAN, 10), /*!< FlexCAN Module Error and Status. */
<> 154:37f96f9d4de2 162 kStatus_FLEXCAN_UnHandled = MAKE_STATUS(kStatusGroup_FLEXCAN, 11), /*!< UnHadled Interrupt asserted. */
<> 154:37f96f9d4de2 163 };
<> 154:37f96f9d4de2 164
<> 154:37f96f9d4de2 165 /*! @brief FlexCAN frame format. */
<> 154:37f96f9d4de2 166 typedef enum _flexcan_frame_format
<> 154:37f96f9d4de2 167 {
<> 154:37f96f9d4de2 168 kFLEXCAN_FrameFormatStandard = 0x0U, /*!< Standard frame format attribute. */
<> 154:37f96f9d4de2 169 kFLEXCAN_FrameFormatExtend = 0x1U, /*!< Extend frame format attribute. */
<> 154:37f96f9d4de2 170 } flexcan_frame_format_t;
<> 154:37f96f9d4de2 171
<> 154:37f96f9d4de2 172 /*! @brief FlexCAN frame type. */
<> 154:37f96f9d4de2 173 typedef enum _flexcan_frame_type
<> 154:37f96f9d4de2 174 {
<> 154:37f96f9d4de2 175 kFLEXCAN_FrameTypeData = 0x0U, /*!< Data frame type attribute. */
<> 154:37f96f9d4de2 176 kFLEXCAN_FrameTypeRemote = 0x1U, /*!< Remote frame type attribute. */
<> 154:37f96f9d4de2 177 } flexcan_frame_type_t;
<> 154:37f96f9d4de2 178
<> 154:37f96f9d4de2 179 /*! @brief FlexCAN clock source. */
<> 154:37f96f9d4de2 180 typedef enum _flexcan_clock_source
<> 154:37f96f9d4de2 181 {
<> 154:37f96f9d4de2 182 kFLEXCAN_ClkSrcOsc = 0x0U, /*!< FlexCAN Protocol Engine clock from Oscillator. */
<> 154:37f96f9d4de2 183 kFLEXCAN_ClkSrcPeri = 0x1U, /*!< FlexCAN Protocol Engine clock from Peripheral Clock. */
<> 154:37f96f9d4de2 184 } flexcan_clock_source_t;
<> 154:37f96f9d4de2 185
<> 154:37f96f9d4de2 186 /*! @brief FlexCAN Rx Fifo Filter type. */
<> 154:37f96f9d4de2 187 typedef enum _flexcan_rx_fifo_filter_type
<> 154:37f96f9d4de2 188 {
<> 154:37f96f9d4de2 189 kFLEXCAN_RxFifoFilterTypeA = 0x0U, /*!< One full ID (standard and extended) per ID Filter element. */
<> 154:37f96f9d4de2 190 kFLEXCAN_RxFifoFilterTypeB =
<> 154:37f96f9d4de2 191 0x1U, /*!< Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element. */
<> 154:37f96f9d4de2 192 kFLEXCAN_RxFifoFilterTypeC =
<> 154:37f96f9d4de2 193 0x2U, /*!< Four partial 8-bit Standard or extended ID slices per ID Filter Table element. */
<> 154:37f96f9d4de2 194 kFLEXCAN_RxFifoFilterTypeD = 0x3U, /*!< All frames rejected. */
<> 154:37f96f9d4de2 195 } flexcan_rx_fifo_filter_type_t;
<> 154:37f96f9d4de2 196
<> 154:37f96f9d4de2 197 /*!
<> 154:37f96f9d4de2 198 * @brief FlexCAN Rx FIFO priority
<> 154:37f96f9d4de2 199 *
<> 154:37f96f9d4de2 200 * The matching process starts from the Rx MB(or Rx FIFO) with higher priority.
<> 154:37f96f9d4de2 201 * If no MB(or Rx FIFO filter) is satisfied, the matching process goes on with
<> 154:37f96f9d4de2 202 * the Rx FIFO(or Rx MB) with lower priority.
<> 154:37f96f9d4de2 203 */
<> 154:37f96f9d4de2 204 typedef enum _flexcan_rx_fifo_priority
<> 154:37f96f9d4de2 205 {
<> 154:37f96f9d4de2 206 kFLEXCAN_RxFifoPrioLow = 0x0U, /*!< Matching process start from Rx Message Buffer first*/
<> 154:37f96f9d4de2 207 kFLEXCAN_RxFifoPrioHigh = 0x1U, /*!< Matching process start from Rx FIFO first*/
<> 154:37f96f9d4de2 208 } flexcan_rx_fifo_priority_t;
<> 154:37f96f9d4de2 209
<> 154:37f96f9d4de2 210 /*!
<> 154:37f96f9d4de2 211 * @brief FlexCAN interrupt configuration structure, default settings all disabled.
<> 154:37f96f9d4de2 212 *
<> 154:37f96f9d4de2 213 * This structure contains the settings for all of the FlexCAN Module interrupt configurations.
<> 154:37f96f9d4de2 214 * Note: FlexCAN Message Buffers and Rx FIFO have their own interrupts.
<> 154:37f96f9d4de2 215 */
<> 154:37f96f9d4de2 216 enum _flexcan_interrupt_enable
<> 154:37f96f9d4de2 217 {
<> 154:37f96f9d4de2 218 kFLEXCAN_BusOffInterruptEnable = CAN_CTRL1_BOFFMSK_MASK, /*!< Bus Off interrupt. */
<> 154:37f96f9d4de2 219 kFLEXCAN_ErrorInterruptEnable = CAN_CTRL1_ERRMSK_MASK, /*!< Error interrupt. */
<> 154:37f96f9d4de2 220 kFLEXCAN_RxWarningInterruptEnable = CAN_CTRL1_RWRNMSK_MASK, /*!< Rx Warning interrupt. */
<> 154:37f96f9d4de2 221 kFLEXCAN_TxWarningInterruptEnable = CAN_CTRL1_TWRNMSK_MASK, /*!< Tx Warning interrupt. */
<> 154:37f96f9d4de2 222 kFLEXCAN_WakeUpInterruptEnable = CAN_MCR_WAKMSK_MASK, /*!< Wake Up interrupt. */
<> 154:37f96f9d4de2 223 };
<> 154:37f96f9d4de2 224
<> 154:37f96f9d4de2 225 /*!
<> 154:37f96f9d4de2 226 * @brief FlexCAN status flags.
<> 154:37f96f9d4de2 227 *
<> 154:37f96f9d4de2 228 * This provides constants for the FlexCAN status flags for use in the FlexCAN functions.
<> 154:37f96f9d4de2 229 * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to
<> 154:37f96f9d4de2 230 * read FlEXCAN_ErrorFlag and distinguish which error is occur using
<> 154:37f96f9d4de2 231 * @ref _flexcan_error_flags enumerations.
<> 154:37f96f9d4de2 232 */
<> 154:37f96f9d4de2 233 enum _flexcan_flags
<> 154:37f96f9d4de2 234 {
<> 154:37f96f9d4de2 235 kFLEXCAN_SynchFlag = CAN_ESR1_SYNCH_MASK, /*!< CAN Synchronization Status. */
<> 154:37f96f9d4de2 236 kFLEXCAN_TxWarningIntFlag = CAN_ESR1_TWRNINT_MASK, /*!< Tx Warning Interrupt Flag. */
<> 154:37f96f9d4de2 237 kFLEXCAN_RxWarningIntFlag = CAN_ESR1_RWRNINT_MASK, /*!< Rx Warning Interrupt Flag. */
<> 154:37f96f9d4de2 238 kFLEXCAN_TxErrorWarningFlag = CAN_ESR1_TXWRN_MASK, /*!< Tx Error Warning Status. */
<> 154:37f96f9d4de2 239 kFLEXCAN_RxErrorWarningFlag = CAN_ESR1_RXWRN_MASK, /*!< Rx Error Warning Status. */
<> 154:37f96f9d4de2 240 kFLEXCAN_IdleFlag = CAN_ESR1_IDLE_MASK, /*!< CAN IDLE Status Flag. */
<> 154:37f96f9d4de2 241 kFLEXCAN_FaultConfinementFlag = CAN_ESR1_FLTCONF_MASK, /*!< Fault Confinement State Flag. */
<> 154:37f96f9d4de2 242 kFLEXCAN_TransmittingFlag = CAN_ESR1_TX_MASK, /*!< FlexCAN In Transmission Status. */
<> 154:37f96f9d4de2 243 kFLEXCAN_ReceivingFlag = CAN_ESR1_RX_MASK, /*!< FlexCAN In Reception Status. */
<> 154:37f96f9d4de2 244 kFLEXCAN_BusOffIntFlag = CAN_ESR1_BOFFINT_MASK, /*!< Bus Off Interrupt Flag. */
<> 154:37f96f9d4de2 245 kFLEXCAN_ErrorIntFlag = CAN_ESR1_ERRINT_MASK, /*!< Error Interrupt Flag. */
<> 154:37f96f9d4de2 246 kFLEXCAN_WakeUpIntFlag = CAN_ESR1_WAKINT_MASK, /*!< Wake-Up Interrupt Flag. */
<> 154:37f96f9d4de2 247 kFLEXCAN_ErrorFlag = CAN_ESR1_BIT1ERR_MASK | /*!< All FlexCAN Error Status. */
<> 154:37f96f9d4de2 248 CAN_ESR1_BIT0ERR_MASK |
<> 154:37f96f9d4de2 249 CAN_ESR1_ACKERR_MASK | CAN_ESR1_CRCERR_MASK | CAN_ESR1_FRMERR_MASK | CAN_ESR1_STFERR_MASK,
<> 154:37f96f9d4de2 250 };
<> 154:37f96f9d4de2 251
<> 154:37f96f9d4de2 252 /*!
<> 154:37f96f9d4de2 253 * @brief FlexCAN error status flags.
<> 154:37f96f9d4de2 254 *
<> 154:37f96f9d4de2 255 * The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus.
<> 154:37f96f9d4de2 256 * This enumerations should be used with KFLEXCAN_ErrorFlag in @ref _flexcan_flags enumerations
<> 154:37f96f9d4de2 257 * to ditermine which error is generated.
<> 154:37f96f9d4de2 258 */
<> 154:37f96f9d4de2 259 enum _flexcan_error_flags
<> 154:37f96f9d4de2 260 {
<> 154:37f96f9d4de2 261 kFLEXCAN_StuffingError = CAN_ESR1_STFERR_MASK, /*!< Stuffing Error. */
<> 154:37f96f9d4de2 262 kFLEXCAN_FormError = CAN_ESR1_FRMERR_MASK, /*!< Form Error. */
<> 154:37f96f9d4de2 263 kFLEXCAN_CrcError = CAN_ESR1_CRCERR_MASK, /*!< Cyclic Redundancy Check Error. */
<> 154:37f96f9d4de2 264 kFLEXCAN_AckError = CAN_ESR1_ACKERR_MASK, /*!< Received no ACK on transmission. */
<> 154:37f96f9d4de2 265 kFLEXCAN_Bit0Error = CAN_ESR1_BIT0ERR_MASK, /*!< Unable to send dominant bit. */
<> 154:37f96f9d4de2 266 kFLEXCAN_Bit1Error = CAN_ESR1_BIT1ERR_MASK, /*!< Unable to send recessive bit. */
<> 154:37f96f9d4de2 267 };
<> 154:37f96f9d4de2 268
<> 154:37f96f9d4de2 269 /*!
<> 154:37f96f9d4de2 270 * @brief FlexCAN Rx FIFO status flags.
<> 154:37f96f9d4de2 271 *
<> 154:37f96f9d4de2 272 * The FlexCAN Rx FIFO Status enumerations are used to determine the status of the
<> 154:37f96f9d4de2 273 * Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies
<> 154:37f96f9d4de2 274 * more Message Buffer space), Rx FIFO status flags are mapped to the corresponding
<> 154:37f96f9d4de2 275 * Message Buffer status flags.
<> 154:37f96f9d4de2 276 */
<> 154:37f96f9d4de2 277 enum _flexcan_rx_fifo_flags
<> 154:37f96f9d4de2 278 {
<> 154:37f96f9d4de2 279 kFLEXCAN_RxFifoOverflowFlag = CAN_IFLAG1_BUF7I_MASK, /*!< Rx FIFO overflow flag. */
<> 154:37f96f9d4de2 280 kFLEXCAN_RxFifoWarningFlag = CAN_IFLAG1_BUF6I_MASK, /*!< Rx FIFO almost full flag. */
<> 154:37f96f9d4de2 281 kFLEXCAN_RxFifoFrameAvlFlag = CAN_IFLAG1_BUF5I_MASK, /*!< Frames available in Rx FIFO flag. */
<> 154:37f96f9d4de2 282 };
<> 154:37f96f9d4de2 283
<> 154:37f96f9d4de2 284 #if defined(__CC_ARM)
<> 154:37f96f9d4de2 285 #pragma anon_unions
<> 154:37f96f9d4de2 286 #endif
<> 154:37f96f9d4de2 287 /*! @brief FlexCAN message frame structure. */
<> 154:37f96f9d4de2 288 typedef struct _flexcan_frame
<> 154:37f96f9d4de2 289 {
<> 154:37f96f9d4de2 290 struct
<> 154:37f96f9d4de2 291 {
<> 154:37f96f9d4de2 292 uint32_t timestamp : 16; /*!< FlexCAN internal Free-Running Counter Time Stamp. */
<> 154:37f96f9d4de2 293 uint32_t length : 4; /*!< CAN frame payload length in bytes(Range: 0~8). */
<> 154:37f96f9d4de2 294 uint32_t type : 1; /*!< CAN Frame Type(DATA or REMOTE). */
<> 154:37f96f9d4de2 295 uint32_t format : 1; /*!< CAN Frame Identifier(STD or EXT format). */
<> 154:37f96f9d4de2 296 uint32_t : 1; /*!< Reserved. */
<> 154:37f96f9d4de2 297 uint32_t idhit : 9; /*!< CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode). */
<> 154:37f96f9d4de2 298 };
<> 154:37f96f9d4de2 299 struct
<> 154:37f96f9d4de2 300 {
<> 154:37f96f9d4de2 301 uint32_t id : 29; /*!< CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */
<> 154:37f96f9d4de2 302 uint32_t : 3; /*!< Reserved. */
<> 154:37f96f9d4de2 303 };
<> 154:37f96f9d4de2 304 union
<> 154:37f96f9d4de2 305 {
<> 154:37f96f9d4de2 306 struct
<> 154:37f96f9d4de2 307 {
<> 154:37f96f9d4de2 308 uint32_t dataWord0; /*!< CAN Frame payload word0. */
<> 154:37f96f9d4de2 309 uint32_t dataWord1; /*!< CAN Frame payload word1. */
<> 154:37f96f9d4de2 310 };
<> 154:37f96f9d4de2 311 struct
<> 154:37f96f9d4de2 312 {
<> 154:37f96f9d4de2 313 uint8_t dataByte3; /*!< CAN Frame payload byte3. */
<> 154:37f96f9d4de2 314 uint8_t dataByte2; /*!< CAN Frame payload byte2. */
<> 154:37f96f9d4de2 315 uint8_t dataByte1; /*!< CAN Frame payload byte1. */
<> 154:37f96f9d4de2 316 uint8_t dataByte0; /*!< CAN Frame payload byte0. */
<> 154:37f96f9d4de2 317 uint8_t dataByte7; /*!< CAN Frame payload byte7. */
<> 154:37f96f9d4de2 318 uint8_t dataByte6; /*!< CAN Frame payload byte6. */
<> 154:37f96f9d4de2 319 uint8_t dataByte5; /*!< CAN Frame payload byte5. */
<> 154:37f96f9d4de2 320 uint8_t dataByte4; /*!< CAN Frame payload byte4. */
<> 154:37f96f9d4de2 321 };
<> 154:37f96f9d4de2 322 };
<> 154:37f96f9d4de2 323 } flexcan_frame_t;
<> 154:37f96f9d4de2 324
<> 154:37f96f9d4de2 325 /*! @brief FlexCAN module configuration structure. */
<> 154:37f96f9d4de2 326 typedef struct _flexcan_config
<> 154:37f96f9d4de2 327 {
<> 154:37f96f9d4de2 328 uint32_t baudRate; /*!< FlexCAN baud rate in bps. */
<> 154:37f96f9d4de2 329 flexcan_clock_source_t clkSrc; /*!< Clock source for FlexCAN Protocol Engine. */
<> 154:37f96f9d4de2 330 uint8_t maxMbNum; /*!< The maximum number of Message Buffers used by user. */
<> 154:37f96f9d4de2 331 bool enableLoopBack; /*!< Enable or Disable Loop Back Self Test Mode. */
<> 154:37f96f9d4de2 332 bool enableSelfWakeup; /*!< Enable or Disable Self Wakeup Mode. */
<> 154:37f96f9d4de2 333 bool enableIndividMask; /*!< Enable or Disable Rx Individual Mask. */
<> 154:37f96f9d4de2 334 #if (defined(FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT) && FSL_FEATURE_FLEXCAN_HAS_DOZE_MODE_SUPPORT)
<> 154:37f96f9d4de2 335 bool enableDoze; /*!< Enable or Disable Doze Mode. */
<> 154:37f96f9d4de2 336 #endif
<> 154:37f96f9d4de2 337 } flexcan_config_t;
<> 154:37f96f9d4de2 338
<> 154:37f96f9d4de2 339 /*! @brief FlexCAN protocol timing characteristic configuration structure. */
<> 154:37f96f9d4de2 340 typedef struct _flexcan_timing_config
<> 154:37f96f9d4de2 341 {
<> 154:37f96f9d4de2 342 uint8_t preDivider; /*!< Clock Pre-scaler Division Factor. */
<> 154:37f96f9d4de2 343 uint8_t rJumpwidth; /*!< Re-sync Jump Width. */
<> 154:37f96f9d4de2 344 uint8_t phaseSeg1; /*!< Phase Segment 1. */
<> 154:37f96f9d4de2 345 uint8_t phaseSeg2; /*!< Phase Segment 2. */
<> 154:37f96f9d4de2 346 uint8_t propSeg; /*!< Propagation Segment. */
<> 154:37f96f9d4de2 347 } flexcan_timing_config_t;
<> 154:37f96f9d4de2 348
<> 154:37f96f9d4de2 349 /*!
<> 154:37f96f9d4de2 350 * @brief FlexCAN Receive Message Buffer configuration structure
<> 154:37f96f9d4de2 351 *
<> 154:37f96f9d4de2 352 * This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function.
<> 154:37f96f9d4de2 353 * The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive
<> 154:37f96f9d4de2 354 * Message Buffer. The function abort previous receiving process, clean the
<> 154:37f96f9d4de2 355 * Message Buffer and activate the Rx Message Buffer using given Message Buffer
<> 154:37f96f9d4de2 356 * setting.
<> 154:37f96f9d4de2 357 */
<> 154:37f96f9d4de2 358 typedef struct _flexcan_rx_mb_config
<> 154:37f96f9d4de2 359 {
<> 154:37f96f9d4de2 360 uint32_t id; /*!< CAN Message Buffer Frame Identifier, should be set using
<> 154:37f96f9d4de2 361 FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro. */
<> 154:37f96f9d4de2 362 flexcan_frame_format_t format; /*!< CAN Frame Identifier format(Standard of Extend). */
<> 154:37f96f9d4de2 363 flexcan_frame_type_t type; /*!< CAN Frame Type(Data or Remote). */
<> 154:37f96f9d4de2 364 } flexcan_rx_mb_config_t;
<> 154:37f96f9d4de2 365
<> 154:37f96f9d4de2 366 /*! @brief FlexCAN Rx FIFO configuration structure. */
<> 154:37f96f9d4de2 367 typedef struct _flexcan_rx_fifo_config
<> 154:37f96f9d4de2 368 {
<> 154:37f96f9d4de2 369 uint32_t *idFilterTable; /*!< Pointer to FlexCAN Rx FIFO identifier filter table. */
<> 154:37f96f9d4de2 370 uint8_t idFilterNum; /*!< The quantity of filter elements. */
<> 154:37f96f9d4de2 371 flexcan_rx_fifo_filter_type_t idFilterType; /*!< The FlexCAN Rx FIFO Filter type. */
<> 154:37f96f9d4de2 372 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Rx FIFO receive priority. */
<> 154:37f96f9d4de2 373 } flexcan_rx_fifo_config_t;
<> 154:37f96f9d4de2 374
<> 154:37f96f9d4de2 375 /*! @brief FlexCAN Message Buffer transfer. */
<> 154:37f96f9d4de2 376 typedef struct _flexcan_mb_transfer
<> 154:37f96f9d4de2 377 {
<> 154:37f96f9d4de2 378 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be transfer. */
<> 154:37f96f9d4de2 379 uint8_t mbIdx; /*!< The index of Message buffer used to transfer Message. */
<> 154:37f96f9d4de2 380 } flexcan_mb_transfer_t;
<> 154:37f96f9d4de2 381
<> 154:37f96f9d4de2 382 /*! @brief FlexCAN Rx FIFO transfer. */
<> 154:37f96f9d4de2 383 typedef struct _flexcan_fifo_transfer
<> 154:37f96f9d4de2 384 {
<> 154:37f96f9d4de2 385 flexcan_frame_t *frame; /*!< The buffer of CAN Message to be received from Rx FIFO. */
<> 154:37f96f9d4de2 386 } flexcan_fifo_transfer_t;
<> 154:37f96f9d4de2 387
<> 154:37f96f9d4de2 388 /*! @brief FlexCAN handle structure definition. */
<> 154:37f96f9d4de2 389 typedef struct _flexcan_handle flexcan_handle_t;
<> 154:37f96f9d4de2 390
<> 154:37f96f9d4de2 391 /*! @brief FlexCAN transfer callback function.
<> 154:37f96f9d4de2 392 *
<> 154:37f96f9d4de2 393 * The FlexCAN transfer callback returns a value from the underlying layer.
<> 154:37f96f9d4de2 394 * If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of
<> 154:37f96f9d4de2 395 * FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module.
<> 154:37f96f9d4de2 396 * If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of
<> 154:37f96f9d4de2 397 * Message Buffer that generate transfer event.
<> 154:37f96f9d4de2 398 * If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be
<> 154:37f96f9d4de2 399 * Ignored.
<> 154:37f96f9d4de2 400 */
<> 154:37f96f9d4de2 401 typedef void (*flexcan_transfer_callback_t)(
<> 154:37f96f9d4de2 402 CAN_Type *base, flexcan_handle_t *handle, status_t status, uint32_t result, void *userData);
<> 154:37f96f9d4de2 403
<> 154:37f96f9d4de2 404 /*! @brief FlexCAN handle structure. */
<> 154:37f96f9d4de2 405 struct _flexcan_handle
<> 154:37f96f9d4de2 406 {
<> 154:37f96f9d4de2 407 flexcan_transfer_callback_t callback; /*!< Callback function. */
<> 154:37f96f9d4de2 408 void *userData; /*!< FlexCAN callback function parameter.*/
<> 154:37f96f9d4de2 409 flexcan_frame_t *volatile mbFrameBuf[CAN_WORD1_COUNT];
<> 154:37f96f9d4de2 410 /*!< The buffer for received data from Message Buffers. */
<> 154:37f96f9d4de2 411 flexcan_frame_t *volatile rxFifoFrameBuf; /*!< The buffer for received data from Rx FIFO. */
<> 154:37f96f9d4de2 412 volatile uint8_t mbState[CAN_WORD1_COUNT]; /*!< Message Buffer transfer state. */
<> 154:37f96f9d4de2 413 volatile uint8_t rxFifoState; /*!< Rx FIFO transfer state. */
<> 154:37f96f9d4de2 414 };
<> 154:37f96f9d4de2 415
<> 154:37f96f9d4de2 416 /******************************************************************************
<> 154:37f96f9d4de2 417 * API
<> 154:37f96f9d4de2 418 *****************************************************************************/
<> 154:37f96f9d4de2 419
<> 154:37f96f9d4de2 420 #if defined(__cplusplus)
<> 154:37f96f9d4de2 421 extern "C" {
<> 154:37f96f9d4de2 422 #endif
<> 154:37f96f9d4de2 423
<> 154:37f96f9d4de2 424 /*!
<> 154:37f96f9d4de2 425 * @name Initialization and deinitialization
<> 154:37f96f9d4de2 426 * @{
<> 154:37f96f9d4de2 427 */
<> 154:37f96f9d4de2 428
<> 154:37f96f9d4de2 429 /*!
<> 154:37f96f9d4de2 430 * @brief Initializes a FlexCAN instance.
<> 154:37f96f9d4de2 431 *
<> 154:37f96f9d4de2 432 * This function initializes the FlexCAN module with user-defined settings.
<> 154:37f96f9d4de2 433 * This example shows how to set up the flexcan_config_t parameters and how
<> 154:37f96f9d4de2 434 * to call the FLEXCAN_Init function by passing in these parameters:
<> 154:37f96f9d4de2 435 * @code
<> 154:37f96f9d4de2 436 * flexcan_config_t flexcanConfig;
<> 154:37f96f9d4de2 437 * flexcanConfig.clkSrc = kFLEXCAN_ClkSrcOsc;
<> 154:37f96f9d4de2 438 * flexcanConfig.baudRate = 125000U;
<> 154:37f96f9d4de2 439 * flexcanConfig.maxMbNum = 16;
<> 154:37f96f9d4de2 440 * flexcanConfig.enableLoopBack = false;
<> 154:37f96f9d4de2 441 * flexcanConfig.enableSelfWakeup = false;
<> 154:37f96f9d4de2 442 * flexcanConfig.enableIndividMask = false;
<> 154:37f96f9d4de2 443 * flexcanConfig.enableDoze = false;
<> 154:37f96f9d4de2 444 * FLEXCAN_Init(CAN0, &flexcanConfig, 8000000UL);
<> 154:37f96f9d4de2 445 * @endcode
<> 154:37f96f9d4de2 446 *
<> 154:37f96f9d4de2 447 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 448 * @param config Pointer to user-defined configuration structure.
<> 154:37f96f9d4de2 449 * @param sourceClock_Hz FlexCAN Protocol Engine clock source frequency in Hz.
<> 154:37f96f9d4de2 450 */
<> 154:37f96f9d4de2 451 void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *config, uint32_t sourceClock_Hz);
<> 154:37f96f9d4de2 452
<> 154:37f96f9d4de2 453 /*!
<> 154:37f96f9d4de2 454 * @brief De-initializes a FlexCAN instance.
<> 154:37f96f9d4de2 455 *
<> 154:37f96f9d4de2 456 * This function disable the FlexCAN module clock and set all register value
<> 154:37f96f9d4de2 457 * to reset value.
<> 154:37f96f9d4de2 458 *
<> 154:37f96f9d4de2 459 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 460 */
<> 154:37f96f9d4de2 461 void FLEXCAN_Deinit(CAN_Type *base);
<> 154:37f96f9d4de2 462
<> 154:37f96f9d4de2 463 /*!
<> 154:37f96f9d4de2 464 * @brief Get the default configuration structure.
<> 154:37f96f9d4de2 465 *
<> 154:37f96f9d4de2 466 * This function initializes the FlexCAN configuration structure to default value. The default
<> 154:37f96f9d4de2 467 * value are:
<> 154:37f96f9d4de2 468 * flexcanConfig->clkSrc = KFLEXCAN_ClkSrcOsc;
<> 154:37f96f9d4de2 469 * flexcanConfig->baudRate = 125000U;
<> 154:37f96f9d4de2 470 * flexcanConfig->maxMbNum = 16;
<> 154:37f96f9d4de2 471 * flexcanConfig->enableLoopBack = false;
<> 154:37f96f9d4de2 472 * flexcanConfig->enableSelfWakeup = false;
<> 154:37f96f9d4de2 473 * flexcanConfig->enableIndividMask = false;
<> 154:37f96f9d4de2 474 * flexcanConfig->enableDoze = false;
<> 154:37f96f9d4de2 475 *
<> 154:37f96f9d4de2 476 * @param config Pointer to FlexCAN configuration structure.
<> 154:37f96f9d4de2 477 */
<> 154:37f96f9d4de2 478 void FLEXCAN_GetDefaultConfig(flexcan_config_t *config);
<> 154:37f96f9d4de2 479
<> 154:37f96f9d4de2 480 /* @} */
<> 154:37f96f9d4de2 481
<> 154:37f96f9d4de2 482 /*!
<> 154:37f96f9d4de2 483 * @name Configuration.
<> 154:37f96f9d4de2 484 * @{
<> 154:37f96f9d4de2 485 */
<> 154:37f96f9d4de2 486
<> 154:37f96f9d4de2 487 /*!
<> 154:37f96f9d4de2 488 * @brief Sets the FlexCAN protocol timing characteristic.
<> 154:37f96f9d4de2 489 *
<> 154:37f96f9d4de2 490 * This function gives user settings to CAN bus timing characteristic.
<> 154:37f96f9d4de2 491 * The function is for an experienced user. For less experienced users, call
<> 154:37f96f9d4de2 492 * the FLEXCAN_Init() and fill the baud rate field with a desired value.
<> 154:37f96f9d4de2 493 * This provides the default timing characteristics to the module.
<> 154:37f96f9d4de2 494 *
<> 154:37f96f9d4de2 495 * Note that calling FLEXCAN_SetTimingConfig() overrides the baud rate set
<> 154:37f96f9d4de2 496 * in FLEXCAN_Init().
<> 154:37f96f9d4de2 497 *
<> 154:37f96f9d4de2 498 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 499 * @param config Pointer to the timing configuration structure.
<> 154:37f96f9d4de2 500 */
<> 154:37f96f9d4de2 501 void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *config);
<> 154:37f96f9d4de2 502
<> 154:37f96f9d4de2 503 /*!
<> 154:37f96f9d4de2 504 * @brief Sets the FlexCAN receive message buffer global mask.
<> 154:37f96f9d4de2 505 *
<> 154:37f96f9d4de2 506 * This function sets the global mask for FlexCAN message buffer in a matching process.
<> 154:37f96f9d4de2 507 * The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().
<> 154:37f96f9d4de2 508 *
<> 154:37f96f9d4de2 509 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 510 * @param mask Rx Message Buffer Global Mask value.
<> 154:37f96f9d4de2 511 */
<> 154:37f96f9d4de2 512 void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask);
<> 154:37f96f9d4de2 513
<> 154:37f96f9d4de2 514 /*!
<> 154:37f96f9d4de2 515 * @brief Sets the FlexCAN receive FIFO global mask.
<> 154:37f96f9d4de2 516 *
<> 154:37f96f9d4de2 517 * This function sets the global mask for FlexCAN FIFO in a matching process.
<> 154:37f96f9d4de2 518 *
<> 154:37f96f9d4de2 519 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 520 * @param mask Rx Fifo Global Mask value.
<> 154:37f96f9d4de2 521 */
<> 154:37f96f9d4de2 522 void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask);
<> 154:37f96f9d4de2 523
<> 154:37f96f9d4de2 524 /*!
<> 154:37f96f9d4de2 525 * @brief Sets the FlexCAN receive individual mask.
<> 154:37f96f9d4de2 526 *
<> 154:37f96f9d4de2 527 * This function sets the individual mask for FlexCAN matching process.
<> 154:37f96f9d4de2 528 * The configuration is only effective when the Rx individual mask is enabled in FLEXCAN_Init().
<> 154:37f96f9d4de2 529 * If Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer.
<> 154:37f96f9d4de2 530 * If Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to
<> 154:37f96f9d4de2 531 * the Rx Filter with same index. What calls for special attention is that only the first 32
<> 154:37f96f9d4de2 532 * individual masks can be used as Rx FIFO filter mask.
<> 154:37f96f9d4de2 533 *
<> 154:37f96f9d4de2 534 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 535 * @param maskIdx The Index of individual Mask.
<> 154:37f96f9d4de2 536 * @param mask Rx Individual Mask value.
<> 154:37f96f9d4de2 537 */
<> 154:37f96f9d4de2 538 void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask);
<> 154:37f96f9d4de2 539
<> 154:37f96f9d4de2 540 /*!
<> 154:37f96f9d4de2 541 * @brief Configures a FlexCAN transmit message buffer.
<> 154:37f96f9d4de2 542 *
<> 154:37f96f9d4de2 543 * This function aborts the previous transmission, cleans the Message Buffer, and
<> 154:37f96f9d4de2 544 * configures it as a Transmit Message Buffer.
<> 154:37f96f9d4de2 545 *
<> 154:37f96f9d4de2 546 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 547 * @param mbIdx The Message Buffer index.
<> 154:37f96f9d4de2 548 * @param enable Enable/Disable Tx Message Buffer.
<> 154:37f96f9d4de2 549 * - true: Enable Tx Message Buffer.
<> 154:37f96f9d4de2 550 * - false: Disable Tx Message Buffer.
<> 154:37f96f9d4de2 551 */
<> 154:37f96f9d4de2 552 void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable);
<> 154:37f96f9d4de2 553
<> 154:37f96f9d4de2 554 /*!
<> 154:37f96f9d4de2 555 * @brief Configures a FlexCAN Receive Message Buffer.
<> 154:37f96f9d4de2 556 *
<> 154:37f96f9d4de2 557 * This function cleans a FlexCAN build-in Message Buffer and configures it
<> 154:37f96f9d4de2 558 * as a Receive Message Buffer.
<> 154:37f96f9d4de2 559 *
<> 154:37f96f9d4de2 560 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 561 * @param mbIdx The Message Buffer index.
<> 154:37f96f9d4de2 562 * @param config Pointer to FlexCAN Message Buffer configuration structure.
<> 154:37f96f9d4de2 563 * @param enable Enable/Disable Rx Message Buffer.
<> 154:37f96f9d4de2 564 * - true: Enable Rx Message Buffer.
<> 154:37f96f9d4de2 565 * - false: Disable Rx Message Buffer.
<> 154:37f96f9d4de2 566 */
<> 154:37f96f9d4de2 567 void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *config, bool enable);
<> 154:37f96f9d4de2 568
<> 154:37f96f9d4de2 569 /*!
<> 154:37f96f9d4de2 570 * @brief Configures the FlexCAN Rx FIFO.
<> 154:37f96f9d4de2 571 *
<> 154:37f96f9d4de2 572 * This function configures the Rx FIFO with given Rx FIFO configuration.
<> 154:37f96f9d4de2 573 *
<> 154:37f96f9d4de2 574 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 575 * @param config Pointer to FlexCAN Rx FIFO configuration structure.
<> 154:37f96f9d4de2 576 * @param enable Enable/Disable Rx FIFO.
<> 154:37f96f9d4de2 577 * - true: Enable Rx FIFO.
<> 154:37f96f9d4de2 578 * - false: Disable Rx FIFO.
<> 154:37f96f9d4de2 579 */
<> 154:37f96f9d4de2 580 void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *config, bool enable);
<> 154:37f96f9d4de2 581
<> 154:37f96f9d4de2 582 /* @} */
<> 154:37f96f9d4de2 583
<> 154:37f96f9d4de2 584 /*!
<> 154:37f96f9d4de2 585 * @name Status
<> 154:37f96f9d4de2 586 * @{
<> 154:37f96f9d4de2 587 */
<> 154:37f96f9d4de2 588
<> 154:37f96f9d4de2 589 /*!
<> 154:37f96f9d4de2 590 * @brief Gets the FlexCAN module interrupt flags.
<> 154:37f96f9d4de2 591 *
<> 154:37f96f9d4de2 592 * This function gets all FlexCAN status flags. The flags are returned as the logical
<> 154:37f96f9d4de2 593 * OR value of the enumerators @ref _flexcan_flags. To check the specific status,
<> 154:37f96f9d4de2 594 * compare the return value with enumerators in @ref _flexcan_flags.
<> 154:37f96f9d4de2 595 *
<> 154:37f96f9d4de2 596 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 597 * @return FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.
<> 154:37f96f9d4de2 598 */
<> 154:37f96f9d4de2 599 static inline uint32_t FLEXCAN_GetStatusFlags(CAN_Type *base)
<> 154:37f96f9d4de2 600 {
<> 154:37f96f9d4de2 601 return base->ESR1;
<> 154:37f96f9d4de2 602 }
<> 154:37f96f9d4de2 603
<> 154:37f96f9d4de2 604 /*!
<> 154:37f96f9d4de2 605 * @brief Clears status flags with the provided mask.
<> 154:37f96f9d4de2 606 *
<> 154:37f96f9d4de2 607 * This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag
<> 154:37f96f9d4de2 608 * can't be cleared by this function.
<> 154:37f96f9d4de2 609 *
<> 154:37f96f9d4de2 610 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 611 * @param mask The status flags to be cleared, it is logical OR value of @ref _flexcan_flags.
<> 154:37f96f9d4de2 612 */
<> 154:37f96f9d4de2 613 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 614 {
<> 154:37f96f9d4de2 615 /* Write 1 to clear status flag. */
<> 154:37f96f9d4de2 616 base->ESR1 = mask;
<> 154:37f96f9d4de2 617 }
<> 154:37f96f9d4de2 618
<> 154:37f96f9d4de2 619 /*!
<> 154:37f96f9d4de2 620 * @brief Gets the FlexCAN Bus Error Counter value.
<> 154:37f96f9d4de2 621 *
<> 154:37f96f9d4de2 622 * This function gets the FlexCAN Bus Error Counter value for both Tx and
<> 154:37f96f9d4de2 623 * Rx direction. These values may be needed in the upper layer error handling.
<> 154:37f96f9d4de2 624 *
<> 154:37f96f9d4de2 625 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 626 * @param txErrBuf Buffer to store Tx Error Counter value.
<> 154:37f96f9d4de2 627 * @param rxErrBuf Buffer to store Rx Error Counter value.
<> 154:37f96f9d4de2 628 */
<> 154:37f96f9d4de2 629 static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf)
<> 154:37f96f9d4de2 630 {
<> 154:37f96f9d4de2 631 if (txErrBuf)
<> 154:37f96f9d4de2 632 {
<> 154:37f96f9d4de2 633 *txErrBuf = (uint8_t)((base->ECR & CAN_ECR_TXERRCNT_MASK) >> CAN_ECR_TXERRCNT_SHIFT);
<> 154:37f96f9d4de2 634 }
<> 154:37f96f9d4de2 635
<> 154:37f96f9d4de2 636 if (rxErrBuf)
<> 154:37f96f9d4de2 637 {
<> 154:37f96f9d4de2 638 *rxErrBuf = (uint8_t)((base->ECR & CAN_ECR_RXERRCNT_MASK) >> CAN_ECR_RXERRCNT_SHIFT);
<> 154:37f96f9d4de2 639 }
<> 154:37f96f9d4de2 640 }
<> 154:37f96f9d4de2 641
<> 154:37f96f9d4de2 642 /*!
<> 154:37f96f9d4de2 643 * @brief Gets the FlexCAN Message Buffer interrupt flags.
<> 154:37f96f9d4de2 644 *
<> 154:37f96f9d4de2 645 * This function gets the interrupt flags of a given Message Buffers.
<> 154:37f96f9d4de2 646 *
<> 154:37f96f9d4de2 647 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 648 * @param mask The ORed FlexCAN Message Buffer mask.
<> 154:37f96f9d4de2 649 * @return The status of given Message Buffers.
<> 154:37f96f9d4de2 650 */
<> 154:37f96f9d4de2 651 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 652 static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask)
<> 154:37f96f9d4de2 653 #else
<> 154:37f96f9d4de2 654 static inline uint32_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 655 #endif
<> 154:37f96f9d4de2 656 {
<> 154:37f96f9d4de2 657 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 658 return ((((uint64_t)base->IFLAG1) & mask) | ((((uint64_t)base->IFLAG2) << 32) & mask));
<> 154:37f96f9d4de2 659 #else
<> 154:37f96f9d4de2 660 return (base->IFLAG1 & mask);
<> 154:37f96f9d4de2 661 #endif
<> 154:37f96f9d4de2 662 }
<> 154:37f96f9d4de2 663
<> 154:37f96f9d4de2 664 /*!
<> 154:37f96f9d4de2 665 * @brief Clears the FlexCAN Message Buffer interrupt flags.
<> 154:37f96f9d4de2 666 *
<> 154:37f96f9d4de2 667 * This function clears the interrupt flags of a given Message Buffers.
<> 154:37f96f9d4de2 668 *
<> 154:37f96f9d4de2 669 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 670 * @param mask The ORed FlexCAN Message Buffer mask.
<> 154:37f96f9d4de2 671 */
<> 154:37f96f9d4de2 672 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 673 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask)
<> 154:37f96f9d4de2 674 #else
<> 154:37f96f9d4de2 675 static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 676 #endif
<> 154:37f96f9d4de2 677 {
<> 154:37f96f9d4de2 678 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 679 base->IFLAG1 = (uint32_t)(mask & 0xFFFFFFFF);
<> 154:37f96f9d4de2 680 base->IFLAG2 = (uint32_t)(mask >> 32);
<> 154:37f96f9d4de2 681 #else
<> 154:37f96f9d4de2 682 base->IFLAG1 = mask;
<> 154:37f96f9d4de2 683 #endif
<> 154:37f96f9d4de2 684 }
<> 154:37f96f9d4de2 685
<> 154:37f96f9d4de2 686 /* @} */
<> 154:37f96f9d4de2 687
<> 154:37f96f9d4de2 688 /*!
<> 154:37f96f9d4de2 689 * @name Interrupts
<> 154:37f96f9d4de2 690 * @{
<> 154:37f96f9d4de2 691 */
<> 154:37f96f9d4de2 692
<> 154:37f96f9d4de2 693 /*!
<> 154:37f96f9d4de2 694 * @brief Enables FlexCAN interrupts according to provided mask.
<> 154:37f96f9d4de2 695 *
<> 154:37f96f9d4de2 696 * This function enables the FlexCAN interrupts according to provided mask. The mask
<> 154:37f96f9d4de2 697 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable.
<> 154:37f96f9d4de2 698 *
<> 154:37f96f9d4de2 699 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 700 * @param mask The interrupts to enable. Logical OR of @ref _flexcan_interrupt_enable.
<> 154:37f96f9d4de2 701 */
<> 154:37f96f9d4de2 702 static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 703 {
<> 154:37f96f9d4de2 704 /* Solve Wake Up Interrupt. */
<> 154:37f96f9d4de2 705 if (mask & kFLEXCAN_WakeUpInterruptEnable)
<> 154:37f96f9d4de2 706 {
<> 154:37f96f9d4de2 707 base->MCR |= CAN_MCR_WAKMSK_MASK;
<> 154:37f96f9d4de2 708 }
<> 154:37f96f9d4de2 709
<> 154:37f96f9d4de2 710 /* Solve others. */
<> 154:37f96f9d4de2 711 base->CTRL1 |= (mask & (~((uint32_t)kFLEXCAN_WakeUpInterruptEnable)));
<> 154:37f96f9d4de2 712 }
<> 154:37f96f9d4de2 713
<> 154:37f96f9d4de2 714 /*!
<> 154:37f96f9d4de2 715 * @brief Disables FlexCAN interrupts according to provided mask.
<> 154:37f96f9d4de2 716 *
<> 154:37f96f9d4de2 717 * This function disables the FlexCAN interrupts according to provided mask. The mask
<> 154:37f96f9d4de2 718 * is a logical OR of enumeration members, see @ref _flexcan_interrupt_enable.
<> 154:37f96f9d4de2 719 *
<> 154:37f96f9d4de2 720 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 721 * @param mask The interrupts to disable. Logical OR of @ref _flexcan_interrupt_enable.
<> 154:37f96f9d4de2 722 */
<> 154:37f96f9d4de2 723 static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 724 {
<> 154:37f96f9d4de2 725 /* Solve Wake Up Interrupt. */
<> 154:37f96f9d4de2 726 if (mask & kFLEXCAN_WakeUpInterruptEnable)
<> 154:37f96f9d4de2 727 {
<> 154:37f96f9d4de2 728 base->MCR &= ~CAN_MCR_WAKMSK_MASK;
<> 154:37f96f9d4de2 729 }
<> 154:37f96f9d4de2 730
<> 154:37f96f9d4de2 731 /* Solve others. */
<> 154:37f96f9d4de2 732 base->CTRL1 &= ~(mask & (~((uint32_t)kFLEXCAN_WakeUpInterruptEnable)));
<> 154:37f96f9d4de2 733 }
<> 154:37f96f9d4de2 734
<> 154:37f96f9d4de2 735 /*!
<> 154:37f96f9d4de2 736 * @brief Enables FlexCAN Message Buffer interrupts.
<> 154:37f96f9d4de2 737 *
<> 154:37f96f9d4de2 738 * This function enables the interrupts of given Message Buffers
<> 154:37f96f9d4de2 739 *
<> 154:37f96f9d4de2 740 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 741 * @param mask The ORed FlexCAN Message Buffer mask.
<> 154:37f96f9d4de2 742 */
<> 154:37f96f9d4de2 743 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 744 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask)
<> 154:37f96f9d4de2 745 #else
<> 154:37f96f9d4de2 746 static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 747 #endif
<> 154:37f96f9d4de2 748 {
<> 154:37f96f9d4de2 749 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 750 base->IMASK1 |= (uint32_t)(mask & 0xFFFFFFFF);
<> 154:37f96f9d4de2 751 base->IMASK2 |= (uint32_t)(mask >> 32);
<> 154:37f96f9d4de2 752 #else
<> 154:37f96f9d4de2 753 base->IMASK1 |= mask;
<> 154:37f96f9d4de2 754 #endif
<> 154:37f96f9d4de2 755 }
<> 154:37f96f9d4de2 756
<> 154:37f96f9d4de2 757 /*!
<> 154:37f96f9d4de2 758 * @brief Disables FlexCAN Message Buffer interrupts.
<> 154:37f96f9d4de2 759 *
<> 154:37f96f9d4de2 760 * This function disables the interrupts of given Message Buffers
<> 154:37f96f9d4de2 761 *
<> 154:37f96f9d4de2 762 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 763 * @param mask The ORed FlexCAN Message Buffer mask.
<> 154:37f96f9d4de2 764 */
<> 154:37f96f9d4de2 765 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 766 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask)
<> 154:37f96f9d4de2 767 #else
<> 154:37f96f9d4de2 768 static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint32_t mask)
<> 154:37f96f9d4de2 769 #endif
<> 154:37f96f9d4de2 770 {
<> 154:37f96f9d4de2 771 #if (defined(FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER)) && (FSL_FEATURE_FLEXCAN_HAS_EXTENDED_FLAG_REGISTER > 0)
<> 154:37f96f9d4de2 772 base->IMASK1 &= ~((uint32_t)(mask & 0xFFFFFFFF));
<> 154:37f96f9d4de2 773 base->IMASK2 &= ~((uint32_t)(mask >> 32));
<> 154:37f96f9d4de2 774 #else
<> 154:37f96f9d4de2 775 base->IMASK1 &= ~mask;
<> 154:37f96f9d4de2 776 #endif
<> 154:37f96f9d4de2 777 }
<> 154:37f96f9d4de2 778
<> 154:37f96f9d4de2 779 /* @} */
<> 154:37f96f9d4de2 780
<> 154:37f96f9d4de2 781 #if (defined(FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA) && FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA)
<> 154:37f96f9d4de2 782 /*!
<> 154:37f96f9d4de2 783 * @name DMA Control
<> 154:37f96f9d4de2 784 * @{
<> 154:37f96f9d4de2 785 */
<> 154:37f96f9d4de2 786
<> 154:37f96f9d4de2 787 /*!
<> 154:37f96f9d4de2 788 * @brief Enables or disables the FlexCAN Rx FIFO DMA request.
<> 154:37f96f9d4de2 789 *
<> 154:37f96f9d4de2 790 * This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO.
<> 154:37f96f9d4de2 791 *
<> 154:37f96f9d4de2 792 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 793 * @param enable true to enable, false to disable.
<> 154:37f96f9d4de2 794 */
<> 154:37f96f9d4de2 795 void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable);
<> 154:37f96f9d4de2 796
<> 154:37f96f9d4de2 797 /*!
<> 154:37f96f9d4de2 798 * @brief Gets the Rx FIFO Head address.
<> 154:37f96f9d4de2 799 *
<> 154:37f96f9d4de2 800 * This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case.
<> 154:37f96f9d4de2 801 *
<> 154:37f96f9d4de2 802 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 803 * @return FlexCAN Rx FIFO Head address.
<> 154:37f96f9d4de2 804 */
<> 154:37f96f9d4de2 805 static inline uint32_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base)
<> 154:37f96f9d4de2 806 {
<> 154:37f96f9d4de2 807 return (uint32_t) & (base->MB[0].CS);
<> 154:37f96f9d4de2 808 }
<> 154:37f96f9d4de2 809
<> 154:37f96f9d4de2 810 /* @} */
<> 154:37f96f9d4de2 811 #endif /* FSL_FEATURE_FLEXCAN_HAS_RX_FIFO_DMA */
<> 154:37f96f9d4de2 812
<> 154:37f96f9d4de2 813 /*!
<> 154:37f96f9d4de2 814 * @name Bus Operations
<> 154:37f96f9d4de2 815 * @{
<> 154:37f96f9d4de2 816 */
<> 154:37f96f9d4de2 817
<> 154:37f96f9d4de2 818 /*!
<> 154:37f96f9d4de2 819 * @brief Enables or disables the FlexCAN module operation.
<> 154:37f96f9d4de2 820 *
<> 154:37f96f9d4de2 821 * This function enables or disables the FlexCAN module.
<> 154:37f96f9d4de2 822 *
<> 154:37f96f9d4de2 823 * @param base FlexCAN base pointer.
<> 154:37f96f9d4de2 824 * @param enable true to enable, false to disable.
<> 154:37f96f9d4de2 825 */
<> 154:37f96f9d4de2 826 static inline void FLEXCAN_Enable(CAN_Type *base, bool enable)
<> 154:37f96f9d4de2 827 {
<> 154:37f96f9d4de2 828 if (enable)
<> 154:37f96f9d4de2 829 {
<> 154:37f96f9d4de2 830 base->MCR &= ~CAN_MCR_MDIS_MASK;
<> 154:37f96f9d4de2 831
<> 154:37f96f9d4de2 832 /* Wait FlexCAN exit from low-power mode. */
<> 154:37f96f9d4de2 833 while (base->MCR & CAN_MCR_LPMACK_MASK)
<> 154:37f96f9d4de2 834 {
<> 154:37f96f9d4de2 835 }
<> 154:37f96f9d4de2 836 }
<> 154:37f96f9d4de2 837 else
<> 154:37f96f9d4de2 838 {
<> 154:37f96f9d4de2 839 base->MCR |= CAN_MCR_MDIS_MASK;
<> 154:37f96f9d4de2 840
<> 154:37f96f9d4de2 841 /* Wait FlexCAN enter low-power mode. */
<> 154:37f96f9d4de2 842 while (!(base->MCR & CAN_MCR_LPMACK_MASK))
<> 154:37f96f9d4de2 843 {
<> 154:37f96f9d4de2 844 }
<> 154:37f96f9d4de2 845 }
<> 154:37f96f9d4de2 846 }
<> 154:37f96f9d4de2 847
<> 154:37f96f9d4de2 848 /*!
<> 154:37f96f9d4de2 849 * @brief Writes a FlexCAN Message to Transmit Message Buffer.
<> 154:37f96f9d4de2 850 *
<> 154:37f96f9d4de2 851 * This function writes a CAN Message to the specified Transmit Message Buffer
<> 154:37f96f9d4de2 852 * and changes the Message Buffer state to start CAN Message transmit. After
<> 154:37f96f9d4de2 853 * that the function returns immediately.
<> 154:37f96f9d4de2 854 *
<> 154:37f96f9d4de2 855 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 856 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 857 * @param txFrame Pointer to CAN message frame to be sent.
<> 154:37f96f9d4de2 858 * @retval kStatus_Success - Write Tx Message Buffer Successfully.
<> 154:37f96f9d4de2 859 * @retval kStatus_Fail - Tx Message Buffer is currently in use.
<> 154:37f96f9d4de2 860 */
<> 154:37f96f9d4de2 861 status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *txFrame);
<> 154:37f96f9d4de2 862
<> 154:37f96f9d4de2 863 /*!
<> 154:37f96f9d4de2 864 * @brief Reads a FlexCAN Message from Receive Message Buffer.
<> 154:37f96f9d4de2 865 *
<> 154:37f96f9d4de2 866 * This function reads a CAN message from a specified Receive Message Buffer.
<> 154:37f96f9d4de2 867 * The function fills a receive CAN message frame structure with
<> 154:37f96f9d4de2 868 * just received data and activates the Message Buffer again.
<> 154:37f96f9d4de2 869 * The function returns immediately.
<> 154:37f96f9d4de2 870 *
<> 154:37f96f9d4de2 871 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 872 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 873 * @param rxFrame Pointer to CAN message frame structure for reception.
<> 154:37f96f9d4de2 874 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully.
<> 154:37f96f9d4de2 875 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully.
<> 154:37f96f9d4de2 876 * @retval kStatus_Fail - Rx Message Buffer is empty.
<> 154:37f96f9d4de2 877 */
<> 154:37f96f9d4de2 878 status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *rxFrame);
<> 154:37f96f9d4de2 879
<> 154:37f96f9d4de2 880 /*!
<> 154:37f96f9d4de2 881 * @brief Reads a FlexCAN Message from Rx FIFO.
<> 154:37f96f9d4de2 882 *
<> 154:37f96f9d4de2 883 * This function reads a CAN message from the FlexCAN build-in Rx FIFO.
<> 154:37f96f9d4de2 884 *
<> 154:37f96f9d4de2 885 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 886 * @param rxFrame Pointer to CAN message frame structure for reception.
<> 154:37f96f9d4de2 887 * @retval kStatus_Success - Read Message from Rx FIFO successfully.
<> 154:37f96f9d4de2 888 * @retval kStatus_Fail - Rx FIFO is not enabled.
<> 154:37f96f9d4de2 889 */
<> 154:37f96f9d4de2 890 status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *rxFrame);
<> 154:37f96f9d4de2 891
<> 154:37f96f9d4de2 892 /* @} */
<> 154:37f96f9d4de2 893
<> 154:37f96f9d4de2 894 /*!
<> 154:37f96f9d4de2 895 * @name Transactional
<> 154:37f96f9d4de2 896 * @{
<> 154:37f96f9d4de2 897 */
<> 154:37f96f9d4de2 898
<> 154:37f96f9d4de2 899 /*!
<> 154:37f96f9d4de2 900 * @brief Performs a polling send transaction on the CAN bus.
<> 154:37f96f9d4de2 901 *
<> 154:37f96f9d4de2 902 * Note that a transfer handle does not need to be created before calling this API.
<> 154:37f96f9d4de2 903 *
<> 154:37f96f9d4de2 904 * @param base FlexCAN peripheral base pointer.
<> 154:37f96f9d4de2 905 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 906 * @param txFrame Pointer to CAN message frame to be sent.
<> 154:37f96f9d4de2 907 * @retval kStatus_Success - Write Tx Message Buffer Successfully.
<> 154:37f96f9d4de2 908 * @retval kStatus_Fail - Tx Message Buffer is currently in use.
<> 154:37f96f9d4de2 909 */
<> 154:37f96f9d4de2 910 status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *txFrame);
<> 154:37f96f9d4de2 911
<> 154:37f96f9d4de2 912 /*!
<> 154:37f96f9d4de2 913 * @brief Performs a polling receive transaction on the CAN bus.
<> 154:37f96f9d4de2 914 *
<> 154:37f96f9d4de2 915 * Note that a transfer handle does not need to be created before calling this API.
<> 154:37f96f9d4de2 916 *
<> 154:37f96f9d4de2 917 * @param base FlexCAN peripheral base pointer.
<> 154:37f96f9d4de2 918 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 919 * @param rxFrame Pointer to CAN message frame structure for reception.
<> 154:37f96f9d4de2 920 * @retval kStatus_Success - Rx Message Buffer is full and has been read successfully.
<> 154:37f96f9d4de2 921 * @retval kStatus_FLEXCAN_RxOverflow - Rx Message Buffer is already overflowed and has been read successfully.
<> 154:37f96f9d4de2 922 * @retval kStatus_Fail - Rx Message Buffer is empty.
<> 154:37f96f9d4de2 923 */
<> 154:37f96f9d4de2 924 status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *rxFrame);
<> 154:37f96f9d4de2 925
<> 154:37f96f9d4de2 926 /*!
<> 154:37f96f9d4de2 927 * @brief Performs a polling receive transaction from Rx FIFO on the CAN bus.
<> 154:37f96f9d4de2 928 *
<> 154:37f96f9d4de2 929 * Note that a transfer handle does not need to be created before calling this API.
<> 154:37f96f9d4de2 930 *
<> 154:37f96f9d4de2 931 * @param base FlexCAN peripheral base pointer.
<> 154:37f96f9d4de2 932 * @param rxFrame Pointer to CAN message frame structure for reception.
<> 154:37f96f9d4de2 933 * @retval kStatus_Success - Read Message from Rx FIFO successfully.
<> 154:37f96f9d4de2 934 * @retval kStatus_Fail - Rx FIFO is not enabled.
<> 154:37f96f9d4de2 935 */
<> 154:37f96f9d4de2 936 status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *rxFrame);
<> 154:37f96f9d4de2 937
<> 154:37f96f9d4de2 938 /*!
<> 154:37f96f9d4de2 939 * @brief Initializes the FlexCAN handle.
<> 154:37f96f9d4de2 940 *
<> 154:37f96f9d4de2 941 * This function initializes the FlexCAN handle which can be used for other FlexCAN
<> 154:37f96f9d4de2 942 * transactional APIs. Usually, for a specified FlexCAN instance,
<> 154:37f96f9d4de2 943 * call this API once to get the initialized handle.
<> 154:37f96f9d4de2 944 *
<> 154:37f96f9d4de2 945 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 946 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 947 * @param callback The callback function.
<> 154:37f96f9d4de2 948 * @param userData The parameter of the callback function.
<> 154:37f96f9d4de2 949 */
<> 154:37f96f9d4de2 950 void FLEXCAN_TransferCreateHandle(CAN_Type *base,
<> 154:37f96f9d4de2 951 flexcan_handle_t *handle,
<> 154:37f96f9d4de2 952 flexcan_transfer_callback_t callback,
<> 154:37f96f9d4de2 953 void *userData);
<> 154:37f96f9d4de2 954
<> 154:37f96f9d4de2 955 /*!
<> 154:37f96f9d4de2 956 * @brief Sends a message using IRQ.
<> 154:37f96f9d4de2 957 *
<> 154:37f96f9d4de2 958 * This function sends a message using IRQ. This is a non-blocking function, which returns
<> 154:37f96f9d4de2 959 * right away. When messages have been sent out, the send callback function is called.
<> 154:37f96f9d4de2 960 *
<> 154:37f96f9d4de2 961 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 962 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 963 * @param xfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t.
<> 154:37f96f9d4de2 964 * @retval kStatus_Success Start Tx Message Buffer sending process successfully.
<> 154:37f96f9d4de2 965 * @retval kStatus_Fail Write Tx Message Buffer failed.
<> 154:37f96f9d4de2 966 * @retval kStatus_FLEXCAN_TxBusy Tx Message Buffer is in use.
<> 154:37f96f9d4de2 967 */
<> 154:37f96f9d4de2 968 status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *xfer);
<> 154:37f96f9d4de2 969
<> 154:37f96f9d4de2 970 /*!
<> 154:37f96f9d4de2 971 * @brief Receives a message using IRQ.
<> 154:37f96f9d4de2 972 *
<> 154:37f96f9d4de2 973 * This function receives a message using IRQ. This is non-blocking function, which returns
<> 154:37f96f9d4de2 974 * right away. When the message has been received, the receive callback function is called.
<> 154:37f96f9d4de2 975 *
<> 154:37f96f9d4de2 976 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 977 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 978 * @param xfer FlexCAN Message Buffer transfer structure. See the #flexcan_mb_transfer_t.
<> 154:37f96f9d4de2 979 * @retval kStatus_Success - Start Rx Message Buffer receiving process successfully.
<> 154:37f96f9d4de2 980 * @retval kStatus_FLEXCAN_RxBusy - Rx Message Buffer is in use.
<> 154:37f96f9d4de2 981 */
<> 154:37f96f9d4de2 982 status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *xfer);
<> 154:37f96f9d4de2 983
<> 154:37f96f9d4de2 984 /*!
<> 154:37f96f9d4de2 985 * @brief Receives a message from Rx FIFO using IRQ.
<> 154:37f96f9d4de2 986 *
<> 154:37f96f9d4de2 987 * This function receives a message using IRQ. This is a non-blocking function, which returns
<> 154:37f96f9d4de2 988 * right away. When all messages have been received, the receive callback function is called.
<> 154:37f96f9d4de2 989 *
<> 154:37f96f9d4de2 990 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 991 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 992 * @param xfer FlexCAN Rx FIFO transfer structure. See the @ref flexcan_fifo_transfer_t.
<> 154:37f96f9d4de2 993 * @retval kStatus_Success - Start Rx FIFO receiving process successfully.
<> 154:37f96f9d4de2 994 * @retval kStatus_FLEXCAN_RxFifoBusy - Rx FIFO is currently in use.
<> 154:37f96f9d4de2 995 */
<> 154:37f96f9d4de2 996 status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base,
<> 154:37f96f9d4de2 997 flexcan_handle_t *handle,
<> 154:37f96f9d4de2 998 flexcan_fifo_transfer_t *xfer);
<> 154:37f96f9d4de2 999
<> 154:37f96f9d4de2 1000 /*!
<> 154:37f96f9d4de2 1001 * @brief Aborts the interrupt driven message send process.
<> 154:37f96f9d4de2 1002 *
<> 154:37f96f9d4de2 1003 * This function aborts the interrupt driven message send process.
<> 154:37f96f9d4de2 1004 *
<> 154:37f96f9d4de2 1005 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 1006 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 1007 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 1008 */
<> 154:37f96f9d4de2 1009 void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx);
<> 154:37f96f9d4de2 1010
<> 154:37f96f9d4de2 1011 /*!
<> 154:37f96f9d4de2 1012 * @brief Aborts the interrupt driven message receive process.
<> 154:37f96f9d4de2 1013 *
<> 154:37f96f9d4de2 1014 * This function aborts the interrupt driven message receive process.
<> 154:37f96f9d4de2 1015 *
<> 154:37f96f9d4de2 1016 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 1017 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 1018 * @param mbIdx The FlexCAN Message Buffer index.
<> 154:37f96f9d4de2 1019 */
<> 154:37f96f9d4de2 1020 void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx);
<> 154:37f96f9d4de2 1021
<> 154:37f96f9d4de2 1022 /*!
<> 154:37f96f9d4de2 1023 * @brief Aborts the interrupt driven message receive from Rx FIFO process.
<> 154:37f96f9d4de2 1024 *
<> 154:37f96f9d4de2 1025 * This function aborts the interrupt driven message receive from Rx FIFO process.
<> 154:37f96f9d4de2 1026 *
<> 154:37f96f9d4de2 1027 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 1028 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 1029 */
<> 154:37f96f9d4de2 1030 void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle);
<> 154:37f96f9d4de2 1031
<> 154:37f96f9d4de2 1032 /*!
<> 154:37f96f9d4de2 1033 * @brief FlexCAN IRQ handle function.
<> 154:37f96f9d4de2 1034 *
<> 154:37f96f9d4de2 1035 * This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.
<> 154:37f96f9d4de2 1036 *
<> 154:37f96f9d4de2 1037 * @param base FlexCAN peripheral base address.
<> 154:37f96f9d4de2 1038 * @param handle FlexCAN handle pointer.
<> 154:37f96f9d4de2 1039 */
<> 154:37f96f9d4de2 1040 void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle);
<> 154:37f96f9d4de2 1041
<> 154:37f96f9d4de2 1042 /* @} */
<> 154:37f96f9d4de2 1043
<> 154:37f96f9d4de2 1044 #if defined(__cplusplus)
<> 154:37f96f9d4de2 1045 }
<> 154:37f96f9d4de2 1046 #endif
<> 154:37f96f9d4de2 1047
<> 154:37f96f9d4de2 1048 /*! @}*/
<> 154:37f96f9d4de2 1049
<> 154:37f96f9d4de2 1050 #endif /* _FSL_FLEXCAN_H_ */