Updated to latest version. Added in new version of the Siren
Dependencies: mbed-src
Fork of VolundrIntroCase2015 by
main.cpp@0:9826a0b36948, 2015-08-01 (annotated)
- Committer:
- tweaker1331
- Date:
- Sat Aug 01 18:32:09 2015 +0000
- Revision:
- 0:9826a0b36948
- Child:
- 1:fad61b6e660b
Eerste opzet. Is nog niet functioneel.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
tweaker1331 | 0:9826a0b36948 | 1 | #include "mbed.h" |
tweaker1331 | 0:9826a0b36948 | 2 | // CT16B0 --> MOTORA |
tweaker1331 | 0:9826a0b36948 | 3 | // CT32B0 --> MOTORB |
tweaker1331 | 0:9826a0b36948 | 4 | |
tweaker1331 | 0:9826a0b36948 | 5 | int init_drive(void) { |
tweaker1331 | 0:9826a0b36948 | 6 | // Enable match outputs of CT16B0 and CT32B0 |
tweaker1331 | 0:9826a0b36948 | 7 | LPC_IOCON->PIO0_8 |= 0x2; //CT16B0_MAT0 |
tweaker1331 | 0:9826a0b36948 | 8 | LPC_IOCON->PIO0_9 |= 0x2; //CT16B0_MAT1 |
tweaker1331 | 0:9826a0b36948 | 9 | LPC_IOCON->PIO0_18 |= 0x2; //CT32B0_MAT0 |
tweaker1331 | 0:9826a0b36948 | 10 | LPC_IOCON->PIO0_19 |= 0x2; //CT32B0_MAT1 |
tweaker1331 | 0:9826a0b36948 | 11 | // Enable clock for CT16B0 (7) and CT32B0 (9) |
tweaker1331 | 0:9826a0b36948 | 12 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)||(1<<9); |
tweaker1331 | 0:9826a0b36948 | 13 | // Reset on match (MAT3), MR3 will determine the PWM cycle length |
tweaker1331 | 0:9826a0b36948 | 14 | LPC_CT16B0->MCR |= (1<<10); |
tweaker1331 | 0:9826a0b36948 | 15 | LPC_CT32B0->MCR |= (1<<10); |
tweaker1331 | 0:9826a0b36948 | 16 | // Enable PWM mode for CT16B0 and CT32B0 |
tweaker1331 | 0:9826a0b36948 | 17 | //LPC_CT16B0->PWMC |= (1<<0)||(1<<1); // MAT0, MAT1 |
tweaker1331 | 0:9826a0b36948 | 18 | //LPC_CT32B0->PWMC |= (1<<0)||(1<<1); // MAT0, MAT1 |
tweaker1331 | 0:9826a0b36948 | 19 | LPC_CT16B0->EMR |= (0x3<<4); |
tweaker1331 | 0:9826a0b36948 | 20 | // Set PWM cycle length to 100 counts |
tweaker1331 | 0:9826a0b36948 | 21 | LPC_CT16B0->MR3 = 100; |
tweaker1331 | 0:9826a0b36948 | 22 | LPC_CT32B0->MR3 = 100; |
tweaker1331 | 0:9826a0b36948 | 23 | // Set prescale register |
tweaker1331 | 0:9826a0b36948 | 24 | LPC_CT16B0->PR = 20; |
tweaker1331 | 0:9826a0b36948 | 25 | LPC_CT32B0->PR = 20; |
tweaker1331 | 0:9826a0b36948 | 26 | |
tweaker1331 | 0:9826a0b36948 | 27 | // Enable CT16B0 and CT32B0 |
tweaker1331 | 0:9826a0b36948 | 28 | LPC_CT16B0->TCR |= (1<<0); |
tweaker1331 | 0:9826a0b36948 | 29 | LPC_CT32B0->TCR |= (1<<0); |
tweaker1331 | 0:9826a0b36948 | 30 | |
tweaker1331 | 0:9826a0b36948 | 31 | return 1; |
tweaker1331 | 0:9826a0b36948 | 32 | |
tweaker1331 | 0:9826a0b36948 | 33 | } |
tweaker1331 | 0:9826a0b36948 | 34 | |
tweaker1331 | 0:9826a0b36948 | 35 | DigitalOut myled(LED1); |
tweaker1331 | 0:9826a0b36948 | 36 | |
tweaker1331 | 0:9826a0b36948 | 37 | int main() { |
tweaker1331 | 0:9826a0b36948 | 38 | init_drive(); |
tweaker1331 | 0:9826a0b36948 | 39 | |
tweaker1331 | 0:9826a0b36948 | 40 | LPC_CT16B0->MR0 = 50; |
tweaker1331 | 0:9826a0b36948 | 41 | LPC_CT16B0->MR1 = 50; |
tweaker1331 | 0:9826a0b36948 | 42 | LPC_CT32B0->MR0 = 50; |
tweaker1331 | 0:9826a0b36948 | 43 | LPC_CT32B0->MR1 = 50; |
tweaker1331 | 0:9826a0b36948 | 44 | |
tweaker1331 | 0:9826a0b36948 | 45 | // Program ends |
tweaker1331 | 0:9826a0b36948 | 46 | while(1) { |
tweaker1331 | 0:9826a0b36948 | 47 | myled = 1; |
tweaker1331 | 0:9826a0b36948 | 48 | wait(0.2); |
tweaker1331 | 0:9826a0b36948 | 49 | myled = 0; |
tweaker1331 | 0:9826a0b36948 | 50 | wait(0.2); |
tweaker1331 | 0:9826a0b36948 | 51 | } |
tweaker1331 | 0:9826a0b36948 | 52 | } |