Volundr / VolundrIntroCase2015

Dependencies:   mbed-src

Revision:
0:9826a0b36948
Child:
1:fad61b6e660b
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/main.cpp	Sat Aug 01 18:32:09 2015 +0000
@@ -0,0 +1,52 @@
+#include "mbed.h"
+// CT16B0 --> MOTORA
+// CT32B0 --> MOTORB
+ 
+int init_drive(void) {
+    // Enable match outputs of CT16B0 and CT32B0
+    LPC_IOCON->PIO0_8 |= 0x2; //CT16B0_MAT0
+    LPC_IOCON->PIO0_9 |= 0x2; //CT16B0_MAT1
+    LPC_IOCON->PIO0_18 |= 0x2; //CT32B0_MAT0
+    LPC_IOCON->PIO0_19 |= 0x2; //CT32B0_MAT1
+    // Enable clock for CT16B0 (7) and CT32B0 (9)
+    LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7)||(1<<9);
+    // Reset on match (MAT3), MR3 will determine the PWM cycle length
+    LPC_CT16B0->MCR |= (1<<10);
+    LPC_CT32B0->MCR |= (1<<10); 
+    // Enable PWM mode for CT16B0 and CT32B0 
+    //LPC_CT16B0->PWMC |= (1<<0)||(1<<1); // MAT0, MAT1
+    //LPC_CT32B0->PWMC |= (1<<0)||(1<<1); // MAT0, MAT1
+    LPC_CT16B0->EMR |= (0x3<<4);
+    // Set PWM cycle length to 100 counts   
+    LPC_CT16B0->MR3 = 100;
+    LPC_CT32B0->MR3 = 100;
+    // Set prescale register 
+    LPC_CT16B0->PR = 20;
+    LPC_CT32B0->PR = 20;
+    
+    // Enable CT16B0 and CT32B0
+    LPC_CT16B0->TCR |= (1<<0);
+    LPC_CT32B0->TCR |= (1<<0);
+    
+    return 1;
+    
+}
+
+DigitalOut myled(LED1);
+
+int main() {
+    init_drive();
+    
+    LPC_CT16B0->MR0 = 50;
+    LPC_CT16B0->MR1 = 50;
+    LPC_CT32B0->MR0 = 50;
+    LPC_CT32B0->MR1 = 50;
+    
+    // Program ends
+    while(1) {
+        myled = 1;
+        wait(0.2);
+        myled = 0;
+        wait(0.2);
+    }
+}