Modularizando o src

Dependencies:   EALib EthernetInterface_vz mbed-rtos mbed

Fork of header_main_colinas_V0-20-09-14 by VZTECH

Committer:
klauss
Date:
Mon Nov 24 16:43:16 2014 +0000
Revision:
74:81c47fff88a5
Parent:
33:735fd60e96d8
Child:
119:ee6a53069455
validando organiza??o de arquivos | ainda em desenvolvimento.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
klauss 0:4d17cd9c8f9d 1 #ifndef _CONFIGS_H
klauss 0:4d17cd9c8f9d 2 #define _CONFIGS_H
klauss 74:81c47fff88a5 3
klauss 74:81c47fff88a5 4 #include <stdint.h>
klauss 0:4d17cd9c8f9d 5 #include "mbed.h"
klauss 74:81c47fff88a5 6 #include "UART3Interrupt.h"
klauss 74:81c47fff88a5 7 #include "parallelcpld.h"
klauss 74:81c47fff88a5 8 #include "vz_protocol.h"
klauss 0:4d17cd9c8f9d 9
klauss 0:4d17cd9c8f9d 10 extern InterruptIn NextData; //IO 96
klauss 0:4d17cd9c8f9d 11 extern InterruptIn FrameSync;
klauss 0:4d17cd9c8f9d 12 //Ticker ticker; // Timer para Debug
klauss 0:4d17cd9c8f9d 13
klauss 0:4d17cd9c8f9d 14 extern DigitalOut RST; // Pino de reset para o CPLD
klauss 0:4d17cd9c8f9d 15 extern DigitalIn PPD; // Pino de conexao com o cristal do CPLD
klauss 0:4d17cd9c8f9d 16
klauss 0:4d17cd9c8f9d 17 extern DigitalOut ENABLE_F_REG; // Configuracao da Alimentacao do CPLD
klauss 0:4d17cd9c8f9d 18 extern DigitalOut ENABLE_F_RX;
klauss 0:4d17cd9c8f9d 19 extern DigitalOut ENABLE_F_TX;
klauss 0:4d17cd9c8f9d 20
klauss 0:4d17cd9c8f9d 21 extern Serial Uart3; // default baudrate = 9600; Sem paridade, 8bits, 1 stop-bit
klauss 0:4d17cd9c8f9d 22
klauss 0:4d17cd9c8f9d 23 void start_cpld( void );
klauss 0:4d17cd9c8f9d 24 void config_lpc( void );
klauss 74:81c47fff88a5 25 void uart3_puts( uint8_t *src, uint16_t size );
klauss 0:4d17cd9c8f9d 26 void uart0_puts( uint8_t *src );
klauss 74:81c47fff88a5 27 void uart0_text( const char* src );
klauss 74:81c47fff88a5 28 void uart0_putsx( volatile uint8_t *src );
klauss 0:4d17cd9c8f9d 29
klauss 0:4d17cd9c8f9d 30 #endif