Modularizando o src
Dependencies: EALib EthernetInterface_vz mbed-rtos mbed
Fork of header_main_colinas_V0-20-09-14 by
configs.cpp@137:32dd35a6dbc9, 2015-11-24 (annotated)
- Committer:
- klauss
- Date:
- Tue Nov 24 14:06:22 2015 +0000
- Revision:
- 137:32dd35a6dbc9
- Parent:
- 135:2f4290590e51
core source of the .bin (09/21/2015) in the field
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
klauss | 122:480c44b0e205 | 1 | #include "configs.h" |
klauss | 26:725cbbedadd5 | 2 | |
klauss | 0:4d17cd9c8f9d | 3 | //***************************************************************************** |
klauss | 0:4d17cd9c8f9d | 4 | // Pins/Modules Config |
klauss | 0:4d17cd9c8f9d | 5 | //***************************************************************************** |
klauss | 0:4d17cd9c8f9d | 6 | |
klauss | 86:bf7b0d4c3232 | 7 | InterruptIn NextData(p8); // IO 96 |
klauss | 0:4d17cd9c8f9d | 8 | InterruptIn FrameSync(p17); // GCLK1 |
klauss | 0:4d17cd9c8f9d | 9 | |
klauss | 0:4d17cd9c8f9d | 10 | //Ticker ticker; // Timer para Debug |
klauss | 0:4d17cd9c8f9d | 11 | |
klauss | 0:4d17cd9c8f9d | 12 | DigitalOut RST(p29); // Pino de reset para o CPLD |
klauss | 0:4d17cd9c8f9d | 13 | DigitalIn PPD(p25); // Pino de conexao com o cristal do CPLD |
klauss | 0:4d17cd9c8f9d | 14 | |
klauss | 0:4d17cd9c8f9d | 15 | DigitalOut ENABLE_F_REG(p18); // Configuracao da Alimentacao do CPLD |
klauss | 0:4d17cd9c8f9d | 16 | DigitalOut ENABLE_F_RX(p19); |
klauss | 0:4d17cd9c8f9d | 17 | DigitalOut ENABLE_F_TX(p20); |
klauss | 0:4d17cd9c8f9d | 18 | |
klauss | 0:4d17cd9c8f9d | 19 | Serial Uart3(p9,p10); // default baudrate = 9600; Sem paridade, 8bits, 1 stop-bit |
klauss | 0:4d17cd9c8f9d | 20 | |
klauss | 119:ee6a53069455 | 21 | int start_cpld( void ) { //CPLD Start |
klauss | 18:01a93677e40c | 22 | static uint16_t reset = 10000; |
klauss | 0:4d17cd9c8f9d | 23 | ENABLE_F_REG = 1; |
klauss | 0:4d17cd9c8f9d | 24 | ENABLE_F_TX = 1; |
klauss | 0:4d17cd9c8f9d | 25 | ENABLE_F_RX = 1; |
klauss | 0:4d17cd9c8f9d | 26 | DataReady = 0; |
klauss | 0:4d17cd9c8f9d | 27 | RST = 1; |
klauss | 26:725cbbedadd5 | 28 | while( reset-- > 1 ){} |
klauss | 119:ee6a53069455 | 29 | RST = 0; |
klauss | 119:ee6a53069455 | 30 | return ( 0 ); |
klauss | 0:4d17cd9c8f9d | 31 | } |
klauss | 0:4d17cd9c8f9d | 32 | |
klauss | 74:81c47fff88a5 | 33 | ///< Configure LPC4088 |
klauss | 119:ee6a53069455 | 34 | int config_lpc( void ){ |
klauss | 119:ee6a53069455 | 35 | // UART3_IRQ configuration |
klauss | 119:ee6a53069455 | 36 | Uart3.attach(&SerialRecvInterrupt, Uart3.RxIrq); |
klauss | 119:ee6a53069455 | 37 | |
klauss | 119:ee6a53069455 | 38 | // UART3 mode configuration |
klauss | 119:ee6a53069455 | 39 | Uart3.format(8,SerialBase::Forced1,1); |
klauss | 119:ee6a53069455 | 40 | |
klauss | 0:4d17cd9c8f9d | 41 | Uart3.baud(2000000); |
klauss | 119:ee6a53069455 | 42 | |
klauss | 119:ee6a53069455 | 43 | NVIC_SetPriority(UART3_IRQn,1); |
klauss | 119:ee6a53069455 | 44 | |
klauss | 119:ee6a53069455 | 45 | // USART to PC USB USART |
klauss | 119:ee6a53069455 | 46 | pc.baud(115200); |
klauss | 119:ee6a53069455 | 47 | |
klauss | 119:ee6a53069455 | 48 | // Extern Pin Interrupt |
klauss | 119:ee6a53069455 | 49 | NextData.rise(&get2); |
klauss | 119:ee6a53069455 | 50 | |
klauss | 119:ee6a53069455 | 51 | // FrameSync for RX - Interrupt |
klauss | 119:ee6a53069455 | 52 | FrameSync.rise(&RXFrameSync); |
klauss | 119:ee6a53069455 | 53 | |
klauss | 0:4d17cd9c8f9d | 54 | __enable_irq(); |
klauss | 119:ee6a53069455 | 55 | |
klauss | 119:ee6a53069455 | 56 | // iniciando o pin de controle do arduino |
klauss | 109:a5b8264ffbbc | 57 | hw_extern_wdt = 0; |
klauss | 119:ee6a53069455 | 58 | |
klauss | 119:ee6a53069455 | 59 | return ( 0 ); |
klauss | 0:4d17cd9c8f9d | 60 | } |