VOC / Mbed 2 deprecated Dumb_box_rev2

test

Dependencies:   Nanopb iSerial mbed BaseJpegDecode FatFileSystem SDFileSystem RingBuffer Camera_LS_Y201

extlib/SDFileSystem/SDFileSystem.cpp@0:d69efd0ee139, 2014-09-18 (annotated)

Committer:
cgraham
Date:
Thu Sep 18 15:21:47 2014 +0000
Revision:
0:d69efd0ee139
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cgraham 0:d69efd0ee139 1 /* mbed SDFileSystem Library, for providing file access to SD cards
cgraham 0:d69efd0ee139 2 * Copyright (c) 2008-2010, sford
cgraham 0:d69efd0ee139 3 *
cgraham 0:d69efd0ee139 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
cgraham 0:d69efd0ee139 5 * of this software and associated documentation files (the "Software"), to deal
cgraham 0:d69efd0ee139 6 * in the Software without restriction, including without limitation the rights
cgraham 0:d69efd0ee139 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
cgraham 0:d69efd0ee139 8 * copies of the Software, and to permit persons to whom the Software is
cgraham 0:d69efd0ee139 9 * furnished to do so, subject to the following conditions:
cgraham 0:d69efd0ee139 10 *
cgraham 0:d69efd0ee139 11 * The above copyright notice and this permission notice shall be included in
cgraham 0:d69efd0ee139 12 * all copies or substantial portions of the Software.
cgraham 0:d69efd0ee139 13 *
cgraham 0:d69efd0ee139 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
cgraham 0:d69efd0ee139 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
cgraham 0:d69efd0ee139 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
cgraham 0:d69efd0ee139 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
cgraham 0:d69efd0ee139 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
cgraham 0:d69efd0ee139 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
cgraham 0:d69efd0ee139 20 * THE SOFTWARE.
cgraham 0:d69efd0ee139 21 */
cgraham 0:d69efd0ee139 22
cgraham 0:d69efd0ee139 23 /* Introduction
cgraham 0:d69efd0ee139 24 * ------------
cgraham 0:d69efd0ee139 25 * SD and MMC cards support a number of interfaces, but common to them all
cgraham 0:d69efd0ee139 26 * is one based on SPI. This is the one I'm implmenting because it means
cgraham 0:d69efd0ee139 27 * it is much more portable even though not so performant, and we already
cgraham 0:d69efd0ee139 28 * have the mbed SPI Interface!
cgraham 0:d69efd0ee139 29 *
cgraham 0:d69efd0ee139 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
cgraham 0:d69efd0ee139 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
cgraham 0:d69efd0ee139 32 *
cgraham 0:d69efd0ee139 33 * SPI Startup
cgraham 0:d69efd0ee139 34 * -----------
cgraham 0:d69efd0ee139 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
cgraham 0:d69efd0ee139 36 * asserting CS low and sending the reset command (CMD0). The card will
cgraham 0:d69efd0ee139 37 * respond with a (R1) response.
cgraham 0:d69efd0ee139 38 *
cgraham 0:d69efd0ee139 39 * CMD8 is optionally sent to determine the voltage range supported, and
cgraham 0:d69efd0ee139 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
cgraham 0:d69efd0ee139 41 * version 2.x. I'll just ignore this for now.
cgraham 0:d69efd0ee139 42 *
cgraham 0:d69efd0ee139 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
cgraham 0:d69efd0ee139 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
cgraham 0:d69efd0ee139 45 *
cgraham 0:d69efd0ee139 46 * You should also indicate whether the host supports High Capicity cards,
cgraham 0:d69efd0ee139 47 * and check whether the card is high capacity - i'll also ignore this
cgraham 0:d69efd0ee139 48 *
cgraham 0:d69efd0ee139 49 * SPI Protocol
cgraham 0:d69efd0ee139 50 * ------------
cgraham 0:d69efd0ee139 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
cgraham 0:d69efd0ee139 52 * the host starting every bus transaction by asserting the CS signal low. The
cgraham 0:d69efd0ee139 53 * card always responds to commands, data blocks and errors.
cgraham 0:d69efd0ee139 54 *
cgraham 0:d69efd0ee139 55 * The protocol supports a CRC, but by default it is off (except for the
cgraham 0:d69efd0ee139 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
cgraham 0:d69efd0ee139 57 * I'll leave the CRC off I think!
cgraham 0:d69efd0ee139 58 *
cgraham 0:d69efd0ee139 59 * Standard capacity cards have variable data block sizes, whereas High
cgraham 0:d69efd0ee139 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
cgraham 0:d69efd0ee139 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
cgraham 0:d69efd0ee139 62 * This is set with CMD16.
cgraham 0:d69efd0ee139 63 *
cgraham 0:d69efd0ee139 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
cgraham 0:d69efd0ee139 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
cgraham 0:d69efd0ee139 66 * the card gets a read command, it responds with a response token, and then
cgraham 0:d69efd0ee139 67 * a data token or an error.
cgraham 0:d69efd0ee139 68 *
cgraham 0:d69efd0ee139 69 * SPI Command Format
cgraham 0:d69efd0ee139 70 * ------------------
cgraham 0:d69efd0ee139 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
cgraham 0:d69efd0ee139 72 *
cgraham 0:d69efd0ee139 73 * +---------------+------------+------------+-----------+----------+--------------+
cgraham 0:d69efd0ee139 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
cgraham 0:d69efd0ee139 75 * +---------------+------------+------------+-----------+----------+--------------+
cgraham 0:d69efd0ee139 76 *
cgraham 0:d69efd0ee139 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
cgraham 0:d69efd0ee139 78 *
cgraham 0:d69efd0ee139 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
cgraham 0:d69efd0ee139 80 *
cgraham 0:d69efd0ee139 81 * SPI Response Format
cgraham 0:d69efd0ee139 82 * -------------------
cgraham 0:d69efd0ee139 83 * The main response format (R1) is a status byte (normally zero). Key flags:
cgraham 0:d69efd0ee139 84 * idle - 1 if the card is in an idle state/initialising
cgraham 0:d69efd0ee139 85 * cmd - 1 if an illegal command code was detected
cgraham 0:d69efd0ee139 86 *
cgraham 0:d69efd0ee139 87 * +-------------------------------------------------+
cgraham 0:d69efd0ee139 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
cgraham 0:d69efd0ee139 89 * +-------------------------------------------------+
cgraham 0:d69efd0ee139 90 *
cgraham 0:d69efd0ee139 91 * R1b is the same, except it is followed by a busy signal (zeros) until
cgraham 0:d69efd0ee139 92 * the first non-zero byte when it is ready again.
cgraham 0:d69efd0ee139 93 *
cgraham 0:d69efd0ee139 94 * Data Response Token
cgraham 0:d69efd0ee139 95 * -------------------
cgraham 0:d69efd0ee139 96 * Every data block written to the card is acknowledged by a byte
cgraham 0:d69efd0ee139 97 * response token
cgraham 0:d69efd0ee139 98 *
cgraham 0:d69efd0ee139 99 * +----------------------+
cgraham 0:d69efd0ee139 100 * | xxx | 0 | status | 1 |
cgraham 0:d69efd0ee139 101 * +----------------------+
cgraham 0:d69efd0ee139 102 * 010 - OK!
cgraham 0:d69efd0ee139 103 * 101 - CRC Error
cgraham 0:d69efd0ee139 104 * 110 - Write Error
cgraham 0:d69efd0ee139 105 *
cgraham 0:d69efd0ee139 106 * Single Block Read and Write
cgraham 0:d69efd0ee139 107 * ---------------------------
cgraham 0:d69efd0ee139 108 *
cgraham 0:d69efd0ee139 109 * Block transfers have a byte header, followed by the data, followed
cgraham 0:d69efd0ee139 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
cgraham 0:d69efd0ee139 111 *
cgraham 0:d69efd0ee139 112 * +------+---------+---------+- - - -+---------+-----------+----------+
cgraham 0:d69efd0ee139 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
cgraham 0:d69efd0ee139 114 * +------+---------+---------+- - - -+---------+-----------+----------+
cgraham 0:d69efd0ee139 115 */
cgraham 0:d69efd0ee139 116
cgraham 0:d69efd0ee139 117 #include "SDFileSystem.h"
cgraham 0:d69efd0ee139 118
cgraham 0:d69efd0ee139 119 #define SD_COMMAND_TIMEOUT 5000
cgraham 0:d69efd0ee139 120
cgraham 0:d69efd0ee139 121 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
cgraham 0:d69efd0ee139 122 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
cgraham 0:d69efd0ee139 123 _cs = 1;
cgraham 0:d69efd0ee139 124 }
cgraham 0:d69efd0ee139 125
cgraham 0:d69efd0ee139 126 #define R1_IDLE_STATE (1 << 0)
cgraham 0:d69efd0ee139 127 #define R1_ERASE_RESET (1 << 1)
cgraham 0:d69efd0ee139 128 #define R1_ILLEGAL_COMMAND (1 << 2)
cgraham 0:d69efd0ee139 129 #define R1_COM_CRC_ERROR (1 << 3)
cgraham 0:d69efd0ee139 130 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
cgraham 0:d69efd0ee139 131 #define R1_ADDRESS_ERROR (1 << 5)
cgraham 0:d69efd0ee139 132 #define R1_PARAMETER_ERROR (1 << 6)
cgraham 0:d69efd0ee139 133
cgraham 0:d69efd0ee139 134 // Types
cgraham 0:d69efd0ee139 135 // - v1.x Standard Capacity
cgraham 0:d69efd0ee139 136 // - v2.x Standard Capacity
cgraham 0:d69efd0ee139 137 // - v2.x High Capacity
cgraham 0:d69efd0ee139 138 // - Not recognised as an SD Card
cgraham 0:d69efd0ee139 139
cgraham 0:d69efd0ee139 140 #define SDCARD_FAIL 0
cgraham 0:d69efd0ee139 141 #define SDCARD_V1 1
cgraham 0:d69efd0ee139 142 #define SDCARD_V2 2
cgraham 0:d69efd0ee139 143 #define SDCARD_V2HC 3
cgraham 0:d69efd0ee139 144
cgraham 0:d69efd0ee139 145 int SDFileSystem::initialise_card() {
cgraham 0:d69efd0ee139 146 // Set to 100kHz for initialisation, and clock card with cs = 1
cgraham 0:d69efd0ee139 147 _spi.frequency(100000);
cgraham 0:d69efd0ee139 148 _cs = 1;
cgraham 0:d69efd0ee139 149 for(int i=0; i<16; i++) {
cgraham 0:d69efd0ee139 150 _spi.write(0xFF);
cgraham 0:d69efd0ee139 151 }
cgraham 0:d69efd0ee139 152
cgraham 0:d69efd0ee139 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
cgraham 0:d69efd0ee139 154 if(_cmd(0, 0) != R1_IDLE_STATE) {
cgraham 0:d69efd0ee139 155 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
cgraham 0:d69efd0ee139 156 return SDCARD_FAIL;
cgraham 0:d69efd0ee139 157 }
cgraham 0:d69efd0ee139 158
cgraham 0:d69efd0ee139 159 // send CMD8 to determine whther it is ver 2.x
cgraham 0:d69efd0ee139 160 int r = _cmd8();
cgraham 0:d69efd0ee139 161 if(r == R1_IDLE_STATE) {
cgraham 0:d69efd0ee139 162 return initialise_card_v2();
cgraham 0:d69efd0ee139 163 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
cgraham 0:d69efd0ee139 164 return initialise_card_v1();
cgraham 0:d69efd0ee139 165 } else {
cgraham 0:d69efd0ee139 166 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
cgraham 0:d69efd0ee139 167 return SDCARD_FAIL;
cgraham 0:d69efd0ee139 168 }
cgraham 0:d69efd0ee139 169 }
cgraham 0:d69efd0ee139 170
cgraham 0:d69efd0ee139 171 int SDFileSystem::initialise_card_v1() {
cgraham 0:d69efd0ee139 172 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
cgraham 0:d69efd0ee139 173 _cmd(55, 0);
cgraham 0:d69efd0ee139 174 if(_cmd(41, 0) == 0) {
cgraham 0:d69efd0ee139 175 return SDCARD_V1;
cgraham 0:d69efd0ee139 176 }
cgraham 0:d69efd0ee139 177 }
cgraham 0:d69efd0ee139 178
cgraham 0:d69efd0ee139 179 fprintf(stderr, "Timeout waiting for v1.x card\n");
cgraham 0:d69efd0ee139 180 return SDCARD_FAIL;
cgraham 0:d69efd0ee139 181 }
cgraham 0:d69efd0ee139 182
cgraham 0:d69efd0ee139 183 int SDFileSystem::initialise_card_v2() {
cgraham 0:d69efd0ee139 184
cgraham 0:d69efd0ee139 185 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
cgraham 0:d69efd0ee139 186 _cmd(55, 0);
cgraham 0:d69efd0ee139 187 if(_cmd(41, 0) == 0) {
cgraham 0:d69efd0ee139 188 _cmd58();
cgraham 0:d69efd0ee139 189 return SDCARD_V2;
cgraham 0:d69efd0ee139 190 }
cgraham 0:d69efd0ee139 191 }
cgraham 0:d69efd0ee139 192
cgraham 0:d69efd0ee139 193 fprintf(stderr, "Timeout waiting for v2.x card\n");
cgraham 0:d69efd0ee139 194 return SDCARD_FAIL;
cgraham 0:d69efd0ee139 195 }
cgraham 0:d69efd0ee139 196
cgraham 0:d69efd0ee139 197 int SDFileSystem::disk_initialize() {
cgraham 0:d69efd0ee139 198
cgraham 0:d69efd0ee139 199 int i = initialise_card();
cgraham 0:d69efd0ee139 200 // printf("init card = %d\n", i);
cgraham 0:d69efd0ee139 201 // printf("OK\n");
cgraham 0:d69efd0ee139 202
cgraham 0:d69efd0ee139 203 _sectors = _sd_sectors();
cgraham 0:d69efd0ee139 204
cgraham 0:d69efd0ee139 205 // Set block length to 512 (CMD16)
cgraham 0:d69efd0ee139 206 if(_cmd(16, 512) != 0) {
cgraham 0:d69efd0ee139 207 fprintf(stderr, "Set 512-byte block timed out\n");
cgraham 0:d69efd0ee139 208 return 1;
cgraham 0:d69efd0ee139 209 }
cgraham 0:d69efd0ee139 210
cgraham 0:d69efd0ee139 211 _spi.frequency(1000000); // Set to 1MHz for data transfer
cgraham 0:d69efd0ee139 212 return 0;
cgraham 0:d69efd0ee139 213 }
cgraham 0:d69efd0ee139 214
cgraham 0:d69efd0ee139 215 int SDFileSystem::disk_write(const char *buffer, int block_number) {
cgraham 0:d69efd0ee139 216 // set write address for single block (CMD24)
cgraham 0:d69efd0ee139 217 if(_cmd(24, block_number * 512) != 0) {
cgraham 0:d69efd0ee139 218 return 1;
cgraham 0:d69efd0ee139 219 }
cgraham 0:d69efd0ee139 220
cgraham 0:d69efd0ee139 221 // send the data block
cgraham 0:d69efd0ee139 222 _write(buffer, 512);
cgraham 0:d69efd0ee139 223 return 0;
cgraham 0:d69efd0ee139 224 }
cgraham 0:d69efd0ee139 225
cgraham 0:d69efd0ee139 226 int SDFileSystem::disk_read(char *buffer, int block_number) {
cgraham 0:d69efd0ee139 227 // set read address for single block (CMD17)
cgraham 0:d69efd0ee139 228 if(_cmd(17, block_number * 512) != 0) {
cgraham 0:d69efd0ee139 229 return 1;
cgraham 0:d69efd0ee139 230 }
cgraham 0:d69efd0ee139 231
cgraham 0:d69efd0ee139 232 // receive the data
cgraham 0:d69efd0ee139 233 _read(buffer, 512);
cgraham 0:d69efd0ee139 234 return 0;
cgraham 0:d69efd0ee139 235 }
cgraham 0:d69efd0ee139 236
cgraham 0:d69efd0ee139 237 int SDFileSystem::disk_status() { return 0; }
cgraham 0:d69efd0ee139 238 int SDFileSystem::disk_sync() { return 0; }
cgraham 0:d69efd0ee139 239 int SDFileSystem::disk_sectors() { return _sectors; }
cgraham 0:d69efd0ee139 240
cgraham 0:d69efd0ee139 241 // PRIVATE FUNCTIONS
cgraham 0:d69efd0ee139 242
cgraham 0:d69efd0ee139 243 int SDFileSystem::_cmd(int cmd, int arg) {
cgraham 0:d69efd0ee139 244 _cs = 0;
cgraham 0:d69efd0ee139 245
cgraham 0:d69efd0ee139 246 // send a command
cgraham 0:d69efd0ee139 247 _spi.write(0x40 | cmd);
cgraham 0:d69efd0ee139 248 _spi.write(arg >> 24);
cgraham 0:d69efd0ee139 249 _spi.write(arg >> 16);
cgraham 0:d69efd0ee139 250 _spi.write(arg >> 8);
cgraham 0:d69efd0ee139 251 _spi.write(arg >> 0);
cgraham 0:d69efd0ee139 252 _spi.write(0x95);
cgraham 0:d69efd0ee139 253
cgraham 0:d69efd0ee139 254 // wait for the repsonse (response[7] == 0)
cgraham 0:d69efd0ee139 255 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
cgraham 0:d69efd0ee139 256 int response = _spi.write(0xFF);
cgraham 0:d69efd0ee139 257 if(!(response & 0x80)) {
cgraham 0:d69efd0ee139 258 _cs = 1;
cgraham 0:d69efd0ee139 259 _spi.write(0xFF);
cgraham 0:d69efd0ee139 260 return response;
cgraham 0:d69efd0ee139 261 }
cgraham 0:d69efd0ee139 262 }
cgraham 0:d69efd0ee139 263 _cs = 1;
cgraham 0:d69efd0ee139 264 _spi.write(0xFF);
cgraham 0:d69efd0ee139 265 return -1; // timeout
cgraham 0:d69efd0ee139 266 }
cgraham 0:d69efd0ee139 267 int SDFileSystem::_cmdx(int cmd, int arg) {
cgraham 0:d69efd0ee139 268 _cs = 0;
cgraham 0:d69efd0ee139 269
cgraham 0:d69efd0ee139 270 // send a command
cgraham 0:d69efd0ee139 271 _spi.write(0x40 | cmd);
cgraham 0:d69efd0ee139 272 _spi.write(arg >> 24);
cgraham 0:d69efd0ee139 273 _spi.write(arg >> 16);
cgraham 0:d69efd0ee139 274 _spi.write(arg >> 8);
cgraham 0:d69efd0ee139 275 _spi.write(arg >> 0);
cgraham 0:d69efd0ee139 276 _spi.write(0x95);
cgraham 0:d69efd0ee139 277
cgraham 0:d69efd0ee139 278 // wait for the repsonse (response[7] == 0)
cgraham 0:d69efd0ee139 279 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
cgraham 0:d69efd0ee139 280 int response = _spi.write(0xFF);
cgraham 0:d69efd0ee139 281 if(!(response & 0x80)) {
cgraham 0:d69efd0ee139 282 return response;
cgraham 0:d69efd0ee139 283 }
cgraham 0:d69efd0ee139 284 }
cgraham 0:d69efd0ee139 285 _cs = 1;
cgraham 0:d69efd0ee139 286 _spi.write(0xFF);
cgraham 0:d69efd0ee139 287 return -1; // timeout
cgraham 0:d69efd0ee139 288 }
cgraham 0:d69efd0ee139 289
cgraham 0:d69efd0ee139 290
cgraham 0:d69efd0ee139 291 int SDFileSystem::_cmd58() {
cgraham 0:d69efd0ee139 292 _cs = 0;
cgraham 0:d69efd0ee139 293 int arg = 0;
cgraham 0:d69efd0ee139 294
cgraham 0:d69efd0ee139 295 // send a command
cgraham 0:d69efd0ee139 296 _spi.write(0x40 | 58);
cgraham 0:d69efd0ee139 297 _spi.write(arg >> 24);
cgraham 0:d69efd0ee139 298 _spi.write(arg >> 16);
cgraham 0:d69efd0ee139 299 _spi.write(arg >> 8);
cgraham 0:d69efd0ee139 300 _spi.write(arg >> 0);
cgraham 0:d69efd0ee139 301 _spi.write(0x95);
cgraham 0:d69efd0ee139 302
cgraham 0:d69efd0ee139 303 // wait for the repsonse (response[7] == 0)
cgraham 0:d69efd0ee139 304 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
cgraham 0:d69efd0ee139 305 int response = _spi.write(0xFF);
cgraham 0:d69efd0ee139 306 if(!(response & 0x80)) {
cgraham 0:d69efd0ee139 307 int ocr = _spi.write(0xFF) << 24;
cgraham 0:d69efd0ee139 308 ocr |= _spi.write(0xFF) << 16;
cgraham 0:d69efd0ee139 309 ocr |= _spi.write(0xFF) << 8;
cgraham 0:d69efd0ee139 310 ocr |= _spi.write(0xFF) << 0;
cgraham 0:d69efd0ee139 311 // printf("OCR = 0x%08X\n", ocr);
cgraham 0:d69efd0ee139 312 _cs = 1;
cgraham 0:d69efd0ee139 313 _spi.write(0xFF);
cgraham 0:d69efd0ee139 314 return response;
cgraham 0:d69efd0ee139 315 }
cgraham 0:d69efd0ee139 316 }
cgraham 0:d69efd0ee139 317 _cs = 1;
cgraham 0:d69efd0ee139 318 _spi.write(0xFF);
cgraham 0:d69efd0ee139 319 return -1; // timeout
cgraham 0:d69efd0ee139 320 }
cgraham 0:d69efd0ee139 321
cgraham 0:d69efd0ee139 322 int SDFileSystem::_cmd8() {
cgraham 0:d69efd0ee139 323 _cs = 0;
cgraham 0:d69efd0ee139 324
cgraham 0:d69efd0ee139 325 // send a command
cgraham 0:d69efd0ee139 326 _spi.write(0x40 | 8); // CMD8
cgraham 0:d69efd0ee139 327 _spi.write(0x00); // reserved
cgraham 0:d69efd0ee139 328 _spi.write(0x00); // reserved
cgraham 0:d69efd0ee139 329 _spi.write(0x01); // 3.3v
cgraham 0:d69efd0ee139 330 _spi.write(0xAA); // check pattern
cgraham 0:d69efd0ee139 331 _spi.write(0x87); // crc
cgraham 0:d69efd0ee139 332
cgraham 0:d69efd0ee139 333 // wait for the repsonse (response[7] == 0)
cgraham 0:d69efd0ee139 334 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
cgraham 0:d69efd0ee139 335 char response[5];
cgraham 0:d69efd0ee139 336 response[0] = _spi.write(0xFF);
cgraham 0:d69efd0ee139 337 if(!(response[0] & 0x80)) {
cgraham 0:d69efd0ee139 338 for(int j=1; j<5; j++) {
cgraham 0:d69efd0ee139 339 response[i] = _spi.write(0xFF);
cgraham 0:d69efd0ee139 340 }
cgraham 0:d69efd0ee139 341 _cs = 1;
cgraham 0:d69efd0ee139 342 _spi.write(0xFF);
cgraham 0:d69efd0ee139 343 return response[0];
cgraham 0:d69efd0ee139 344 }
cgraham 0:d69efd0ee139 345 }
cgraham 0:d69efd0ee139 346 _cs = 1;
cgraham 0:d69efd0ee139 347 _spi.write(0xFF);
cgraham 0:d69efd0ee139 348 return -1; // timeout
cgraham 0:d69efd0ee139 349 }
cgraham 0:d69efd0ee139 350
cgraham 0:d69efd0ee139 351 int SDFileSystem::_read(char *buffer, int length) {
cgraham 0:d69efd0ee139 352 _cs = 0;
cgraham 0:d69efd0ee139 353
cgraham 0:d69efd0ee139 354 // read until start byte (0xFF)
cgraham 0:d69efd0ee139 355 while(_spi.write(0xFF) != 0xFE);
cgraham 0:d69efd0ee139 356
cgraham 0:d69efd0ee139 357 // read data
cgraham 0:d69efd0ee139 358 for(int i=0; i<length; i++) {
cgraham 0:d69efd0ee139 359 buffer[i] = _spi.write(0xFF);
cgraham 0:d69efd0ee139 360 }
cgraham 0:d69efd0ee139 361 _spi.write(0xFF); // checksum
cgraham 0:d69efd0ee139 362 _spi.write(0xFF);
cgraham 0:d69efd0ee139 363
cgraham 0:d69efd0ee139 364 _cs = 1;
cgraham 0:d69efd0ee139 365 _spi.write(0xFF);
cgraham 0:d69efd0ee139 366 return 0;
cgraham 0:d69efd0ee139 367 }
cgraham 0:d69efd0ee139 368
cgraham 0:d69efd0ee139 369 int SDFileSystem::_write(const char *buffer, int length) {
cgraham 0:d69efd0ee139 370 _cs = 0;
cgraham 0:d69efd0ee139 371
cgraham 0:d69efd0ee139 372 // indicate start of block
cgraham 0:d69efd0ee139 373 _spi.write(0xFE);
cgraham 0:d69efd0ee139 374
cgraham 0:d69efd0ee139 375 // write the data
cgraham 0:d69efd0ee139 376 for(int i=0; i<length; i++) {
cgraham 0:d69efd0ee139 377 _spi.write(buffer[i]);
cgraham 0:d69efd0ee139 378 }
cgraham 0:d69efd0ee139 379
cgraham 0:d69efd0ee139 380 // write the checksum
cgraham 0:d69efd0ee139 381 _spi.write(0xFF);
cgraham 0:d69efd0ee139 382 _spi.write(0xFF);
cgraham 0:d69efd0ee139 383
cgraham 0:d69efd0ee139 384 // check the repsonse token
cgraham 0:d69efd0ee139 385 if((_spi.write(0xFF) & 0x1F) != 0x05) {
cgraham 0:d69efd0ee139 386 _cs = 1;
cgraham 0:d69efd0ee139 387 _spi.write(0xFF);
cgraham 0:d69efd0ee139 388 return 1;
cgraham 0:d69efd0ee139 389 }
cgraham 0:d69efd0ee139 390
cgraham 0:d69efd0ee139 391 // wait for write to finish
cgraham 0:d69efd0ee139 392 while(_spi.write(0xFF) == 0);
cgraham 0:d69efd0ee139 393
cgraham 0:d69efd0ee139 394 _cs = 1;
cgraham 0:d69efd0ee139 395 _spi.write(0xFF);
cgraham 0:d69efd0ee139 396 return 0;
cgraham 0:d69efd0ee139 397 }
cgraham 0:d69efd0ee139 398
cgraham 0:d69efd0ee139 399 static int ext_bits(char *data, int msb, int lsb) {
cgraham 0:d69efd0ee139 400 int bits = 0;
cgraham 0:d69efd0ee139 401 int size = 1 + msb - lsb;
cgraham 0:d69efd0ee139 402 for(int i=0; i<size; i++) {
cgraham 0:d69efd0ee139 403 int position = lsb + i;
cgraham 0:d69efd0ee139 404 int byte = 15 - (position >> 3);
cgraham 0:d69efd0ee139 405 int bit = position & 0x7;
cgraham 0:d69efd0ee139 406 int value = (data[byte] >> bit) & 1;
cgraham 0:d69efd0ee139 407 bits |= value << i;
cgraham 0:d69efd0ee139 408 }
cgraham 0:d69efd0ee139 409 return bits;
cgraham 0:d69efd0ee139 410 }
cgraham 0:d69efd0ee139 411
cgraham 0:d69efd0ee139 412 int SDFileSystem::_sd_sectors() {
cgraham 0:d69efd0ee139 413
cgraham 0:d69efd0ee139 414 // CMD9, Response R2 (R1 byte + 16-byte block read)
cgraham 0:d69efd0ee139 415 if(_cmdx(9, 0) != 0) {
cgraham 0:d69efd0ee139 416 fprintf(stderr, "Didn't get a response from the disk\n");
cgraham 0:d69efd0ee139 417 return 0;
cgraham 0:d69efd0ee139 418 }
cgraham 0:d69efd0ee139 419
cgraham 0:d69efd0ee139 420 char csd[16];
cgraham 0:d69efd0ee139 421 if(_read(csd, 16) != 0) {
cgraham 0:d69efd0ee139 422 fprintf(stderr, "Couldn't read csd response from disk\n");
cgraham 0:d69efd0ee139 423 return 0;
cgraham 0:d69efd0ee139 424 }
cgraham 0:d69efd0ee139 425
cgraham 0:d69efd0ee139 426 // csd_structure : csd[127:126]
cgraham 0:d69efd0ee139 427 // c_size : csd[73:62]
cgraham 0:d69efd0ee139 428 // c_size_mult : csd[49:47]
cgraham 0:d69efd0ee139 429 // read_bl_len : csd[83:80] - the *maximum* read block length
cgraham 0:d69efd0ee139 430
cgraham 0:d69efd0ee139 431 int csd_structure = ext_bits(csd, 127, 126);
cgraham 0:d69efd0ee139 432 int c_size = ext_bits(csd, 73, 62);
cgraham 0:d69efd0ee139 433 int c_size_mult = ext_bits(csd, 49, 47);
cgraham 0:d69efd0ee139 434 int read_bl_len = ext_bits(csd, 83, 80);
cgraham 0:d69efd0ee139 435
cgraham 0:d69efd0ee139 436 // printf("CSD_STRUCT = %d\n", csd_structure);
cgraham 0:d69efd0ee139 437
cgraham 0:d69efd0ee139 438 if(csd_structure != 0) {
cgraham 0:d69efd0ee139 439 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
cgraham 0:d69efd0ee139 440 return 0;
cgraham 0:d69efd0ee139 441 }
cgraham 0:d69efd0ee139 442
cgraham 0:d69efd0ee139 443 // memory capacity = BLOCKNR * BLOCK_LEN
cgraham 0:d69efd0ee139 444 // where
cgraham 0:d69efd0ee139 445 // BLOCKNR = (C_SIZE+1) * MULT
cgraham 0:d69efd0ee139 446 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
cgraham 0:d69efd0ee139 447 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
cgraham 0:d69efd0ee139 448
cgraham 0:d69efd0ee139 449 int block_len = 1 << read_bl_len;
cgraham 0:d69efd0ee139 450 int mult = 1 << (c_size_mult + 2);
cgraham 0:d69efd0ee139 451 int blocknr = (c_size + 1) * mult;
cgraham 0:d69efd0ee139 452 int capacity = blocknr * block_len;
cgraham 0:d69efd0ee139 453
cgraham 0:d69efd0ee139 454 int blocks = capacity / 512;
cgraham 0:d69efd0ee139 455
cgraham 0:d69efd0ee139 456 return blocks;
cgraham 0:d69efd0ee139 457 }