Diff: src/all_io.cpp

Revision:

0:44a3005d4f20

Child:

1:9f8583ba2431

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/all_io.cpp	Sat Nov 24 18:22:31 2018 +0000
@@ -0,0 +1,57 @@
+//-------------------------------------------------------------------------------
+// 
+//  Treehouse Designs Inc.
+//  Colorado Springs, Colorado
+// 
+//  Copyright (c) 2016 by Treehouse Designs Inc. 
+//  Copyright (c) 2018 by Agility Power Systems Inc. 
+// 
+//  This code is the property of Treehouse Designs, Inc. (Treehouse) and
+//  Agility Power Systems Inc. (Agility) and may not be redistributed
+//  in any form without prior written permission from 
+//  both copyright holders, Treehouse and Agility.
+//
+//  The above copyright notice and this permission notice shall be included in
+//  all copies or substantial portions of the Software.
+// 
+//   
+//-------------------------------------------------------------------------------
+// 
+//  REVISION HISTORY:
+//  
+//   $Author: $
+//   $Rev: $
+//   $Date: $
+//   $URL: $
+// 
+//-------------------------------------------------------------------------------
+
+#include "mbed.h"
+#include "all_io.h"
+#include "PortOut.h"
+
+// Digital IO
+//
+// Slots 12 to 0 are activated with the wr_out signals
+// wr_out[13] = slots[12:0]
+DigitalOut wr_out[13] = {PC_12, PC_11, PC_10, PC_9, PC_8, PC_7, PC_6, PC_5, PC_4, PC_3, PC_2, PC_1, PC_0};
+// en_out are binary weighted signals that activate groups of DC-DC converters on the slot cards.
+// en_out[6] = {en32, en16, en8, en4, en2, en1}
+DigitalOut en_out[6] = {PA_9, PA_8, PA_7, PA_6, PA_5, PA_4};
+// Expansion port signals
+// eport[16] = eport[18:3]
+DigitalIn  eport[16] = {PB_15, PB_14, PB_13, PB_12, PB_11, PB_10, PB_9, PB_8, PB_7, PB_6, PB_5, PB_4, PB_3, PB_2, PB_1, PB_0};
+// Use extchlat to latch new wr_out signals to the slots.
+DigitalOut extchlat = PA_1;
+// all_on indicates that the load demanded a high amount of current and all DC-DC converters are enabled.
+DigitalIn  all_on = PA_0;
+
+// Analog IO
+//
+AnalogIn V48(PA_13);
+AnalogIn V24(PA_15);
+AnalogIn V12(PA_14);
+
+AnalogIn I48(PA_12);
+AnalogIn I24(PA_10);
+AnalogIn I12(PA_11);